Display panel, manufacturing method thereof and display device

Abstract

The invention discloses a display panel, a manufacturing method thereof and a display device. The display panel comprises a substrate, a first conductive layer, a semiconductor layer and a second conductive layer, the first conductive layer is arranged on the substrate and comprises a data line and a shading part; the semiconductor layer is arranged on the side, away from the substrate, of the first conductive layer, the semiconductor layer comprises an active part and a functional electrode which are arranged at an interval, and the active part comprises a channel part and a first contact part and a second contact part which are connected to the two sides of the channel part; the second conductive layer is arranged on one side, away from the first conductive layer, of the semiconductor layer; wherein the second conductive layer comprises a first electrode piece and a second electrode piece, the first electrode piece is connected with the first contact part and the data line, one part of the second electrode piece is connected with the second contact part, and the other part of the second electrode piece is located on the side, away from the substrate, of the functional electrode; the number of photomasks in the manufacturing process of the display panel can be reduced, the process cost of the display panel is reduced, and the process time of the display panel is shortened.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Thin Film Transistor (TFT) array substrate is an important component of display device, which can be formed on a glass substrate or a flexible substrate. It is usually used as a switching device and a driving device in liquid crystal display (LCD) and organic light emitting display (OLED).

[0003] However, in the process of manufacturing the thin film transistor array substrate, multiple film layers in the thin film transistor array substrate need to use multiple masks to perform photolithography. Figure 1 , the array substrate comprises a data line layer 1 disposed on the substrate, a buffer layer 2 disposed on the substrate and covering the data line layer 1, a semiconductor layer 3 disposed on the buffer layer 2, a gate insulating layer 4a and a gate layer 4b disposed on the semiconductor layer 3, a first inorganic insulating layer 5 disposed on the buffer layer 2 and covering the semiconductor layer 3 and the gate layer 4, an organic insulating layer 6 disposed on the first inorganic insulating layer 5, a common electrode layer 7 disposed on the organic insulating layer 6, a second inorganic insulating layer 8 disposed on the organic insulating layer 6 and covering the common electrode layer 7, and a pixel electrode layer 9 disposed on the second inorganic insulating layer 8. Specifically, the data line layer 1 needs to be formed by one photomask, the via hole in the buffer layer 2 needs to be formed by one photomask, the semiconductor layer 3 needs to be formed by one photomask, the gate layer 4 and the gate insulating layer need to be formed by one photomask, the via hole in the organic insulating layer 6 needs to be formed by one photomask, the via hole in the first inorganic insulating layer 5 and the second inorganic insulating layer 8 needs to be formed by one photomask, the common electrode layer 7 needs to be formed by one photomask, and the pixel electrode layer 9 needs to be formed by one photomask; that is, Figure 1 The structure in the array substrate shown requires 8 mask processes, resulting in higher production costs and more complex processes, higher mask costs, and the more masks there are, the higher the cost of the thin film transistor array substrate process, and the increased process time and complexity. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a manufacturing method thereof, and a display device, which can reduce the number of masks in the display panel manufacturing process and reduce the process cost of the display panel.

[0005] An embodiment of the present application provides a display panel, comprising:

[0006] substrate;

[0007] A first conductive layer, disposed on the substrate, wherein the first conductive layer includes a data line and a light shielding portion;

[0008] A semiconductor layer is disposed on a side of the first conductive layer away from the substrate, the semiconductor layer comprising an active portion and a functional electrode disposed at intervals, the active portion comprising a channel portion and a first contact portion and a second contact portion connected to two sides of the channel portion;

[0009] A second conductive layer is disposed on a side of the semiconductor layer away from the first conductive layer;

[0010] The second conductive layer includes a first electrode member and a second electrode member, the first electrode member connects the first contact portion and the data line, a portion of the second electrode member is connected to the second contact portion, and another portion of the second electrode member is located on a side of the functional electrode away from the substrate.

[0011] In one embodiment of the present application, the display panel further includes:

[0012] a buffer layer, disposed between the first conductive layer and the semiconductor layer;

[0013] A first insulating layer, disposed between the semiconductor layer and the second conductive layer;

[0014] a second insulating layer, disposed between the first insulating layer and the second conductive layer;

[0015] Among them, a first opening corresponding to the functional electrode is opened in the display panel, and the first opening passes through the first insulating layer and part of the film layer in the second insulating layer. The second electrode member includes a first sub-electrode arranged at the bottom of the first opening, and the first sub-electrode is located on the side of the functional electrode away from the substrate and is spaced apart from the functional electrode.

[0016] In one embodiment of the present application, the second insulating layer includes an organic insulating sublayer disposed between the first insulating layer and the second conductive layer and an inorganic insulating sublayer disposed between the organic insulating sublayer and the second conductive layer.

[0017] In one embodiment of the present application, the first opening passes through the organic insulating sublayer, the sidewall of the first opening is the surface of the inorganic insulating sublayer, and the first insulating layer and the inorganic insulating sublayer are arranged between the first sub-electrode and the functional electrode.

[0018] In one embodiment of the present application, the first opening passes through the organic insulating sublayer and the first insulating layer, the sidewall of the first opening is the surface of the inorganic insulating sublayer, and the inorganic insulating sublayer is arranged between the first sub-electrode and the functional electrode.

[0019] In one embodiment of the present application, the second insulating layer includes an organic insulating sublayer disposed between the first insulating layer and the second conductive layer;

[0020] Alternatively, the second insulating layer includes an inorganic insulating sublayer disposed between the first insulating layer and the second conductive layer.

[0021] In one embodiment of the present application, the display panel is further provided with a second opening passing through the second insulating layer and the first insulating layer and corresponding to the first contact portion, and a third opening passing through the second insulating layer and the first insulating layer and corresponding to the second contact portion, the first electrode member is connected to the first contact portion through the second opening, the second electrode member also includes a second sub-electrode connected to the first sub-electrode, one end of the second sub-electrode is located on a side of the second insulating layer away from the first insulating layer, and the other end of the second sub-electrode is connected to the second contact portion through the third opening.

[0022] In an embodiment of the present application, a fourth opening is further provided in the display panel, passing through the second insulating layer and the first insulating layer and corresponding to the data line, and the first electrode member is further connected to the data line through the fourth opening.

[0023] In one embodiment of the present application, the depth of the fourth opening is greater than the depth of the second opening, and the depth of the fourth opening is greater than the depth of the third opening.

[0024] In one embodiment of the present application, the first electrode member covers the sidewall of the second opening, the sidewall of the fourth opening, a portion of the surface of the data line away from the substrate, and at least a portion of the surface of the first contact portion away from the substrate;

[0025] The second sub-electrode covers the sidewall of the third opening and at least a portion of the surface of the second contact portion away from the substrate.

[0026] In one embodiment of the present application, the buffer layer includes a first sub-portion and a second sub-portion that are spaced apart from each other, the first sub-portion is located between the active portion and the substrate, and the second sub-portion is located between the functional electrode and the substrate.

[0027] In one embodiment of the present application, an orthographic projection of the buffer layer on the substrate coincides with an orthographic projection of the semiconductor layer on the substrate.

[0028] In one embodiment of the present application, the display panel further comprises a liquid crystal layer disposed on a side of the second conductive layer away from the substrate and an opposing substrate disposed on a side of the liquid crystal layer away from the second conductive layer, and the second electrode member is a pixel electrode;

[0029] Alternatively, the display panel further comprises a light-emitting functional layer disposed on a side of the second conductive layer away from the substrate and a cathode layer disposed on a side of the light-emitting functional layer away from the second conductive layer, and the second electrode member is an anode.

[0030] In one embodiment of the present application, the material of the semiconductor layer includes an oxide semiconductor material.

[0031] According to the above-mentioned object of the present application, an embodiment of the present application further provides a method for manufacturing a display panel, which includes:

[0032] forming a first conductive layer on a substrate, wherein a data line and a light shielding portion are formed in the first conductive layer;

[0033] A semiconductor layer is formed on a side of the first conductive layer away from the substrate, wherein an active portion and a functional electrode are formed in the semiconductor layer and a channel portion and a first contact portion and a second contact portion connected to two sides of the channel portion are formed in the active portion;

[0034] A second conductive layer is formed on a side of the semiconductor layer away from the first conductive layer, and a first electrode member and a second electrode member are formed in the second conductive layer. The first electrode member connects the first contact portion and the data line, a portion of the second electrode member is connected to the second contact portion, and another portion of the second electrode member is located on a side of the functional electrode away from the substrate.

[0035] According to the above-mentioned purpose of the present application, an embodiment of the present application further provides a display device, which includes the display panel, or a display panel manufactured by the manufacturing method of the display panel.

[0036] The present application provides a display panel and a manufacturing method thereof, and a display device, wherein a functional electrode is formed by using a semiconductor layer, and a first electrode member and a second electrode member are prepared on the same film layer, that is, located in a second conductive layer, wherein the second electrode member is connected to a second contact portion on one hand to serve as a source or a drain, and on the other hand, the second electrode member is also located on a side of the functional electrode away from a substrate, that is, arranged opposite to the functional electrode, and thus a capacitor can be formed between the functional electrode and the oppositely arranged second electrode member, and thus the present application does not require an additional mask to prepare a capacitor plate, which can reduce the number of masks in the display panel manufacturing process, reduce the process cost of the display panel, and shorten the process time of the display panel.

[0037] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0039] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0040] Figure 1 A schematic diagram of the structure of a display panel in the prior art;

[0041] Figure 2 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0042] Figure 3 Another schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0043] Figure 4 Another schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0044] Figure 5 Another schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0045] Figure 6 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0046] Figures 7 to 12 A schematic diagram of a manufacturing process of a display panel provided in an embodiment of the present application;

[0047] Figures 13 to 15A schematic diagram of another manufacturing process structure of a display panel provided in an embodiment of the present application.

[0048] Description of reference numerals:

[0049] 10. substrate; 101. first opening; 102. second opening; 103. third opening; 104. fourth opening; 1011. first middle hole; 1021. second middle hole; 1031. third middle hole; 1041. fourth middle hole;

[0050] 20, first conductive layer; 21, data line; 22, light shielding portion;

[0051] 30. semiconductor layer; 31. channel portion; 32. first contact portion; 33. second contact portion; 32. functional electrode; 300. semiconductor material layer;

[0052] 40, second conductive layer; 41, first electrode member; 42, second electrode member; 421, first sub-electrode; 422, second sub-electrode;

[0053] 51, buffer layer; 511, first sub-unit; 512, second sub-unit; 510, buffer material layer; 52, first insulating layer; 53, organic insulating layer; 54, second insulating layer; 55, pixel definition layer; 56, organic light emitting layer; 57, cathode layer;

[0054] 61. gate insulating portion; 62. gate; 610. gate insulating material layer; 620. gate material layer;

[0055] 70. Photoresist layer; 71. First photoresist block; 72. Second photoresist block. DETAILED DESCRIPTION

[0056] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0057] Please refer to Figure 2 An embodiment of the present application provides a display panel, which includes a substrate 10, a first conductive layer 20, a semiconductor layer 30 and a second conductive layer 40.

[0058] Among them, the first conductive layer 20 is arranged on the substrate 10, and the first conductive layer 20 includes a data line 21 and a light shielding portion 22; the semiconductor layer 30 is arranged on the side of the first conductive layer 20 away from the substrate 10, and the semiconductor layer 30 includes an active portion 31 and a functional electrode 32 arranged at intervals, and the active portion 31 includes a channel portion 311 and a first contact portion 312 and a second contact portion 313 connected to both sides of the channel portion 311; the second conductive layer 40 is arranged on the side of the semiconductor layer 30 away from the first conductive layer 20.

[0059] Furthermore, the second conductive layer 40 includes a first electrode member 41 and a second electrode member 42, the first electrode member 41 connects the first contact portion 312 and the data line 21, a portion of the second electrode member 42 is connected to the second contact portion 313, and another portion of the second electrode member 42 is located on the side of the functional electrode 32 away from the substrate 10.

[0060] During the implementation of the application, the embodiment of the present application forms the functional electrode 32 by using the semiconductor layer 30, and at the same time prepares the first electrode component 41 and the second electrode component 42 in the same film layer, that is, located in the second conductive layer 40, wherein the second electrode component 42 is connected to the second contact portion 313 on the one hand to serve as a source or a drain, and on the other hand, the second electrode component 42 is also located on the side of the functional electrode 32 away from the substrate 10, that is, it is arranged opposite to the functional electrode 32, and thus a capacitor can also be formed between the functional electrode 32 and the oppositely arranged second electrode component 42, and thus the embodiment of the present application does not require additional masks to prepare capacitor plates, which can reduce the number of masks in the display panel process, reduce the process cost of the display panel, and shorten the process time of the display panel.

[0061] For details, please refer to Figure 2 The display panel also includes a buffer layer 51, a gate electrode 62, a gate insulating layer 61, a first insulating layer 52 and a second insulating layer 53; wherein the buffer layer 51 is arranged between the first conductive layer 20 and the semiconductor layer 30, the first insulating layer 52 is arranged between the semiconductor layer 30 and the second conductive layer 40, the second insulating layer 53 is arranged between the first insulating layer 52 and the second conductive layer 40, the gate insulating layer 61 is arranged between the semiconductor layer 30 and the first insulating layer 52, and the gate electrode 62 is arranged between the gate insulating layer 61 and the first insulating layer 52.

[0062] In some embodiments, the first conductive layer 20 includes data lines 21 and a shading portion 22 that are spaced apart from each other, and the semiconductor layer 30 includes an active portion 31 and a functional electrode 32 that are spaced apart from each other, and the shading portion 22 can be located between the active portion 31 and the substrate 10; wherein the active portion 31 includes a channel portion 311 and a first contact portion 312 and a second contact portion 313 connected to opposite sides of the channel portion 311, and the shading portion 22 is at least located between the channel portion 311 and the substrate 10, that is, the orthographic projection of the channel portion 311 on the substrate 10 is located within the coverage range of the orthographic projection of the shading portion 22 on the substrate 10, and thus the shading portion 22 can block light from one side of the substrate 10, thereby reducing the influence of light on the electrical properties of the channel portion 311.

[0063] It can be understood that the channel portion 311 is made of semiconductor material, and the first contact portion 312 , the second contact portion 313 and the functional electrode 32 can be formed by conducting the semiconductor material.

[0064] In some embodiments, the material of the semiconductor layer 30 may include an oxide semiconductor material, specifically a metal oxide semiconductor material. For example, the material of the semiconductor layer 30 may include at least one of indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) and indium gallium zinc tin oxide (IGZTO).

[0065] In some embodiments, the buffer layer 51 includes a first sub-portion 511 and a second sub-portion 512 arranged at intervals; wherein the first sub-portion 511 is arranged on the substrate 10 and covers the shading portion 22, and the first sub-portion 511 is also located between the substrate 10 and the active portion 31, further, the first sub-portion 511 is also located between the shading portion 22 and the active portion 31; the second sub-portion 512 is located between the substrate 10 and the functional electrode 32.

[0066] It should be noted that the first sub-portion 511 and the second sub-portion 512 in the buffer layer 51 are respectively arranged corresponding to the active portion 31 and the functional electrode 32 in the semiconductor layer 30, and thus in the process, the same mask can be used to pattern the buffer layer 51 and the semiconductor layer 30 to form the first sub-portion 511, the second sub-portion 512, the active portion 31 and the functional electrode 32; therefore, the pattern of the buffer layer 51 is the same as the pattern of the semiconductor layer 30, that is, the orthographic projection of the buffer layer 51 on the substrate 10 coincides with the orthographic projection of the semiconductor layer 30 on the substrate 10; and thus the embodiment of the present application can effectively reduce the number of masks in the display panel process and reduce the production cost of the display panel.

[0067] In some embodiments, the gate insulating layer 61 is disposed on a surface of the active portion 31 away from the first sub-portion 511, and further, the gate insulating layer 61 is disposed on a surface of the channel portion 311 away from the first sub-portion 511; the gate 62 is disposed on a surface of the gate insulating layer 61 away from the active portion 31, and further, the gate 62 is disposed on a surface of the gate insulating layer 61 away from the channel portion 311.

[0068] In some embodiments, the first insulating layer 52 covers part of the substrate 10, part of the data line 21, part of the active portion 31, the gate 62 and part of the functional electrode 32; the second insulating layer 53 is arranged on the side of the first insulating layer 52 away from the substrate 10, and the second conductive layer 40 is arranged on the second insulating layer 53.

[0069] The second conductive layer 40 includes a first electrode member 41 and a second electrode member 42 which are spaced apart from each other. The second electrode member 42 includes a first sub-electrode 421 and a second sub-electrode 422 which are connected to each other. The first sub-electrode 421 is located on a side of the functional electrode 32 away from the substrate 10 and is spaced apart from the functional electrode 32 .

[0070] In some embodiments, the material of the second conductive layer 40 includes indium tin oxide (ITO).

[0071] In some embodiments, a first opening 101 is provided in the display panel and is located on the side of the functional electrode 32 away from the substrate 10, and the depth of the first opening 101 is less than the sum of the thicknesses of the first insulating layer 52 and the second insulating layer 53 on the side of the functional electrode 32 away from the substrate 10, and the first sub-electrode 421 is arranged at the bottom of the first opening 101 and is spaced apart from the functional electrode 32; wherein, in the embodiment of the present application, the first opening 101 is formed in the first insulating layer 52 and / or the second insulating layer 53, and the first opening 101 passes through part of the film layers in the first insulating layer 52 and the second insulating layer 53; and the first sub-electrode 421 is arranged in the first opening 101, thereby reducing the distance between the functional electrode 32 and the first sub-electrode 421, increasing the capacitance of the storage capacitor formed between the functional electrode 32 and the first sub-electrode 421, and improving the display effect of the display panel.

[0072] In some embodiments, the display panel further includes a second opening 102 that passes through the second insulating layer 53 and the first insulating layer 52 and is disposed corresponding to the first contact portion 312, and a third opening 103 that passes through the second insulating layer 53 and the first insulating layer 52 and is disposed corresponding to the second contact portion 313, and the second opening 102 can leak at least a portion of the surface of the first contact portion 312, and the third opening 103 can expose at least a portion of the surface of the second contact portion 313, the first electrode member 41 passes through the second opening 102 and is connected to the first contact portion 312, and one portion of the second sub-electrode 422 is The end is located on the side of the second insulating layer 53 away from the first insulating layer 52, and the other end of the second sub-electrode 422 passes through the third opening 103 and is connected to the second contact portion 313; for example, when the display panel is a liquid crystal display panel, the second sub-electrode 422 can be used as a pixel electrode, wherein the functional electrode 32 forms a fringe electric field with the second sub-electrode 422 on the one hand to drive the liquid crystal molecules to deflect, and on the other hand, the functional electrode 32 can also form a storage capacitor with the first sub-electrode 421 arranged oppositely, that is, the display panel provided in the embodiment of the present application can be a HFS-type liquid crystal display panel.

[0073] It should be noted that the second sub-electrode 422 and the first sub-electrode 421 are an integrally formed structure, that is, a portion of the second electrode member 42 can be used as a pixel electrode and form a fringe electric field with the functional electrode 32, a portion of the second electrode member 42 is arranged opposite to the functional electrode 32 to form a storage capacitor, and another portion of the second electrode member 42 is connected to the second contact portion 313 to realize the function of a source or a drain.

[0074] Furthermore, a fourth opening 104 is provided in the display panel, passing through the second insulating layer 53 and the first insulating layer 52 and corresponding to the data line 21 , and the fourth opening 104 can expose a portion of the surface of the data line 21 , and the first electrode member 41 is also connected to the data line 21 through the fourth opening 104 .

[0075] Continuing from the above, the first electrode member 41 covers the side wall of the second opening 102, the side wall of the fourth opening 104, a portion of the surface of the data line 21 away from the substrate 10, and at least a portion of the surface of the first contact portion 312 away from the substrate 10; the second sub-electrode 422 covers the side wall of the third opening 103 and at least a portion of the surface of the second contact portion 313 away from the substrate 10.

[0076] In some embodiments, the first opening 101 is located on a side of the functional electrode 32 away from the substrate 10, the second opening 102 is located on a side of the first contact portion 312 away from the substrate 10, the third opening 103 is located on a side of the second contact portion 313 away from the substrate 10, and the fourth opening 104 is located on a side of the data line 21 away from the substrate 10; and the first conductive layer 20 is closer to the substrate 10 relative to the semiconductor layer 30, therefore, the depth of the fourth opening 104 is greater than the depth of the first opening 101, the depth of the fourth opening 104 is greater than the depth of the second opening 102, and the depth of the fourth opening 104 is greater than the depth of the third opening 103; the depth of the first opening 101, the depth of the second opening 102, and the depth of the third opening 103 may be equal.

[0077] In one embodiment of the present application, please refer to Figure 2 The second insulating layer 53 includes an organic insulating sublayer 531 arranged between the first insulating layer 52 and the second conductive layer 40 and an inorganic insulating sublayer 532 arranged between the organic insulating sublayer 531 and the second conductive layer 40; the organic insulating sublayer 531 covers the first insulating layer 52, and the inorganic insulating sublayer 532 covers the organic insulating sublayer 531, and the second conductive layer 40 is arranged on the inorganic insulating sublayer 532.

[0078] In some embodiments, the materials of the buffer layer 51, the first insulating layer 52 and the inorganic insulating sublayer 532 may include inorganic materials, such as silicon nitride or silicon oxide, and the material of the organic insulating sublayer 531 may include organic materials, such as polyimide, polycarbonate or polymethyl methacrylate.

[0079] The first opening 101 passes through the organic insulating sublayer 531 and the first insulating layer 52, and the side wall of the first opening 101 is the surface of the inorganic insulating sublayer 532. The inorganic insulating sublayer 532 is arranged between the first sub-electrode 421 and the functional electrode 32; wherein the water vapor blocking effect of the inorganic insulating sublayer 532 is higher than that of the organic insulating sublayer 531. Therefore, the side wall of the first opening 101 is the inorganic insulating sublayer 532, which can effectively improve the water vapor blocking effect of the side wall of the first opening 101.

[0080] In addition, the functional electrode 32 and the first sub-electrode 421 are separated only by an inorganic insulating sub-layer 532 , which can further reduce the distance between the functional electrode 32 and the first sub-electrode 421 , effectively increasing the size of the capacitance formed between the functional electrode 32 and the first sub-electrode 421 .

[0081] Further, the second opening 102 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes at least a portion of the surface of the first contact portion 312, and the sidewalls of the second opening 102 are the surface of the inorganic insulating sublayer 532, the surface of the organic insulating sublayer 531 and the surface of the first insulating layer 52. The third opening 103 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes at least a portion of the surface of the second contact portion 313, and the sidewalls of the third opening 103 are the surface of the inorganic insulating sublayer 532, the surface of the organic insulating sublayer 531 and the surface of the first insulating layer 52. The fourth opening 104 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes a portion of the surface of the data line 21, and the sidewalls of the fourth opening 104 are the surface of the inorganic insulating sublayer 532, the surface of the organic insulating sublayer 531 and the surface of the first insulating layer 52.

[0082] In another embodiment of the present application, please refer to Figure 3 , and Figure 2 The difference between the illustrated embodiments is that the second opening 102 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes at least a portion of the surface of the first contact portion 312, and the sidewalls of the second opening 102 are the surface of the inorganic insulating sublayer 532 and the surface of the first insulating layer 52. The third opening 103 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes at least a portion of the surface of the second contact portion 313, and the sidewalls of the third opening 103 are the surface of the inorganic insulating sublayer 532 and the surface of the first insulating layer 52. The fourth opening 104 passes through the inorganic insulating sublayer 532, the organic insulating sublayer 531 and the first insulating layer 52, and exposes a portion of the surface of the data line 21, and the sidewalls of the fourth opening 104 are the surface of the inorganic insulating sublayer 532 and the surface of the first insulating layer 52.

[0083] Among them, the side walls of the second opening 102, the third opening 103 and the fourth opening 104 are all the surface of the inorganic insulating sublayer 532 and the surface of the first insulating layer 52, that is, they are all surfaces of inorganic materials, and thus, compared with organic materials, the water vapor blocking effect of the side walls of the second opening 102, the third opening 103 and the fourth opening 104 can be effectively improved.

[0084] In another embodiment of the present application, please refer to Figure 4 , and Figure 3 The difference between the illustrated embodiments is that the first opening 101 passes through the organic insulating sublayer 531 , the sidewall of the first opening 101 is the surface of the inorganic insulating sublayer 532 , and the inorganic insulating sublayer 532 and the first insulating layer 52 are arranged between the first sub-electrode 421 and the functional electrode 32 .

[0085] The water vapor barrier effect of the inorganic insulating sublayer 532 is higher than that of the organic insulating sublayer 531 . Therefore, the sidewall of the first opening 101 is the inorganic insulating sublayer 532 , which can effectively improve the water vapor barrier effect of the sidewall of the first opening 101 .

[0086] In addition, an inorganic insulating sublayer 532 and a first insulating layer 52 are provided between the functional electrode 32 and the first sub-electrode 421, that is, two insulating layers are provided between the functional electrode 32 and the first sub-electrode 421, thereby effectively reducing the probability of breakdown and short circuit between the functional electrode 32 and the first sub-electrode 421, thereby improving the stability and service life of the display panel.

[0087] In another embodiment of the present application, please combine Figure 2 , Figure 3 as well as Figure 4 The display panel may further include a liquid crystal layer disposed on the side of the second conductive layer 40 away from the substrate 10 and an opposing substrate disposed on the side of the liquid crystal layer away from the second conductive layer 40, and a color filter layer and other structures may be disposed on the opposing substrate, that is, in this embodiment, the display panel may be a liquid crystal display panel.

[0088] The second electrode element 42 is a pixel electrode, and the second electrode element 42 is electrically connected to the active portion 31 , the first electrode element 41 and the data line 21 to obtain a data signal from the data line 21 .

[0089] The first sub-electrode 421 in the second electrode member 42 is arranged opposite to the functional electrode 32 to form a storage capacitor, and a fringe electric field is formed between the second sub-electrode 422 in the second electrode member 42 and the functional electrode 32, which can drive the liquid crystal molecules in the liquid crystal layer to deflect to realize the display function of the display panel.

[0090] It can be understood that in the embodiment of the present application, the pixel electrode is also multiplexed as the source (or drain) and the capacitor plate. That is, the embodiment of the present application forms the pixel electrode, the source (or drain) and the capacitor plate with one mask, which can effectively reduce the number of masks in the display panel process and reduce production costs.

[0091] In another embodiment of the present application, please refer to Figure 5 , this embodiment is relative to Figure 2 The difference between the illustrated embodiment is that the display panel provided in this embodiment is an organic light emitting diode display panel.

[0092] Specifically, the display panel also includes a pixel definition layer 54, a light-emitting functional layer 55, and a cathode layer 56 arranged on a side of the second conductive layer 40 away from the substrate 10. The second electrode member 42 can be an anode.

[0093] Among them, the pixel definition layer 54 is arranged on the side of the second conductive layer 40 away from the substrate 10 and fills the first opening 101, the second opening 102, the third opening 103 and the fourth opening 104; a plurality of pixel openings are formed in the pixel definition layer 54, and the pixel openings can expose the surface of the second electrode member 42, and the light-emitting functional layer 55 is at least arranged in each pixel opening and is located on the side of the second electrode member 42 away from the inorganic insulating sublayer 532, and the cathode layer 56 covers the pixel definition layer 54 and the surface of the light-emitting functional layer 55 away from the second electrode member 42.

[0094] It can be understood that in the embodiment of the present application, the anode is also reused as the source (or drain) and the capacitor plate. That is, the embodiment of the present application forms the anode, the source (or drain) and the capacitor plate with one mask, which can effectively reduce the number of masks in the display panel process and reduce production costs.

[0095] In another embodiment of the present application, the second insulating layer 53 includes an organic insulating sublayer 531 disposed between the first insulating layer 52 and the second conductive layer 40, or the second insulating layer 53 includes an inorganic insulating sublayer 532 disposed between the first insulating layer 52 and the second conductive layer 40; Figure 1 As for the prior art shown, the preparation of the common electrode layer 7 is reduced, so the organic insulating sublayer 531 and the inorganic insulating sublayer 532 can also be reduced accordingly, which can reduce the number of masks in the display panel process and reduce the process cost on the one hand, and reduce the thickness of the display panel on the other hand.

[0096] As mentioned above, the embodiment of the present application forms the functional electrode 32 by using the semiconductor layer 30, and prepares the first electrode member 41 and the second electrode member 42 on the same film layer, that is, located in the second conductive layer 40, wherein the second electrode member 42 is connected to the second contact portion 313 on the one hand to serve as a source or a drain, and on the other hand, the second electrode member 42 is also located on the side of the functional electrode 32 away from the substrate 10, that is, arranged opposite to the functional electrode 32, so as to form a capacitor. Therefore, the embodiment of the present application does not require additional masks to prepare capacitor plates, which can reduce the number of masks in the display panel manufacturing process and reduce The process cost of the display panel is low, and the process time of the display panel is shortened. In addition, the first sub-portion 511 and the second sub-portion 512 in the buffer layer 51 are respectively arranged corresponding to the active portion 31 and the functional electrode 32 in the semiconductor layer 30, and then in the process, the buffer layer 51 and the semiconductor layer 30 can be patterned with the same mask to form the first sub-portion 511, the second sub-portion 512, the active portion 31 and the functional electrode 32; and then the number of masks in the display panel process can be further reduced, the process cost of the display panel is reduced, and the process time of the display panel is shortened.

[0097] In addition, the present application also provides a method for manufacturing the display panel described in the above embodiment. Figure 2 , Figure 6 , Figures 7 to 12 , the manufacturing method of the display panel includes:

[0098] S10 , forming a first conductive layer 20 on the substrate 10 , wherein the first conductive layer 20 has a data line 21 and a light shielding portion 22 .

[0099] S20, forming a semiconductor layer 30 on a side of the first conductive layer 20 away from the substrate 10, wherein an active portion 31 and a functional electrode 32 arranged at intervals are formed in the semiconductor layer 30, and a channel portion 311 and a first contact portion 312 and a second contact portion 313 connected to both sides of the channel portion 311 are formed in the active portion 31.

[0100] S30. A second conductive layer 40 is formed on a side of the semiconductor layer 30 away from the first conductive layer 20. A first electrode member 41 and a second electrode member 42 are formed in the second conductive layer 40. The first electrode member 41 connects the first contact portion 312 and the data line 21. One end of the second electrode member 42 is connected to the second contact portion 313. The other end of the second electrode member 42 is located on a side of the functional electrode 32 away from the substrate 10.

[0101] Specifically, in step S10 , a substrate 10 is provided, and a patterned first conductive layer 20 is formed on the substrate 10 by a first photomask process, wherein a data line 21 and a light shielding portion 22 are formed in the first conductive layer 20 .

[0102] Next, a buffer material layer 510 is formed on the substrate 10 to cover the data line 21 and the light shielding portion 22 ; the material of the buffer material layer 510 may include an inorganic insulating material, such as silicon nitride or silicon oxide.

[0103] In step S20 , a semiconductor material layer 300 , a gate insulating material layer 610 , and a gate material layer 620 are sequentially formed on the buffer material layer 510 .

[0104] Next, a second photomask process is used to form a photoresist layer 70 on the gate material layer 620. The photoresist layer 70 can be formed by a semi-transparent mask; wherein the photoresist layer 70 includes a first photoresist block 71 and a second photoresist block 72, and the first photoresist block 71 is located on the side of the light shielding portion 22 away from the substrate 10, and the thickness of the middle part of the first photoresist block 71 is larger, while the thickness of the peripheral side is smaller, and the second photoresist block 72 has a uniform thickness, and the thickness of the second photoresist block 72 is equal to or similar to the thickness of the peripheral side of the first photoresist block 71, such as Figure 7 shown.

[0105] The semiconductor material layer 300, the gate insulating material layer 610 and the gate material layer 620 which are not covered by the first photoresist block 71 and the second photoresist block 72 are removed. Figure 8 shown.

[0106] Then, the buffer material layer 510 not covered by the first photoblock 71 and the second photoblock 72 is removed to form a buffer layer 51 , in which a first sub-portion 511 and a second sub-portion 512 arranged at intervals are formed.

[0107] In addition, it is also necessary to remove the portion of the first photoblock 71 with a smaller thickness and the second photoblock 72 , and the remaining first photoblock 71 is the portion with a larger thickness.

[0108] Next, the gate insulating material layer 610 and the gate material layer 620 not covered by the remaining first photoblock 71 are removed to form a gate insulating layer 61 located between the first photoblock 71 and the semiconductor material layer 300 and a gate 62 located between the gate insulating layer 61 and the first photoblock 71. Fig. 9 shown.

[0109] Furthermore, the first photoresist block 71 is removed, and then the semiconductor material layer 300 not covered by the gate insulating layer 61 and the gate 62 is conductorized to form an active portion 31 located between the gate insulating layer 61 and the first sub-portion 511 and a functional electrode 32 located on the side of the second sub-portion 512 away from the substrate 10, respectively; wherein the active portion 31 includes a channel portion 311 and a first contact portion 312 and a second contact portion 313 connected to opposite sides of the channel portion 311, and the first contact portion 312, the second contact portion 313 and the functional electrode 32 are all obtained by conductorizing the semiconductor material layer 300.

[0110] In some embodiments, the material of the semiconductor material layer 300 may include an oxide semiconductor material, specifically a metal oxide semiconductor material. For example, the material of the semiconductor material layer 300 may include at least one of indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) and indium gallium zinc tin oxide (IGZTO).

[0111] Next, a first insulating layer 52 is formed to cover the data line 21 , the active portion 31 , the gate electrode and the functional electrode 32 ; then, an organic insulating sublayer 531 is formed on a side of the first insulating layer 52 away from the substrate 10 .

[0112] Then, the organic insulating sublayer 531 and the first insulating layer 52 are patterned by a third photomask process to form a first middle hole 1011 located on the side of the functional electrode 32 away from the substrate 10, a second middle hole 1021 located on the side of the first contact portion 312 away from the substrate 10, a third middle hole 1031 located on the side of the second contact portion 313 away from the substrate 10, and a fourth middle hole 1041 located on the side of the data line 21 away from the substrate 10, as shown in FIG. Fig.10 shown.

[0113] Further, an inorganic insulating sublayer 532 is formed on the side of the organic insulating sublayer 531 away from the substrate 10, and the inorganic insulating sublayer 532 covers the side of the organic insulating sublayer 531 away from the substrate 10, the side wall and bottom of the first middle hole 1011, the side wall and bottom of the second middle hole 1021, the side wall and bottom of the third middle hole 1031, and the side wall and bottom of the fourth middle hole 1041, as shown in FIG. Fig.11 shown.

[0114] Next, the inorganic insulating sublayer 532 is etched by a fourth photomask process to remove the inorganic insulating sublayer 532 located at the side wall and bottom of the second middle hole 1021, the inorganic insulating sublayer 532 at the side wall and bottom of the third middle hole 1031, and the inorganic insulating sublayer 532 at the side wall and bottom of the fourth middle hole 1041, and the side wall and bottom of the first middle hole 1011 are covered with the inorganic insulating sublayer 532 to form the first opening 101 at the position of the first middle hole 1011, the second opening 102 at the position of the second middle hole 1021, the third opening 103 at the position of the third middle hole 1031, and the fourth opening 104 at the position of the fourth middle hole 1041, as shown in FIG. Fig.12 shown.

[0115] In step S30 , a second conductive material layer is formed on the inorganic insulating sublayer 532 , and the second conductive material layer is patterned by a fifth photomask process to form a second conductive layer 40 , in which a first electrode member 41 and a second electrode member 42 are formed.

[0116] Among them, one end of the first electrode member 41 passes through the second opening 102 to be connected to the first contact portion 312, and the other end of the first electrode member 41 passes through the fourth opening 104 to be connected to the data line 21; one end of the second electrode member 42 is connected to the second contact portion 313, and the other end of the second electrode member 42 is located on the side of the functional electrode 32 away from the substrate 10; specifically, the second electrode member 42 includes a second sub-electrode 422 and a first sub-electrode 421 that are connected to each other, and the second sub-electrode 422 and the first sub-electrode 421 are an integrally formed structure.

[0117] One end of the second sub-electrode 422 is located on the side of the inorganic insulating sub-layer 532 away from the substrate 10, and the other end of the second sub-electrode 422 passes through the third opening 103 to connect with the second contact portion 313. The first sub-electrode 421 is located at the bottom of the first opening 101 and on the side of the functional electrode 32 away from the substrate 10. The inorganic insulating sub-layer 532 is spaced between the first sub-electrode 421 and the functional electrode 32. Figure 2 shown.

[0118] It should be noted that the display panel may also include a liquid crystal layer arranged on the side of the second conductive layer 40 away from the substrate 10 and an opposing substrate arranged on the side of the liquid crystal layer away from the second conductive layer 40, and a color filter layer and other structures may be arranged on the opposing substrate, that is, in this embodiment, the display panel may be a liquid crystal display panel.

[0119] The second electrode element 42 is a pixel electrode, and the second electrode element 42 is electrically connected to the active portion 31 , the first electrode element 41 and the data line 21 to obtain a data signal from the data line 21 .

[0120] The first sub-electrode 421 in the second electrode member 42 is arranged opposite to the functional electrode 32 to form a storage capacitor, and a fringe electric field is formed between the second sub-electrode 422 in the second electrode member 42 and the functional electrode 32, which can drive the liquid crystal molecules in the liquid crystal layer to deflect to realize the display function of the display panel.

[0121] As mentioned above, the embodiment of the present application can obtain the following by five mask processes: Figure 2 The display panel shown, relative to Figure 1 As for the prior art shown, the number of masks in the display panel manufacturing process can be reduced, the process cost of the display panel can be reduced, and the process time of the display panel can be shortened.

[0122] In another embodiment of the present application, please combine Figure 4 , Figure 6 , Figures 7 to 9 , Figures 13 to 15 In step S10 , a substrate 10 is provided, and a patterned first conductive layer 20 is formed on the substrate 10 by a first photomask process, wherein a data line 21 and a light shielding portion 22 are formed in the first conductive layer 20 .

[0123] Next, a buffer material layer 510 is formed on the substrate 10 to cover the data line 21 and the light shielding portion 22 ; the material of the buffer material layer 510 may include an inorganic insulating material, such as silicon nitride or silicon oxide.

[0124] In step S20 , a semiconductor material layer 300 , a gate insulating material layer 610 , and a gate material layer 620 are sequentially formed on the buffer material layer 510 .

[0125] Next, a second photomask process is used to form a photoresist layer 70 on the gate material layer 620. The photoresist layer 70 can be formed by a semi-transparent mask; wherein the photoresist layer 70 includes a first photoresist block 71 and a second photoresist block 72, and the first photoresist block 71 is located on the side of the light shielding portion 22 away from the substrate 10, and the thickness of the middle part of the first photoresist block 71 is larger, while the thickness of the peripheral side is smaller, and the second photoresist block 72 has a uniform thickness, and the thickness of the second photoresist block 72 is equal to or similar to the thickness of the peripheral side of the first photoresist block 71, such as Figure 7 shown.

[0126] The semiconductor material layer 300, the gate insulating material layer 610 and the gate material layer 620 which are not covered by the first photoresist block 71 and the second photoresist block 72 are removed. Figure 8 shown.

[0127] Then, the buffer material layer 510 not covered by the first photoblock 71 and the second photoblock 72 is removed to form a buffer layer 51 , in which a first sub-portion 511 and a second sub-portion 512 arranged at intervals are formed.

[0128] In addition, it is also necessary to remove the portion of the first photoblock 71 with a smaller thickness and the second photoblock 72 , and the remaining first photoblock 71 is the portion with a larger thickness.

[0129] Next, the gate insulating material layer 610 and the gate material layer 620 not covered by the remaining first photoblock 71 are removed to form a gate insulating layer 61 located between the first photoblock 71 and the semiconductor material layer 300 and a gate 62 located between the gate insulating layer 61 and the first photoblock 71. Fig. 9 shown.

[0130] Furthermore, the first photoresist block 71 is removed, and then the semiconductor material layer 300 not covered by the gate insulating layer 61 and the gate 62 is conductorized to form an active portion 31 located between the gate insulating layer 61 and the first sub-portion 511 and a functional electrode 32 located on the side of the second sub-portion 512 away from the substrate 10, respectively; wherein the active portion 31 includes a channel portion 311 and a first contact portion 312 and a second contact portion 313 connected to opposite sides of the channel portion 311, and the first contact portion 312, the second contact portion 313 and the functional electrode 32 are all obtained by conductorizing the semiconductor material layer 300.

[0131] In some embodiments, the material of the semiconductor material layer 300 may include an oxide semiconductor material, specifically a metal oxide semiconductor material. For example, the material of the semiconductor material layer 300 may include at least one of indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) and indium gallium zinc tin oxide (IGZTO).

[0132] Next, a first insulating layer 52 is formed to cover the data line 21 , the active portion 31 , the gate electrode 62 and the functional electrode 32 ; then, an organic insulating sublayer 531 is formed on a side of the first insulating layer 52 away from the substrate 10 .

[0133] Then, the organic insulating sublayer 531 is patterned by a third photomask process to form a first middle hole 1011 located on the side of the functional electrode 32 away from the substrate 10, a second middle hole 1021 located on the side of the first contact portion 312 away from the substrate 10, a third middle hole 1031 located on the side of the second contact portion 313 away from the substrate 10, and a fourth middle hole 1041 located on the side of the data line 21 away from the substrate 10, as shown in FIG. Fig.13 shown.

[0134] Further, an inorganic insulating sublayer 532 is formed on the side of the organic insulating sublayer 531 away from the substrate 10, and the inorganic insulating sublayer 532 covers the side of the organic insulating sublayer 531 away from the substrate 10, the side wall and bottom of the first middle hole 1011, the side wall and bottom of the second middle hole 1021, the side wall and bottom of the third middle hole 1031, and the side wall and bottom of the fourth middle hole 1041, as shown in FIG. Fig.14 shown.

[0135] Next, the inorganic insulating sublayer 532 and the first insulating layer 52 are etched by a fourth photomask process to remove the inorganic insulating sublayer 532 and the first insulating layer 52 at the bottom of the second middle hole 1021, the inorganic insulating sublayer 532 and the first insulating layer 52 at the bottom of the third middle hole 1031, and the inorganic insulating sublayer 532 and the first insulating layer 52 at the bottom of the fourth middle hole 1041, and the sidewall and the bottom of the first middle hole 1011 are covered with the inorganic insulating sublayer 532 and the first insulating layer 52 to form the first opening 101 at the position of the first middle hole 1011, the second opening 102 at the position of the second middle hole 1021, the third opening 103 at the position of the third middle hole 1031, and the fourth opening 104 at the position of the fourth middle hole 1041, as shown in FIG. Fig.15 shown.

[0136] In step S30 , a second conductive material layer is formed on the inorganic insulating sublayer 532 , and the second conductive material layer is patterned by a fifth photomask process to form a second conductive layer 40 , in which a first electrode member 41 and a second electrode member 42 are formed.

[0137] Among them, one end of the first electrode member 41 passes through the second opening 102 to be connected to the first contact portion 312, and the other end of the first electrode member 41 passes through the fourth opening 104 to be connected to the data line 21; one end of the second electrode member 42 is connected to the second contact portion 313, and the other end of the second electrode member 42 is located on the side of the functional electrode 32 away from the substrate 10; specifically, the second electrode member 42 includes a second sub-electrode 422 and a first sub-electrode 421 that are connected to each other, and the second sub-electrode 422 and the first sub-electrode 421 are an integrally formed structure.

[0138] One end of the second sub-electrode 422 is located on the side of the inorganic insulating sub-layer 532 away from the substrate 10, and the other end of the second sub-electrode 422 passes through the third opening 103 to connect with the second contact portion 313. The first sub-electrode 421 is located at the bottom of the first opening 101 and on the side of the functional electrode 32 away from the substrate 10. The inorganic insulating sub-layer 532 and the first insulating layer 52 are spaced between the first sub-electrode 421 and the functional electrode 32. Figure 4 shown.

[0139] It should be noted that the display panel may also include a liquid crystal layer arranged on the side of the second conductive layer 40 away from the substrate 10 and an opposing substrate arranged on the side of the liquid crystal layer away from the second conductive layer 40, and a color filter layer and other structures may be arranged on the opposing substrate, that is, in this embodiment, the display panel may be a liquid crystal display panel.

[0140] The second electrode element 42 is a pixel electrode, and the second electrode element 42 is electrically connected to the active portion 31 , the first electrode element 41 and the data line 21 to obtain a data signal from the data line 21 .

[0141] The first sub-electrode 421 in the second electrode member 42 is arranged opposite to the functional electrode 32 to form a storage capacitor, and a fringe electric field is formed between the second sub-electrode 422 in the second electrode member 42 and the functional electrode 32, which can drive the liquid crystal molecules in the liquid crystal layer to deflect to realize the display function of the display panel.

[0142] As mentioned above, the embodiment of the present application can obtain the following by five mask processes: Figure 4 The display panel shown, relative to Figure 1 As for the prior art shown, the number of masks in the display panel manufacturing process can be reduced, the process cost of the display panel can be reduced, and the process time of the display panel can be shortened.

[0143] Further, in other embodiments of the present application, the second insulating layer 53 includes an organic insulating sublayer 531 disposed between the first insulating layer 52 and the second conductive layer 40, or the second insulating layer 53 includes an inorganic insulating sublayer 532 disposed between the first insulating layer 52 and the second conductive layer 40, thereby Figure 2 as well as Figure 4 For the embodiment shown, the number of masks can be further reduced, and a four-mask process can be used.

[0144] In addition, an embodiment of the present application further provides a display device, which includes the display panel described in the above embodiment, or a display panel manufactured by the manufacturing method of the display panel described in the above embodiment.

[0145] In some embodiments, the display device may be a liquid crystal display or an organic light emitting diode display.

[0146] It can be understood that, since the display device includes the display panel described in the above embodiment, the display device has the same beneficial effects as the display panel described in the above embodiment, which will not be described in detail herein.

[0147] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0148] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0149] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0150] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: include: substrate; A first conductive layer is disposed on the substrate, wherein the first conductive layer includes a data line and a light shielding portion; A semiconductor layer is disposed on a side of the first conductive layer away from the substrate, the semiconductor layer comprising an active portion and a functional electrode disposed at intervals, the active portion comprising a channel portion and a first contact portion and a second contact portion connected to two sides of the channel portion; A second conductive layer is disposed on a side of the semiconductor layer away from the first conductive layer; The second conductive layer includes a first electrode member and a second electrode member, the first electrode member connects the first contact portion and the data line, a portion of the second electrode member is connected to the second contact portion, and another portion of the second electrode member is located on a side of the functional electrode away from the substrate.

2. The display panel according to claim 1, characterized in that: The display panel further includes: a buffer layer, disposed between the first conductive layer and the semiconductor layer; A first insulating layer, disposed between the semiconductor layer and the second conductive layer; a second insulating layer, disposed between the first insulating layer and the second conductive layer; Among them, a first opening corresponding to the functional electrode is opened in the display panel, and the first opening passes through the first insulating layer and part of the film layer in the second insulating layer. The second electrode member includes a first sub-electrode arranged at the bottom of the first opening, and the first sub-electrode is located on the side of the functional electrode away from the substrate and is spaced apart from the functional electrode.

3. The display panel according to claim 2, characterized in that: The second insulating layer includes an organic insulating sublayer disposed between the first insulating layer and the second conductive layer and an inorganic insulating sublayer disposed between the organic insulating sublayer and the second conductive layer.

4. The display panel according to claim 3, characterized in that: The first opening passes through the organic insulating sublayer, a sidewall of the first opening is a surface of the inorganic insulating sublayer, and the first insulating layer and the inorganic insulating sublayer are arranged between the first sub-electrode and the functional electrode.

5. The display panel according to claim 3, characterized in that: The first opening passes through the organic insulating sublayer and the first insulating layer, a sidewall of the first opening is a surface of the inorganic insulating sublayer, and the inorganic insulating sublayer is arranged between the first sub-electrode and the functional electrode.

6. The display panel according to claim 2, characterized in that: The second insulating layer includes an organic insulating sublayer disposed between the first insulating layer and the second conductive layer; Alternatively, the second insulating layer includes an inorganic insulating sublayer disposed between the first insulating layer and the second conductive layer.

7. The display panel according to any one of claims 2 to 6, characterized in that: The display panel also includes a second opening that passes through the second insulating layer and the first insulating layer and corresponds to the first contact portion, and a third opening that passes through the second insulating layer and the first insulating layer and corresponds to the second contact portion. The first electrode member is connected to the first contact portion through the second opening, and the second electrode member also includes a second sub-electrode connected to the first sub-electrode, one end of the second sub-electrode is located on a side of the second insulating layer away from the first insulating layer, and the other end of the second sub-electrode passes through the third opening and is connected to the second contact portion.

8. The display panel according to claim 7, characterized in that: The display panel is further provided with a fourth opening that passes through the second insulating layer and the first insulating layer and is arranged corresponding to the data line. The first electrode member is also connected to the data line through the fourth opening.

9. The display panel according to claim 8, characterized in that: The depth of the fourth opening is greater than the depth of the second opening, and the depth of the fourth opening is greater than the depth of the third opening.

10. The display panel according to claim 8, characterized in that: The first electrode member covers the side wall of the second opening, the side wall of the fourth opening, a portion of the surface of the data line away from the substrate, and at least a portion of the surface of the first contact portion away from the substrate; The second sub-electrode covers the sidewall of the third opening and at least a portion of the surface of the second contact portion away from the substrate.

11. The display panel according to claim 2, characterized in that: The buffer layer includes a first sub-portion and a second sub-portion which are spaced apart from each other. The first sub-portion is located between the active portion and the substrate, and the second sub-portion is located between the functional electrode and the substrate.

12. The display panel according to claim 1 or 11, characterized in that: The orthographic projection of the buffer layer on the substrate coincides with the orthographic projection of the semiconductor layer on the substrate.

13. The display panel according to claim 1, characterized in that: The display panel further comprises a liquid crystal layer disposed on a side of the second conductive layer away from the substrate and an opposing substrate disposed on a side of the liquid crystal layer away from the second conductive layer, and the second electrode member is a pixel electrode; Alternatively, the display panel further comprises a light-emitting functional layer disposed on a side of the second conductive layer away from the substrate and a cathode layer disposed on a side of the light-emitting functional layer away from the second conductive layer, and the second electrode member is an anode.

14. The display panel according to claim 1, characterized in that: The material of the semiconductor layer includes an oxide semiconductor material.

15. A method for manufacturing a display panel, characterized in that: include: forming a first conductive layer on a substrate, wherein a data line and a light shielding portion are formed in the first conductive layer; A semiconductor layer is formed on a side of the first conductive layer away from the substrate, wherein an active portion and a functional electrode are formed in the semiconductor layer and a channel portion and a first contact portion and a second contact portion connected to two sides of the channel portion are formed in the active portion; A second conductive layer is formed on a side of the semiconductor layer away from the first conductive layer, and a first electrode member and a second electrode member are formed in the second conductive layer. The first electrode member connects the first contact portion and the data line, a portion of the second electrode member is connected to the second contact portion, and another portion of the second electrode member is located on a side of the functional electrode away from the substrate.

16. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 14.

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