Avalanche photodiode and detector
By designing a vertical structure in an avalanche photodiode, using the combination of the first breakdown junction and the second breakdown junction, the problem of the reduction in the proportion of avalanche breakdown area in the prior art is solved, and efficient detection and miniaturization are achieved. Effect.
Patent Information
- Application Number
- CN202310856629.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-12
- Publication Date
- 2025-01-14
AI Technical Summary
During the miniaturization process, in order to avoid edge breakdown, existing avalanche photodiodes usually add protection rings, resulting in a decrease in the proportion of avalanche breakdown area and affecting detection efficiency.
Design a vertical avalanche photodiode structure, by providing a first breakdown junction and a second breakdown junction on the substrate and spaced in a direction perpendicular to the first surface, the effective avalanche area ratio is increased and the device is reduced. Take up space horizontally.
The detection efficiency of avalanche photodiode is improved, and the device is miniaturized, avoiding the space occupied by the protection ring and improving the detection efficiency.
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Figure CN119317202A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of photoelectric detectors, and in particular to an avalanche photodiode and a detector. Background Art
[0002] Avalanche photodiode (SPAD) is a semiconductor photodetector with single-photon detection sensitivity. It uses the avalanche effect that occurs when the PN junction operates above the reverse breakdown voltage. It can multiply the carriers generated by the absorbed light and generate a large current that is detected by the external circuit, thereby realizing the photoelectric detection process.
[0003] In the existing photodiode structure, avalanche breakdown generally occurs in the middle region. In order to reduce the breakdown in the edge region, a guard ring is usually set at the edge of the main junction. The guard ring occupies a large space, which seriously affects the size reduction of the diode device; or compresses the area of the avalanche breakdown region, thereby affecting the detection efficiency. Summary of the invention
[0004] The main purpose of the present invention is to provide an avalanche photodiode, aiming to reduce the size of the avalanche photodiode and improve its detection efficiency.
[0005] To achieve the above object, the avalanche photodiode proposed by the present invention comprises:
[0006] a substrate having a first doping type, the substrate being formed with opposing first and second surfaces;
[0007] A first semiconductor region having a second doping type, the first semiconductor region being disposed on the first surface and extending from the first surface to the second surface;
[0008] a second semiconductor region having the first doping type, the second semiconductor region extending from a side of the first semiconductor region away from the first surface toward the second surface, the second semiconductor region at least partially overlapping with the first semiconductor region in a direction from the first surface to the second surface, and forming a first breakdown junction;
[0009] a third semiconductor region, which is a high-concentration buried layer, and is disposed on the second surface and extends from the second surface to the first surface; and
[0010] A fourth semiconductor region has the first doping type, the doping concentration of the fourth semiconductor region is less than the doping concentration of the second semiconductor region, the fourth semiconductor region is arranged on the side of the three semiconductor regions away from the second surface, and forms a second breakdown junction with the third semiconductor region, and the first breakdown junction and the second breakdown junction are spaced apart in a direction perpendicular to the first surface.
[0011] In a possible embodiment of the present application, the third semiconductor region is a ground electrode, and the first semiconductor region is a cathode;
[0012] The avalanche photodiode also includes a fifth semiconductor region, which is an anode and has the first doping type. The doping concentration of the fifth semiconductor region is greater than the doping concentration of the second semiconductor region. The fifth semiconductor region is spaced apart from the first semiconductor region in a direction parallel to the first surface and is located between the cathode and the ground electrode in a direction perpendicular to the first surface.
[0013] In a possible embodiment of the present application, the avalanche photodiode further includes an isolation region, which extends from the first surface to the second surface and is arranged around the first semiconductor region, and the fifth semiconductor region is arranged around the isolation region.
[0014] In a possible embodiment of the present application, the isolation region includes a first isolation portion and a second isolation portion arranged in sequence in the direction from the first surface to the second surface, and in a direction perpendicular to a line connecting the first surface and the second surface, a width of the first isolation portion is greater than a width of the second isolation portion so as to form a step at the connection between the first isolation portion and the second isolation portion, and the fifth semiconductor region is arranged at the step.
[0015] In a possible embodiment of the present application, one end of the second isolation portion away from the first isolation portion extends to the second surface and penetrates the third semiconductor region and the fourth semiconductor region.
[0016] In a possible embodiment of the present application, the avalanche photodiode further includes a metal connector, which is disposed on the first isolation portion, and two ends of the metal connector respectively abut against the first surface and the fifth semiconductor region.
[0017] In a possible embodiment of the present application, in a direction parallel to the first surface, a lateral size of the first semiconductor region is the same as a lateral size of the second semiconductor region.
[0018] In a possible embodiment of the present application, in a direction parallel to the first surface, a lateral dimension of the third semiconductor region is the same as a lateral dimension of the fourth semiconductor region.
[0019] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type.
[0020] The present invention further discloses a detector, which comprises a plurality of photodiode devices as described above, and the plurality of photodiode devices are arranged in an array.
[0021] The avalanche photodiode of the technical solution of the present invention includes a substrate, a first semiconductor region, a second semiconductor region, a third semiconductor region and a fourth semiconductor region. The substrate is formed with a first surface and a second surface relative to each other; the second semiconductor region and the substrate have the same doping type, the first semiconductor region and the fourth semiconductor region have the same doping type, the third semiconductor region is a high-concentration buried layer, the first semiconductor region and the second semiconductor region form a first breakdown junction, the third semiconductor region and the fourth semiconductor region cooperate to form a second breakdown junction, and the first semiconductor region is used to act as an ohmic contact.
[0022] The avalanche photodiode includes a first breakdown junction and a second breakdown junction, both of which can undergo breakdown when light is incident, thereby increasing the proportion of effective avalanche area and thus improving the detection efficiency of the avalanche photodiode; and in this structure, the two breakdown junctions are arranged in the direction from the first surface to the second surface, that is, they are spaced apart in a direction perpendicular to the first surface, forming a vertical photodiode, which does not occupy a lateral area and is conducive to the miniaturization of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0024] Figure 1 A cross-sectional view of an embodiment of an avalanche photodiode of the present invention;
[0025] Figure 2 It is a schematic diagram of simulated doping of the avalanche photodiode of the present invention;
[0026] Figure 3 This is a pixel breakdown diagram of the avalanche photodiode simulation of the present invention.
[0027] Description of Figure Numbers:
[0028]
[0029]
[0030] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0031] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0032] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0033] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0034] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0035] Single-photon avalanche photodiodes operate above the breakdown voltage of the PN junction and can be used in highly sensitive photon capture environments. As existing avalanche photodiodes generally have center breakdown, in order to avoid edge breakdown, a guard ring is added for protection. As the product is miniaturized and the device size is reduced, the fill factor of the center avalanche region decreases, resulting in a decrease in the detection efficiency (PDE) of the device. The present invention proposes an avalanche photodiode, which aims to increase the proportion of the avalanche region, improve the detection efficiency, and miniaturize the size of the device.
[0036] Please refer to Figure 1 and Figure 2 In one embodiment of the present invention, the avalanche photodiode 1 includes a substrate 11 having a first doping type, a first semiconductor region 13 having a second doping type, a second semiconductor region 14 having the first doping type, a third semiconductor region 15 being a high-concentration buried layer, and a fourth semiconductor region 16 having the first doping type, wherein the substrate 11 is formed with a first surface 111 and a second surface 112 opposite to each other;
[0037] The first semiconductor region 13 is provided on the first surface 111 and extends from the first surface 111 to the second surface 112; the second semiconductor region 14 extends from a side of the first semiconductor region 13 away from the first surface 111 to the second surface 112, and the second semiconductor region 14 at least partially overlaps with the first semiconductor region 13 in a direction from the first surface 111 to the second surface 112, and forms a first breakdown junction;
[0038] The third semiconductor region 15 is arranged on the second surface 112 and extends from the second surface 112 to the first surface 111; the doping concentration of the fourth semiconductor region 16 is less than the doping concentration of the second semiconductor region 14, the fourth semiconductor region 16 is arranged on the side of the three semiconductor regions away from the second surface 112, and forms a second breakdown junction with the third semiconductor region 15, and the first breakdown junction and the second breakdown junction are spaced apart in a direction perpendicular to the first surface 111.
[0039] In this embodiment, the material of the substrate 11 can be a silicon wafer. In other examples, it can also be a germanium substrate 11, a germanium silicon substrate 11, an indium gallium arsenide substrate 11, a gallium arsenide substrate 11, a silicon carbide substrate 11, etc., which are not limited here. The substrate 11 includes a first surface 111 and a second surface 112, which can be substantially parallel, that is, the two surfaces can be partially non-parallel due to processing errors. Light can be incident from the first surface 111 or from the second surface 112, which are not limited here.
[0040] The depth direction of the avalanche photodiode 1 is defined as the direction from the first surface 111 to the second surface 112, and the direction parallel to the first surface 111 is the lateral direction. The substrate 11 has a first doping type, that is, it is formed by doping impurity elements into the substrate 11, for example, the conductive type of the doped elements is N-type or P-type. The doping concentrations at various locations of the substrate 11 can be the same, or a gradient design can be performed, which is not limited here. The first semiconductor region 13 has a second doping type, which is different from the doping type of the substrate 11.
[0041] Here, the doping type of the substrate 11 is taken as P type as an example. That is, P-type epitaxial silicon is formed on the surface of a P-type silicon wafer by chemical vapor deposition or molecular beam epitaxy, and then a group III element, such as a non-metallic boron (B) element or a metal gallium (Ga), can be lightly doped at a certain depth position on the basis of the substrate 11 to form a second semiconductor region 14, which is a P-type well (P-Well, referred to as PW). The doping method can be ion implantation or thermal diffusion, etc., which is not limited here. Above the second semiconductor region 14, a heavily doped first semiconductor region 13 (N+) is formed by doping with a higher concentration of group V elements, such as non-metallic phosphorus (P) or metal arsenic (As), to form a cathode ohmic contact.
[0042] The first semiconductor region 13 extends from the first surface 111 to the second surface 112, which means that the first semiconductor region 13 has a certain thickness in the direction from the first surface 111 to the second surface 112, and one surface thereof is coplanar with the first surface 111. Of course, the first semiconductor region 13 is also extended in a direction parallel to the first surface 111, that is, it has a surface area parallel to the first surface 111. The second semiconductor region 14 is arranged below the first semiconductor region 13, that is, it is located on the side of the first semiconductor away from the first surface 111, and is extended in the direction from the first surface 111 to the second surface 112, that is, it has a certain thickness in the depth direction, and at the same time extends in a direction parallel to the first surface 111, and has a certain surface area. The first semiconductor region 13 and the second semiconductor region 14 have an overlapping portion in the lateral direction, so as to cooperate to form a first breakdown junction, and avalanche breakdown can be formed at the junction of the two.
[0043] The fourth semiconductor region 16 is arranged close to the second surface 112, that is, it has a certain interval with PW in the vertical direction. On the basis of the substrate 11, the fourth semiconductor region 16 (HVP) is formed by lightly doping with group III elements, such as non-metallic boron (B) atoms or metal gallium (Ga). The fourth semiconductor region 16 extends in both the lateral and vertical directions. The third semiconductor region 15 is a high-concentration buried layer, which is a layer of high-concentration donor impurities, namely N+ region, diffused on the basis of the silicon wafer, and then a layer of N-type silicon single crystal layer is epitaxially grown thereon. The third semiconductor region 15 is located on the second surface 112 and abuts against the fourth semiconductor in the vertical direction. The two have an overlapping part in the lateral direction, thereby forming a second breakdown junction in cooperation, and breakdown can occur at the junction of the two.
[0044] An anode structure may be provided on the lateral side of the first semiconductor region 13 , and the anode structure may be located on one side of the second surface 112 or in the middle of the substrate 11 , without limitation, as long as the large currents of the first breakdown junction and the second breakdown junction can be extracted and detected.
[0045] The avalanche photodiode 1 of the technical solution of the present invention includes a substrate 11, a first semiconductor region 13, a second semiconductor region 14, a third semiconductor region 15 and a fourth semiconductor region 16. The substrate 11 is formed with a first surface 111 and a second surface 112 relative to each other; the second semiconductor region 14 and the substrate 11 have the same doping type, the first semiconductor region 13 and the fourth semiconductor region 16 have the same doping type, the third semiconductor region 15 is a high-concentration buried layer, the first semiconductor region 13 and the second semiconductor region 14 form a first breakdown junction, the third semiconductor region 15 and the fourth semiconductor region 16 cooperate to form a second breakdown junction, and the first semiconductor region 13 is used to act as an ohmic contact.
[0046] The avalanche photodiode 1 includes a first breakdown junction and a second breakdown junction at different positions, which can both breakdown when light is incident, thereby increasing the proportion of the effective avalanche area, thereby improving the detection efficiency of the avalanche photodiode 1; and in this structure, the two breakdown junctions are arranged in the direction from the first surface 111 to the second surface 112, that is, they are spaced apart in the direction perpendicular to the first surface 111, forming a vertical photodiode, which is a vertical structure, does not occupy the lateral area, and is conducive to the miniaturization of the device.
[0047] Please continue to refer to Figure 1 In a possible embodiment of the present application, the third semiconductor region 15 is a ground electrode, and the first semiconductor region 13 is a cathode;
[0048] The avalanche photodiode 1 also includes a fifth semiconductor region 17, which is an anode and has the first doping type. The doping concentration of the fifth semiconductor region 17 is greater than the doping concentration of the second semiconductor region 14. The fifth semiconductor region 17 is spaced apart from the first semiconductor region 13 in a direction parallel to the first surface 111, and is located between the cathode and the ground electrode in a direction perpendicular to the first surface 111.
[0049] In this embodiment, the fifth semiconductor region 17 has a first doping type. Taking the doping type of the substrate 11 as P type as an example, the fifth semiconductor region 17 (P+) is formed by heavily doping the substrate 11 with group III elements, such as non-metallic boron (B) atoms or metal gallium (Ga). In one example, the doping concentration of the substrate 11 can be set to be the same, for example, all are lightly doped PEPI. The doping concentration can be selected to make its resistivity greater than 60 ohms. In another example, the doping concentration of the substrate 11 can be set differently at different positions. For example, in the middle part in the depth direction, the doping concentration of the substrate 11 is high, and a P-SUB can be formed, so that it is more convenient to form a fifth semiconductor region 17 with a heavy doping concentration on the P-SUB, which has a certain transition effect and improves the structural stability of the avalanche photodiode 1. The doping concentration of the substrate 11 in the direction from the middle to the two surfaces is low relative to the doping concentration of the P-SUB, which is P-EPI.
[0050] The fifth semiconductor region 17 is an anode, thereby cooperating with the first semiconductor region 13 to realize the extraction of current. Here, the third semiconductor region 15 is grounded, that is, it is a ground electrode, and the fifth semiconductor region 17 is arranged between the cathode and the ground electrode, that is, located in the middle of the thickness direction of the substrate 11, so that when both breakdown junctions are broken down, the current of the second breakdown junction of the second surface 112 can be more easily extracted.
[0051] In one example, the fifth semiconductor region 17 is arranged in a ring shape, and the fifth semiconductor region 17 is spaced apart from the first semiconductor region 13. Since the first semiconductor region 13 and the fifth semiconductor region 17 have a certain interval in the vertical direction, the distance between the two in the lateral direction can be further reduced without affecting the suppression of premature edge breakdown, and the lateral size of the device can be further reduced to achieve miniaturization.
[0052] In a possible embodiment of the present application, the avalanche photodiode 1 also includes an isolation region 18 , which extends from the first surface 111 to the second surface 112 and is arranged around the first semiconductor region 13 , and the fifth semiconductor region 17 is arranged around the isolation region 18 .
[0053] In this embodiment, the isolation region 18 can be formed by trench etching and filling the trench with polysilicon or metal tungsten, etc., and the isolation region 18 is used to play the role of spacing pixels. Optionally, the isolation region 18 can be a deep trench or a shallow trench. The isolation region 18 extends from the first surface 111 toward the second surface 112 and has the same surface as the first surface 111, so that it is arranged around the first semiconductor region 13 and the second semiconductor region 14, which can effectively suppress the premature breakdown of the edge and ensure the center breakdown efficiency.
[0054] The fifth semiconductor region 17 is disposed around the isolation region 18 and can isolate carriers introduced partially due to surface defects of the isolation region 18 from entering the avalanche region, thereby reducing the dark count rate (DCR).
[0055] Please refer again Figure 1 In a possible embodiment of the present application, the isolation region 18 includes a first isolation portion 181 and a second isolation portion 182 arranged in sequence in the direction from the first surface 111 to the second surface 112, and in a direction perpendicular to a line connecting the first surface 111 and the second surface 112, a width of the first isolation portion 181 is greater than a width of the second isolation portion 182, so as to form a step at the connection between the first isolation portion 181 and the second isolation portion 182, and the fifth semiconductor region 17 is arranged at the step.
[0056] In this embodiment, the first isolation portion 181 is close to the first surface 111 and is a shallow trench structure, and the second isolation portion 182 is far away from the first surface 111 and is a deep trench structure. The two are arranged in the vertical direction and have a large depth, so that the two pixels can be isolated as much as possible to improve the detection performance. In this way, in order to set the fifth semiconductor region 17, the widths of the two in the lateral direction are different, so that a step structure is formed at the connection between the two, and the fifth semiconductor region 17 is set at the step structure, that is, it is set on the surface where the second isolation portion 182 forms the step structure and the end face where the first isolation portion 181 forms the step structure, so that it is more convenient to derive the current of the second breakdown junction from the first surface 111 without affecting the lateral size.
[0057] In one example, the fifth semiconductor region 17 is arranged around the inner and outer sides of the second isolation portion 182, abuts against the end of the first isolation portion 181, and is spaced apart from the fourth semiconductor region in the vertical direction to facilitate current extraction and save lateral space.
[0058] In a possible embodiment of the present application, one end of the second isolation portion 182 away from the first isolation portion 181 extends to the second surface 112 and penetrates the third semiconductor region 15 and the fourth semiconductor region 16 .
[0059] In this embodiment, the second isolation portion 182 runs through the third semiconductor region 15 and the fourth semiconductor region 16 , so that complete isolation between the two pixels can be achieved, further improving the detection performance of the avalanche photodiode 1 .
[0060] In a possible embodiment of the present application, the avalanche photodiode 1 further includes a metal connector 19 , which is disposed on the first isolation portion 181 , and two ends of the metal connector 19 respectively abut against the first surface 111 and the fifth semiconductor region 17 .
[0061] In this embodiment, in order to lead the current of the anode to the first surface 111, thereby facilitating electrical connection, a metal connector 19 is provided at the position of the first isolation portion 181 in the structure. The metal connector 19 may be aluminum or copper, and abuts against the fifth semiconductor region 17, and can be connected to an external circuit to lead out the generated current. In one example, the metal connector 19 may be located in the middle of the first isolation portion 181 in the horizontal direction to improve the electric field uniformity of the avalanche photodiode 1.
[0062] In a possible embodiment of the present application, in a direction parallel to the first surface 111 , a lateral dimension of the first semiconductor region 13 is the same as a lateral dimension of the second semiconductor region 14 .
[0063] In this embodiment, in order to further increase the avalanche zone area, it is set that the cross-section of the first semiconductor region 13 is equal to the cross-section of the second semiconductor region 14 in the lateral direction, for example, the first semiconductor region 13 and the second semiconductor region 14 completely overlap in the depth direction, so that the maximum avalanche zone size can be obtained, and the detection efficiency is further improved. Of course, in other examples, the lateral size of the first semiconductor region 13 is different from the lateral size of the second semiconductor region 14, for example, the cross-section of the first semiconductor region 13 is smaller than the cross-sectional area of the second semiconductor region 14, and the projection of the first semiconductor region 13 on the second semiconductor region 14 is completely located in the second semiconductor region 14.
[0064] In a possible embodiment of the present application, in a direction parallel to the first surface 111 , a lateral dimension of the third semiconductor region 15 is the same as a lateral dimension of the fourth semiconductor region 16 .
[0065] In this example, in order to further increase the avalanche zone area, it is set that the cross section of the third semiconductor region 15 is equal to the cross section of the fourth semiconductor region 16 in the lateral direction. For example, the third semiconductor region 15 and the fourth semiconductor region 16 completely overlap in the depth direction, so that the maximum avalanche zone size can be obtained, further improving the detection efficiency. Of course, in other examples, the cross section of the third semiconductor region 15 is smaller than the cross-sectional area of the fourth semiconductor region 16, and the projection of the third semiconductor region 15 on the fourth semiconductor region 16 is completely located in the fourth semiconductor region 16.
[0066] In one example, the lateral dimension of the third semiconductor region 15 is set to be the same as the lateral dimension of the periphery of the first isolation portion 181 , thereby improving the stability of the device.
[0067] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type.
[0068] In this embodiment, the first doping type is set to P type, then the substrate 11 is a P type epitaxial wafer, the third semiconductor region 15 is an N type high concentration buried layer, the second semiconductor region 14 is a P type well, the first semiconductor region 13 is N+, the fourth semiconductor region 16 is HVP, and the fifth semiconductor region 17 is P+, so that when the device is above the avalanche breakdown voltage, the photogenerated carriers drift to the breakdown region under the action of the electric field, and since the impact ionization rate and mobility of electrons are higher than those of holes, a higher photon detection efficiency can be obtained. Of course, in other embodiments, the first doping type is N type and the second doping type is P type.
[0069] On the basis of the above embodiments, optionally, the isolation region 18 and the fifth semiconductor region 17 are symmetrically arranged with the longitudinal midline of the first semiconductor region 13 as the symmetry axis, so that the entire device can be more symmetrical, the uniformity of the electric field distribution of the first breakdown junction and the second breakdown junction can be improved, and the avalanche breakdown probability distribution can be made more uniform, which can further improve the detection efficiency.
[0070] Please refer to Figure 3 , this figure is a simulated breakdown diagram of an embodiment of an avalanche photodiode 1 of the present application. It can be seen from the gray part in the middle of the figure that the device can undergo full-size breakdown in the lateral direction, effectively improving the detection efficiency.
[0071] The present invention further discloses a detector (not shown), the detector comprising a plurality of avalanche photodiodes 1 as described above, the plurality of avalanche photodiodes 1 being arranged in an array. Since the avalanche photodiode 1 of the detector comprises the structure of the avalanche photodiode 1 of any of the above embodiments, the beneficial effects brought about by any of the above embodiments are not described in detail here.
[0072] The substrates 11 of the plurality of avalanche photodiodes 1 may be an integrated structure, and two adjacent avalanche photodiodes 1 may be separated by providing an isolation region 18. In other examples, the substrates 11 of the plurality of avalanche photodiodes 1 may be processed separately and then spliced together.
[0073] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.
Claims
1. An avalanche photodiode, characterized in that: include: a substrate having a first doping type, the substrate being formed with opposing first and second surfaces; A first semiconductor region having a second doping type, wherein the first semiconductor region is disposed on the first surface and extends from the first surface to the second surface; a second semiconductor region having the first doping type, the second semiconductor region extending from a side of the first semiconductor region away from the first surface toward the second surface, the second semiconductor region at least partially overlapping with the first semiconductor region in a direction from the first surface to the second surface, and forming a first breakdown junction; A third semiconductor region is a high-concentration buried layer, and the third semiconductor region is disposed on the second surface and extends from the second surface to the first surface; as well as A fourth semiconductor region has the first doping type, the doping concentration of the fourth semiconductor region is less than the doping concentration of the second semiconductor region, the fourth semiconductor region is arranged on the side of the third semiconductor region away from the second surface, and forms a second breakdown junction with the third semiconductor region, and the first breakdown junction and the second breakdown junction are spaced apart in a direction perpendicular to the first surface.
2. The avalanche photodiode according to claim 1, characterized in that The third semiconductor region is a ground electrode, and the first semiconductor region is a cathode; The avalanche photodiode also includes a fifth semiconductor region, which is an anode and has the first doping type. The doping concentration of the fifth semiconductor region is greater than the doping concentration of the second semiconductor region. The fifth semiconductor region is spaced apart from the first semiconductor region in a direction parallel to the first surface and is located between the cathode and the ground electrode in a direction perpendicular to the first surface.
3. The avalanche photodiode according to claim 2, characterized in that The avalanche photodiode further includes an isolation region, which is extended from the first surface to the second surface and is arranged around the first semiconductor region. The fifth semiconductor region is arranged around the isolation region.
4. The avalanche photodiode according to claim 3, characterized in that The isolation region includes a first isolation portion and a second isolation portion arranged in sequence in the direction from the first surface to the second surface. In a direction perpendicular to a line connecting the first surface and the second surface, a width of the first isolation portion is greater than a width of the second isolation portion so as to form a step at the connection between the first isolation portion and the second isolation portion, and the fifth semiconductor region is arranged at the step.
5. The avalanche photodiode according to claim 4, characterized in that One end of the second isolation portion away from the first isolation portion extends to the second surface and penetrates the third semiconductor region and the fourth semiconductor region.
6. The avalanche photodiode according to claim 4, characterized in that The avalanche photodiode further includes a metal connector, which is disposed on the first isolation portion, and two ends of the metal connector respectively abut against the first surface and the fifth semiconductor region.
7. The avalanche photodiode according to any one of claims 1 to 3, characterized in that: In a direction parallel to the first surface, a lateral dimension of the first semiconductor region is the same as a lateral dimension of the second semiconductor region.
8. The avalanche photodiode according to any one of claims 1 to 3, characterized in that: In a direction parallel to the first surface, a lateral dimension of the third semiconductor region is the same as a lateral dimension of the fourth semiconductor region.
9. The avalanche photodiode according to any one of claims 1 to 3, characterized in that: The first doping type is P type, and the second doping type is N type.
10. A detector, characterized in that: The invention comprises a plurality of avalanche photodiodes according to any one of claims 1 to 9, wherein the plurality of avalanche photodiodes are arranged in an array.