Super-junction IGBT and manufacturing method thereof

Abstract

The embodiment of the invention provides a super-junction IGBT (Insulated Gate Bipolar Translator) and a manufacturing method thereof, and the super-junction IGBT comprises a drift region; a column region is formed in the drift region, and the conduction type of the column region is opposite to that of the drift region; the column regions extend along the thickness direction of the drift region, and the plurality of column regions are arranged side by side in the drift region at intervals; the epitaxial layer is formed on the upper surface of the drift region; the central part of the super-junction IGBT serves as a cellular area, and the peripheral part of the super-junction IGBT serves as a terminal area; a gate structure is formed on the part, located in the cellular region, of the epitaxial layer; a terminal ring region is arranged at the part, located in the terminal region, of the epitaxial layer, and the terminal ring region surrounds the cellular region to form a ring shape; the conductivity type of the terminal ring region is opposite to that of the epitaxial layer. According to the super-junction IGBT provided by the embodiment of the invention, the pressure bearing capability of the terminal area is improved.

Description

Technical Field

[0001] The present application relates to a semiconductor technology, and in particular to a super junction IGBT and a method for manufacturing the same. Background Art

[0002] Insulated Gate Bipolar Transistor (IGBT) is a power semiconductor device that combines the advantages of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and Bipolar Junction Transistor (BJT). It has the characteristics of high input impedance and low conduction loss, and is very suitable for use in high voltage and high current application scenarios, such as inverters, motor drives and electric vehicles. Super Junction IGBT is a power device that combines super junction technology with IGBT structure. By introducing P-type and N-type super junction regions inside the device, the on-resistance and switching loss are significantly reduced, and the high voltage resistance is improved. It also has obvious advantages in efficiency and heat dissipation performance. This design makes super junction IGBT more suitable for high voltage, high power and high efficiency application scenarios, such as motor drive, photovoltaic inverter and electric vehicle control.

[0003] A conventional super junction IGBT such as Figure 1 As shown, 1 is the emitter metal region, 2 is the dielectric layer, 3 is the N+ emitter, 4 is the P well region (also known as: Pwell region), 5 is the gate Poly, 6 is the gate oxide layer, 7 is the second epitaxy. 8 is the super junction P column region, 9 is the N-drift region, 10 is the N+ field stop region, 11 is the P+ collector region, 12 is the collector metal, 13 is the terminal P-type main junction region, and 14 is the field oxide layer.

[0004] The pressure-bearing capacity of the terminal region of the superjunction IGBT mainly depends on the "second epitaxy 7 + superjunction P column region 8 + N-drift region 9". In the superjunction IGBT, the N-type layer of the second epitaxy 7 acts as a hole blocking layer, which increases the concentration of carriers in the drift region, thereby reducing the on-state voltage drop. Therefore, the concentration of this layer must be high enough to play its role. However, this also leads to the inability of the second epitaxy region 7 to be fully depleted when the device breaks down, thereby limiting the pressure-bearing capacity of the terminal region.

[0005] In addition, in the super junction IGBT, the cooperation between the N-drift region 9 and the super junction P column region 8 achieves charge balance. In order to maximize the performance advantages of the super junction IGBT and ensure the stability of the process, the concentration of the N-drift region 9 must be kept high, because the higher the concentration of the N-drift region 9, the faster the carriers are extracted from the super junction region when the super junction IGBT is switched, and the higher concentration also makes process control easier. This causes the electric field to decay rapidly in the N-drift region 9, further limiting the pressure bearing capacity of the terminal region.

[0006] In summary, the pressure bearing capacity of the second epitaxy 7 and the N-drift region 9 is very small, and the pressure bearing capacity of the device is mainly limited by the thickness of the super junction region 8. However, due to the constraints of process and cost, there is an upper limit to the thickness of the super junction region 8, which makes the operating voltage of the current super junction IGBT generally lower than 900V, thus limiting the application range of the super junction IGBT. Summary of the invention

[0007] In order to solve one of the above technical defects, a super junction IGBT and a manufacturing method thereof are provided in an embodiment of the present application.

[0008] According to a first aspect of an embodiment of the present application, a super junction IGBT is provided, comprising: A drift region; a column region is formed in the drift region, and the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; An epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT is used as a cell region, and the peripheral part is used as a terminal region; the portion of the epitaxial layer located in the cell region is formed with a gate structure; the portion of the epitaxial layer located in the terminal region is provided with a terminal ring region, which surrounds the cell region in a ring shape; the conductivity type of the terminal ring region is opposite to the conductivity type of the epitaxial layer.

[0009] According to a second aspect of an embodiment of the present application, a method for manufacturing a super junction IGBT is provided, wherein a central portion of the super junction IGBT is used as a cell region, and a peripheral portion is used as a terminal region; the method comprises: forming a drift region on the substrate; A column region is formed in the drift region; the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; forming an epitaxial layer on an upper surface of the drift region; A terminal ring region is formed at the portion of the epitaxial layer located in the terminal region. The terminal ring region surrounds the cell region in a ring shape. The conductivity type of the terminal ring region is opposite to that of the epitaxial layer. A gate structure is formed on a portion of the epitaxial layer located in the cell region.

[0010] The technical solution provided in the embodiment of the present application is characterized in that a column region is formed in the drift region, and the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and multiple column regions are arranged side by side and at intervals in the drift region; an epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT serves as a cell region, and the outer part serves as a terminal region; a gate structure is formed on the portion of the epitaxial layer located in the cell region; a terminal ring region is provided on the portion of the epitaxial layer located in the terminal region, and the terminal ring region is ring-shaped around the cell region; the conductivity type of the terminal ring region is opposite to that of the epitaxial layer; the existence of the terminal ring region can make the device fully depleted during breakdown, and even if the concentration of the epitaxial layer is very high, it can achieve full depletion, thereby improving the pressure-bearing capacity of the terminal region, and further improving the breakdown voltage of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 It is a schematic diagram of a longitudinal cross-sectional view of a conventional super junction IGBT; Figure 2 A schematic longitudinal cross-sectional view of a super junction IGBT provided in an embodiment of the present application; Figure 3 A top view of a super junction IGBT provided in an embodiment of the present application; Figure 4 for Figure 3 Magnified view of area C in the middle; Figure 5 A flow chart of a super junction IGBT manufacturing method provided in an embodiment of the present application; Figure 6 A schematic diagram of a structure for forming a pressure-bearing region and a drift region in a super junction IGBT manufacturing method provided in an embodiment of the present application; Figure 7 A schematic diagram of a structure for forming a pillar region in a super junction IGBT manufacturing method provided in an embodiment of the present application; Figure 8 A schematic diagram of a structure for forming an epitaxial layer in a super junction IGBT manufacturing method provided in an embodiment of the present application; Fig. 9 A schematic diagram of the structure of forming a terminal ring region in the super junction IGBT manufacturing method provided in an embodiment of the present application; Fig.10 A schematic diagram of the structure of forming a field oxide layer in the super junction IGBT manufacturing method provided in an embodiment of the present application; Fig.11 A schematic diagram of a structure for forming a gate structure in a super junction IGBT manufacturing method provided in an embodiment of the present application; Fig.12 A schematic diagram of the structure of forming a metal field plate and an emitter metal region in the super junction IGBT manufacturing method provided in an embodiment of the present application; Fig.13 A schematic diagram of the structure of forming a field stop region, a collector and a collector metal layer in the super junction IGBT manufacturing method provided in an embodiment of the present application; Fig.14 A schematic diagram comparing the breakdown voltage of the super junction IGBT provided in an embodiment of the present application and that of a traditional device.

[0012] Reference numerals: In the background technology: 1- Emitter metal region; 2- Dielectric layer; 3- N+ emitter; 4- P well region (also known as: Pwell region); 5- Gate Poly; 6- Gate oxide layer; 7- Second epitaxy; 8- Super junction P column region; 9- N- drift region; 10- N+ field stop region; 11- P+ collector region; 12- Collector metal; 13- Terminal P-type main junction region; 14- Field oxide layer.

[0013] In a specific implementation:

[0014] 1-emitter metal region; 2-dielectric layer; 3-N+ emitter; 4-well region; 5-gate; 6-gate oxide layer; 7-epitaxial layer; 8-pillar region; 9-drift region; 10-field stop region; 11-collector; 12-collector metal layer; 13-terminal ring region; 14-field oxide layer; 15-metal field plate; 16-pressure bearing region; 21- cellular region; 22- terminal region. DETAILED DESCRIPTION

[0015] In order to make the technical solutions and advantages in the embodiments of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0016] This embodiment provides a super junction IGBT having a relatively high operating voltage.

[0017] like Figures 2 to 4 As shown, the super junction IGBT provided in this embodiment includes: a drift region 9 and an epitaxial layer 7. The drift region 9 is formed on a substrate, such as a silicon substrate. The epitaxial layer 7 is formed on the upper surface of the drift region 9.

[0018] A column region 8 is formed in the drift region 9, and the conductivity type of the column region 8 is opposite to that of the drift region 9. When the drift region 9 is of N type, the column region 8 is of P type; when the drift region 9 is of P type, the column region 8 is of N type. This embodiment is described by taking the N type drift region 9 and the P type column region 8 as examples. The column region 8 extends along the thickness direction of the drift region 9, and a plurality of column regions 8 are arranged side by side and at intervals in the drift region 9. In addition, a collector is formed at the end of the column region 8 away from the epitaxial layer 7.

[0019] The conductivity type of the epitaxial layer 7 is the same as that of the drift region 9. In this embodiment, the N-type epitaxial layer 7 is taken as an example. The doping concentration of the epitaxial layer 7 may be greater than the doping concentration of the drift region 9, or less than the doping concentration of the drift region 9, or the same as the doping concentration of the drift region 9.

[0020] The central part of the super junction IGBT serves as the cell region, and the peripheral part serves as the terminal region. Figure 3 In the figure, the overlapping part between the area where the double-headed arrow a is located and the area where the double-headed arrow b is located is used as the cell area 21, and the outer part is used as the terminal area 22. Figure 4 The dotted line in the figure indicates the boundary between the cell area 21 and the terminal area 22, and the dotted line position only indicates the approximate position.

[0021] The portion of the epitaxial layer 7 located in the cell region 21 is formed with a gate structure, and the gate structure includes: a well region 4 formed in the epitaxial layer 7 and located on the upper part of the epitaxial layer 7. For the N-type epitaxial layer 7, the well region 4 is of P-type. A hole is opened downward from the upper surface of the well region 4 and extends into the epitaxial layer 7, and a gate oxide layer 6 and a gate 5 are sequentially formed in the hole. N+ emitter electrodes 3 are formed on both sides of the gate oxide layer 6, and a dielectric layer 2 is formed above the N+ emitter electrode 3 and the gate 5. An emitter metal region 1 is formed on the upper surface of the epitaxial layer 7 and the upper surface of the dielectric layer 2.

[0022] The portion of the epitaxial layer 7 located in the terminal region 22 is provided with a terminal ring region 13, which is ring-shaped around the cell region 21. The conductivity type of the terminal ring region 13 is opposite to that of the epitaxial layer 7. For an N-type epitaxial layer 7, the terminal ring region 13 is a P-type.

[0023] The terminal ring region 13 can serve as a depletion region, so that the device is fully depleted during breakdown. Even if the concentration of the epitaxial layer 7 is very high, full depletion can be achieved, thereby improving the pressure-bearing capacity of the terminal region and further improving the breakdown voltage of the device.

[0024] The technical solution provided in this embodiment forms a column region in the drift region, and the conductivity type of the column region is opposite to the conductivity type of the drift region; the column region extends along the thickness direction of the drift region, and multiple column regions are arranged side by side and at intervals in the drift region; an epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT serves as a cell region, and the outer part serves as a terminal region; a gate structure is formed on the portion of the epitaxial layer located in the cell region; a terminal ring region is provided on the portion of the epitaxial layer located in the terminal region, and the terminal ring region is ring-shaped around the cell region; the conductivity type of the terminal ring region is opposite to that of the epitaxial layer; the existence of the terminal ring region can make the device fully depleted during breakdown, and even if the concentration of the epitaxial layer is very high, it can achieve full depletion, thereby improving the pressure-bearing capacity of the terminal region, and further improving the breakdown voltage of the device.

[0025] The number of the terminal ring area 13 can be one, or two or more. When the doping concentration of the terminal ring area 13 is relatively low, the number of the terminal ring area 13 is one; when the doping concentration of the terminal ring area 13 is relatively high, the number of the terminal ring area 13 is at least two, and at least two terminal ring areas 13 are arranged at intervals.

[0026] During the operation of the superjunction IGBT, the collector will inject carriers (holes for N-channel devices) into the drift region 9. The increase in carrier concentration can significantly reduce the on-resistance of the drift region 9, thereby effectively reducing the conduction loss of the device. The presence of the epitaxial layer 7 blocks the collector-injected carriers (holes) from flowing out to the emitter, thereby reducing the on-resistance of the device. The higher the concentration of the epitaxial layer 7, the more significant its blocking effect on the collector-injected carriers (holes), thereby further improving the device performance. Setting the doping concentration of the epitaxial layer 7 to be greater than 4.5E14 can significantly improve the blocking effect on carriers.

[0027] In this embodiment, the doping concentration of the epitaxial layer 7 is set to 4.5E14~7.5E15. The epitaxial layer 7 acts as a hole blocking layer, which can increase the concentration of carriers in the drift region, thereby blocking the collector from injecting carriers, thereby reducing the on-state voltage drop. In addition, the doping concentration of the epitaxial layer 7 is less than 7.5E15. It can also enable the device to be fully depleted when it breaks down, so as to improve the voltage resistance of the terminal region, which is beneficial to improving the breakdown voltage of the device. On the basis of the above technical solution, an implementation method is: along the direction from the cell region 21 to the terminal region 22, the distance between adjacent terminal ring regions 13 gradually increases. The distance between adjacent terminal ring regions 13 close to the cell region is small, and the distance between adjacent terminal ring regions 13 away from the cell region is large, which can make the electric field distribution of the device more uniform.

[0028] The width and depth of each terminal ring region 13 can be adaptively adjusted according to the performance and size of the device. In this embodiment, the depth and width of each terminal ring region 13 are the same. The terminal ring region 13 is a rounded rectangle in the device, which can reduce the electric field concentration phenomenon.

[0029] On the basis of the above technical solution, a field oxide layer 14 is formed on the upper surface of the epitaxial layer 7, and a metal field plate 15 is formed on the upper surface of the field oxide layer. A plurality of metal field plates 15 are arranged at intervals, and each metal field plate 15 passes through the field oxide layer 14 and is in electrical contact with a corresponding terminal ring area 13. The metal field plate 15 can optimize the electric field on the surface of the device, block external mobile ions, and shield the charges in the external plastic packaging material or passivation layer, thereby improving the reliability of the device. The field oxide layer 14 isolates the metal field plate 15 from the epitaxial layer 7, so that the two are kept insulated, and can protect the terminal area and avoid contamination of the terminal area.

[0030] Furthermore, the super junction IGBT further includes: a pressure-bearing region 16, which is formed on the lower surface of the drift region 9. The conductivity type of the pressure-bearing region 16 is the same as that of the drift region 9. For an N-type drift region 9, the pressure-bearing region 16 is N-type. The doping concentration of the pressure-bearing region 16 is less than the doping concentration of the drift region 9, which helps the depletion region of the device to be fully expanded in the vertical direction, thereby enhancing the voltage resistance of the device.

[0031] In addition, an N-type field stop region 10 is formed on the lower surface of the pressure-bearing region 16 , a P-type collector 11 is formed on the lower surface of the field stop region 10 , and a collector metal layer 12 is formed on the lower surface of the collector 11 .

[0032] In the above scheme, the bottom end of the column region 8 can extend downward to be flush with the lower surface of the drift region 9, or can also maintain a certain distance from the lower surface of the drift region 9. In this embodiment, the distance between the bottom end of the column region 8 and the lower surface of the drift region 9 is less than 12 μm, which is equivalent to the thickness of the drift region 9 below the column region 8 being less than 12 μm, and the doping concentration of the drift region 9 is 3E14-5E15, which can improve the withstand voltage capability of the device, improve the performance of the device, and make the production process more stable, which is conducive to improving the yield rate and making the product consistency better.

[0033] The thickness of the pressure-bearing region 16 should be greater than 15 μm, and the doping concentration of the pressure-bearing region should be less than 3E14, which can further improve the voltage resistance of the device.

[0034] Based on the above technical solution, this embodiment also provides a method for manufacturing a super junction IGBT, which is used to manufacture the above super junction IGBT. Figure 5 As shown, the manufacturing method includes: Step 101: forming a drift region on a substrate.

[0035] Step 102 , forming a column region in the drift region; the conductivity type of the column region is opposite to the conductivity type of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region.

[0036] Step 103: forming an epitaxial layer on the upper surface of the drift region.

[0037] Step 104 , forming a terminal ring region at the portion of the epitaxial layer located in the terminal region, the terminal ring region surrounding the cell region in a ring shape; the conductivity type of the terminal ring region is opposite to the conductivity type of the epitaxial layer.

[0038] Step 105 : forming a gate structure on the portion of the epitaxial layer located in the cell region.

[0039] In the super junction IGBT obtained through the above steps, the existence of the terminal ring region can make the device fully depleted during breakdown, even if the concentration of the epitaxial layer is very high, it can still be fully depleted, thereby improving the pressure bearing capacity of the terminal region and further improving the breakdown voltage of the device.

[0040] Based on the above solution, this embodiment provides a specific implementation method: In the above step 101, a pressure-bearing region 16 is first formed on a silicon substrate, and the pressure-bearing region 16 can be formed by epitaxy or single crystal growth. Then, a drift region 9 is formed on the upper surface of the pressure-bearing region 16, and the drift region 9 is formed by epitaxy. Figure 6 As shown. The conductivity type of the pressure-bearing region 16 is the same as the conductivity type of the drift region 9, for example, both are N-type. The doping concentration of the pressure-bearing region 16 is less than the doping concentration of the drift region 9, for example: the doping concentration of the drift region 9 is 3E14-5E15, and the doping concentration of the pressure-bearing region 16 is less than 3E14. The thickness of the pressure-bearing region 16 is greater than 15μm. The doping concentration of the pressure-bearing region 16 is less than the doping concentration of the drift region 9, which helps the device to fully expand the depletion region in the vertical direction, thereby enhancing the voltage resistance of the device.

[0041] In the above step 102, a column region 8 is formed in the N-type drift region 9 by implantation epitaxy or trenching epitaxy. A plurality of column regions 8 are arranged side by side and spaced apart, such as Figure 7 As shown. In this embodiment, the column region 8 is a P column, and the area between adjacent P columns constitutes an N column. The P columns and N columns are arranged alternately and perpendicular to the surface of the drift region 9 to form a super junction structure. In this embodiment, the distance between the bottom end of the column region 8 and the lower surface of the drift region 9 is less than 12μm, which is equivalent to the thickness of the drift region 9 below the column region 8 being less than 12μm, which can improve the voltage resistance of the device, improve the performance of the device, and make the production process more stable, which is conducive to improving the yield rate and making the product consistency better.

[0042] In the above step 103, an epitaxial layer 7 is formed on the upper surface of the drift region 9 by epitaxial growth, such as Figure 8As shown. The doping concentration of the epitaxial layer 7 may be 4.5E14-7.5E15. The drift region 9 may also be referred to as a first epitaxial layer, and the epitaxial layer 7 may also be referred to as a second epitaxial layer.

[0043] In the above step 104, a P-type terminal ring region 13 is formed on the epitaxial layer 7 by implantation diffusion through a mask plate, or the terminal ring region 13 can also be formed by trenching and growing in the epitaxial layer 7, such as Fig. 9 shown.

[0044] In this embodiment, a plurality of terminal ring regions 13 are arranged to surround the cell region 21 in a ring shape, and the plurality of terminal ring regions 13 are arranged at intervals.

[0045] One implementation method is: along the direction from the cell region 21 to the terminal region 22, the distance between adjacent terminal ring regions 13 gradually increases. The distance between adjacent terminal ring regions 13 close to the cell region is smaller, and the distance between adjacent terminal ring regions 13 far from the cell region is larger, which can make the electric field distribution of the device more uniform. The width and depth of each terminal ring region 13 can be adaptively adjusted according to the performance and size of the device. In this embodiment, the depth and width of each terminal ring region 13 are the same. The terminal ring region 13 is a rounded rectangle in the device, which can reduce the electric field concentration phenomenon.

[0046] Further, a field oxide layer 14 is formed on the upper surface of the epitaxial layer 7, and the field oxide layer 14 can be formed by a thermal oxidation process. Then, through holes are opened in the field oxide layer 14 at positions corresponding to the terminal ring regions 13 by an etching process until the terminal ring regions 13 are exposed. Fig.10 shown.

[0047] Next, a gate structure is formed, specifically, a gate oxide layer 6, a gate 5, a well region 4, an N+ emitter 3 and a dielectric layer 2 are formed through a series of positive full processes to form a cell region 21, such as Fig.11 shown.

[0048] Metal field plates 15 and emitter metal regions 1 are formed on the surface of the field oxide layer 14 and in each through hole by a deposition and etching process. The metal field plates 15 are arranged at intervals, and each metal field plate 15 is in electrical contact with a corresponding terminal ring region 13. Fig.12 shown.

[0049] Afterwards, a series of back-side processes are used to form a field stop region 10, a collector 11 and a collector metal layer 12, such as Fig.13 shown.

[0050] The super-junction IGBT obtained by the above scheme has a high voltage-bearing capacity. It has been verified through simulation and experiments that the voltage it can withstand is greater than 1200V, and it can show great application value in higher voltage fields (>900V).

[0051] Furthermore, each step in the above manufacturing method can be realized by applying the existing manufacturing process of super junction IGBT, which has good process compatibility, does not require additional preparation equipment or process, and will not increase production costs.

[0052] like Fig.14 As shown, the horizontal axis in the figure is the breakdown voltage BV of the device, the vertical axis is the collector current IC, the solid line is the simulation curve of the traditional super junction IGBT device, the long dashed line is the simulation curve of the super junction IGBT device provided by this embodiment, and the short dashed line is the measured curve of the super junction IGBT device provided by this embodiment. Fig.14 It can be clearly seen that the pressure-bearing capacity of a conventional super junction IGBT device is only about 1030V, while the pressure-bearing capacity of the super junction IGBT device provided in this embodiment reaches more than 1400V in both simulation and actual measurement, and the pressure-bearing capacity is significantly better than that of conventional devices.

[0053] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0054] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0055] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0056] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0057] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A super junction IGBT, characterized in that: include: A drift region; a column region is formed in the drift region, and the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; An epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT is used as a cell region, and the peripheral part is used as a terminal region; the portion of the epitaxial layer located in the cell region is formed with a gate structure; the portion of the epitaxial layer located in the terminal region is provided with a terminal ring region, which surrounds the cell region in a ring shape; the conductivity type of the terminal ring region is opposite to the conductivity type of the epitaxial layer.

2. The super junction IGBT according to claim 1, characterized in that: The number of the terminal ring areas is at least two, and at least two terminal ring areas are arranged at intervals.

3. The super junction IGBT according to claim 1, characterized in that: Also includes: A field oxide layer formed on the upper surface of the epitaxial layer; a metal field plate formed on an upper surface of the field oxide layer; A plurality of metal field plates are arranged at intervals, and each metal field plate passes through the field oxide layer and is in electrical contact with a corresponding terminal ring region.

4. The super junction IGBT according to claim 1, characterized in that: The distance between adjacent terminal ring regions gradually increases from the cell region to the terminal region.

5. The super junction IGBT according to claim 1, characterized in that: The doping concentration of the epitaxial layer is: 4.5E14~7.5E15.

6. The super junction IGBT according to claim 1, characterized in that: The distance between the bottom end of the pillar region and the lower surface of the drift region is less than 12 μm.

7. The super junction IGBT according to any one of claims 1 to 6, characterized in that: Also includes: A pressure-bearing region is formed on the lower surface of the drift region; the conductivity type of the pressure-bearing region is the same as that of the drift region, and the doping concentration of the pressure-bearing region is less than the doping concentration of the drift region; a field cutoff region formed on the lower surface of the pressure-bearing region; A collector electrode formed on a lower surface of the field stop region; The collector metal layer is formed on the lower surface of the collector.

8. A method for manufacturing a super junction IGBT, characterized in that: The central part of the super junction IGBT is used as a cell region, and the peripheral part is used as a terminal region; the method comprises: forming a drift region on the substrate; A column region is formed in the drift region; the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; forming an epitaxial layer on an upper surface of the drift region; A terminal ring region is formed at the portion of the epitaxial layer located in the terminal region. The terminal ring region surrounds the cell region in a ring shape. The conductivity type of the terminal ring region is opposite to that of the epitaxial layer. A gate structure is formed on a portion of the epitaxial layer located in the cell region.

9. The manufacturing method according to claim 8, characterized in that: After the terminal loop is formed, it also includes: forming a field oxide layer on an upper surface of the epitaxial layer; Opening through holes at positions corresponding to the terminal ring regions in the field oxide layer until the terminal ring regions are exposed; Metal field plates are formed on the surface of the field oxide layer and in each through hole. The metal field plates are arranged at intervals, and each metal field plate is in electrical contact with a corresponding terminal ring area.

10. The manufacturing method according to claim 9, characterized in that: Forming a drift region on a substrate includes: forming a pressure-bearing zone on the substrate; A drift region is formed on the upper surface of the pressure-bearing region; the conductivity type of the pressure-bearing region is the same as that of the drift region, and the doping concentration of the pressure-bearing region is lower than the doping concentration of the drift region.

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