Bidirectional unbalanced delay unit for bidirectional wire handshake

Abstract

The invention discloses a bidirectional unbalanced delay unit for bidirectional wire handshake. The bidirectional unbalanced delay unit comprises a reverse transmission path and a forward transmission path, the reverse transmission path comprises a transmission gate, and the right side input of the transmission gate is connected to a transmission gate enabling end through a buffer; the forward transmission path comprises a buffer, a delay module with adjustable delay and a self-turn-off transmission gate of which signals are sequentially transmitted from left to right, and the left side of the self-turn-off transmission gate is input into a series inverter and serves as an enable signal of the transmission gate at the same time; the delay-adjustable delay module comprises a minimum delay module with reset, wherein a plurality of reset ports of the minimum delay module are sequentially connected, and the minimum delay module is composed of an AND gate and a standard delay unit. The bidirectional unbalanced delay unit provided by the invention only has forward delay, basically eliminates back propagation delay of signals during long-distance communication, and is simple in structure and convenient to use; the delay unit can be used on a two-way wire or a one-way wire, and the applicability is high.

Description

Technical Field

[0001] The invention belongs to the technical field of bidirectional communication, and in particular relates to a bidirectional unbalanced delay unit used for bidirectional wire handshake. Background Art

[0002] The clock-free asynchronous circuit design or cross-clock domain design of the chip usually requires the introduction of a handshake protocol to bind data with events (request req and response ack). The sender sends the request req and the receiver sends the data after it is ready. After the receiver receives the data, it sends the response ack to the sender to complete the signal transmission and realize the synchronous transmission of data and events. In some cases, the synchronization of data and events requires delay matching, that is, it is necessary to insert a delay unit on the req signal line to match the corresponding combinational logic delay to ensure the synchronous transmission of the handshake signal and data. In asynchronous circuits, the design of data binding is called a delay-limited (BD) asynchronous circuit. Taking the BD asynchronous circuit as an example, delay matching usually inserts a delay unit on the req line to match the corresponding data path delay, and does not process the ack line so that the ack signal is quickly sent to the previous stage to end the handshake to process the new handshake. For the case where two wires are used to transmit the req and ack signal lines respectively, delay matching is relatively simple, and only a delay unit needs to be inserted on the req signal line. However, for the case of using a bidirectional wire to transmit events, a bidirectional delay unit needs to be introduced, and it is usually desired to have only a forward delay and substantially no reverse delay, so that the signal can be quickly transmitted back to the previous stage after the subsequent stage module responds.

[0003] Most of the existing mature delay units used in industry adopt the structure of cascaded inverter or buffer units. This structure is simple to design and can enhance signal drive to a certain extent. However, due to the unidirectional transmission characteristics of inverters and buffers, this delay unit is only applicable to unidirectional wires. For bidirectional wires, if this delay unit is used, the input and output characteristics of the bidirectional wires will be destroyed. In addition, for digital circuit design, bidirectional ports or bidirectional lines usually need to introduce additional controls, which increases additional area overhead and makes the design more complicated, while analog circuit design is difficult to implement large-scale integrated circuit design. Therefore, there is a lack of bidirectional delay units in industrial applications, and delay units for bidirectional wires usually require additional customized designs.

[0004] Foreign research calls the bidirectional delay unit a repeater. Hollis et al. (Simon Hollis and Simon W. Moore. 2006. RasP: An Area-efficient, On-chip Network. In 2006 International Conference on Computer Design. 63–69.) discussed the problem of driving long state lines, and chose to use a locking control stage to pipeline long wires. Instead of designing a true bidirectional repeater circuit, they defined the extra FIFO stage as a "repeater". Jo Ebergen et al. (Jo Ebergen, Bill Coates, and Austin Lee. 2011. Long-Distance On-chip Communication Using GasP. In 2011 17th IEEE International Symposium on Asynchronous Circuits and Systems. 109–116.) defined the device that enables signals to communicate over long distances on a single-track bidirectional line as a repeater, and proposed an R1 repeater, namely an R1 delay unit, which is inserted on a bidirectional state line for long-distance communication. The delay of a bidirectional line can also be adjusted by changing the length of the wire. However, whether the above-mentioned repeater is used or by adjusting the length of the wire, the problem of the same forward delay and reverse delay exists. The signal needs to go through two matching delay times for one round trip on the bidirectional wire. This means that when performing delay matching, it takes twice the matching delay from sending a req to receiving an ack, resulting in two adjacent handshakes consuming twice the time resources. In addition, the above-mentioned bidirectional delay unit (repeater) is more difficult to adjust the delay, and it is difficult to determine the size of the delay that is changed during adjustment. Moreover, its design is a pure analog circuit design, which is more complicated when applied to digital design. Summary of the invention

[0005] In view of the problems existing in the above background technology, an object of the present invention is to provide a bidirectional unbalanced delay unit for bidirectional wire handshake, which has only forward delay and substantially eliminates reverse delay.

[0006] In order to achieve the above object, the present invention adopts the following technical solution: A bidirectional unbalanced delay unit for bidirectional wire handshaking includes a reverse transmission path and a forward transmission path; Reverse transmission path: It includes a transmission gate. The right input of the transmission gate is connected to the transmission gate enable terminal through a buffer. When the right signal changes from logic '1' to logic '0', the logic '0' value is transmitted to the left signal, pulling the left signal low. At the same time, when the right signal is logic '1', the left signal can be pulled high. Forward transmission path: includes a buffer that transmits signals from left to right in sequence, a delay module with adjustable delay, and a self-shutdown transmission gate. The left input of the self-shutdown transmission gate is connected in series with an inverter as the enable signal of the transmission gate, so that the transmission gate automatically shuts down after transmitting the logic "1" of the left signal to the right signal, and the logic '0' value of the left signal can be transmitted to the right through the self-shutdown transmission gate. The delay module with adjustable delay includes a minimum delay module with reset connected in sequence with multiple reset ports, and the minimum delay module is composed of an AND gate and a standard delay unit; by increasing or decreasing the number of the minimum delay modules, the delay of the entire forward path can be adjusted; the reset ports of multiple minimum delay modules are connected together, so that the entire delay path can be reset at the same time when the left signal is reset, preventing the logic '1' value in the delay path from being transmitted backward.

[0007] Furthermore, the left side of the bidirectional unbalanced delay unit is connected to a retainer KL, and the right side is connected to a retainer KH. The retainer KL is used to maintain the logic value of the signal on the left side of the delay unit, and the retainer KH is used to maintain the logic value of the signal on the right side of the delay unit. Port A of the retainer KL receives the signal at the left end of the delay unit, and port A of the retainer KH receives the signal at the right end of the delay unit. Port EN of the retainer KL and port ENB of the retainer KH are both connected to the input wire on the left side of the self-shutdown transmission gate inside the delay unit.

[0008] The present invention further provides a communication circuit based on a single bidirectional wire communication, comprising a Gasp circuit and a bidirectional unbalanced delay unit for bidirectional wire handshake, wherein the bidirectional unbalanced delay unit is connected to the bidirectional line between the GasP communication modules in the GasP circuit, and is used to match the request delay and eliminate the response delay.

[0009] Compared with the shortcomings and deficiencies of the prior art, the present invention has the following beneficial effects: (1) The bidirectional unbalanced delay unit provided by the present invention has only forward delay, which basically eliminates the reverse propagation delay of the signal during long-distance communication, can meet the objective requirements of bidirectional line handshake, and is also applicable to other scenarios where the bidirectional line only requires forward delay; (2) Simple structure: Compared with the traditional bidirectional delay unit, the delay unit of the present invention only includes the basic logic gate structure: AND gate, standard delay unit, inverter, transmission gate, and basically does not include transistor structure. The structure is simple and easy to design and implement; (3) When the delay unit of the present invention is used, it can be used by connecting the delay unit to both ends of the bidirectional signal line, which is convenient to use. The delay unit can be used on a bidirectional conductor or a unidirectional conductor, which makes up for the defect that the traditional delay unit can only be used on a unidirectional transmission conductor, and has strong applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a schematic structural diagram of a bidirectional unbalanced delay unit provided by an embodiment of the present invention; Figure 2 It is a schematic diagram of the internal structure of a delay module with adjustable delay provided by an embodiment of the present invention; Figure 3 is an internal timing diagram of the bidirectional unbalanced delay unit provided by an embodiment of the present invention when it is working; Figure 4 is a structural diagram of a retainer provided by an embodiment of the present invention; Figure 5 The pipeline structure of the communication circuit based on single bidirectional wire communication provided by the embodiment of the present invention; Figure 6 is a test waveform diagram of a delay unit provided by an embodiment of the present invention; wherein, Figure 6 (a) is the test waveform of the bidirectional unbalanced delay unit. Figure 6 (b) is the test waveform of the R1 delay unit. DETAILED DESCRIPTION

[0011] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0012] Designed using 110nm process technology, the bidirectional unbalanced delay unit for bidirectional wire handshake is named Abid, and its structure is as follows Figure 1 As shown, Abid is divided into two paths, namely the reverse transmission path and the forward transmission path.

[0013] Reverse transmission path: It includes a transmission gate TG1. The right input of transmission gate TG1 is connected to the transmission gate enable terminal through a buffer, so that when the right signal changes from logic '1' to logic '0', the logic '0' value is transmitted to the left signal, and the left signal is pulled low. At the same time, when the right signal is logic '1', the left signal can be pulled high. Since there is only one transmission gate structure in the path, the path delay is extremely low. When used for bidirectional wire handshake, the return time of the response ack is basically eliminated, which can increase the data transmission frequency.

[0014] Forward transmission path: includes buffer, which transmits signals from left to right, delay module delayA with adjustable delay, and self-shutdown transmission gate TG0. The buffer is used to enhance the drive and ensure sufficient drive strength when the delay of delayA is large. TG0 is used to transmit high or low levels transmitted from the left. The inverter in series with the left input of TG0 is used as the enable signal of the transmission gate, so that the transmission gate is automatically shut down after transmitting the logic "1" of the left signal to the right signal. The logic '0' value of the left signal can be transmitted to the right through TG0. The internal structure of delayA is shown in Figure 1. Figure 2 As shown in the figure, a minimum delay module with reset is composed of an AND gate and a standard delay unit. By increasing or decreasing the number of the minimum delay modules, the delay of the entire forward path can be adjusted; the reset ports of multiple minimum delay modules are connected together, so that when the left signal is reset, the entire delay path can be reset at the same time, preventing the logic '1' value in the delay path from being transmitted backward. The internal timing of Abid when working is as follows Figure 3 shown.

[0015] Since the logic '1' value right transmission and the logic '0' value left transmission of the bidirectional unbalanced delay unit are both triggered by the edge of the signal, and the transmission gate cannot continuously output '0' or '1', when the bidirectional signal line cannot receive and maintain '0' or '1', keepers can be added on the left and right sides of the delay unit. The structure of the keeper is as follows Figure 4 As shown, there are two types, one is used to keep the logic value '0' of the signal on the left side of the delay unit, named as the holder KL; the other is used to keep the logic value '1' of the signal on the right side of the delay unit, named as the holder KH, and is inserted on the left and right sides of the bidirectional unbalanced delay unit when in use. Port A of KL is connected to the left end signal of the delay unit, port A of KH is connected to the right end signal of the delay unit, and port EN of the holder KL and port ENB of the holder KH are both connected to the input wire Z on the left side of the self-shutdown transmission gate TG0 inside the delay unit. KL can keep the '0' value transmitted from the right side to the left side at its falling edge on the left side, and KH can keep the '1' value transmitted from the left side to the right side at its rising edge on the right side.

[0016] In the 110nm process, the bidirectional unbalanced delay unit and the Gasp circuit used for bidirectional wire handshake are built into a communication circuit based on a single bidirectional wire communication. The pipeline structure is as follows Figure 5 As shown, the GasP circuit is a communication module based on a single bidirectional wire communication. When sending a request backward, it pulls the bidirectional line high. After the latter stage receives and processes the request, it pulls the bidirectional line low to indicate a response. At this time, the former stage can send a request backward again. The bidirectional unbalanced delay unit is connected to the bidirectional line between the GasP communication modules in the GasP circuit to match the request delay and eliminate the response delay.

[0017] The pipeline structure is operated under 1.2V and 25℃. Given the input stimulus as a periodic signal with a period of 4ns, and assuming that the corresponding data path delay is 3ns, the forward delay of the delay module is adjusted to 2.25ns (GasP's own delay is 0.71ns), and the experimental test waveform is as follows: Figure 6 As shown in (a), its behavior is as follows: after receiving the stimulus, the front-stage GasP communication module sends a request (high level) to the back-stage, and the request reaches the back-stage after a designed two-way delay of 2.25ns. After the back-stage completes the processing, it sends a response (low level) to the front-stage through the reverse path of the two-way delay of 0.13ns, after which the front-stage can send a request backward again. It can be seen from the experimental data that the bidirectional unbalanced delay unit basically eliminates the delay of the signal (response) passing through the bidirectional wire again when it is returned. By quickly returning the signal, the waiting time for the next communication request is reduced and the communication frequency is accelerated. Taking the R1 delay unit of the prior art as an experimental control, the following is obtained when the working environment and input stimulus remain unchanged. Figure 6 From the test waveform diagram (b), it can be seen that the response signal is transmitted too slowly, resulting in the next communication request not being received normally (no corresponding fire is generated). Compared with the R1 delay unit, the bidirectional unbalanced delay unit Abid of the present invention has a reverse delay of only 0.13ns. In the case of a larger forward matching delay, the communication frequency can be doubled by using this structure in theory. The present invention makes up for the defect that traditional delay units can only be used on unidirectional transmission wires. The delay unit of the present invention can be used on bidirectional wires or unidirectional wires. When in use, the delay unit can be connected to both ends of the bidirectional signal line for use. It is easy to use and has strong applicability.

[0018] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A bidirectional unbalanced delay unit for bidirectional wire handshake, characterized in that: The bidirectional unbalanced delay unit comprises a reverse transmission path and a forward transmission path; The reverse transmission path comprises a transmission gate, and the right input of the transmission gate is connected to the transmission gate enable terminal through a buffer; The forward transmission path includes a buffer for transmitting signals from left to right in sequence, a delay module with adjustable delay, and a self-shutdown transmission gate, wherein a series inverter is inputted on the left side of the self-shutdown transmission gate as an enable signal of the transmission gate; the delay module with adjustable delay includes a minimum delay module with reset to which multiple reset ports are connected in sequence, and the minimum delay module is composed of an AND gate and a standard delay unit.

2. The bidirectional unbalanced delay unit for bidirectional wire handshake according to claim 1, characterized in that: The left side of the bidirectional unbalanced delay unit is connected to a retainer KL, and the right side is connected to a retainer KH. The retainer KL is used to retain the logic value of the signal on the left side of the delay unit, and the retainer KH is used to retain the logic value of the signal on the right side of the delay unit. Port A of the retainer KL receives the signal at the left end of the delay unit, and port A of the retainer KH receives the signal at the right end of the delay unit. Port EN of the retainer KL and port ENB of the retainer KH are both connected to the input wire on the left side of the self-shutdown transmission gate inside the delay unit.

3. A communication circuit based on a single bidirectional wire communication, characterized in that: The invention comprises a GasP circuit and a bidirectional unbalanced delay unit for bidirectional wire handshake as claimed in claim 1 or 2, wherein the bidirectional unbalanced delay unit is connected to a bidirectional line between GasP communication modules in the GasP circuit.

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