Method for solving problem that ultrathin core layer circuit board is easy to deform and clamp in conveying process

Abstract

The invention relates to a method for solving the problem that an ultrathin core layer circuit board is prone to deformation and clamping in the conveying process. The method comprises the steps of material preparation, alignment hole punching, waste area developing, waste area VCP and primary film removing. According to the mSAP process manufacturing method, the waste area of the board can be thickened in the manufacturing process, and the structural rigidity of the core layer circuit board is improved under the condition that the structure of the product area is not influenced, so that the situation that roller conveying cannot be carried out due to the fact that the core layer circuit board is too easy to deform in the initial period of circuit board manufacturing is avoided, the use of adhesive tape is avoided, and the problem that the adhesive tape falls off due to heating is solved; and the problem of plate surface pollution caused by mucilage glue is also avoided.

Description

Technical Field

[0001] The invention relates to the technical field of printed circuit board manufacturing, and in particular to a method for solving the problem of easily deformed card boards during the transportation of ultra-thin core layer circuit boards. Background Art

[0002] The mSAP process, full name Modified Semi-Additive Process, is an advanced printed circuit board (PCB) manufacturing process. Compared with the traditional subtractive process, mSAP has higher circuit density and better signal integrity. This process is mainly used in the manufacture of high-end packaging substrates, such as the packaging of application processors (APs) and baseband chips (BBs) in smartphones, tablets and high-performance computing devices. Its manufacturing steps are generally: blanking, drilling alignment holes, laser through holes, chemical cleaning, wiring, AOI (optical automatic inspection) and pressing. The specific steps of the wiring process include laying a photosensitive wet film on the surface of the copper foil, exposing and curing specific areas of the photosensitive wet film, washing off the uncured part of the wet film to expose the copper surface, etching the exposed copper surface, and finally removing the dry film, so that the copper foil is transformed into a designed circuit structure.

[0003] The core layer circuit board refers to the dielectric layer and the copper layers on both sides that serve as the basis when the PCB is first manufactured. The PCB generally uses the core layer as the basis to continuously add other circuit layers and dielectric layers on one or both sides, so the manufacture of the core layer is a stage in the entire PCB manufacturing process where the board thickness is relatively thin. Chinese patent CN114554700A discloses a method for preparing a circuit board, and the process steps include opening a through hole on a first processing board, laminating an adhesive layer, preparing a first conductive circuit layer, and other subsequent steps. The first processing board here includes a carrier board (equivalent to a dielectric layer) and a first copper foil layer on both sides of the carrier board, so it refers to a core layer circuit board that has not yet been formed, and the thickness of the first copper foil layer here is 5um.

[0004] However, with the improvement of process capability, the circuit thickness of the core layer circuit board is getting smaller and smaller. At present, the middle dielectric layer (30um thickness) of some PCB boards is only covered with 3um thick copper foil on both sides. After the first circuit process, the total thickness of the core layer circuit board is only 36um in theory, and the structural rigidity is very poor, which will cause the following problems: 1. In the desmear process, the solution tank must pass through the water jet, and the conveyor line must rely on rollers to convey the core layer circuit board. However, the core layer circuit board with this thickness is easily deformed under the action of water pressure, so the front end cannot be aligned with the roller gap in front, which eventually leads to board jam; 2. If the core layer circuit board is fixed on the pallet with tape for transportation, but the tape is affected by the high temperature section of Desmear, there is a great risk of it falling off, and stable transportation cannot be achieved; 3. If this is continued for a long time, the roller will be seriously sticky, which will contaminate the subsequent core layer circuit board and cause other more serious quality problems.

[0005] Therefore, it is necessary to improve the process to solve the above problems. Summary of the invention

[0006] The main purpose of the present invention is to provide a method for solving the problem of easily deformed card boards during the transportation of ultra-thin core layer circuit boards, so that after manufacturing the ultra-thin core layer, the entire core layer circuit board can have sufficient structural rigidity, which is convenient for its transportation in subsequent steps and avoids causing product quality problems.

[0007] The present invention achieves the above-mentioned purpose through the following technical scheme: a method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation, the steps of which include: S1. Material preparation: prepare a plate, the thickness of the plate is not more than 40 um, the plate comprises a dielectric layer and copper foil covering both sides of the dielectric layer, and the board surface of the plate comprises a plurality of product areas arranged in an array and at intervals and a waste area separating the product areas in the design; S2, punching alignment holes: punching a plurality of alignment holes within the waste area; S3, waste area development: Cover the outer surface of all copper foils with a photosensitive film, expose and cure the photosensitive film in the product area, then wash away the unexposed part of the photosensitive film to expose the copper foil in the waste area, and all product areas are completely covered with dry film; S4, waste area VCP: electroplating copper on the surface of the copper foil in the waste area by vertical electroplating, so that the copper foil in the waste area is thickened into a reinforcement strip; S5, one-time film removal: removing the dry films on both sides of the plate.

[0008] Specifically, the thickness of the copper foil does not exceed 3 um.

[0009] Furthermore, the thickness of each reinforcement strip is not less than 15 um.

[0010] Specifically, the board surface is cleaned before the waste area development step.

[0011] Specifically, the steps also include: S6, laser through-hole punching: punching through-holes in the product area of ​​the plate by laser; S7, product area development: Cover the outer surface of all product areas with a photosensitive film, expose and cure the photosensitive film in the product area, and then wash away the unexposed portion of the photosensitive film to expose part of the copper foil in the product area; S8, product area VCP: thicken the exposed copper foil by vertical electroplating, and fill the through hole to make the front and back copper foils conduct each other; S9, secondary film removal: removing the dry films on both sides of the plate; S10, flash etching: quickly etching the copper layers on both sides of the plate, so that the copper foil of the non-thickened part is completely eliminated, and the thickened part forms a circuit to obtain a core layer circuit board.

[0012] Furthermore, the waste area is a grid-like structure, and the range of the waste area includes a portion within 1 cm from the wide edge of the plate, which serves as an electroplating clamping area for the VCP step.

[0013] Furthermore, the board surface is chemically cleaned before the product area development step.

[0014] The beneficial effects of the technical solution of the present invention are: The mSAP process manufacturing method can thicken the waste area of ​​the board during the manufacturing process, thereby improving the structural rigidity of the core layer circuit board without affecting the structure of the product area, so that it will not be too easy to deform and cannot be roller-transported in the early stage of circuit board manufacturing, eliminating the use of tape, and there is no problem of tape falling off due to heat, and also avoiding the problem of board surface contamination caused by adhesive. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A three-dimensional diagram of the core layer circuit board of the embodiment (the circuit details in the product area are omitted); Figure 2 Schematic diagram of the cross-section change of the plate in steps S1 to S5; Figure 3 Schematic diagram of the cross-section change of the plate in steps S6 to S10.

[0016] The markings in the figure are: 1-board, 1a-core layer circuit board, 11-product area, 12-waste area; 2- dielectric layer; 3-copper foil, 3a-copper layer, 31-reinforcement strip, 32-circuit; 4- Alignment hole; 5-photosensitive film, 5a-dry film; 6-Through hole. DETAILED DESCRIPTION

[0017] The present invention is further described in detail below with reference to specific embodiments.

[0018] Example: The present invention provides a method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation, and the steps include: S1. Material preparation: Prepare a plate 1 with a thickness not greater than 40um. The plate 1 includes a dielectric layer 2 and copper foil 3 covering both sides of the dielectric layer 2. The thickness of the copper foil 3 does not exceed 3um. The board surface of the plate 1 includes a plurality of product areas 11 arranged in an array and spaced apart, and a waste area 12 separating the product areas 11. Figure 2 shown.

[0019] This method is mainly used for ultra-thin core layer circuit boards, so it is particularly suitable for ultra-thin boards with a thickness of less than 40um, where the original thickness of the copper foil 3 is thinner than that of the ordinary copper foil 3, and the structural rigidity problem of the board 1 is more obvious. The board 1 here is finally obtained as a motherboard, the product area 11 is finally obtained as a daughterboard, and the waste area 12 will maintain the connection of the product area 11 during the processing process, and the waste area 12 will be removed after slitting. In the embodiment, the product area 11 adopts a 2×4 layout, but it is not limited to this layout in actual application.

[0020] S2, punching alignment holes: punching a plurality of alignment holes 4 within the waste area 12. Figure 2 shown.

[0021] The alignment holes 4 are the positioning references when the plate 1 is subjected to lateral processing, such as the waste area development step, the laser through-hole step, and the product area development step. The alignment holes 4 are preferably distributed at the four corners of the plate surface, so that the positioning can be more accurate.

[0022] S3, waste area development: Cover the outer surface of the copper foil 3 with the photosensitive film 5, expose and cure the photosensitive film 5 in the product area 11, then wash away the unexposed part of the photosensitive film 5, so that the copper foil 3 in the waste area 12 is exposed, and all product areas 11 are completely covered with the dry film 5a. Figure 2 shown.

[0023] Because the waste area 12 is a cut-off portion outside the sub-board, any structure added to the waste area 12 for process purposes does not affect the integrity of the sub-board. The waste area development is to prepare for the thickening of the waste area 12. Because there are usually debris and glue residues left on the board surface when drilling the alignment holes 4, it is necessary to clean the waste area in advance before the waste area development step, and then develop the waste area after drying.

[0024] S4, waste area VCP (vertical continuous plating): copper is electroplated on the surface of the copper foil 3 in the waste area 12 by vertical electroplating, so that the copper foil 3 in the waste area 12 is thickened into a reinforcement strip 31. Figure 2 shown.

[0025] Because the product area 11 is completely covered by the dry film 5a at this time, only the waste area 12 can be thickened by electroplating. The range of the waste area 12 includes the part within 1 cm from the wide side of the plate 1. The VCP process requires the plate 1 to be vertically suspended on the target, and the clamping position of the target is in the above-mentioned part, so that a conductive path can be formed, allowing the exposed copper foil 3 to be plated with more copper to increase the thickness and form a reinforcement strip 31. Because the product area 11 is generally arranged in a matrix, the waste area 12 is generally a grid structure, so the reinforcement strip 31 will be formed into a criss-cross frame shape. In order to ensure that the thickness of each reinforcement strip 31 in the waste area 12 is not less than 15um, when the thickness of the product area 11 does not exceed 40um, the total thickness of the waste area 12 will exceed 60um, so that the structural rigidity of the plate 1 can be improved, so that it will not be unable to be transported due to deformation during roller conveying and water pressure shock.

[0026] S5, one-time film removal: remove the dry film 5a on both sides of the plate 1. Figure 2 shown.

[0027] When the product area 11 is completely covered by the dry film 5 a , circuit manufacturing cannot be performed, so the dry film 5 a needs to be removed before formal circuit manufacturing.

[0028] S6, laser drilling: drilling a through hole 6 in the product area 11 of the plate 1 by laser. Figure 3 shown.

[0029] The two copper foils 3 will eventually form copper layers 3a respectively, and the copper layers 3a on the front and back sides need to have conductive connections, so the dielectric layer 2 needs to be punched into through holes 6 with smaller diameters, so that copper conductors can be formed by electroplating the holes.

[0030] S7, product area development: Cover the outer surface of all product areas 11 with the photosensitive film 5, expose and cure the photosensitive film 5 in the product area 11, and then wash away the unexposed part of the photosensitive film 5 to expose the copper foil 3 in the product area 11. Figure 3 shown.

[0031] Because the laser through-hole process will not only produce debris, glue residue but also burrs, chemical cleaning is generally performed in the product area development step. Specifically: use water or solvent to preliminarily clean the surface of copper foil 3 to remove obvious dirt and impurities; then use a specific chemical solution (such as acidic or alkaline solution) to deeply clean the surface of copper foil 3 to remove oxides and other difficult-to-remove contaminants; then rinse the chemical solution with clean water and dry it to remove moisture. Enhance adhesion, prevent product failures caused by surface contamination, and improve product reliability and stability. The exposed part of copper foil 3 in product area 11 is used to thicken it in preparation for forming circuit 32.

[0032] S8, product area VCP: thicken the exposed copper foil 3 by vertical electroplating, and fill the through hole 6 to make the front and back copper foils 3 conductive to each other. Figure 3 shown.

[0033] In order to fill the through hole 6 , the exposed copper foil 3 needs to be thickened as a whole. Therefore, although the original thickness of the copper foil 3 is small, the thickness of the copper layer 3 a obtained by electroplating is larger, even higher than the height of the circuit 32 .

[0034] S9, secondary film removal: remove the dry film 5a on both sides of the plate 1. Figure 3 shown.

[0035] The dry film 5a covers the non-thickened portion of the copper foil 3. When forming the circuit 32, this non-thickened portion needs to be etched away, so this part of the dry film 5a needs to be removed.

[0036] S10, flash etching: quickly etch the copper layers 3a on both sides of the plate 1, so that the copper foil 3 of the non-thickened part is completely eliminated, and the thickened part forms a circuit 32, thereby obtaining a core layer circuit board 1a. Figure 1 and Figure 3 shown.

[0037] Flash etching targets the entire surface of the copper layer 3a, so in order to disconnect the circuit 32, on the one hand, the unthickened copper foil 3 must be etched away, and on the other hand, the thicker parts of the copper layer 3a will also be thinned to varying degrees, and finally the copper layer 3a of the required thickness for the circuit 32 will be retained.

[0038] The mSAP process manufacturing method can thicken the waste area 12 of the plate 1 during the manufacturing process, thereby improving the structural rigidity of the core layer circuit board 1a without affecting the structure of the product area 11, so that it will not be too easy to deform and cannot be roller-conveyed in the early stage of circuit board manufacturing, eliminating the use of tape, and there is no problem of tape falling off due to heat, and the problem of board surface contamination caused by adhesive is also avoided.

[0039] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the creative concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation, characterized in that The steps include: S1. Material preparation: prepare a plate, the thickness of the plate is not more than 40 um, the plate comprises a dielectric layer and copper foil covering both sides of the dielectric layer, and the board surface of the plate comprises a plurality of product areas arranged in an array and at intervals and a waste area separating the product areas in the design; S2, punching alignment holes: punching a plurality of alignment holes within the waste area; S3, waste area development: Cover the outer surface of all copper foils with a photosensitive film, expose and cure the photosensitive film in the product area, then wash away the unexposed part of the photosensitive film to expose the copper foil in the waste area, and all product areas are completely covered with dry film; S4, waste area VCP: electroplating copper on the surface of the copper foil in the waste area by vertical electroplating, so that the copper foil in the waste area is thickened into a reinforcement strip; S5, one-time film removal: removing the dry films on both sides of the plate.

2. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 1, characterized in that: The thickness of the copper foil does not exceed 3 um.

3. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 2, characterized in that: The thickness of each reinforcement strip shall not be less than 15um.

4. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 1, characterized in that: The board surface is cleaned before the waste area development step.

5. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 1, characterized in that The steps also include: S6, laser through-hole punching: punching through-holes in the product area of ​​the plate by laser; S7, product area development: Cover the outer surface of all product areas with a photosensitive film, expose and cure the photosensitive film in the product area, and then wash away the unexposed portion of the photosensitive film to expose part of the copper foil in the product area; S8, product area VCP: thicken the exposed copper foil by vertical electroplating, and fill the through hole to make the front and back copper foils conduct each other; S9, secondary film removal: removing the dry films on both sides of the plate; S10, flash etching: quickly etching the copper layers on both sides of the plate, so that the copper foil of the non-thickened part is completely eliminated, and the thickened part forms a circuit to obtain a core layer circuit board.

6. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 1 or 5, characterized in that: The waste area is a grid-like structure, and the range of the waste area includes a portion within 1 cm from the wide edge of the plate, which serves as the electroplating clamping area of ​​the VCP step.

7. The method for solving the problem of ultra-thin core layer circuit boards being easily deformed during transportation according to claim 5, characterized in that: The board surface is chemically cleaned before the product area development step.

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