Circuit board processing, circuit board and battery module using the same

Abstract

A circuit board processing method includes the following steps: providing a circuit substrate including a dielectric layer, an aluminum circuit layer disposed on one side of the dielectric layer, and a cover film covering the aluminum circuit layer and combined with the dielectric layer, the aluminum circuit layer including an electrical connection pad, and the electrical connection pad exposed from the cover film; forming a copper plating layer on the electrical connection pad of the circuit substrate exposed from the cover film; and forming a nickel plating layer on the copper plating layer. The circuit board processing method can improve the quality of the nickel plating layer. The application also provides a circuit board and a battery module using the circuit board.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit board, in particular to a circuit board processing technology, a circuit board, and a battery module applying the circuit board. BACKGROUND

[0002] With the development of product era and the change of application scene, flexible aluminum printed circuit board is widely used in mechanical hard disk, and now has a trend of being used in new energy automobile battery module. When the flexible aluminum printed circuit board is applied to the battery, the circuit board is usually welded on the busbar of the battery by laser through a nickel sheet or is welded on the busbar of the battery by laser after being plated with nickel on the circuit board. Since the aluminum metal is relatively active, it is easy to form a passivation layer (Al2O3) in the air. The existence of the passivation layer greatly reduces the welding strength, and even causes the welding to fail, resulting in the peeling of the part. In order to reduce the risk caused by aluminum oxidation, a layer of zinc is usually plated on the aluminum layer before entering the chemical nickel plating tank. The zinc layer is quickly and completely dissolved after entering the chemical nickel plating tank, and a nickel layer is formed at the same time. With the increase of the amount of aluminum plates entering the chemical nickel plating tank, the zinc ions and aluminum ions in the chemical nickel plating tank will increase. When the zinc ions reach a certain amount, the nickel layer will have uneven color, be brittle, and even have pinholes. The aluminum ions also affect the quality of the nickel layer. At the same time, the service life of the nickel tank will be greatly shortened, and the zinc layer will also inhibit the reaction in the chemical nickel plating tank. SUMMARY

[0003] Therefore, it is necessary to provide a circuit board processing technology to solve the above problems. In addition, a circuit board and a battery module applying the circuit board are also provided.

[0004] The first aspect of the present application provides a circuit board processing technology, comprising the following steps: providing a circuit substrate, comprising a dielectric layer, an aluminum circuit layer arranged on one side of the dielectric layer, and a cover film, the cover film covering the aluminum circuit layer and being combined with the dielectric layer, the aluminum circuit layer comprising an electrical connection pad, and the electrical connection pad being exposed from the cover film; forming a copper plating layer on the electrical connection pad of the circuit substrate exposed from the cover film; and forming a nickel plating layer on the copper plating layer.

[0005] In the above-mentioned circuit board processing technology of the present application, a copper plating layer is formed on the aluminum electrical connection pad before forming a nickel plating layer, so as to prevent the aluminum electrical connection pad from reacting with the reaction solution in the reaction tank when plated with nickel, and at the same time avoid the use of a zinc layer to coat the aluminum electrical connection pad. This is conducive to avoiding the uneven color, brittleness, and even pinholes of the nickel plating layer, and at the same time is conducive to prolonging the service life of the mixed solution, i.e. the chemical nickel plating tank, when plated with nickel.

[0006] In a possible implementation manner of the first aspect, the forming of the copper plating layer includes: placing the circuit substrate in a copper sulfate solution at 25 DEG C to 40 DEG C to deposit and form a copper plating layer of 2 microns to 4 microns on the exposed electrical connection pad from the cover film.

[0007] In the possible implementation manner, the forming of the copper plating layer facilitates effective covering of the electrical connection pad 130 while controlling the cost.

[0008] In a possible implementation manner of the first aspect, the forming of the nickel plating layer includes: placing the circuit substrate with the copper plating layer in a mixed solution of nickel sulfate and sodium hypophosphite dihydrogen at 80 DEG C to 90 DEG C for 6 min to 15 min to form a nickel plating layer of 3 microns to 6 microns, wherein the concentration of the nickel sulfate in the mixed solution is 4.5 g / L to 5.5 g / L, and the concentration of the sodium hypophosphite dihydrogen is 20 g / L to 30 g / L.

[0009] In a possible implementation manner of the first aspect, before the forming of the copper plating layer, the method further includes: cleaning and roughening the electrical connection pad of the circuit substrate exposed from the cover film.

[0010] In the possible implementation manner, the cleaning and roughening facilitate improving the bonding force between the subsequent copper plating layer and the electrical connection pad.

[0011] In a possible implementation manner of the first aspect, before the forming of the nickel plating layer, the method further includes: roughening the copper plating layer, wherein the surface roughness of the roughened copper plating layer is greater than or equal to 0.2 microns.

[0012] In the possible implementation manner, the roughening facilitates improving the bonding force between the subsequent nickel plating layer and the copper plating layer.

[0013] In a possible implementation manner of the first aspect, before the forming of the nickel plating layer, the method further includes: immersing the circuit substrate with the copper plating layer in a mixed solution of sulfuric acid and palladium sulfate at 25 DEG C to 30 DEG C for 30 seconds to 90 seconds to form a palladium layer, wherein the concentration of the sulfuric acid is 3% to 8%, and the concentration of the palladium sulfate is 5 ppm to 20 ppm.

[0014] In the possible implementation manner, the forming of the palladium layer can serve as a catalyst for the subsequent forming of the nickel plating layer, thereby facilitating improving the efficiency.

[0015] In a possible implementation manner of the first aspect, before the forming of the nickel plating layer, the method further includes: immersing the copper plating layer in sulfuric acid at room temperature, and the concentration of the sulfuric acid is 5% to 10%.

[0016] In the above possible implementations, the above operation can remove the oxide layer on the surface of the copper plating layer, thereby improving the adhesion between the subsequent nickel plating layer and the copper plating layer.

[0017] Based on the first aspect, one possible implementation further includes: performing a gold plating process on the electrical connection pad to form a gold plating layer covering the nickel plating layer.

[0018] A second aspect of this application provides a circuit board including a circuit substrate, a copper plating layer, and a nickel plating layer. The circuit substrate includes a dielectric layer, an aluminum circuit layer disposed on one side of the dielectric layer, and a cover film. The cover film covers the aluminum circuit layer and is bonded to the dielectric layer. The aluminum circuit layer includes electrical connection pads that are exposed from the cover film. The copper plating layer is disposed on the exposed electrical connection pads, and the nickel plating layer covers the copper plating layer. The electrical connection pads of the above-described circuit board help reduce the risk of soldering failure when soldering to external electronic components.

[0019] A second aspect of this application provides a battery module, including a cell module and a circuit board as described above, wherein the circuit board is electrically connected to the busbar of the cell module via the nickel plating layer. In the above-described battery module, the electrical connection pads of the circuit board help reduce the risk of soldering failure when soldering to the busbar or external electronic components. Attached Figure Description

[0020] Figure 1 A flowchart of a circuit board processing technology according to one embodiment of this application.

[0021] Figure 2 A schematic cross-sectional view of a circuit board according to one embodiment of this application.

[0022] Figure 3 In order to be in Figure 2 The diagram shows a cross-sectional view of a copper plating layer formed on a circuit board.

[0023] Figure 4 In order to be in Figure 3 The diagram shows a cross-sectional view of a nickel plating layer formed on a copper plating layer.

[0024] Figure 5 In order to be in Figure 3 The diagram shows a cross-sectional view of a copper plating layer on which a palladium layer and a nickel plating layer are formed sequentially.

[0025] Figure 6 In order to be in Figure 4 The diagram shows a cross-sectional view of a gold plating layer formed on a nickel plating layer.

[0026] Figure 7 A cross-sectional schematic diagram of a circuit board according to one embodiment of this application.

[0027] Explanation of main component symbols

[0028] Circuit substrate 10 Dielectric layer 11 Aluminum wiring layer 13 Cover film 15 Electrical connection pad 130 First electrical connection pad 130a Second electrical connection pad 130b Copper plating layer 30 Nickel plating layer 50 Palladium layer 40 Gold plating layer 60 Circuit board 100

[0029] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0032] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0033] Please see Figure 1 This application provides a circuit board processing technology according to one embodiment, which includes the following steps:

[0034] Step S1, please refer to Figure 2 A circuit board 10 is provided, including a dielectric layer 11, an aluminum circuit layer 13 disposed on one side of the dielectric layer 11, and a cover film 15. The cover film 15 covers the aluminum circuit layer 13 and is bonded to the dielectric layer 11. The aluminum circuit layer 13 includes electrical connection pads 130, and the electrical connection pads 130 are exposed from the cover film 15.

[0035] In some embodiments, the electrical connection pad 130 may include a first electrical connection pad 130a and a second electrical connection pad 130b, wherein the first electrical connection pad 130a and the second electrical connection pad 130b are respectively used for subsequent electrical connections to different electronic components. The second electrical connection pad 130b may be an exposed pad.

[0036] For step S2, please refer to [link / reference]. Figure 3 A copper plating layer 30 is formed on the electrical connection pad 130 exposed from the cover film 15 on the circuit board 10.

[0037] In this embodiment, the copper plating layer 30 can be obtained by, but is not limited to, the following method: placing the circuit board 10 in a copper sulfate solution for a displacement reaction, thereby depositing and forming the copper plating layer 30 on the electrical connection pad 130 exposed from the cover film 15.

[0038] Specifically, in this embodiment, the temperature of the displacement reaction can be between 25°C and 40°C. The thickness of the copper plating layer 30 can be between 2 micrometers and 4 micrometers, so as to effectively cover the electrical connection pad 130 while controlling costs.

[0039] In some embodiments, before placing the circuit board 10 in the copper sulfate solution for reaction, the step of cleaning the circuit board 10 may be included.

[0040] Specifically, the cleaning of the circuit board 10 may include, but is not limited to, at least one of degreasing and water washing. Degreasing is a commonly used method in the industry, for example, but not limited to using organic acids or alkaline solutions with added surfactants to remove grease from the circuit board and oxides on the aluminum circuit layer 13. Water washing may be performed multiple times, and the water washing method may include, but is not limited to, at least one of soaking, rinsing, and ultrasonic washing.

[0041] In some embodiments, before placing the circuit board 10 in the copper sulfate solution for reaction, the step of roughening the electrical connection pads 130 exposed from the cover film 15 on the circuit board 10 may be included, thereby improving the adhesion between the electrical connection pads 130 and the subsequent copper plating layer 30.

[0042] The roughening treatment may specifically include, but is not limited to, immersing or spraying the electrical connection pad 130 with a 1 wt% to 5 wt% sodium hydroxide solution or a 1 wt% to 5 wt% potassium hydroxide solution at a temperature of 25°C to 35°C. In this embodiment, the roughness of the electrical connection pad 130 may be 0.2 micrometers to 0.5 micrometers.

[0043] Step S3, please refer to Figure 4 A nickel plating layer 50 is formed on the copper plating layer 30.

[0044] In this embodiment, the nickel plating layer 50 can be formed by, but is not limited to, immersing the circuit board 10 with the copper plating layer 30 in a mixed solution of nickel sulfate and sodium hypophosphite to form the nickel plating layer 50.

[0045] Specifically, in this embodiment, the nickel plating layer 50 is formed by immersion in a mixed solution at 80°C to 90°C for 6 to 15 minutes. In the mixed solution, the concentration of nickel sulfate is 4.5 g / L to 5.5 g / L, and the concentration of sodium hypophosphite is 20 g / L to 30 g / L. The thickness of the nickel plating layer 50 is 3 micrometers to 6 micrometers, thus exhibiting good weld strength and corrosion resistance. Forming the nickel plating layer 50 at the above temperature maintains a good nickel deposition rate (approximately 0.2 micrometers / min to 1 micrometer / min), which is beneficial for forming a uniform, continuous, and high-quality nickel plating layer 50.

[0046] In some embodiments, the process may further include a step of roughening the copper plating 30 before forming the nickel plating 50, in order to improve the adhesion between the subsequently formed nickel plating 50 and the copper plating 30. The surface roughness of the roughened copper plating 30 may be greater than or equal to 0.2 micrometers.

[0047] Furthermore, please refer to the following: Figure 5 The process may further include a step prior to forming the nickel plating layer 50: activating the copper plating layer 30 to form a palladium layer 40 as a catalyst for the subsequent formation of the nickel plating layer 50. The step of forming the palladium layer 40 may occur before or after the roughening treatment.

[0048] The palladium layer 40 can be formed by, but is not limited to, immersing the circuit board 10 with the copper plating layer 30 in a mixture of sulfuric acid and palladium sulfate.

[0049] Specifically, the palladium layer 40 can be formed by immersing the palladium layer in a mixture at 25°C to 30°C for 30 to 90 seconds. In the mixture, the sulfuric acid has a volume percentage of 3% to 8%, and the palladium sulfate concentration is 5 ppm to 20 ppm.

[0050] In some embodiments, the step of acidifying the copper plating 30 to remove the oxide layer on the surface may be included before forming the nickel plating 50.

[0051] The acidification treatment can be achieved by, but is not limited to, immersing the copper plating layer 30 in sulfuric acid. Specifically, the acidification temperature can be room temperature, the sulfuric acid concentration in the acidification treatment can be 5% to 10% (volume percentage), and the acidification time can be 15 seconds to 45 seconds.

[0052] It is understandable that water washing can be performed before and after each of the above steps to avoid contamination of subsequent reactions or residues that may cause excessive reactions.

[0053] In this embodiment, the circuit board processing technology may further include: step S4, please refer to... Figure 6 The first electrical connection pad 130a is subjected to electroless gold treatment to form a gold plating layer 60 covering the nickel plating layer 50.

[0054] The thickness of the gold plating layer 60 can be from 0.01 micrometers to 0.05 micrometers.

[0055] In some embodiments, during the electroless gold treatment, a gold plating layer 60 may also be formed on the nickel plating layer 50 on the second electrical connection pad 130b.

[0056] Please see Figure 7 This application also provides a circuit board 100, including a circuit substrate 10, a copper plating layer 30, and a nickel plating layer 50. The circuit substrate 10 includes a dielectric layer 11, an aluminum circuit layer 13 disposed on one side of the dielectric layer 11, and a cover film 15. The cover film 15 covers the aluminum circuit layer 13 and is bonded to the dielectric layer 11. The aluminum circuit layer 13 includes electrical connection pads 130, and the electrical connection pads 130 are exposed from the cover film 15. The copper plating layer 30 is disposed on the electrical connection pads 130 exposed from the cover film 15, and the nickel plating layer 50 covers the copper plating layer 30.

[0057] The thickness of the copper plating layer 30 can be 2 micrometers to 4 micrometers, so as to effectively cover the electrical connection pad 130 while controlling costs.

[0058] The thickness of the nickel plating layer 50 can be from 3 micrometers to 6 micrometers.

[0059] In some embodiments, a palladium layer 40 is also sandwiched between the copper plating layer 30 and the nickel plating layer 50.

[0060] In some embodiments, the circuit board 100 may further include a gold plating layer 60 disposed on the surface of the nickel plating layer 50 opposite to the copper plating layer 30. The thickness of the gold plating layer 60 may be from 0.01 micrometers to 0.05 micrometers.

[0061] The electrical connection pad 130 may include a first electrical connection pad 130a and a second electrical connection pad 130b, wherein the first electrical connection pad 130a and the second electrical connection pad 130b are respectively used for subsequent electrical connections to different electronic components. The second electrical connection pad 130b may be an exposed pad. The gold plating layer 60 may be formed only on the first electrical connection pad 130a.

[0062] This application also provides a battery module (not shown), including a cell module (not shown) and the circuit board 100 described above. The electrical connection pad 130 of the circuit board 100 is electrically connected to the busbar (not shown) of the cell module (not shown) through a nickel plating layer 50.

[0063] In the circuit board processing technology described in this application, a copper plating layer 30 is formed on the aluminum electrical connection pad 130 before forming the nickel plating layer 50. This prevents the aluminum electrical connection pad 130 from reacting with the reaction solution in the reaction tank during nickel plating and dissolving it. It also avoids using a zinc layer to cover the aluminum electrical connection pad 130. This helps prevent uneven coloring, brittleness, or even pinholes during the subsequent formation of the nickel plating layer 50, which would affect the quality of the nickel plating layer 50. Furthermore, it helps extend the service life of the mixed solution used in nickel plating, i.e., the electroless nickel plating tank. Circuit boards manufactured using this process have a lower risk of soldering failure when soldered to other electronic components.

[0064] The above description is merely a preferred embodiment of this application and is not intended to limit this application in any way. Although the preferred embodiment has been disclosed above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A circuit board processing technology, wherein, Includes the following steps: A circuit board is provided, including a dielectric layer, an aluminum circuit layer disposed on one side of the dielectric layer, and a cover film, wherein the cover film covers the aluminum circuit layer and is bonded to the dielectric layer, the aluminum circuit layer includes electrical connection pads, and the electrical connection pads are exposed from the cover film. A copper plating layer is formed on the electrical connection pads exposed from the cover film on the circuit board. The formation of the copper plating layer includes: placing the circuit board in a copper sulfate solution at 25°C to 40°C to deposit a copper plating layer of 2 to 4 micrometers on the electrical connection pads exposed from the cover film. A nickel plating layer is formed on the copper plating layer; as well as A gold plating layer is formed by performing a chemical gold plating process on the nickel plating layer to cover it.

2. The circuit board processing technology as described in claim 1, characterized in that, The formation of the nickel plating layer includes: The circuit board with the copper plating is immersed in a mixed solution of nickel sulfate and sodium hypophosphite at 80°C to 90°C for 6 min to 15 min to form a nickel plating layer of 3 micrometers to 6 micrometers. In the mixed solution, the concentration of nickel sulfate is 4.5 g / L to 5.5 g / L and the concentration of sodium hypophosphite is 20 g / L to 30 g / L.

3. The circuit board processing technology as described in claim 1, characterized in that, Before forming the copper plating layer, the process also includes: The electrical connection pads exposed from the cover film on the circuit board are cleaned and roughened.

4. The circuit board processing technology as described in claim 1, characterized in that, Before forming the nickel plating layer, the process also includes: The copper plating layer is roughened, wherein the surface roughness of the roughened copper plating layer is greater than or equal to 0.2 micrometers.

5. The circuit board processing technology as described in claim 1, characterized in that, Before forming the nickel plating layer, the process also includes: The circuit board with the copper plating layer is immersed in a mixture of sulfuric acid and palladium sulfate at 25°C to 30°C for 30 to 90 seconds to form a palladium layer, wherein the concentration of the sulfuric acid is 3% to 8% and the concentration of the palladium sulfate is 5 ppm to 20 ppm.

6. The circuit board processing technology as described in claim 1, characterized in that, Before forming the nickel plating layer, the process also includes: The copper plating is immersed in sulfuric acid with a concentration of 5% to 10% at room temperature.

7. A circuit board, characterized in that, The device includes a circuit board, a copper plating layer, and a nickel plating layer. The circuit board includes a dielectric layer, an aluminum circuit layer disposed on one side of the dielectric layer, and a cover film. The cover film covers the aluminum circuit layer and is bonded to the dielectric layer. The aluminum circuit layer includes electrical connection pads that are exposed from the cover film. The copper plating layer is disposed on the electrical connection pads exposed from the cover film. The thickness of the copper plating layer is 2 micrometers to 4 micrometers. The nickel plating layer covers the copper plating layer, and a gold plating layer is also covered on the side of the nickel plating layer opposite to the copper plating layer.

8. A battery module, characterized in that, It includes a battery cell module and a circuit board as described in claim 7, wherein the circuit board is electrically connected to the busbar of the battery cell module through the nickel plating layer.

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