Uncooled infrared pixel-level packaging structure and preparation method thereof

Abstract

The invention discloses an uncooled infrared pixel-level packaging structure and a preparation method thereof. The preparation method comprises the following steps: sequentially preparing a patterned first sacrificial layer, a bridge pier filled in a first through hole of the first sacrificial layer, and a micro-bridge structure arranged on the upper surface of the first sacrificial layer on a reading circuit wafer; sequentially preparing a patterned second sacrificial layer, a supporting column and a packaging cover on the first sacrificial layer; a release through hole penetrating through the packaging cover is formed in the area, corresponding to the position between every two adjacent supporting columns, of the packaging cover through machining; removing the first sacrificial layer and the second sacrificial layer through the release through hole; and a getter structure for filling and sealing the release through hole is formed through preparation of the release through hole. According to the technical scheme, the problem of poisoning of the getter structure is avoided, the getter performance of the getter structure is ensured, and then the working performance of the uncooled infrared pixel-level packaging structure is improved.

Description

Technical Field

[0001] The present invention relates to the field of detectors, and in particular to a non-cooling infrared pixel-level packaging structure and a preparation method thereof. Background Art

[0002] As a packaging technology for the new generation of uncooled infrared focal plane detectors, pixel-level packaging uses the MEMS (Micro-Electro-Mechanical System) manufacturing process on the readout circuit wafer to vacuum-package each pixel of the uncooled infrared detector. Each pixel can work normally independently, and even if a pixel fails in vacuum, the entire detector can still work normally. Compared with wafer-level packaging, pixel-level packaging can save the design and processing of a wafer, and does not require a bonding process, which greatly simplifies the manufacturing process, saves process time, and can achieve batch packaging to reduce the cost of the entire uncooled infrared detector.

[0003] However, in the current pixel-level packaging structure, the microbridge structure of the microbolometer is generally prepared and formed on a sacrificial layer, and then the sacrificial layer is released and removed, so that the microbridge structure is suspended in the air; and in the process of releasing and removing the sacrificial layer, the getter layer is easily poisoned, affecting the getter performance, and then affecting the working performance of the entire detector. Summary of the invention

[0004] The purpose of the present invention is to provide a non-cooled infrared pixel-level packaging structure and a preparation method thereof, which can effectively avoid the problem of getter poisoning when releasing and removing the sacrificial layer in the non-cooled infrared detector, effectively ensure the getter's suction effect, and thus ensure the working performance of the detector.

[0005] In order to solve the above technical problems, the present invention provides a method for preparing an uncooled infrared pixel-level packaging structure, comprising:

[0006] A patterned first sacrificial layer, a bridge pier filled in a first through hole of the first sacrificial layer, and a microbridge structure arranged on the upper surface of the first sacrificial layer are sequentially prepared on a readout circuit wafer; wherein the bottom end of the bridge pier is connected to the readout circuit wafer, and the microbridge structure is connected to the top end of the bridge pier;

[0007] A patterned second sacrificial layer, a support column and a packaging cover are sequentially prepared on the first sacrificial layer; wherein the packaging cover is arranged on the upper surface of the second sacrificial layer; the support column is filled in the second through hole of the second sacrificial layer, and the top end is connected to the packaging cover, and the bottom end is connected to the bridge pier;

[0008] Processing a region between two adjacent support pillars on the packaging cover to form a release through hole penetrating the packaging cover;

[0009] removing the first sacrificial layer and the second sacrificial layer through the release through hole;

[0010] A getter structure for filling and sealing the release through hole is prepared through the release through hole.

[0011] In an optional embodiment of the present application, a patterned first sacrificial layer, a bridge pier filled in a first through hole of the first sacrificial layer, and a microbridge structure arranged on an upper surface of the first sacrificial layer are sequentially prepared on a readout circuit wafer, including:

[0012] coating a first sacrificial layer on the readout circuit wafer;

[0013] The first sacrificial layer is pattern-etched to form the first through hole; wherein the first through hole is located on the boundary line of each pixel area on the readout circuit wafer, and at least four first through holes surround each pixel area;

[0014] Forming bridge piers in each of the first through holes with the same height as the first sacrificial layer;

[0015] One microbridge structure is prepared on the first sacrificial layer corresponding to each pixel region, and the microbridge structure is connected to the tops of two bridge piers that are closest to each other.

[0016] In an optional embodiment of the present application, a patterned second sacrificial layer, a support column and a packaging cover are sequentially prepared on the first sacrificial layer, including:

[0017] coating the first sacrificial layer to form the second sacrificial layer covering the first sacrificial layer and the microbridge structure;

[0018] forming an amorphous silicon layer on the upper surface of the second sacrificial layer;

[0019] Etching the amorphous silicon layer and the second sacrificial layer to form the second through hole penetrating the amorphous silicon layer and the second sacrificial layer; wherein the bottom end of the second through hole is located on the bridge pier;

[0020] The support column filling the second through hole and the packaging cover covering the upper surface of the amorphous silicon layer are formed by one-piece molding; wherein the support column and the packaging cover are both amorphous silicon structures;

[0021] Correspondingly, on the packaging cover, a release through hole penetrating the packaging cover is formed by processing the area between two adjacent support pillars, including:

[0022] On the packaging cover and the amorphous silicon layer, the release through hole penetrating the packaging cover and the amorphous silicon layer is formed by processing a region between two adjacent support pillars.

[0023] In an optional embodiment of the present application, on the packaging cover, a release through hole penetrating the packaging cover is formed by processing a region between two adjacent support pillars, including:

[0024] The release through hole is formed between all two adjacent support columns, and the release through hole is a strip-shaped hole whose hole walls at both ends are flush with the side walls of the support column.

[0025] In an optional embodiment of the present application, a getter structure for filling and sealing the release through hole is prepared through the release through hole, comprising:

[0026] The release through hole is used to prepare the getter structure that connects each adjacent two of the bridge piers and each adjacent two of the support columns and fills the release through hole, and the bottom end of the getter structure extends to the reading circuit wafer, so that the getter structure, the bridge piers and the support columns form an annular cavity wall surrounding each of the micro-bridge structures, and each of the annular cavity walls, the reading circuit wafer and the packaging cover together form a pixel closed cavity.

[0027] In an optional embodiment of the present application, the release through hole comprises an edge release through hole located at the outermost edge of the packaging cover and a middle release through hole other than the edge release through hole;

[0028] Accordingly, a getter structure for filling and sealing the release through hole is prepared through the release through hole, comprising:

[0029] A first getter structure is prepared in each of the intermediate release through holes to fill and seal each of the intermediate release through holes;

[0030] A second getter structure is prepared through the edge release through hole, with the top end filling and sealing the edge release through hole and the bottom end extending to the reading circuit wafer; wherein the side edges of each of the second getter structures are connected to two adjacent bridge piers and two adjacent support columns at the outermost position on the reading circuit wafer, so that each of the edge release through holes, the bridge piers and the support columns located at the outermost position of the reading circuit wafer, the packaging cover and the reading circuit wafer together form a closed cavity that encloses all pixel structures.

[0031] In an optional embodiment of the present application, after the getter structure for filling and sealing the release through hole is prepared through the release through hole, the method further includes:

[0032] activating the getter structure;

[0033] An antireflection film layer is prepared to cover the top of the getter structure and the upper surface of the packaging cover.

[0034] An uncooled infrared pixel-level packaging structure, comprising:

[0035] Readout circuit wafer;

[0036] A plurality of bridge piers are arranged around each pixel area on the readout circuit wafer;

[0037] A microbridge structure located in each pixel area and connected to the top of the bridge pier;

[0038] A support column having a bottom end connected to a top end of the pier;

[0039] A packaging cover connected to the top of the support column;

[0040] A release through hole is provided on the packaging cover corresponding to the area between two adjacent support pillars;

[0041] A getter structure sealing the release through hole is filled.

[0042] In an optional embodiment of the present application, the bottom end of the getter structure is connected to the readout circuit wafer, and the two sides are bonded to two adjacent bridge piers and two adjacent support columns.

[0043] In an optional embodiment of the present application, the release through hole comprises an edge release through hole located at the outermost edge of the packaging cover and a middle release through hole other than the edge release through hole;

[0044] Correspondingly, the getter structure includes a first getter structure and a second getter structure; the first getter structure fills and seals each of the middle release holes; the second getter structure fills and seals the edge release holes at the top, and the bottom extends to the reading circuit wafer, and the side of each of the second getter structures is connected to the two adjacent bridge piers and the two adjacent support columns at the edgemost position on the reading circuit wafer, so that each of the edge release holes and the bridge piers and the support columns located at the edgemost position of the reading circuit wafer, the packaging cover and the reading circuit wafer together form a closed cavity that encloses all pixel structures.

[0045] In an optional embodiment of the present application, the support column is a hollow column.

[0046] In an optional embodiment of the present application, it also includes an anti-reflection film layer covering the upper surface of the packaging cover and the top of the getter structure.

[0047] The present invention provides a non-cooled infrared pixel-level packaging structure and a preparation method thereof. The preparation method comprises: sequentially preparing a patterned first sacrificial layer, a bridge pier filled in a first through hole of the first sacrificial layer, and a microbridge structure arranged on the upper surface of the first sacrificial layer on a readout circuit wafer; wherein the bottom end of the bridge pier is connected to the readout circuit wafer, and the microbridge structure is connected to the top end of the bridge pier; sequentially preparing a patterned second sacrificial layer, a support column and a packaging cover on the first sacrificial layer; wherein the packaging cover is arranged on the upper surface of the second sacrificial layer; the support column is filled in the second through hole of the second sacrificial layer, and the top end is connected to the packaging cover, and the bottom end is connected to the bridge pier; processing the area corresponding to the adjacent two support columns on the packaging cover to form a release through hole penetrating the packaging cover; removing the first sacrificial layer and the second sacrificial layer through the release through hole; and preparing a getter structure for filling and sealing the release through hole through the release through hole.

[0048] In the process of preparing the uncooled infrared pixel-level packaging structure in the present application, the getter is not directly formed on the surface of the readout circuit wafer by processing, but a release through hole is formed on the packaging cover for each pixel area, and after the sacrificial layer between the packaging cover and the readout circuit wafer is released and removed through the release through hole, the release through hole of the sealing cover is filled with the getter structure, so that a closed cavity required for the operation of the microbridge structure can be formed between the readout circuit wafer and the packaging cover, and the getter structure can play an air absorption role in the closed cavity; because the getter structure is prepared and formed after the sacrificial layer is released and removed, the problem of poisoning of the getter structure when the sacrificial layer is released and removed can be avoided, thereby ensuring the working performance of the getter structure in the uncooled infrared pixel-level packaging structure, and then improving the working performance of the uncooled infrared pixel-level packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] FIG1 is a cross-sectional schematic diagram of a structure formed in the first preparation step of a method for preparing an uncooled infrared pixel-level packaging structure provided in an embodiment of the present application;

[0051] 2 is a first schematic top view of a structure formed in the first preparation step of the first part of the preparation method of the uncooled infrared pixel level packaging structure provided in an embodiment of the present application;

[0052] 3 is a second top view schematic diagram of a structure formed in the first preparation step of the preparation method of the uncooled infrared pixel level packaging structure provided in an embodiment of the present application;

[0053] 4 is a third schematic top view of a structure formed in the first preparation step of the preparation method of the uncooled infrared pixel level packaging structure provided in an embodiment of the present application;

[0054] 5 is a cross-sectional schematic diagram of a structure formed in the second preparation step of a method for preparing an uncooled infrared pixel-level packaging structure provided in an embodiment of the present application;

[0055] 6 is a cross-sectional schematic diagram of a structure formed in the third preparation step of a method for preparing an uncooled infrared pixel-level packaging structure according to an embodiment of the present application;

[0056] 7 is a schematic top view of a structure formed in the third preparation step of the preparation method of the uncooled infrared pixel level packaging structure provided in an embodiment of the present application;

[0057] FIG8 is a schematic diagram of the three-dimensional structure of an uncooled infrared pixel structure provided in an embodiment of the present application;

[0058] In the accompanying drawings: 1 is a reading circuit wafer, 2 is a first sacrificial layer, 3 is a bridge pier, 4 is a microbridge structure, 5 is a second sacrificial layer, 51 is a second through hole, 6 is an amorphous silicon layer, 7 is a supporting column, 8 is a packaging cover, 81 is a release through hole, 9 is a getter structure, and 91 is a first getter structure. DETAILED DESCRIPTION

[0059] The core of the present invention is to provide a method for preparing a non-cooled infrared pixel-level packaging structure and a non-cooled infrared pixel-level packaging structure formed based on the preparation method, which can avoid poisoning of the getter in the packaging structure to a certain extent and ensure the working performance of the packaging structure.

[0060] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0061] As shown in Figures 1 to 8, Figure 1 is a cross-sectional schematic diagram of a structure formed by the first preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 2 is a first top view schematic diagram of a structure formed by the first preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 3 is a second top view schematic diagram of a structure formed by the first preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 4 is a third top view schematic diagram of a structure formed by the first preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 5 is a cross-sectional schematic diagram of a structure formed by the second preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 6 is a cross-sectional schematic diagram of a structure formed by the third preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 7 is a top view schematic diagram of a structure formed by the third preparation step of the preparation method for the non-cooled infrared pixel level packaging structure provided in an embodiment of the present application; Figure 8 is a schematic diagram of the three-dimensional structure of the non-cooled infrared pixel structure provided in an embodiment of the present application.

[0062] It is understandable that the method for preparing the uncooled infrared pixel-level packaging structure in the present application should ultimately prepare an uncooled infrared sensor chip containing multiple array infrared photosensitive pixels; wherein the structure of each infrared photosensitive pixel is the same pixel structure prepared in batches synchronously. For ease of display and understanding, only two pixel structures are shown in the above-mentioned Figures 1 to 7, and only one pixel structure is shown in Figure 8, and the dotted straight lines in Figures 1 to 6 are the boundary lines of the pixel structures, which will not be repeated in the subsequent embodiments.

[0063] In a specific embodiment of the present application, a method for preparing the uncooled infrared pixel level packaging structure may include:

[0064] S1: sequentially preparing a patterned first sacrificial layer 2, a bridge pier 3 filled in a first through hole of the first sacrificial layer 2, and a microbridge structure 4 arranged on an upper surface of the first sacrificial layer 2 on a readout circuit wafer 1;

[0065] The bottom end of the bridge pier 3 is connected to the readout circuit wafer 1 , and the microbridge structure 4 is connected to the top end of the bridge pier 3 .

[0066] It can be understood that the readout circuit wafer 1 in this embodiment refers to a wafer provided with a circuit structure for reading the photosensitivity signal of each pixel structure.

[0067] The process of sequentially preparing the patterned first sacrificial layer 2, the bridge pier 3, and the microbridge structure 4 may include:

[0068] S11: coating a first sacrificial layer 2 on the readout circuit wafer 1;

[0069] S12: performing patterned etching on the first sacrificial layer 2 to form a first through hole; wherein the first through hole is located on the boundary line of each pixel region on the readout circuit wafer 1, and at least four first through holes surround each pixel region;

[0070] S13: preparing a bridge pier 3 in each first through hole with the same height as the first sacrificial layer 2;

[0071] S14: a microbridge structure 4 is prepared on the first sacrificial layer 3 corresponding to each pixel region, and the microbridge structure 4 is connected to the tops of two of the bridge piers 3 that are closest to each other.

[0072] It can be understood that the first sacrificial layer 2 is coated on the readout circuit wafer 1 and the first sacrificial layer 2 is patterned and etched in order to form a mask layer for preparing the bridge pier 3; therefore, the thickness of the first sacrificial layer 2 coated on the readout circuit wafer 1 can be the same as the height of the bridge pier 3 to be prepared and formed later. The position of the first through hole etched on the first sacrificial layer 2 is also the position where the bridge pier 3 needs to be grown and formed; the first through hole should penetrate the first sacrificial layer 2, and each first through hole should be distributed on the boundary line of each pixel area. For each pixel area, the first through holes on a circle of the boundary line can be four or six, or more, which is not specifically limited in this embodiment.

[0073] After the first sacrificial layer 2 is patterned and etched to form first through holes penetrating the first sacrificial layer 2, bridge piers 3 of columnar structures can be further grown in each first through hole; obviously, the number and shape structure of the bridge piers 3 are determined by the number and shape of the first through holes.

[0074] Referring to FIG. 1 and FIG. 2, the cross-sectional structure shown in FIG. 1 is a cross-sectional view according to the AA plane in FIG. 2. In the embodiment shown in FIG. 2, a bridge pier 3 is provided at each of the four vertex positions of each pixel region. In the embodiment shown in FIG. 3, eight bridge piers 3 are provided around each pixel region, and the thickness and shape are not completely consistent; wherein, four thicker bridge piers 3 with square cross sections are provided at the four vertex positions of each pixel region; and two bridge piers 3 with smaller square cross sections are provided at the middle positions of the two opposite boundary lines of each pixel region, and two bridge piers 3 with rectangular cross sections are provided at the middle positions of the other two opposite boundary lines of the pixel region. In the embodiment shown in FIG. 4, a bridge pier 3 is provided at each of the four vertex positions of each pixel region, and the difference from the embodiment shown in FIG. 2 is that there is a set distance of misalignment between two adjacent bridge piers along the X-axis direction in the Y-axis direction, wherein the X-axis direction and the Y-axis direction are the extension directions of two boundary lines perpendicular to each other in the pixel region.

[0075] Based on FIG. 2 to FIG. 4 , it can be known that the bridge piers 3 in this embodiment can have a variety of different implementation methods in terms of quantity, thickness, cross-sectional shape and distribution position, which will not be listed one by one in this embodiment.

[0076] After the bridge piers 3 are prepared in each first through hole, a microbridge structure 4 can be further prepared on the upper surface of the first sacrificial layer 2 (that is, the surface away from the readout circuit wafer). It can be understood that the microbridge structure 4 in this embodiment can also be a micro-bolometer, and a microbridge structure 4 is provided for each pixel area facing the readout circuit wafer 1. In addition, each microbridge structure 4 is connected to the top of the two bridge piers 3 around it, and the two bridge piers 3 connected by each microbridge structure 4 can be located at two opposite vertex positions of each pixel area, or at two adjacent vertex positions of each pixel area. There is no specific limitation on this in this embodiment.

[0077] It can be understood that the process technology used in the present embodiment to prepare and form the first sacrificial layer 2, the bridge pier 3 and the microbridge structure 4 can refer to the current conventional pixel-level packaging technology, and no further explanation will be given in this application.

[0078] S2: A patterned second sacrificial layer 5, a support column 7 and a packaging cover 8 are sequentially prepared on the first sacrificial layer 2; wherein the packaging cover 8 is arranged on the upper surface of the second sacrificial layer 5; the support column 7 is filled in the second through hole 51 of the second sacrificial layer 5, and the top end is connected to the packaging cover 8, and the bottom end is connected to the pier 3.

[0079] It can be understood that a second sacrificial layer 5 is further prepared on the upper surface of the first sacrificial layer 2, and the second sacrificial layer 5 is patterned and etched, that is, to form a mask layer for preparing the support column 7. Each support column 7 should be arranged on each bridge pier 3, so the position of the second through hole 51 etched in the second sacrificial layer 5 is also the position for forming the support column 7. For this reason, the second through hole 51 is also located at a position facing each bridge pier 3, and the shape of the second through hole 51 determines the shape of the support column 7. In general, the cross-sectional area of ​​the support column 7 should be smaller than the cross-sectional area of ​​the bridge pier 3, so that a thinner support column 7 than the bridge pier 3 is formed in the second through hole 51 on the bridge pier 3.

[0080] On this basis, the packaging cover 8 covers the upper surface of the second sacrificial layer 5, that is, the surface of the second sacrificial layer 5 facing away from the first sacrificial layer 2, and the packaging cover 8 and the support column 7 in this embodiment can be structural layers of the same material. Therefore, when preparing the support column 7 and the packaging cover 8, the support column 7 and the packaging cover 8 can be formed in one piece, for example, both can be prepared and formed using amorphous silicon material.

[0081] As shown in FIG. 5 and FIG. 6 , in an optional embodiment of the present application, the process of preparing and forming the support column 7 and the packaging cover 8 may include:

[0082] S21: coating the first sacrificial layer 2 to form a second sacrificial layer 5 covering the first sacrificial layer 2 and the microbridge structure 4;

[0083] S22: forming an amorphous silicon layer 6 on the upper surface of the second sacrificial layer 5;

[0084] S23: etching the amorphous silicon layer 6 and the second sacrificial layer 5 to form a second through hole 51 penetrating the amorphous silicon layer 6 and the second sacrificial layer 5; wherein the bottom end of the second through hole 51 is located on the bridge pier 3;

[0085] S24: forming a support column 7 filling the second through hole 51 and a packaging cover 8 covering the upper surface of the amorphous silicon layer 6 by integrated molding; wherein the support column 7 and the packaging cover 8 are both amorphous silicon structures.

[0086] In the present embodiment, it is further taken into consideration that the second sacrificial layer 5 is an organic material and it is difficult to ensure dimensional accuracy when etching the second through hole 51 thereon. For this reason, in the present embodiment, a layer of amorphous silicon layer 6 is further formed on the surface of the second sacrificial layer 5. By patterning the amorphous silicon layer 6 and the second sacrificial layer 5 together, a second through hole 51 with higher dimensional accuracy can be formed. Thus, a second through hole 51 of a smaller size can be etched, thereby improving the pixel duty ratio of the packaging structure.

[0087] In addition, in this embodiment, the support column 7 formed in the second through hole 5 can also be a hollow columnar structure. Therefore, when etching to form the second through hole 5, the cross-section of the second through hole 5 can also be a ring structure, thereby finally forming a hollow support column 7 in the second through hole 5.

[0088] S3: forming a release through hole 81 penetrating the packaging cover 8 in an area corresponding to the area between two adjacent support pillars 7 on the packaging cover 8 .

[0089] It can be understood that when there is an amorphous silicon layer 6 between the second sacrificial layer 5 and the packaging cover 8, the release hole 81 should be a through hole that penetrates the packaging cover 8 and the amorphous silicon layer 6. That is to say, when the release hole 81 is processed and formed, the release hole 81 that penetrates the packaging cover 8 and the amorphous silicon layer 6 is formed on the packaging cover 8 and the amorphous silicon layer 6, corresponding to the area between two adjacent support pillars 7.

[0090] Refer to Figure 7, which is a top view of the structure after the release through hole 81 is processed in the non-cooled infrared pixel-level packaging structure. In order to more clearly show the relative positions between the release through hole 81, the pier 3, and the micro-bridge structure 4, the top-down contour lines of the pier 3, the support column 7, the micro-bridge structure 4, etc. located under the packaging cover 8 are shown in the form of dotted lines in Figure 7.

[0091] Based on Figure 7, it can be seen that the release hole 81 in this embodiment can be roughly located on the boundary line of each pixel area, and a plurality of unconnected release holes 81 can be set on a circle of boundary lines of each pixel area. On the one hand, the coverage area of ​​the release hole 81 can be increased to the greatest extent, and on the other hand, it can ensure that the packaging cover 8 can maintain mutual connection with the support column 7.

[0092] S4 : removing the first sacrificial layer 2 and the second sacrificial layer 5 through the release through-hole 81 .

[0093] Based on the above discussion, after the first sacrificial layer 2 and the second sacrificial layer 5 are released and removed through the release through hole 81, the packaging cover 8 is supported above the readout circuit wafer 1 by the bridge pier 3 and the support column 7, and a cavity for accommodating the microbridge structure 4 is formed between the packaging cover 8 and the readout circuit wafer 1, and the microbridge structure 4 is suspended in the cavity by the bridge pier 3.

[0094] As described above, in this embodiment, release holes 81 are provided at positions corresponding to between two adjacent support pillars 7, so that the release holes 81 have a larger through-hole coverage area on the packaging cover 8, which can greatly improve the release efficiency of releasing and removing the first sacrificial layer 2 and the second sacrificial layer 5.

[0095] S5 : preparing a getter structure 9 for filling and sealing the release through hole 81 through the release through hole 81 .

[0096] In this embodiment, after the first sacrificial layer 2 and the second sacrificial layer 5 are released and removed through the release through holes 81 , a getter structure 9 filling the release through holes 81 is further formed in each release through hole 81 by preparation.

[0097] Based on the above discussion, it can be known that the getter structure 9 in this embodiment is prepared by sputtering after the first sacrificial layer 2 and the second sacrificial layer 5 are released and removed. Therefore, when the first sacrificial layer 2 and the second sacrificial layer 5 are released and removed in this embodiment, it will not cause any impact on the getter structure 9, and the problem of the getter structure 9 being poisoned by the release of the first sacrificial layer 2 and the second sacrificial layer 5 can be avoided, thereby effectively ensuring the working performance of the getter structure 9.

[0098] It is understandable that in the actual working process of the uncooled infrared detection chip, the microbridge structure 4, as a photosensitive unit for detecting infrared light, needs to work in a vacuum environment. For this reason, in the process of pixel-level packaging of the uncooled infrared detection chip in this application, each microbridge structure 4 can be packaged in an independent closed cavity, or all microbridge structures 4 can be located in the same large-area closed cavity.

[0099] The corresponding getter structures 9 are different for different closed cavity structures where each microbridge structure 4 is located. When it is necessary to encapsulate each microbridge structure 4 in an independent closed cavity, in an optional embodiment of this embodiment, the process of preparing the getter structure 9 may include:

[0100] An absorbent structure 9 is prepared by the release through hole 81 to connect each two adjacent bridge piers 3 and each two adjacent support columns 7, and fills the release through hole 81, and the bottom end of the absorbent structure 9 extends to the reading circuit wafer 1, so that the absorbent structure 9, the bridge piers 3 and the support columns 7 form an annular cavity wall surrounding each micro-bridge structure 4, and each annular cavity wall and the reading circuit wafer 1 and the packaging cover 8 together form a pixel closed cavity.

[0101] Referring to FIG8 , FIG8 is a schematic diagram of the three-dimensional structure of a single pixel closed cavity, and in order to more clearly show the corresponding getter structure 9 in the single pixel closed cavity, the invisible contour line of the getter structure 9 on one side is shown by a dotted line in FIG8 . Based on FIG8 , it can be seen that for each pixel closed cavity, a plurality of getter structures 9 extending from the release through holes 81 to the readout circuit wafer 1 can be formed through a circle of release through holes 81 on the boundary line of the pixel area, and the two sides of each getter structure 9 are respectively connected to the side walls of the adjacent support column 7 and the bridge pier 3, so that the getter structure 9, the bridge pier 3 and the support column 7 arranged around each pixel area can jointly form the side wall of the single pixel closed cavity, and each getter structure 9 is also a side wall structure that divides and isolates the closed cavity space between two adjacent pixel areas.

[0102] The enclosed cavities corresponding to each pixel area are divided and isolated by using the getter structure 9. On the one hand, it can realize the independent operation of each pixel structure and avoid mutual interference between adjacent pixel structures. On the other hand, it can also greatly increase the surface area of ​​the getter structure 9, thereby greatly improving the air absorption effect of the getter structure 9.

[0103] In another optional embodiment of the present application, all micro-bridge structures 4 can be packaged together in the same closed cavity. In this embodiment, the release through hole (81) can be divided into an edge release through hole and a middle release through hole; wherein the edge release through hole is the release through hole (81) located at the outermost edge position of the entire packaging cover (8), and the release through holes (81) other than the edge release through hole are the middle release through holes.

[0104] On this basis, the process of preparing the getter structure (9) by releasing the through hole (81) may include:

[0105] A first getter structure 91 is prepared in each intermediate release through hole to fill and seal each intermediate release through hole;

[0106] An edge release through hole is prepared to form a top-filled sealed edge release through hole, and the bottom end extends to a second getter structure on the reading circuit wafer 1; wherein the side of each second getter structure is connected to two adjacent bridge piers 3 and two adjacent support columns 7 at the edgemost position on the reading circuit wafer 1, so that each edge release through hole and the bridge piers 3 and support columns 7 located at the edgemost position of the reading circuit wafer 1, the packaging cover 8 and the reading circuit wafer 1 together form a closed cavity that encloses all pixel structures.

[0107] As shown in FIG. 6 and FIG. 7 , FIG. 6 is a schematic cross-sectional view of the structure along the BB plane in FIG. 7 , and in the structure shown in FIG. 6 , the first getter structure 91 only fills the middle release through hole.

[0108] When the getter structure 91 only seals the middle release holes, the cavities where the microbridge structures 4 are located are interconnected cavity spaces; but it can be understood that side cavity walls need to be formed between the circle of bridge piers 3 located at the edge of the entire readout circuit wafer 1 and between the support columns 7, so as to achieve lateral sealing of the connected cavity spaces corresponding to all pixel areas. In practical applications, the side cavity wall can be a second getter structure extending from the reading circuit wafer 1 to the packaging cover 8, which is formed by the edge release through-hole corresponding to the outermost circle of the entire reading circuit wafer 1. The side walls of the adjacent bridge piers 3 and adjacent support columns 7 in the outermost circle of the reading circuit wafer 1 are connected to the side of the second getter structure. Specifically, the second getter structure is the same as the getter structure 9 shown in FIG8 , so that the second getter structure located in the outermost circle of the reading circuit wafer 1 and the packaging cover 8 and the reading circuit wafer 1 together form a closed cavity that accommodates all pixel structures, and except for the second getter structure in the outermost circle, the first getter structure 91 only needs to seal the middle release through-hole. Of course, this embodiment does not exclude the use of other side cavity wall structures to seal and package the edges between the reading circuit wafer 1 and the packaging cover 8, and this is not specifically limited in the present application.

[0109] Regardless of whether the cavity of each pixel structure is formed into a connected cavity or an unconnected cavity, the microbridge structure 4 of all pixel structures can be located in a closed cavity. At this time, the getter structure 9 can be further activated. The activation method can be heating activation or electrical stimulation activation by power supply. There is no specific limitation on this in the present application.

[0110] In addition, after the activation of each getter structure 9 is completed, an anti-reflection film layer covering the top of the getter structure 9 and the upper surface of the package cover 8 may be further prepared on the package cover 8 .

[0111] It can be understood that the anti-reflection film layer should be a film layer that can improve the transmittance of infrared light.

[0112] To summarize, in the process of preparing the uncooled infrared pixel-level packaging structure in the present application, the getter is not directly formed on the surface of the readout circuit wafer, but a release through hole is formed on the packaging cover for each pixel area, and after the sacrificial layer between the packaging cover and the readout circuit wafer is released and removed through the release through hole, the release through hole of the sealing cover is filled with the getter structure, so that a closed cavity required for the operation of the microbridge structure can be formed between the readout circuit wafer and the packaging cover, and the getter structure can play an air absorption role in the closed cavity; because the getter structure is prepared and formed after the sacrificial layer is released and removed, the problem of poisoning of the getter structure when the sacrificial layer is released and removed can be avoided, thereby ensuring the working performance of the getter structure in the uncooled infrared pixel-level packaging structure, and then improving the working performance of the uncooled infrared pixel-level packaging structure.

[0113] Based on any of the above embodiments, with reference to FIGS. 1 to 8 , the present application further provides an uncooled infrared pixel level packaging structure, which is prepared based on any of the above preparation methods and may specifically include:

[0114] Readout circuit wafer 1;

[0115] A plurality of bridge piers 3 are arranged around each pixel area on the readout circuit wafer 1;

[0116] A microbridge structure 4 located in each pixel area and connected to the top of the bridge pier 3;

[0117] A support column 7 connected at its bottom end to the top end of the pier 3;

[0118] A packaging cover 8 connected to the top of the support column 7;

[0119] A release through hole 81 is provided on the packaging cover 8 in the area corresponding to the area between two adjacent support pillars 7;

[0120] A getter structure 9 is filled to seal the release through hole 81 .

[0121] The packaging structure in this embodiment is prepared based on the above-mentioned preparation method, that is to say, the getter structure 9 in this embodiment is prepared to form a sealed release through hole 81 after the sacrificial layer between the reading circuit wafer 1 and the packaging cover 8 is released and removed through the release through hole. This can avoid the problem of poisoning of the getter structure 9 during the removal of the sacrificial layer, thereby ensuring good air absorption performance of the getter structure 9 after being activated, and further ensuring the working performance of the entire non-cooled infrared chip.

[0122] Moreover, in this embodiment, a release hole is provided between each pair of adjacent support columns 7, which can greatly increase the coverage area of ​​the release hole 81, thereby improving the release efficiency of the sacrificial layer, and also increasing the area size of the getter structure 9, thereby further improving the air intake effect of the getter structure 9.

[0123] On this basis, in another optional embodiment of the present application, the bottom end of the getter structure 9 is connected to the readout circuit wafer 1, and the two sides are bonded to two adjacent bridge piers 3 and two adjacent support columns 7.

[0124] In the present embodiment, each getter structure 9 extends downward from the release through hole to the readout circuit wafer 1, which can greatly increase the surface area of ​​the getter structure 9, thereby further improving the air absorption capacity of the getter structure 9. The getter structure 9 can also divide and isolate the vacuum space where each microbridge structure 4 is located, so that each pixel structure can work independently of each other.

[0125] In an optional embodiment of the present application, the release through hole 81 includes an edge release through hole located at the edgemost edge of the packaging cover 8 and a middle release through hole other than the edge release through hole;

[0126] Correspondingly, the getter structure 9 includes a first getter structure 91 and a second getter structure; the first getter structure 91 fills and seals each middle release hole; the top of the second getter structure fills and seals the edge release hole, and the bottom extends to the reading circuit wafer 1, and the side of each second getter structure is connected to the two adjacent bridge piers 3 and the two adjacent support columns 7 at the edge position of the reading circuit wafer 1, so that each edge release hole and the bridge piers 3 and support columns 7 located at the edge position of the reading circuit wafer 1, the packaging cover 8 and the reading circuit wafer 1 together form a closed cavity that encloses all pixel structures.

[0127] In addition, the support column in the present application may also be a hollow column, thereby reducing the consumables of the support column.

[0128] In another optional embodiment of the present application, the surface of the packaging cover 8 facing away from the readout circuit wafer 1 is also covered with an anti-reflection film layer, which is a film layer for improving the transmittance of infrared light and can cover the upper surface of the packaging cover 8 and the top of the getter structure 9.

[0129] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "includes", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or equipment comprising a series of elements are inherent to the elements. In the absence of more restrictions, the elements limited by the sentence "comprising one..." do not exclude the presence of other identical elements in the process, method, article or equipment comprising the elements. In addition, the above-mentioned technical solution provided in the embodiment of the present application is consistent with the corresponding technical solution in the prior art in principle, and the part is not described in detail, so as to avoid too much redundancy.

[0130] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core ideas of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for preparing an uncooled infrared pixel-level packaging structure, characterized in that: include: A patterned first sacrificial layer (2), a bridge pier (3) filled in a first through hole of the first sacrificial layer (2), and a microbridge structure (4) arranged on the upper surface of the first sacrificial layer (2) are sequentially prepared on a readout circuit wafer (1); wherein the bottom end of the bridge pier (3) is connected to the readout circuit wafer (1), and the microbridge structure (4) is connected to the top end of the bridge pier (3); A patterned second sacrificial layer (5), a support column (7) and a packaging cover (8) are sequentially prepared on the first sacrificial layer (2); wherein the packaging cover (8) is arranged on the upper surface of the second sacrificial layer (5); the support column (7) is filled in the second through hole (51) of the second sacrificial layer (5), and the top end is connected to the packaging cover (8), and the bottom end is connected to the bridge pier (3); Processing the area between two adjacent support pillars (7) on the packaging cover (8) to form a release through hole (81) penetrating the packaging cover (8); removing the first sacrificial layer (2) and the second sacrificial layer (5) through the release through hole (81); A getter structure (9) for filling and sealing the release through hole (81) is prepared through the release through hole (81).

2. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: A patterned first sacrificial layer (2), a bridge pier (3) filled in a first through hole of the first sacrificial layer (2), and a microbridge structure (4) arranged on the upper surface of the first sacrificial layer (2) are sequentially prepared on a readout circuit wafer (1), comprising: Coating a first sacrificial layer (2) on the readout circuit wafer (1); The first sacrificial layer (2) is patterned and etched to form the first through hole; wherein the first through hole is located on the boundary line of each pixel area on the readout circuit wafer (1), and at least four first through holes surround each pixel area; Forming a bridge pier (3) in each of the first through holes, the bridge pier (3) having the same height as the first sacrificial layer (2); One microbridge structure (4) is prepared on the first sacrificial layer (2) corresponding to each pixel region, and the microbridge structure (4) is connected to the tops of two bridge piers (3) of the bridge piers (3) that are closest to each other.

3. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: A patterned second sacrificial layer (5), a support column (7) and a packaging cover (8) are sequentially prepared on the first sacrificial layer (2), comprising: coating the first sacrificial layer (2) to form the second sacrificial layer (5) covering the first sacrificial layer (2) and the microbridge structure (4); Forming an amorphous silicon layer (6) on the upper surface of the second sacrificial layer (5); The amorphous silicon layer (6) and the second sacrificial layer (5) are etched to form the second through hole (51) penetrating the amorphous silicon layer (6) and the second sacrificial layer (5); wherein the bottom end of the second through hole (51) is located on the bridge pier (3); The support column (7) filling the second through hole (51) and the packaging cover (8) covering the upper surface of the amorphous silicon layer (6) are formed by integral molding; wherein the support column (7) and the packaging cover (8) are both amorphous silicon structures; Correspondingly, on the packaging cover (8), a release through hole (81) penetrating the packaging cover (8) is formed by processing the area between two adjacent support pillars (7), comprising: On the packaging cover (8) and the amorphous silicon layer (6), a release through hole (81) penetrating the packaging cover (8) and the amorphous silicon layer (6) is formed by processing a region between two adjacent support pillars (7).

4. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: On the packaging cover (8), a release through hole (81) penetrating the packaging cover (8) is formed by processing the area between two adjacent support pillars (7), comprising: The release through hole (81) is formed between all two adjacent support columns (7), and the release through hole (81) is a strip-shaped hole whose hole walls at both ends are flush with the side walls of the support column (7).

5. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: A getter structure (9) for filling and sealing the release through hole (81) is prepared through the release through hole (81), comprising: The getter structure (9) is formed by connecting each adjacent two bridge piers (3) and each adjacent two support columns (7) through the release through hole (81), and the bottom end of the getter structure (9) extends to the read circuit wafer (1), so that the getter structure (9), the bridge piers (3) and the support columns (7) surround each micro-bridge structure (4) to form an annular cavity wall, and each annular cavity wall, the read circuit wafer (1) and the packaging cover (8) together form a pixel closed cavity.

6. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: The release through holes (81) include an edge release through hole located at the outermost edge of the packaging cover (8) and a middle release through hole other than the edge release through hole; Accordingly, a getter structure (9) for filling and sealing the release through hole (81) is prepared through the release through hole (81), comprising: A first getter structure (91) is prepared in each of the intermediate release through holes to fill and seal each of the intermediate release through holes; The edge release through hole is prepared to form a second getter structure with a top end filled and sealed to the edge release through hole and a bottom end extending to the read circuit wafer (1); wherein the side edge of each of the second getter structures is connected to two adjacent bridge piers (3) and two adjacent support pillars (7) at the edgemost position on the read circuit wafer (1), so that each edge release through hole, the bridge piers (3) and the support pillars (7) located at the edgemost position of the read circuit wafer (1), the packaging cover (8) and the read circuit wafer (1) together form a closed cavity that encloses all pixel structures.

7. The method for preparing the uncooled infrared pixel level packaging structure according to claim 1, characterized in that: After the getter structure (9) for filling and sealing the release through hole (81) is prepared through the release through hole (81), the method further comprises: activating the getter structure (9); An anti-reflection film layer is prepared to cover the top of the getter structure (9) and the upper surface of the packaging cover (8).

8. An uncooled infrared pixel level packaging structure, characterized in that: include: Readout circuit wafer (1); A plurality of bridge piers (3) arranged around each pixel area on the readout circuit wafer (1); A microbridge structure (4) located in each pixel region and connected to the top of the bridge pier (3); A support column (7) having a bottom end connected to the top end of the pier (3); A packaging cover (8) connected to the top of the support column (7); A release through hole (81) is provided on the packaging cover (8) in a region corresponding to the region between two adjacent support pillars (7); A getter structure (9) is filled to seal the release through hole (81).

9. The uncooled infrared pixel level packaging structure according to claim 8, characterized in that: The bottom end of the getter structure (9) is connected to the readout circuit wafer (1), and the two sides are bonded to two adjacent bridge piers (3) and two adjacent support columns (7).

10. The uncooled infrared pixel level packaging structure according to claim 8, characterized in that: The release through holes (81) include an edge release through hole located at the outermost edge of the packaging cover (8) and a middle release through hole other than the edge release through hole; Correspondingly, the getter structure (9) comprises a first getter structure (91) and a second getter structure; the first getter structure (91) fills and seals each of the middle release holes; the second getter structure has a top end that fills and seals the edge release holes, and a bottom end that extends onto the readout circuit wafer (1), and the side edges of each of the second getter structures are connected to two adjacent bridge piers (3) and two adjacent support columns (7) at the edgemost positions on the readout circuit wafer (1), so that each of the edge release holes, the bridge piers (3) and the support columns (7) at the edgemost positions of the readout circuit wafer (1), the packaging cover (8) and the readout circuit wafer (1) together form a closed cavity that encloses all pixel structures.

11. The uncooled infrared pixel level packaging structure according to claim 8, characterized in that: The support column (7) is a hollow column.

12. The uncooled infrared pixel level packaging structure according to claim 8, characterized in that: It also includes an anti-reflection film layer covering the upper surface of the packaging cover (8) and the top of the getter structure (9).

Images