Screen printing binding method, device and system for card insertion equipment outside server

Abstract

The invention relates to the technical field of servers, and discloses a silk-screen binding method, device and system for external card insertion equipment of a server, the method is applied to a processing module on a mainboard, and the method comprises the steps that the position of a PCIe expansion card in the server is obtained, burning information is read through an I2C switch of the PCIe expansion card, and the burning information is sent to the processing module; obtaining a physical slot silk screen of a server where the PCIe device is located on each slot, and obtaining an I2C address bound to each PCIe device; determining at least one PCIe device address according to a preset processor address, slot bandwidth information, at least one mapping relation and in-place information of the PCIe device on each slot; and establishing a binding relationship among the physical slot silk-screen of the PCIe equipment on each slot, the address of the PCIe equipment and the I2C address, and managing the PCIe equipment by using the binding relationship. According to the method, the BIOS or the BMC can freely access the same equipment through the I2C path, and the problem that specified equipment cannot be managed is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a silk screen binding method, device and system for server external card equipment. Background Art

[0002] With the rapid development of information technology and the deepening of digital transformation, the rise and rapid development of new technologies such as artificial intelligence, edge computing, cloud computing, and virtual reality, and the explosion of processed data volume, the scale of servers in large data centers continues to rise. As an important part of the server information infrastructure, devices in the server that comply with the PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) protocol play an important role in network, storage, GPU (Graphics Processing Unit, graphics processor) computing and other scenarios.

[0003] Currently, PCIe devices are usually designed with access paths such as PCIe bus and I2C bus in hardware design. Therefore, BMC (Baseboard Management Controller) and BIOS (Basic Input Output System) need to be able to bind their PCIe address, I2C address and the physical silk screen address of the server where they are located, so as to meet the functional requirements of asset management, fault diagnosis and location, cooling strategy temperature information source, etc. If the address mapping relationship of PCIe devices is not known, it will affect the operation and maintenance of data center servers and even cause server downtime due to improper PCIe device management. Summary of the invention

[0004] In view of this, the present invention provides a method, device and equipment for silk screen binding of server external card devices, aiming to realize the binding between server physical silk screen of PCIe devices and PCIe addresses and I2C addresses.

[0005] In a first aspect, the present invention provides a silk screen binding method for a server plug-in card device, which can be applied to a processing module on a mainboard, wherein the processing module is connected to a PCIe expansion card via an I2C bus, and the method comprises:

[0006] Obtaining the location of a PCIe expansion card in a server through an I2C bus access, and reading burning information through an I2C switch of the PCIe expansion card, wherein the burning information includes: I2C address information of at least one expansion chip in the PCIe expansion card, PCIe slot information, and at least one mapping relationship;

[0007] According to the PCIe slot information and its mapping relationship, obtain the physical slot silk screen of the server where the PCIe device is located on each PCIe slot, and scan to obtain the I2C address bound to each PCIe device;

[0008] Determine at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information, the at least one mapping relationship, and in-place information of a PCIe device on each of the PCIe slots;

[0009] A binding relationship is established between the physical slot silk screen of the PCIe device on each PCIe slot, at least one PCIe device address and the I2C address, and at least one PCIe device is managed using the binding relationship.

[0010] The silk screen binding method provided by the present invention obtains the PCIe expansion card position in the server through I2C bus access, reads the burning information of the hardware device, determines the physical slot silk screen of the server where the PCIe device is located, the I2C address bound to each PCIe device, and the PCIe device address according to the burning information, establishes a binding relationship between the server silk screen address of the PCIe device and the PCIe address and the I2C address, enables the BIOS or BMC to freely access the same device through the I2C path, and solves the problem that the specified device cannot be managed. The method manages by establishing a binding relationship, more effectively monitors and maintains the status of the PCIe device, timely discovers and solves problems, and improves the reliability and maintainability of the entire system.

[0011] In combination with the first aspect, in an optional implementation, the PCIe slot information includes: a PCIe slot sequence and a relative position of the slot on the PCIe expansion card.

[0012] The obtaining, based on the PCIe slot information, a physical slot silk screen of a server where a PCIe device is located on each PCIe slot includes: obtaining, based on the PCIe slot sequence, PCIe slot bandwidth information, and a relative position of the slot on a PCIe expansion card, a physical slot silk screen of a PCIe device on each PCIe slot in combination with a position of the PCIe expansion card.

[0013] In combination with the first aspect, in another optional implementation, the at least one mapping relationship includes: a mapping relationship between the at least one expansion chip and at least one PCIe slot.

[0014] The determining at least one PCIe device address according to the preset processor address, PCIe slot bandwidth information and the at least one mapping relationship, and the in-place information of the PCIe device on each of the PCIe slots includes:

[0015] According to the mapping relationship, at least one expansion chip corresponding to the at least one PCIe slot is accessed, and the presence information, processor address information and PCIe port address information of each PCIe device are obtained according to a preset processor address, a relationship between each pin on a high-speed connector of a mainboard and the processor address, a presence signal of the at least one PCIe device and PCIe slot bandwidth information;

[0016] If the processing module is a basic input and output system BIOS, scanning at least one PCIe device according to the processor address information and the PCIe port address information, and binding a unique identifier to each of the PCIe devices;

[0017] The BIOS sends a binding relationship between at least one PCIe device and the unique identifier to a baseboard management controller BMC.

[0018] In combination with the first aspect, in yet another optional implementation, scanning at least one PCIe device according to the processor address information and the PCIe port address information, and binding a unique identifier to each of the PCIe devices, includes:

[0019] The BIOS assigns a unique identifier to a PCIe device on each PCIe slot according to the PCIe port of the processor address information; and establishes a binding relationship between the unique identifier and the PCIe port.

[0020] In combination with the first aspect, in yet another optional implementation, the method further includes:

[0021] If the processing module is a BMC, the BMC receives a binding relationship between at least one PCIe device and a unique identifier sent by the BIOS;

[0022] The establishing of the binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, the at least one PCIe device address and the I2C address includes:

[0023] The BMC establishes a binding relationship between the physical slot silk screen, the at least one PCIe device address and the I2C address according to the physical slot silk screen, the binding relationship between the at least one PCIe device address and the I2C address, and the binding relationship between the at least one PCIe device and the I2C address.

[0024] In combination with the first aspect, in another optional implementation, obtaining the I2C address bound to each of the PCIe devices includes: scanning PCIe plug-in devices according to the channel mapping relationship of the I2C switch, binding an I2C address for each of the PCIe devices, and obtaining the I2C address.

[0025] In combination with the first aspect, in another optional implementation, before obtaining the position of the PCIe expansion card in the server through I2C bus access, it also includes: adding a first pin representing the processor CPU address on the high-speed connector of the motherboard, and adding a second pin representing the PCIe port address; storing the information of the first pin and the second pin through at least one expansion chip.

[0026] In a second aspect, the present invention further provides a silk screen binding device for a server external card device, the device comprising:

[0027] A reading module is used to obtain the location of a PCIe expansion card in a server through an I2C bus access, and read the burning information through the I2C switch of the PCIe expansion card, wherein the burning information includes: I2C address information of at least one expansion chip in the PCIe expansion card, PCIe slot information, and at least one mapping relationship;

[0028] An acquisition module is used to acquire the physical slot silk screen of the server where the PCIe device is located on each PCIe slot according to the PCIe slot information and its mapping relationship, and to scan and acquire the I2C address bound to each PCIe device;

[0029] A determination module, configured to determine at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information, the at least one mapping relationship, and in-place information of a PCIe device on each of the PCIe slots;

[0030] An establishment module is used to establish a binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, the at least one PCIe device address and the I2C address, and use the binding relationship to manage the at least one PCIe device address.

[0031] In a third aspect, the present invention provides a silk screen binding system, comprising a mainboard and at least one PCIe expansion card; wherein the mainboard comprises at least one processing module, at least one arbitration chip and at least one high-speed connector; each of the PCIe expansion cards comprises an I2C switch, a storage unit, at least one expansion chip and at least one PCIe slot;

[0032] The at least one processing module is connected to at least one expansion chip of the PCIe expansion card through the at least one arbitration chip and the at least one high-speed connector;

[0033] The I2C switch connects the storage unit and the at least one PCIe slot through different channels, the storage unit is used to store burning information, and the burning information includes: I2C address information of the at least one expansion chip, PCIe slot information and at least one mapping relationship;

[0034] Each of the processing modules stores computer instructions, and by executing the computer instructions, the silk-screen binding method for a server external card device described in the first aspect or any corresponding embodiment thereof is executed.

[0035] Optionally, in an optional implementation, if the number of the processing module is one, the processing module is a baseboard management controller BMC or a basic input and output system BIOS.

[0036] If the number of the processing modules is two, the two processing modules are respectively a BMC and a BIOS.

[0037] In a fourth aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the silk screen binding method of a server external card device of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0038] In a fifth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the silk-screen binding method for a server external card device of the first aspect or any corresponding embodiment thereof.

[0039] In addition, the present invention provides a computer program product, including computer instructions, which are used to enable a computer to execute the silk screen binding method of a server external card device according to the first aspect or any corresponding embodiment thereof.

[0040] The present invention provides a silk screen binding method, device and system for server plug-in card devices, which obtains the PCIe expansion card position in the server through I2C bus access, reads the burning information of the hardware device and the storage information of the GPIO expansion chip, determines the physical slot silk screen of the server where the PCIe device is located, the I2C address bound to each PCIe device, and the PCIe device address according to the burning information, and establishes a binding relationship between the server silk screen address of the PCIe device and the PCIe address and the I2C address, so that the BIOS or BMC can freely access the same device through the I2C path, solving the problem that the specified device cannot be managed. By establishing a binding relationship for management, the status of the PCIe device can be more effectively monitored and maintained, problems can be discovered and solved in a timely manner, and the reliability and maintainability of the entire system can be improved.

[0041] In addition, the method fully automates the binding of the PCIe address, I2C address and server slot silkscreen address of the PCIe device, avoiding the need to adapt the BIOS or BMC firmware for the newly developed PCIe expansion card or for reuse in new product models, thus reducing the workload of hardware research and development and BIOS / BMC firmware development. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 is a structural diagram of a PCIe address and silk screen binding according to an embodiment of the present invention;

[0044] Figure 2 is a structural schematic diagram of a system for connecting a mainboard and a PCIe expansion card according to an embodiment of the present invention;

[0045] Figure 3 It is a flow chart of a silk screen binding method for a server external card device according to an embodiment of the present invention;

[0046] Figure 4 is a schematic diagram of a physical silk screen of a server PCIe plug-in card device according to an embodiment of the present invention;

[0047] Figure 5 It is a flow chart of another method for silk-screen binding of an external card device of a server according to an embodiment of the present invention;

[0048] Figure 6It is a flow chart of another method for silk-screen binding of a server external card device according to an embodiment of the present invention;

[0049] Figure 7 is a structural block diagram of a silk screen binding device according to an embodiment of the present invention;

[0050] Figure 8 It is a schematic diagram of the hardware structure of a processing module according to an embodiment of the present invention. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0052] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0053] Furthermore, the terms “first” and “second” are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0054] The technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0055] First, the application scenarios and related technical terms of the technical solutions provided in the embodiments of the present invention are introduced.

[0056] like Figure 1 , which is a schematic diagram of a PCIe address and silk screen binding scenario provided by an embodiment of the present invention. The scenario includes a motherboard and a PCIe expansion card, and the motherboard and the PCIe expansion card are connected via an I2C bus.

[0057] Figure 1 In the present invention, a hard code programming method of semi-automatic identification of PCIe device addresses is used to implement PCIe address allocation of PCIe devices and server silk screen address binding, but this method cannot implement the binding of PCIe addresses of PCIe devices with I2C addresses.

[0058] Specifically, in one implementation, the address of the central processing unit (CPU) and the PCIe port address of the CPU are encoded, and the encoded content is saved through the GPIO (General Purpose Input Output) expansion chip (Expander) device, and the PCIe device address is read and parsed by the BIOS or BMC to achieve PCIe address allocation; at the same time, the BIOS or BMC writes the mapping relationship between the physical silk screen address and the PCIe address in the server system configuration into the BIOS or BMC code in advance through a hard-coding method, thereby achieving the PCIe address allocation of the PCIe device and the physical silk screen address binding of the server. This method cannot achieve the binding of the PCIe address and the I2C address, so that when the BIOS or BMC accesses the PCIe device, it is impossible to manage the same device through the PCIe path and the I2C path.

[0059] In addition, when the hard-coding method is used to bind the PCIe address of the PCIe device to the silk-screen address of the server, each time a PCIe expansion card is developed, the BIOS and / or BMC of the PCIe device card needs to be adapted, including upgrading the BIOS and BMC versions, which increases the workload of hardware research and development and BIOS / BMC firmware development.

[0060] In order to solve the above problems, an embodiment of the present invention provides a silk screen binding method for a server plug-in card device, which can be applied to a mainboard and PCIe expansion card connection system.

[0061] like Figure 2 As shown, the system includes a motherboard and a PCIe expansion card. The motherboard and the PCIe expansion card can be connected via an I2C bus. Furthermore, the motherboard includes: a BMC, a BIOS, at least one I2C arbitration chip, at least one high-speed connector (also called a high-speed connector MCIO) and an I2C bus. In addition, the motherboard also includes at least one CPU, Figure 2 The CPU is not shown.

[0062] Among them, the high-speed connector MCIO, full name multi-channel input / output connector, is an interface technology that combines multiple physical channels into a high-speed data stream. According to application requirements, MCIO interfaces are divided into multiple types, among which MCIO16 and MCIO8 are the two most common high-speed connector interfaces. Figure 2 There are four high-speed connectors shown in the figure, namely: MCIO16_0, MCIO8_0, MCIO16_1 and MCIO8_0.

[0063] Among them, a pin representing the CPU address can be added to each high-speed connector MCIO, that is, CPU_Addr0 / 1 / 2, indicating three CPU addresses, which can represent CPU0, CPU1, ..., CPU7, etc. respectively through CPU encoding.

[0064] The I2C arbitration chip is used to switch the I2C bus. Figure 2 Two I2C buses, I2C0 and I2C1, are shown in the figure, which are connected to I2C arbitration chip 0 and I2C arbitration chip 1 respectively. Arbitration chip 0 and I2C arbitration chip 1 are used to turn on or off the high-speed connector MCIO, thereby connecting or disconnecting the PCIe expansion card. In this embodiment, arbitration chip 0 controls bus I2C0 to connect GPIO expansion chip 0; arbitration chip 1 controls bus I2C1 to connect GPIO expansion chip 1.

[0065] It should be understood that in this embodiment, the number of high-speed connector MCIO and I2C arbitration chips can be freely set according to actual needs, and this embodiment does not limit this. Similarly, the number of PCIe expansion cards can be one or more, set according to actual needs, and this embodiment does not limit this.

[0066] In addition, BIOS is a program fixed on the motherboard in the computer system. It is used to perform hardware initialization and self-test when the computer starts, and provides basic input and output functions so that the operating system can start and run normally. Specifically, the functions of BIOS include: hardware initialization, self-test, boot sequence setting, basic input and output functions, etc.

[0067] BMC is a controller specially used for managing server hardware, which can provide functions such as remote management, monitoring, fault diagnosis, etc. In this embodiment, BMC can be used to implement a remote management method, a monitoring system, etc. of a server.

[0068] In this embodiment, both BIOS and BMC can be used as a processing module or a processing circuit to execute the method provided in this embodiment.

[0069] exist Figure 2 In the present invention, a PCIe expansion card includes: a storage unit, a cable, at least one GPIO expansion chip, an I2C switch chip, at least one PCIe slot and other components or modules.

[0070] The I2C switch chip is also called an I2C switch, and the I2C switch is connected to the storage unit and the PCIe slot through multiple channels CH. In this embodiment, the IC2 switch is connected to the storage unit through channel 0 (CH0), connected to PCIe slot 0 through channel 1 (CH1), and connected to PCIe slot 1 through channel 2 (CH2).

[0071] In addition, in the PCIe expansion card, the GPIO expansion chip 0 and the GPIO expansion chip 1 include multiple pins, for example, each includes 8 pins from P00 to P07, and are connected to the PCIe slot through a set pin pin, such as P00.

[0072] An embodiment of the present invention provides an embodiment of a silk screen binding method for a server external card device. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0073] In this embodiment, a silk screen binding method for a server plug-in card device is provided, which can be used for the above-mentioned processing modules, such as BIOS and / or BMC. Before executing this method, the hardware device provided in this embodiment needs to be configured first.

[0074] Combination Figure 2 , the hardware design of this embodiment is performed on the device side of the motherboard and the PCIe expansion card, and the specific hardware design execution process is as follows:

[0075] First, set up the hardware on the motherboard. Add the pins representing the CPU address (collectively referred to as the first pins) on the high-speed connector MCIO, i.e., CPU_ADDR0 / 1 / 2, which represent CPU0, CPU1, ..., CPU7 through CPU coding, and add the pins representing the PCIe port address (collectively referred to as the second pins) on the high-speed connector MCIO, i.e., PE0 / 1 / 2 / 3, which represent different PCIe port descriptors respectively.

[0076] In addition, after the high-speed connector MCIO is connected to the PCIe expansion card end through a cable, the Pin information of CPU_ADDR0 / 1 / 2 and PE0 / 1 / 2 / 3 information are stored through the GPIO expansion chip / expansion card. Among them, there is a preset mapping relationship between the GPIO expansion chip and the PCIe slot number. For example, the preset mapping relationship includes: GPIO expansion chip 0 corresponds to PCIe slot 0, and GPIO expansion chip 1 corresponds to PCIe slot 1. The configuration on the motherboard side can store the CPU address information and PCIe port address information corresponding to the PCIe slot in the GPIO expansion chip corresponding to the slot.

[0077] Optionally, the Pin information of the above address CPU_ADDR0 / 1 / 2 is stored in the GPIO expansion chip / expansion card and occupies 3 available bits, and the storage of PE0 / 1 / 2 / 3 information can occupy 4 bits.

[0078] In this embodiment, on the motherboard, either the BMC or the BIOS can be used as the I2C host, and multiple I2C arbitration chips can be connected to different I2C connectors. Figure 2 In the application structure, I2C arbitration chip 0 is located in I2C Bus 0, I2C0_0 / I2C1_0, and I2C arbitration chip 1 is located in I2C Bus 1, I2C0_1 / I2C1_1.

[0079] The I2C connector can be a separate connector or added to the high-speed connector MCIO. The BMC and BIOS can set the I2C sole host control right to themselves by controlling the I2C arbitration chip, so that only one I2C host can access the corresponding I2C bus at the same time.

[0080] In addition, different I2C arbitration chips are connected to I2C connectors representing the locations of PCIe expansion cards in different servers, and the correspondence between the locations and connectors is pre-specified / configured in the design. Therefore, when the BMC or BIOS accesses different I2C arbitration chips, it means that the PCIe expansion cards being accessed are from different server system locations.

[0081] The I2C connector is connected to the PCIe expansion card through a cable, and different channels are switched through the I2C switch chip (I2C Switch). When accessing channel 0, a storage unit can be accessed. For example, the storage unit can be a FRU module / unit and a GPIO expansion chip. In addition, the I2C switch chip can also access PCIe slot 0, PCIe slot 1, ... PCIe slot 5 and other slots by accessing channels such as channel 1 (CH1), channel 2 (CH2), ... channel 6 (CH6).

[0082] BMC and BIOS can access the GPIO expansion chip through the I2C path to obtain the CPU address information and PCIe port address information of the PCIe device on the specified PCIe slot, and then know the PCIe device address.

[0083] On the PCIe expansion card side, the relative position of the PCIe slot in the physical space is designed and described. For example, from top to bottom, they are PCIe slot 0, PCIe slot 1, ..., PCIe slot 5, etc. Therefore, the BMC and BIOS can access the PCIe device through the I2C path and I2C address to obtain the system position of the PCIe expansion card and the relative position of the PCIe device slot on the PCIe expansion card, and obtain the physical silkscreen position of the server where the PCIe device is located.

[0084] For PCIe expansion cards, their hardware feature information is planned in advance and filled into the FRU (Field Replaceable Unit). FRU burning information refers to writing specific data or information into the storage chip of the FRU so that these FRUs can be identified and managed when the system or device is running.

[0085] like Figure 2 As shown, the FRU burning information is used to record the hardware feature information of the motherboard and / or GPIO expansion card and PCIe device. Further, the FRU burning information includes: the I2C switch of the PCIe expansion card, the I2C address of the GPIO expansion chip, the channel mapping relationship of the I2C switch, the PCIe slot sequence, the PCIe slot bandwidth information and the relative position of the slot on the PCIe expansion card. The FRU burning information can pave the way for the BMC and BIOS to fully automatically bind the I2C path on the specified PCIe slot, the physical silk screen address of the server where it is located, and the PCIe device address.

[0086] In addition, the above-mentioned FRU burning information may be located in a ROM (Read-Only Memory), such as an EEPROM (Electrically Erasable Programmable ROM).

[0087] Combine the following Figure 2 and Figure 3 , a silk screen binding method for a server external card device provided in this embodiment is described. Figure 3 1 is a flow chart of a silk screen binding method according to an embodiment of the present invention. The method can be applied to a processing module, which can be the aforementioned BIOS or BMC. The method flow includes:

[0088] Step S101, obtaining the location of the PCIe expansion card in the server through the I2C bus access, and reading the burning information through the I2C switch of the PCIe expansion card.

[0089] The burning information includes: I2C address information of at least one expansion chip in the PCIe expansion card, PCIe slot information and at least one mapping relationship.

[0090] Specifically, the processing module accesses the I2C arbitration chip in turn through I2C to obtain the control right of PCIe expansion card position 0, position 1, ..., position n in the server, thereby obtaining the connected PCIe expansion cards inserted in position 0, position 1, ..., position n in turn. And through the above positions, the system position of the PCIe expansion card and the relative position of the PCIe device slot on the PCIe expansion card are obtained, that is, the physical silk screen position of the server where the PCIe device is located is obtained, such as which specific slots among Slot1, Slot2, ..., Slot8 have PCIe devices inserted.

[0091] Step S102, according to the PCIe slot information and its mapping relationship, obtain the physical slot silk screen of the server where the PCIe device is located on each PCIe slot, and scan to obtain the I2C address bound to each PCIe device.

[0092] The PCIe slot information includes: PCIe slot sequence, PCIe slot bandwidth information. The mapping relationship includes the relative position of each PCIe slot on the PCIe expansion card. This step S102: According to the PCIe slot information and its mapping relationship, the physical slot silk screen of the server where the PCIe device is located on each PCIe slot is obtained, specifically including:

[0093] Obtain the physical slot silkscreen of the PCIe device on each PCIe slot based on the PCIe slot sequence and the relative positions of the slots on the PCIe expansion card and the location of the PCIe expansion card.

[0094] like Figure 4 As shown, Slot 1, Slot 2, Slot 3, ..., Slot 8 are the physical structures on the server backplane. When the PCIe expansion card is inserted into different positions, the corresponding physical silk screen is different.

[0095] The backplane also includes OCP NIC 0 and OCP NIC 1. OCP NIC refers to a network interface card that complies with the Network Interface Card (NIC) specification specified by the Open Compute Project (OCP), and is used to support scenarios such as data centers, cloud computing, and large Internet service providers to meet high-performance, low-latency, and low-power network requirements.

[0096] In addition, in this step, the I2C address bound to each of the PCIe devices is obtained, which specifically includes: scanning PCIe plug-in devices according to the channel mapping relationship of the I2C switch, binding an I2C address for each PCIe device, and obtaining the I2C address.

[0097] Step S103: determining at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information and at least one mapping relationship, and information about the PCIe device in each PCIe slot.

[0098] In the above FRU burning information, at least one mapping relationship includes: a mapping relationship between at least one expansion chip and at least one PCIe slot. The preset processor address and at least one mapping relationship are the software and hardware configurations made on the mainboard and PCIe expansion card before step S101 of the above method.

[0099] In step S103, at least one PCIe device address is determined according to the preset processor address, PCIe slot bandwidth information and at least one mapping relationship, and the in-place information of the PCIe device on each PCIe slot, specifically including:

[0100] First, according to the mapping relationship, at least one PCIe slot corresponding to at least one expansion chip is accessed, and the presence information, processor address information and PCIe port address information of each PCIe device are obtained according to the preset processor address, the relationship between each pin on the high-speed connector of the motherboard and the processor address, the presence signal of at least one PCIe device and the PCIe slot bandwidth information.

[0101] Then, it is determined whether the current processing module is a basic input and output system BIOS.

[0102] Secondly, if the processing module is BIOS, the BIOS scans at least one PCIe device according to the processor address information, PCIe slot bandwidth information and PCIe port address information, binds a unique identifier to each PCIe device, and the BIOS sends the binding relationship between the at least one PCIe device and the unique identifier to the BMC.

[0103] Furthermore, the above-mentioned BIOS scans at least one PCIe device according to the processor address information and the PCIe port address information, and binds a unique identifier to each of the PCIe devices, specifically including: the BIOS assigns a unique identifier, such as BDF (Bus Device Function), to the PCIe device on each PCIe slot according to the PCIe port of the processor address information; and then the BIOS establishes a binding relationship between each unique identifier and the PCIe port.

[0104] The PCIe slot bandwidth information includes the maximum bandwidth information supported by each PCIe slot.

[0105] In this embodiment, the above-mentioned determination of whether the current processing module is a BIOS further includes:

[0106] If the processing module is a BMC, the BMC receives a binding relationship between at least one PCIe device and a unique identifier sent by the BIOS; the above step S104 specifically includes: the BMC establishes a binding relationship between the physical slot silk screen, the at least one PCIe device address and the I2C address according to the physical slot silk screen, the binding relationship between the at least one PCIe device address and the I2C address, and the binding relationship between the at least one PCIe device and the I2C address.

[0107] Step S104, establishing a binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, at least one PCIe device address and the I2C address, and managing at least one PCIe device using the binding relationship.

[0108] By combining the physical silk-screen address of the server where the PCIe devices on all PCIe slots are located, the binding relationship between the PCIe devices and the PCIe identifiers, and the binding relationship between the PCIe devices and the I2C addresses, the binding relationship between the physical silk-screen address of the PCIe devices, the PCIe device addresses (PCIe addresses for short), and the I2C addresses can be formed.

[0109] Other functions related to the PCIe device address are enabled, such as asset information management, fault diagnosis and location, and heat dissipation strategy, which are not limited in this embodiment.

[0110] This embodiment provides a silk screen binding method for server plug-in card devices, which obtains the PCIe expansion card position in the server through I2C bus access, reads the burning information of the hardware device, determines the physical slot silk screen of the server where the PCIe device is located, the I2C address bound to each PCIe device, and the PCIe device address based on the burning information and the GPIO expansion chip storage information, and establishes a binding relationship between the server silk screen address of the PCIe device and the PCIe address and I2C address, so that the BIOS or BMC can freely access the same device through the I2C path, solving the problem that the specified device cannot be managed. By establishing a binding relationship for management, the status of the PCIe device can be more effectively monitored and maintained, problems can be discovered and solved in a timely manner, and the reliability and maintainability of the entire system can be improved.

[0111] In addition, the method fully automates the binding of the PCIe address, I2C address and server slot silkscreen address of the PCIe device, without the need to adapt the BIOS or BMC firmware for the newly developed PCIe expansion card or for reuse in new product models, thus reducing the workload of hardware research and development and BIOS / BMC firmware development.

[0112] Combine the following Figure 5 and Figure 6, the method provided in this embodiment is described in detail. It should be noted that, Figure 5 and Figure 6 A silk screen binding method for a server plug-in card device is provided respectively. The difference lies in that the execution subjects of the two methods are different. Figure 5 The execution subject of the method is BIOS. Figure 6 The executor in the two methods is BMC, but the overall process of the two methods is mostly the same, with only individual steps being different.

[0113] See also Figure 5 , is a flow chart of a silk screen binding method for a server external card device using BIOS as the execution subject, the method comprising:

[0114] Step S0: BIOS accesses and controls the I2C arbitration chip in sequence through I2C to control the I2C arbitration chip at position i in sequence.

[0115] Wherein, i=0, 1, ..., n, and n is a positive integer. Specifically, the BIOS obtains the control right of the PCIe expansion card position 0, position 1, ..., position n in the server, that is, the PCIe expansion card connected to the slot position 0, position 1, ... or position n is obtained in sequence. When the I2C arbitration chip is turned on, it allows access to the I2C bus and obtains the control right of the connected different slot positions.

[0116] Step S1: BIOS controls to turn on the I2C switch, and sequentially accesses the I2C switches of the PCIe expansion card, such as turning on channel 0 and reading the Riser FRU information of the downstream storage unit.

[0117] Among them, the FRU information includes the pre-filled hardware information of the PCIe expansion card, and the FRU information specifically includes: ① the I2C address of at least one expansion chip, ② the mapping relationship between the expansion chip and the PCIe slot, ③ the mapping relationship between at least one channel CH of the I2C switch, ④ the PCIe slot sequence and ⑤ the relative position of the slot on the PCIe expansion card.

[0118] Combination Figure 2 In the structure example, the FRU information specifically includes the following:

[0119] ①The I2C address of GPIO expansion chip 0 and the I2C address of GPIO expansion chip 1.

[0120] ②GPIO expansion chip 0 has a one-to-one mapping relationship with PCIe slot 0, and GPIO expansion chip 1 has a one-to-one mapping relationship with PCIe slot 1.

[0121] ③ Channel mapping relationship of the I2C switch; channel 1 (CH1) has a one-to-one mapping relationship with PCIe slot 0, and channel 2 (CH2) has a one-to-one mapping relationship with PCIe slot 1.

[0122] ④ The corresponding positions of the PCIe expansion card are in the following order from top to bottom: PCIe slot 0, PCIe slot 1.

[0123] ⑤ The relative position of the slot on the PCIe expansion card, combined with Figure 3 The backplane structure includes the following two cases:

[0124] Case 1: When the PCIe expansion card is inserted into "position 0", the corresponding physical silk screen on PCIe slot 0 is Slot1, and the corresponding physical silk screen on PCIe slot 1 is Slot2.

[0125] Case 2: When the PCIe expansion card is inserted into "Position 1", the corresponding physical silkscreen on PCIe slot 0 is Slot 4, and the corresponding physical silkscreen on PCIe slot 1 is Slot 5.

[0126] Steps S0 and S1 of this embodiment correspond to step S101 of the aforementioned embodiment.

[0127] Step S2: BIOS obtains the physical silkscreen address of the server where the PCIe devices on all PCIe slots are located through the above-mentioned ④PCIe slot sequence and the relative position of ⑤ slot on the PCIe expansion card, combined with the location of the PCIe expansion card. This step corresponds to step S102 of the above-mentioned embodiment.

[0128] Step S3: BIOS accesses the GPIO expansion chip corresponding to the PCIe slot in turn through the mapping relationship between the ②GPIO expansion chip and the PCIe slot, and obtains the PCIe device presence information, CPU address information and PCIe port address information on each PCIe slot according to the PRSNT signal of CPU0 / 1 / 2, PE0 / 1 / 2 / 3 and PCIe device. This step corresponds to step S103 in the above embodiment.

[0129] The PRSNT signal is an in-position indication signal, such as PRSNT1# and PRSNT2#, which are the signals corresponding to the hot-swap detection pins of the PCIe (PCI Express) card. On the PCIe card device, the PRSNT1# and PRSNT2# signals are short-circuited. The PRSNT1# of the PCIe slot is fixedly connected to the ground, and PRSNT2# is pulled up. In this embodiment, the PRSNT signal is used to indicate whether a PCIe device is inserted into the PCIe slot.

[0130] Step S4: BIOS scans the PCIe device to generate a PCIe identifier (Bus Device Function) according to the specified order of the PCIe slot bandwidth information, CPU address information and PCIe port address information, that is, binds a PCIe unique identifier to each PCIe device. BIOS passes the binding relationship between the PCIe device and the PCIe unique identifier to the BMC. This step corresponds to step S103 of the aforementioned embodiment.

[0131] In a specific example, BIOS uses PCIe Port0 of CPU0 to assign a BDF, such as BDF1, to the PCI device in PCIe slot 0. BIOS establishes a binding relationship between BDF1 and PCIe Port0 (or PCIe slot 0). The binding relationships of other PCIe ports are the same and will not be described one by one.

[0132] Step S5: BIOS scans the PCIe plug-in card according to the channel mapping relationship of ③I2C Switch and specifies the I2C address, that is, binds the I2C address to each PCIe device ⑦.

[0133] Step S6: BIOS combines the physical silk screen address of the server where the PCIe devices on all PCIe slots are located, the binding relationship between the PCIe device and the PCIe unique identifier, and the binding relationship between the PCIe device and the I2C address output in step S5 to establish a binding relationship between the physical silk screen address of the PCIe device, the PCIe device address and the I2C address.

[0134] BIOS uses the binding relationship between the physical silk-screen address of the PCIe device, the PCIe device address, and the I2C address to enable other functions related to the PCIe device address, such as asset information management, fault diagnosis and location, and heat dissipation strategy.

[0135] In addition, the method of this embodiment also includes: BIOS displays the binding relationship between the device PCIe device address, device slot silk screen, and I2C address on a display interface such as a BIOS interface and a BMC management website.

[0136] See also Figure 6 , is a silk screen binding method provided by another embodiment of the present invention, the execution subject of the method steps is BMC, wherein steps S0 to S2, step S3, step S5 and step S6 executed by BMC are all the same as Figure 5 The method flow shown is the same and will not be repeated here.

[0137] The different steps are S4, such as Figure 6 As shown, step S4': BMC receives the BDF unique identifier sent from BIOS. This step follows the above Figure 5Step S4 is shown. After the BMC receives the BDF unique identifier, or after receiving the binding relationship between the PCIe device and the PCIe unique identifier sent by the BIOS, step S5 is executed.

[0138] Step S5: The BMC controls channels 1 to 6 of the I2C Switch in sequence, and scans to obtain the I2C address of the PCIe device.

[0139] Step S6: The BMC establishes a binding relationship between the server system slot number, the physical slot silk screen, the PCIe address, and the I2C address.

[0140] It should be noted that the method provided in this embodiment can be executed by one processing module, such as BIOS or BMC, or by two or two processing modules simultaneously, such as BIOS and BMC synchronously executing the aforementioned Figure 3 , Figure 5 and Figure 6 The method shown in the figure. However, the method flow executed by BIOS is as follows Figure 3 and Figure 5 As shown, the method flow executed by BMC is as follows Figure 3 and Figure 6 It should be understood that if there are more processing modules, such as two or more BMCs, each BMC can be configured as follows: Figure 3 and Figure 6 The method flow shown is executed, and this embodiment takes two processing modules as an example.

[0141] The method provided in this embodiment has the following beneficial effects:

[0142] 1. The hardware is pre-configured on the I2C path of the motherboard Riser, so that the Riser card can indicate its different positions in the server system by connecting to different I2C buses. In terms of hardware design, the BMC and BIOS can have I2C access to the Riser card.

[0143] 2. Hardware: Decouple the software and hardware on the riser card design, perform I2C topology according to the pre-set software and hardware position relationship, and bind the slots according to the fixed channel rules. Perform the IO design of the GPIO expansion chip according to the fixed rules for the CPU_Addr and VPP_Addr representing the PCIe address information.

[0144] 3. BIOS develops code for physical silk screen information identification and address binding mechanism. This includes accessing different I2C channels to obtain information about risers at different locations, accessing GPIO expansion chips and obtaining PCIe address information through PCIe scanning sequence, and accessing riser FRU to obtain the physical slot silk screen of each riser slot. BIOS combines information to obtain the binding relationship between PCIe address information and physical slot silk screen, and sends the binding relationship to BMC.

[0145] 4. After receiving, BMC accesses different I2C channels to obtain information about Riser at different locations, such as accessing the GPIO expansion chip and passing the PCIe address information, accessing the FRU burning information to obtain the physical slot silkscreen of each slot on the Riser card, accessing different I2C channels on the Riser card and performing device address scanning to obtain the I2C address information of devices connected to different slots, and receiving the binding relationship between the PCIe address information and the physical slot silkscreen information transmitted by BIOS. BMC combines the information to obtain the binding relationship between the device PCIe address information, the device slot silkscreen information, and the device I2C address information.

[0146] The following is combined with the above Figure 3 , Figure 5 and Figure 6 The method flow and Figure 2 and Figure 4 The method provided in this embodiment is described by way of example. The details are as follows:

[0147] First, on the server motherboard, the BMC chip uses a chip with rich GPIO and I2C resources. BMC and BIOS can access the same riser card (such as a PCIe expansion card) in time-sharing by accessing the I2C arbitration chip. I2C arbitration chip 0 corresponds to insertion position 0, and I2C arbitration chip 1 corresponds to insertion position 1.

[0148] Then, the BMC and / or BIOS can access the riser cards located at "position 0" and "position 1" of the server by accessing two I2C arbitration chips 0 and I2C arbitration chips 0 with different addresses. All I2C devices on the riser card are hung on different channels of the I2C switch.

[0149] I2C switch channel 0 on the riser card is connected to storage units, such as EEPROM (FRU), temperature sensor (optional), GPIO expansion chip, etc. I2C switch channels 1 to 6 on the riser card are connected to the I2C on the PCIe CEM on PCIe slot 0 to PCIe slot 5 respectively.

[0150] To obtain the riser data of the server's "position 1", the BIOS controls the opening of I2C arbitration chip 1, controls the opening of I2CSwitch channel 0, obtains the upstream connector data, downstream connector data, and the physical slot silkscreen of "position 1" stored in the EEPROM (FRU), and after obtaining the total number of downstream connector slots, reads the physical slot silkscreen information corresponding to each slot, the IO status of the corresponding GPIO expansion chip, and the maximum bandwidth supported by each PCIe slot. The location information of other slots on the server is obtained in the same way.

[0151] BIOS analyzes the CPU and PCIe Port of the slot device according to the CPU_Addr, VPP_Addr and mapping table of PCIe slots 0 to 5. When BIOS performs PCIe scanning, it binds the server system slot number and slot silkscreen to each PCIePort of each CPU serial number. The VPP_Addr and PCIe Port mapping table is shown in Table 1.

[0152] Table 1. Mapping table of VPP_Addr and PCIe Port

[0153]

[0154] In Table 1, the PCIe port address information is VPP Addr, for example, VPP Addr: 0011. The VPP addr is converted into PCIe Port PE0 according to the relationship in Table 1. PE0 represents PCIe Port 0 (ie, PCIe port 0).

[0155] BIOS sends the server system slot number, physical slot silk screen and PCIe address binding data to BMC through the communication interface, and BMC receives, parses and saves it. The binding data is the BDF unique identifier established in the above step S4, that is, the association between the PCIe address and the physical slot number, such as slot 0.

[0156] BIOS sequentially controls channels 1 to 6 of the I2C switch to be turned on separately, and scans the I2C address of the PCIe device. Combining the server system slot number, physical slot silk screen and PCIe address binding data, it generates the binding relationship of the server system slot number, physical slot silk screen, PCIe address and I2C address, and applies the binding relationship to subsequent location information display, fault diagnosis and other functions.

[0157] Similarly, to obtain the riser data of server position 1, the BMC controls the opening of I2C arbitration chip 1 and I2C Switch channel 0, obtains the upstream connector data, downstream connector data, position 1 silk screen scheme data and other information stored in the EEPROM (FRU), and after obtaining the total number of downstream connector slots, reads the slot silk screen information corresponding to each slot, the IO status of the corresponding GPIO expansion chip and the maximum bandwidth information supported by the PCIe slot, etc.

[0158] BMC analyzes the CPU and PCIe port of the device in the slot according to the CPU_Addr, VPP_Addr and mapping table of PCIe slots 0 to 5. It analyzes and saves the server system slot number, slot silkscreen and PCIe address binding data sent by BIOS.

[0159] BMC sequentially controls channels 1 to 6 to turn on the I2C switches separately, and scans the I2C address of the PCIe device. Combined with the server system slot number, physical slot silk screen and PCIe address binding data, the binding data information of the server system slot number, physical slot silk screen, PCIe address and I2C address is generated, such as Figure 4 As shown in Table 2 below. It is also used for functions such as location information display, fault diagnosis, and slot-oriented cooling strategy control.

[0160] Table 2. Binding relationship between physical slot silk screen, PCIe address, and I2C address

[0161]

[0162] The method provided in this embodiment establishes a binding relationship between the server physical slot silk screen of the PCIe device and the PCIe address and I2C address, so that the BIOS and / or BMC can freely access the same device through the PCIe address or I2C path, solving the problem that the specified device cannot be managed.

[0163] In addition, this method also avoids the need to adapt BIOS / BMC firmware for newly developed PCIe expansion cards or for reuse in new product models, reducing the workload of hardware R&D and the workload of BIOS and BMC firmware development. Furthermore, in scenarios where PCIe device assets need to be managed or machines fail, effective information can be directly obtained through remote monitoring without the need for on-site measurement and analysis by engineers, thereby improving monitoring and operation efficiency.

[0164] In this embodiment, a silk screen binding device for a server plug-in card device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and will not be repeated hereafter. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0165] This embodiment provides a silk screen binding device, such as Figure 7 As shown, the silk screen binding device includes: a reading module 710, an acquisition module 720, a determination module 730 and an establishment module 740. In addition, the device may also include other more or fewer units or modules, such as a storage unit / storage module, a sending module, etc., which is not limited in this embodiment.

[0166] Among them, the reading module 710 is used to obtain the location of the PCIe expansion card in the server through the I2C bus access, and read the burning information through the I2C switch of the PCIe expansion card, and the burning information includes: the I2C address information of at least one expansion chip in the PCIe expansion card, the PCIe slot information and at least one mapping relationship.

[0167] The acquisition module 720 is used to acquire the physical slot silk screen of the server where the PCIe device is located on each PCIe slot according to the PCIe slot information and its mapping relationship, and scan to acquire the I2C address bound to each PCIe device.

[0168] The determination module 730 is used to determine at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information and at least one mapping relationship, and the in-place information of the PCIe device on each PCIe slot.

[0169] The establishment module 740 is used to establish a binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, at least one PCIe device address and the I2C address, and use the binding relationship to manage at least one PCIe device address.

[0170] The storage module is used to store various information, addresses, mapping relationships, etc.

[0171] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0172] The silk-screen binding device in this embodiment is presented in the form of a functional unit, which refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0173] This embodiment also provides a silk screen binding system. The structure of the system can be as described above. Figure 2 As shown, it includes a mainboard and at least one PCIe expansion card.

[0174] The mainboard includes at least one processing module, at least one arbitration chip and at least one high-speed connector; each of the PCIe expansion cards includes an I2C switch, a storage unit, at least one expansion chip and at least one PCIe slot. The at least one processing module is connected to at least one expansion chip of the PCIe expansion card through at least one arbitration chip and at least one high-speed connector;

[0175] The I2C switch connects the storage unit and at least one PCIe slot through different channels. The storage unit is used to store the burning information, which includes: I2C address information of at least one expansion chip, PCIe slot information and at least one mapping relationship.

[0176] Each processing module stores computer instructions, and the above-mentioned Figure 3 , Figure 5 and Figure 6 The silk screen binding method of the server external card device is shown.

[0177] Furthermore, the number of the processing modules may be one or more. If the number of the processing modules is one, the processing module is one of the BMC and the BIOS. If the number of the processing modules is two, the two processing modules are the BMC and the BIOS respectively. Figure 2 The system structure shows two processing modules, one is BIOS and the other is BMC.

[0178] It should be understood that the silk-screen binding system of this embodiment may further include more than two processing modules, such as more than two BMCs.

[0179] The present invention provides a silk screen binding device and system for server plug-in card devices, which obtains the PCIe expansion card position in the server through I2C bus access, reads the burning information of the hardware device, determines the physical slot silk screen of the server where the PCIe device is located, the I2C address bound to each PCIe device, and the PCIe device address according to the burning information, and establishes a binding relationship between the server silk screen address of the PCIe device and the PCIe address and I2C address, so that the BIOS or BMC can freely access the same device through the I2C path, solving the problem that the specified device cannot be managed. By establishing a binding relationship for management, the status of the PCIe device can be more effectively monitored and maintained, problems can be discovered and solved in a timely manner, and the reliability and maintainability of the entire system can be improved.

[0180] In addition, this embodiment also realizes fully automated binding of the PCIe address, I2C address and server slot silk screen address of the PCIe device, avoiding BIOS or BMC firmware adaptation for newly developed PCIe expansion cards or reused in new product models, reducing the workload of hardware research and development and BIOS / BMC firmware development.

[0181] The embodiment of the present invention further provides a processing module having the above Figure 7 Silkscreen binding device shown.

[0182] See also Figure 8 , is a schematic diagram of the structure of a processing module provided by an optional embodiment of the present invention, the processing module includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses for communication, and can be installed on a common mainboard or in other ways as needed. The processor can process instructions executed in the processing module, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface).

[0183] In some optional embodiments, multiple processors and / or multiple buses can be used with multiple memories and multiple storages if desired. Similarly, multiple units / modules can be connected, with each device providing part of the necessary operations (e.g., as a server array, a group of blade servers, or a multi-processor system). Figure 8 A processor 10 is taken as an example.

[0184] The processor 10 may be a central processing unit. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0185] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the silk screen binding method for the server external card device shown in the above embodiment.

[0186] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required by at least one function; the data storage area may store data created according to the use of the processing module, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the processing module via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0187] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0188] The processing module further includes a communication interface 30 for the computer device to communicate with other devices or a communication network, wherein the number of the communication interface 30 can be one or more.

[0189] In this example, the processing module is a manager, such as a BMC. Alternatively, the processing module may be a software or hardware module integrated with BIOS functions, and is used to execute the silk-screen binding method in the above-mentioned embodiment.

[0190] In addition, Figure 2 In addition to the application scenarios shown, the technical solution provided in this embodiment can also be used in servers, storage and switch products that bind the slot silk screen and device address of other multi-protocol devices.

[0191] An embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented by downloading through a network and originally stored in a remote storage medium, or a non-temporary machine-readable storage medium and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware.

[0192] The storage medium may be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid state drive, etc.; further, the storage medium may also include a combination of the above-mentioned types of memories. It is understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by the computer, processor or hardware, the method shown in the above embodiment is implemented.

[0193] Embodiments of the present application may also provide a computer program product, including computer program instructions, which, when executed by a processor, cause the processor to perform the steps in the above method. Wherein, the computer program product may be written in any combination of one or more programming languages ​​to perform program codes for performing the operations of the disclosed embodiments, wherein the programming languages ​​include object-oriented programming languages, such as Java, C++, etc., and also include conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on a user computing device, partially on a user device, as an independent software package, partially on a user computing device, partially on a remote computing device, or entirely on a remote computing device or server.

[0194] The above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, rather than to limit them. Although the embodiments of the present invention are described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A silk screen binding method for a server external card device, characterized in that: A processing module applied to a mainboard, the processing module being connected to a PCIe expansion card via an I2C bus, the method comprising: Obtaining the location of a PCIe expansion card in a server through an I2C bus access, and reading burning information through an I2C switch of the PCIe expansion card, wherein the burning information includes: I2C address information of at least one expansion chip in the PCIe expansion card, PCIe slot information, and at least one mapping relationship; According to the PCIe slot information and its mapping relationship, obtain the physical slot silk screen of the server where the PCIe device is located on each PCIe slot, and scan to obtain the I2C address bound to each PCIe device; Determine at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information, the at least one mapping relationship, and in-place information of a PCIe device on each of the PCIe slots; A binding relationship is established between the physical slot silk screen of the PCIe device on each PCIe slot, the at least one PCIe device address and the I2C address, and the at least one PCIe device is managed using the binding relationship.

2. The method according to claim 1, characterized in that The PCIe slot information includes: PCIe slot sequence and relative position of the slot on the PCIe expansion card; The obtaining, according to the PCIe slot information, a physical slot silk screen of a server where a PCIe device is located on each PCIe slot includes: According to the PCIe slot sequence and the relative positions of the slots on the PCIe expansion card, combined with the position of the PCIe expansion card, the physical slot silk screen of the PCIe device on each PCIe slot is obtained.

3. The method according to claim 1, characterized in that The at least one mapping relationship includes: a mapping relationship between the at least one expansion chip and at least one PCIe slot; The determining at least one PCIe device address according to the preset processor address, PCIe slot bandwidth information and the at least one mapping relationship, and the in-place information of the PCIe device on each of the PCIe slots includes: According to the mapping relationship, at least one expansion chip corresponding to the at least one PCIe slot is accessed, and according to a preset processor address, a relationship between each pin on a high-speed connector of a motherboard and the processor address, a presence signal of the at least one PCIe device, and PCIe slot bandwidth information, presence information, processor address information, and PCIe port address information of each PCIe device are obtained; If the processing module is a basic input and output system BIOS, scanning at least one PCIe device according to the processor address information and the PCIe port address information, and binding a unique identifier to each of the PCIe devices; The BIOS sends the binding relationship between the at least one PCIe device and the unique identifier to a baseboard management controller BMC; and At least one PCIe device address is determined according to the PCIe device presence information, the processor address information and the PCIe port address information.

4. The method according to claim 3, characterized in that The step of scanning at least one PCIe device according to the processor address information and the PCIe port address information and binding a unique identifier to each PCIe device includes: The BIOS assigns a unique identifier to a PCIe device on each PCIe slot according to the PCIe port of the processor address information; The BIOS establishes a binding relationship between the unique identifier and the PCIe port.

5. The method according to claim 3, characterized in that: The method further comprises: If the processing module is a BMC, the BMC receives a binding relationship between the at least one PCIe device and the unique identifier sent by the BIOS; The establishing of the binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, the at least one PCIe device address and the I2C address includes: The BMC establishes a binding relationship between the physical slot silk screen, the at least one PCIe device address and the I2C address according to the physical slot silk screen, the binding relationship between the at least one PCIe device address and the I2C address, and the binding relationship between the at least one PCIe device and the I2C address.

6. The method according to claim 1, characterized in that The obtaining of the I2C address bound to each of the PCIe devices comprises: Scan PCIe plug-in devices according to the channel mapping relationship of the I2C switch, bind an I2C address to each of the PCIe devices, and obtain the I2C address.

7. The method according to any one of claims 1 to 6, characterized in that: Before obtaining the location of the PCIe expansion card in the server through the I2C bus access, it also includes: Add a first pin representing the CPU address of the processor to the high-speed connector of the motherboard, and add a second pin representing the PCIe port address; The information of the first pin and the second pin is stored through at least one expansion chip.

8. A silk screen binding device for a server external card device, characterized in that: The device comprises: A reading module is used to obtain the location of a PCIe expansion card in a server through an I2C bus access, and read the burning information through the I2C switch of the PCIe expansion card, wherein the burning information includes: I2C address information of at least one expansion chip in the PCIe expansion card, PCIe slot information, and at least one mapping relationship; An acquisition module is used to acquire the physical slot silk screen of the server where the PCIe device is located on each PCIe slot according to the PCIe slot information and its mapping relationship, and to scan and acquire the I2C address bound to each PCIe device; A determination module, configured to determine at least one PCIe device address according to a preset processor address, PCIe slot bandwidth information, the at least one mapping relationship, and in-place information of a PCIe device on each of the PCIe slots; An establishment module is used to establish a binding relationship between the physical slot silk screen of the PCIe device on each PCIe slot, the at least one PCIe device address and the I2C address, and use the binding relationship to manage the at least one PCIe device address.

9. A silk screen binding system, characterized in that: Includes a mainboard and at least one PCIe expansion card; Wherein, the mainboard includes at least one processing module, at least one arbitration chip and at least one high-speed connector; each of the PCIe expansion cards includes an I2C switch, a storage unit, at least one expansion chip and at least one PCIe slot; The at least one processing module is connected to at least one expansion chip of the PCIe expansion card through the at least one arbitration chip and the at least one high-speed connector; The I2C switch connects the storage unit and the at least one PCIe slot through different channels, the storage unit is used to store burning information, and the burning information includes: I2C address information of the at least one expansion chip, PCIe slot information and at least one mapping relationship; Each of the processing modules stores computer instructions, and the silk-screen binding method for a server external card device according to any one of claims 1 to 7 is executed by executing the computer instructions.

10. The system according to claim 9, characterized in that If the number of the processing module is one, the processing module is a baseboard management controller BMC or a basic input and output system BIOS; If the number of the processing modules is two, the two processing modules are respectively a BMC and a BIOS.

Images