Full-automatic DRAM (Dynamic Random Access Memory) storage unit read-write function test method and system

Abstract

The invention relates to the technical field of automatic testing, and discloses a full-automatic DRAM (Dynamic Random Access Memory) storage unit read-write function testing method and system. Comprising an automatic storage unit construction module, an automatic storage unit input module, a storage unit data acquisition module, a data correction condition judgment module, a high resistance state correction model establishment module, a low resistance state correction model establishment module, a corrected result output module and a read-write function judgment module, the storage units are arranged in a matrix form to construct an automatic storage matrix, data are read from the storage units through a reader, the read data are compared with standard data provided by a data source, a data correction condition judgment model is established to judge whether the data need to be corrected or not, and high-impedance correction and low-impedance correction are performed. And the difference value between the high resistance state correction index and the low resistance state correction index of the storage unit is compared with the preset threshold value, whether the read-write function is normal or not is judged, and the reliability of the test result is improved.

Description

Technical Field

[0001] The present invention relates to the field of automated testing technology, and more specifically to a fully automatic DRAM storage unit read and write function testing method and system. Background Art

[0002] With the continuous advancement of information technology, the role of storage technology in computer systems has become increasingly prominent. As the core component of data storage and access, the performance and stability of the storage unit directly affect the operating efficiency and data security of the entire system. Therefore, reading and writing function tests on storage units have become a key link in ensuring the quality and performance of storage systems. As the main carrier of data storage and reading and writing, the performance and reliability of DRAM are directly related to the operating efficiency and stability of the entire system. Therefore, reading and writing function tests on DRAM storage units are an important means to ensure their quality and performance.

[0003] During long-term use, DRAM storage cells may experience abnormal read and write functions due to various factors. Traditional testing methods usually require manual intervention, which is not only inefficient but also prone to human errors. Due to temperature changes, voltage fluctuations, aging effects or manufacturing defects, the read and write performance of storage cells will gradually decline. In order to meet these challenges, data correction and abnormality detection of DRAM storage cell read and write functions are required. Therefore, the development of a fully automatic DRAM storage cell read and write function test system and method can effectively improve test efficiency and accuracy, and has important application value. Summary of the invention

[0004] In order to overcome the above defects of the prior art, the present invention provides a fully automatic DRAM storage unit read and write function test system to solve the problems existing in the above background technology.

[0005] The present invention provides the following technical solution: a fully automatic DRAM storage unit read-write function test system, comprising: an automatic storage unit construction module, an automatic storage unit input module, a storage unit data acquisition module, a data correction condition judgment module, a high-resistance state correction model establishment module, a low-resistance state correction model establishment module, a correction result output module and a read-write function judgment module; The automatic storage matrix construction module defines storage cells, the storage cells are arranged in a matrix form to construct an automatic storage matrix, and the address signals of the storage cells are obtained through an address decoder; The automatic storage unit entry module acquires data from a data source, stores the data in a storage unit corresponding to the address signal according to the address signal of the data, and starts a data reading function and a data updating function when receiving a data reading request; The storage unit data acquisition module starts the data reading function based on the automatic storage unit entry module, reads data from the storage unit through the reader, and transmits the read data to the data correction condition judgment module; The data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected; The high-impedance correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a high-impedance correction model to obtain a high-impedance correction index, and transmits the high-impedance correction index to the corrected result output module; The low-resistance state correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a low-resistance state correction model to obtain a low-resistance state correction index, and transmits the low-resistance state correction index to the corrected result output module; The correction result output module calculates the difference between the high-resistance correction index and the low-resistance correction index of the storage unit, and transmits the result to the read-write function judgment module; The read / write function determination module compares the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read / write function is normal.

[0006] Preferably, in the automatic storage matrix construction module, the automatic storage matrix includes n storage units, i=1, 2, 3, ..., n, wherein i represents the number of each storage unit.

[0007] Preferably, in the automatic storage unit entry module, the address signal of the data is obtained through an address decoder, and the data is stored in a storage unit corresponding to the address signal of the data, and the data update function is automatically started after the data reading function is completed.

[0008] Preferably, in the storage unit data acquisition module, data is read from the storage unit through a reader, and the data includes: the maximum value of the load impedance of the storage unit, the minimum value of the load impedance of the storage unit, the characteristic impedance value of the output end of the storage unit, the maximum value of the load capacitance of the storage unit during high-frequency movement, the minimum value of the load capacitance of the storage unit during low-frequency movement, and the rated capacitance value of the storage unit.

[0009] Preferably, the data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected. The specific contents are as follows: Step S01: reading data of n storage cells twice, and performing the second data reading after the data of the first data reading is updated; Step S02: m pieces of data are read from each storage unit, where j=1, 2, 3, ...m; wherein j represents the number of data read from each storage unit; Step S03: Reading data from each storage unit for the first time to form a data set ,in ; Each storage unit reads data for the second time to form a data set ,in ; Step S04: Calculate the data read error index of each storage unit, the calculation formula is: ,in Indicates the data read error index of each storage unit. Represents the standard data set provided by the data source in each storage unit. Indicates the preset allowable error coefficient of the system; Step S05: Calculate the secondary data read error index of each storage unit, the calculation formula is: ,in Represents the secondary data read error index of each storage unit; Step S06: When the primary data reading error index and the secondary data reading error index both meet the preset data reading error threshold, a difference calculation is performed on the primary data reading error index and the secondary data reading error index, and the calculation formula is: ,like If the data error fluctuation value is smaller than a preset data error fluctuation threshold, it is determined that the storage unit does not need to perform data correction; otherwise, the storage unit needs to perform data correction.

[0010] Preferably, in the high-impedance correction model establishment module, the data correction requirement of the data correction condition judgment module is received, and the high-impedance correction model is established to obtain the specific content of the high-impedance correction index as follows: Step S01: Calculate the high-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the high-resistance state reflection coefficient of the storage cell, Indicates the maximum load impedance of the storage unit, represents the characteristic impedance value of the output end of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the high impedance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the high-resistance correction index of the memory cell, Indicates the maximum value of the load capacitance during the high-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

[0011] Preferably, in the low-resistance correction model establishment module, the specific contents of receiving the data correction requirement of the data correction condition judgment module and establishing the low-resistance correction model to obtain the low-resistance correction index are as follows: Step S01: Calculate the low-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the low-resistance state reflection coefficient of the memory cell, represents the minimum value of the load impedance of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the low-resistance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the low resistance state correction index of the memory cell, Indicates the minimum value of the load capacitance during the low-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

[0012] Preferably, the correction result output module performs high-resistance correction and low-resistance correction on the data of the storage unit that needs data correction according to the high-resistance correction index and the low-resistance correction index, respectively, and calculates the difference between the high-resistance correction index and the low-resistance correction index of the n storage units after correction, and the calculation formula is: , where U represents the difference between the high-resistance correction index and the low-resistance correction index of the n memory cells after calculation and correction.

[0013] Preferably, the read / write function judgment module compares the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is greater than the preset threshold , the read / write function is judged to be abnormal, and an early warning is displayed. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is less than or equal to the preset threshold , then it is judged that the reading and writing functions are normal.

[0014] A fully automatic DRAM storage unit read and write function test method comprises the following steps: Step S1: define storage units, and arrange the storage units in a matrix form to construct an automatic storage matrix; Step S2: storing the data in a storage unit corresponding to the address signal according to the address signal of the data; Step S3: reading data from the storage unit through a reader; Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected; Step S5: Establishing a high-impedance state correction model to obtain a high-impedance state correction index; Step S6: establishing a low-resistance state correction model to obtain a low-resistance state correction index; Step S7: Calculate the difference between the high-resistance correction index and the low-resistance correction index of the memory cell.

[0015] Step S8: Compare the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read and write functions are normal.

[0016] Technical effects and advantages of the present invention: The present invention is provided with an automatic storage unit construction module, an automatic storage unit entry module, a storage unit data acquisition module, a data correction condition judgment module, a high-resistance correction model establishment module, a low-resistance correction model establishment module, a correction result output module and a read-write function judgment module. The storage units are arranged in a matrix form to construct an automatic storage matrix. Data is read from the storage unit by a reader, the read data is compared with standard data provided by a data source, a data correction condition judgment model is established to judge whether the data needs to be corrected, and high-resistance correction and low-resistance correction are performed. The difference between the high-resistance correction index and the low-resistance correction index of the storage unit is compared with a preset threshold value to judge whether the read-write function is normal, thereby realizing comprehensive testing and correction of the read-write function of the DRAM storage unit. Compared with the traditional testing method, the present invention not only improves the accuracy and efficiency of the test, but also can automatically identify and correct the read-write anomaly of the storage unit, thereby ensuring the integrity and reliability of the data. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The flowchart of a fully automatic DRAM storage unit read and write function test system is shown in FIG.

[0018] Figure 2 The present invention is a flow chart of a fully automatic DRAM storage unit read and write function testing method. DETAILED DESCRIPTION

[0019] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the present invention. In addition, the forms of the various structures recorded in the following embodiments are merely illustrative. The fully automatic DRAM storage unit read and write function test method and system involved in the present invention are not limited to the various structures recorded in the following embodiments. All other implementations obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the present invention.

[0020] like Figure 1 As shown, the present invention provides a fully automatic DRAM storage unit read and write function test system, including: an automatic storage unit construction module, an automatic storage unit entry module, a storage unit data acquisition module, a data correction condition judgment module, a high-resistance state correction model establishment module, a low-resistance state correction model establishment module, a correction result output module and a read and write function judgment module; The automatic storage matrix construction module defines storage cells, the storage cells are arranged in a matrix form to construct an automatic storage matrix, and the address signals of the storage cells are obtained through an address decoder; The automatic storage unit entry module acquires data from a data source, stores the data in a storage unit corresponding to the address signal according to the address signal of the data, and starts a data reading function and a data updating function when receiving a data reading request; The storage unit data acquisition module starts the data reading function based on the automatic storage unit entry module, reads data from the storage unit through the reader, and transmits the read data to the data correction condition judgment module; The data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected; The high-impedance correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a high-impedance correction model to obtain a high-impedance correction index, and transmits the high-impedance correction index to the corrected result output module; The low-resistance state correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a low-resistance state correction model to obtain a low-resistance state correction index, and transmits the low-resistance state correction index to the corrected result output module; The correction result output module calculates the difference between the high-resistance correction index and the low-resistance correction index of the storage unit, and transmits the result to the read-write function judgment module; The read / write function determination module compares the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read / write function is normal.

[0021] In this embodiment, it should be specifically explained that in the automatic storage matrix construction module, the automatic storage matrix includes n storage units, i=1, 2, 3, . . . , n, wherein i represents the number of each storage unit.

[0022] In this embodiment, it should be specifically explained that in the automatic storage unit entry module, the address signal of the data is obtained through the address decoder, and the data is stored in the storage unit corresponding to the address signal of the data, and the data update function is automatically started after the data reading function is completed.

[0023] In this embodiment, it should be specifically explained that in the storage unit data acquisition module, data is read from the storage unit through a reader, and the data includes: the maximum value of the load impedance of the storage unit, the minimum value of the load impedance of the storage unit, the characteristic impedance value of the output end of the storage unit, the maximum value of the load capacitance of the storage unit during high-frequency movement, the minimum value of the load capacitance of the storage unit during low-frequency movement, and the rated capacitance value of the storage unit.

[0024] In this embodiment, it should be specifically explained that, in the data correction condition judgment module, the data read by the storage unit data acquisition module and the standard data provided by the data source are received, and the data are compared to establish a data correction condition judgment model, and the specific contents of judging whether the data needs to be corrected are as follows: Step S01: reading data of n storage cells twice, and performing the second data reading after the data of the first data reading is updated; Step S02: m pieces of data are read from each storage unit, where j=1, 2, 3, ...m; wherein j represents the number of data read from each storage unit; Step S03: Reading data from each storage unit for the first time to form a data set ,in ; Each storage unit reads data for the second time to form a data set ,in ; Step S04: Calculate the data read error index of each storage unit, the calculation formula is: ,in Indicates the data read error index of each storage unit. Represents the standard data set provided by the data source in each storage unit. Indicates the preset allowable error coefficient of the system; Step S05: Calculate the secondary data read error index of each storage unit, the calculation formula is: ,in Represents the secondary data read error index of each storage unit; Step S06: When the primary data reading error index and the secondary data reading error index both meet the preset data reading error threshold, a difference calculation is performed on the primary data reading error index and the secondary data reading error index, and the calculation formula is: ,like If the data error fluctuation value is smaller than a preset data error fluctuation threshold, it is determined that the storage unit does not need to perform data correction; otherwise, the storage unit needs to perform data correction.

[0025] In this embodiment, it is necessary to specifically explain that, in the high-impedance correction model establishment module, the specific contents of receiving the data correction requirement of the data correction condition judgment module and establishing the high-impedance correction model to obtain the high-impedance correction index are as follows: Step S01: Calculate the high-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the high-resistance state reflection coefficient of the storage cell, Indicates the maximum load impedance of the storage unit, represents the characteristic impedance value of the output end of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the high impedance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the high-resistance correction index of the memory cell, Indicates the maximum value of the load capacitance during the high-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

[0026] In this embodiment, it is necessary to specifically explain that, in the low-resistance correction model establishment module, the specific contents of receiving the data correction requirement of the data correction condition judgment module and establishing the low-resistance correction model to obtain the low-resistance correction index are as follows: Step S01: Calculate the low-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the low-resistance state reflection coefficient of the memory cell, represents the minimum value of the load impedance of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the low-resistance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the low resistance state correction index of the memory cell, Indicates the minimum value of the load capacitance during the low-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

[0027] In this embodiment, it should be specifically explained that the correction result output module performs high-resistance correction and low-resistance correction on the data of the storage unit that needs data correction according to the high-resistance correction index and the low-resistance correction index, respectively. The specific contents are as follows: Step S01: The calculation formula for performing high impedance correction on the once read data in the storage unit that needs data correction is: ,in Indicates a read data after high impedance state correction of the storage unit that needs data correction; Step S02: The calculation formula for performing low-resistance correction on the secondary read data in the storage unit that needs data correction is: ,in Indicates a read data after low-resistance state correction of the storage unit that needs data correction; Step S03: Calculate the data after high-impedance correction and low-impedance correction, and the calculation formula is: ,in Indicates the data after high-impedance correction and low-impedance correction; Step S04: updating the high-resistance correction index and the low-resistance correction index of the n memory cells according to the data after the high-resistance correction and the low-resistance correction, and calculating the difference between the high-resistance correction index and the low-resistance correction index of the n memory cells after correction, the calculation formula is: , where U represents the difference between the high-resistance correction index and the low-resistance correction index of the n memory cells after calculation and correction.

[0028] In this embodiment, it should be specifically explained that the read / write function determination module compares the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit with the preset threshold value. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is greater than the preset threshold , the read / write function is judged to be abnormal, and an early warning is displayed. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is less than or equal to the preset threshold , then it is judged that the reading and writing functions are normal.

[0029] like Figure 2 As shown, in this embodiment, it should be specifically explained that a fully automatic DRAM storage unit read and write function test method includes the following steps: Step S1: define storage units, and arrange the storage units in a matrix form to construct an automatic storage matrix; Step S2: storing the data in a storage unit corresponding to the address signal according to the address signal of the data; Step S3: reading data from the storage unit through a reader; Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected; Step S5: Establishing a high-impedance state correction model to obtain a high-impedance state correction index; Step S6: establishing a low-resistance state correction model to obtain a low-resistance state correction index; Step S7: Calculate the difference between the high-resistance correction index and the low-resistance correction index of the memory cell.

[0030] Step S8: Compare the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read and write functions are normal.

[0031] In the present embodiment, it should be specifically explained that the difference between the present embodiment and the prior art lies mainly in that the present embodiment is provided with an automatic storage unit construction module, an automatic storage unit entry module, a storage unit data acquisition module, a data correction condition judgment module, a high-resistance correction model establishment module, a low-resistance correction model establishment module, a correction result output module and a read-write function judgment module, the storage units are arranged in a matrix form to construct an automatic storage matrix, data is read from the storage unit by a reader, the read data is compared with the standard data provided by the data source, a data correction condition judgment model is established to determine whether the data needs to be corrected, and high-resistance correction and low-resistance correction are performed, the difference between the high-resistance correction index and the low-resistance correction index of the storage unit is compared with a preset threshold value, whether the read-write function is normal is determined, and comprehensive testing and correction of the read-write function of the DRAM storage unit is achieved. Compared with the traditional testing method, the present invention not only improves the accuracy and efficiency of the test, but also can automatically identify and correct the read-write anomalies of the storage unit to ensure the integrity and reliability of the data.

[0032] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

[0033] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A fully automatic DRAM storage unit read and write function test system, characterized in that: include: Automatic storage unit construction module, automatic storage unit entry module, storage unit data acquisition module, data correction condition judgment module, high-resistance state correction model establishment module, low-resistance state correction model establishment module, correction result output module and read-write function judgment module; The automatic storage matrix construction module defines storage cells, the storage cells are arranged in a matrix form to construct an automatic storage matrix, and the address signals of the storage cells are obtained through an address decoder; The automatic storage unit entry module acquires data from a data source, stores the data in a storage unit corresponding to the address signal according to the address signal of the data, and starts a data reading function and a data updating function when receiving a data reading request; The storage unit data acquisition module starts the data reading function based on the automatic storage unit entry module, reads data from the storage unit through the reader, and transmits the read data to the data correction condition judgment module; The data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected; The high-impedance correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a high-impedance correction model to obtain a high-impedance correction index, and transmits the high-impedance correction index to the corrected result output module; The low-resistance state correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a low-resistance state correction model to obtain a low-resistance state correction index, and transmits the low-resistance state correction index to the corrected result output module; The post-correction result output module calculates the difference between the high-resistance correction index and the low-resistance correction index of the storage unit, and transmits the result to the read-write function judgment module; The read / write function determination module compares the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read / write function is normal.

2. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the automatic storage matrix construction module, the automatic storage matrix includes n storage units, i=1, 2, 3, ..., n, where i represents the number of each storage unit.

3. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the automatic storage unit entry module, the address signal of the data is obtained through the address decoder, and the data is stored in the storage unit corresponding to the address signal of the data. After the data reading function is completed, the data updating function is automatically started.

4. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the storage unit data acquisition module, data is read from the storage unit through a reader, and the data includes: the maximum value of the load impedance of the storage unit, the minimum value of the load impedance of the storage unit, the characteristic impedance value of the output end of the storage unit, the maximum value of the load capacitance of the storage unit during high-frequency movement, the minimum value of the load capacitance of the storage unit during low-frequency movement, and the rated capacitance value of the storage unit.

5. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the data correction condition judgment module, the data read by the storage unit data acquisition module and the standard data provided by the data source are received, and the data are compared to establish a data correction condition judgment model, and the specific contents of judging whether the data needs correction are as follows: Step S01: reading data of n storage units twice, and performing the second data reading after the data of the first data reading is updated; Step S02: m pieces of data are read from each storage unit, where j=1, 2, 3, ...m; Where j represents the data number read in each storage unit; Step S03: Reading data from each storage unit for the first time to form a data set ,in ; Each storage unit reads data a second time to form a data set ,in ; Step S04: Calculate the data read error index of each storage unit, the calculation formula is: ,in Indicates the data read error index of each storage unit. Represents the standard data set provided by the data source in each storage unit. Indicates the preset allowable error coefficient of the system; Step S05: Calculate the secondary data read error index of each storage unit, the calculation formula is: ,in Represents the secondary data read error index of each storage unit; Step S06: When the primary data reading error index and the secondary data reading error index both meet the preset data reading error threshold, a difference calculation is performed on the primary data reading error index and the secondary data reading error index, and the calculation formula is: ,like If the data error fluctuation value is smaller than a preset data error fluctuation threshold, it is determined that the storage unit does not need to perform data correction; otherwise, the storage unit needs to perform data correction.

6. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the high-impedance correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the high-impedance correction model is established to obtain the specific contents of the high-impedance correction index as follows: Step S01: Calculate the high-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the high-resistance state reflection coefficient of the storage cell, Indicates the maximum load impedance of the storage unit, represents the characteristic impedance value of the output end of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the high-resistance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the high-resistance correction index of the memory cell, Indicates the maximum value of the load capacitance during the high-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

7. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the low-resistance correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the low-resistance correction model is established to obtain the specific contents of the low-resistance correction index as follows: Step S01: Calculate the low-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the low-resistance state reflection coefficient of the memory cell, represents the minimum value of the load impedance of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the low-resistance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the low resistance state correction index of the memory cell, Indicates the minimum value of the load capacitance during the low-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

8. The fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: The correction result output module performs high-resistance correction and low-resistance correction on the data of the storage unit that needs data correction according to the high-resistance correction index and the low-resistance correction index, and calculates the difference between the high-resistance correction index and the low-resistance correction index of the n storage units after correction. The calculation formula is: , where U represents the difference between the high-resistance correction index and the low-resistance correction index of the n memory cells after calculation and correction.

9. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: The read / write function judgment module compares the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is greater than the preset threshold , the read / write function is judged to be abnormal, and an early warning is displayed. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is less than or equal to the preset threshold , then it is judged that the reading and writing functions are normal.

10. A fully automatic DRAM storage unit read / write function test method, used for using a fully automatic DRAM storage unit read / write function test system as claimed in any one of claims 1 to 9, characterized in that: The following steps are involved: Step S1: define storage units, and arrange the storage units in a matrix form to construct an automatic storage matrix; Step S2: storing the data in a storage unit corresponding to the address signal according to the address signal of the data; Step S3: reading data from the storage unit through a reader; Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected; Step S5: Establishing a high-impedance state correction model to obtain a high-impedance state correction index; Step S6: establishing a low-resistance state correction model to obtain a low-resistance state correction index; Step S7: Calculate the difference between the high-resistance correction index and the low-resistance correction index of the memory cell. Step S8: Compare the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read and write functions are normal.

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