Preparation method of piezoelectric resonator

Abstract

The invention provides a preparation method of a piezoelectric resonator, and the method comprises the steps: providing a first wafer which is provided with an anchoring region used for cooperating to form an anchoring part and a release region used for providing a vibration space for a resonance main body, and the release region is formed around the anchoring region; patterning the first wafer to form a plurality of grooves in the release area; providing a second wafer, wherein the second wafer comprises a third insulating layer and a second silicon layer which are stacked; the second wafer and the first wafer are bonded, a second silicon layer covers the groove to form a cavity, and the second silicon layer is provided with a main body area right opposite to the cavity and an anchor point area right opposite to the anchoring area; carrying out thinning processing on the second wafer; forming a driving function layer on the second silicon layer; the second silicon layer is selectively removed to form a resonant body in the body region, and an anchor is formed in the anchor point region in cooperation with the anchor region. Therefore, the anchor point can be arranged in the middle of the resonance main body, so that the reliability of the device is improved.

Description

Technical Field

[0001] The present application relates to the technical field of micro-electromechanical systems, and in particular to a method for preparing a piezoelectric resonator. Background Art

[0002] As one of the important units of electronic systems, oscillators have a wide range of applications. Currently, there are many types of oscillators. For example, electrostatic resonators and piezoelectric resonators are both common devices used to form oscillators. Compared with electrostatic resonators, piezoelectric resonators have a series of advantages such as low impedance and passivity. For the processing of piezoelectric resonators, because it is necessary to design multi-layer thin film processes and the release of resonators, most existing products and resonator process flows require pre-fabrication of Cavity-SOI (cavity-SOI) for early release of devices, or release of devices by back-side etching methods, etc.; however, the existing manufacturing method makes the design of the resonator relatively simple, and the anchor position must be placed on both sides of the resonator body, resulting in poor reliability of the device. Summary of the invention

[0003] In view of this, the present application provides a method for preparing a piezoelectric resonator, which can set the anchor point position in the middle position of the resonant body to improve the reliability of the device.

[0004] The present application provides a method for preparing a piezoelectric resonator, wherein the piezoelectric resonator has a resonant body for vibration and an anchor connected to the resonant body and used for fixing. The preparation method comprises: providing a first wafer, wherein the first wafer comprises a first silicon layer and a first insulating layer which are stacked, and has an anchoring area for cooperating to form the anchoring area and a release area for providing a vibration space for the resonant body, wherein the release area is formed around the anchoring area. The first wafer is patterned to form a plurality of grooves in the release area. A second wafer is provided, wherein the second wafer comprises a third insulating layer and a second silicon layer which are stacked. The second wafer is bonded to a side of the first wafer which is provided with the plurality of grooves, wherein the second silicon layer covers the grooves to form a cavity, and the second wafer has a main body area which is arranged opposite to the cavity and an anchor point area which is arranged opposite to the anchoring area. The second wafer is thinned to remove the third insulating layer. A driving function layer is formed on the second silicon layer. The second silicon layer is selectively removed to form the resonant body in the body region, and the anchor is formed in the anchor point region in cooperation with the anchor region.

[0005] In some embodiments, before the second wafer is bonded to the first wafer, the process further includes: performing a first doping treatment on the second silicon layer to form a second silicon layer containing doped ions.

[0006] In some embodiments, after thinning the second wafer to remove the third insulating layer and before forming the driving function layer on the second silicon layer, it also includes: performing a second doping treatment on the second silicon layer to form a second silicon layer containing doped ions.

[0007] In some embodiments, patterning the first wafer includes: forming a plurality of positioning grooves in a region close to an edge of the first wafer.

[0008] In some embodiments, the first wafer is formed by performing double-sided thermal oxidation treatment on a silicon wafer, and comprises the first insulating layer, the first silicon layer, and the second insulating layer which are stacked.

[0009] In some embodiments, the second wafer becomes a silicon-on-insulator wafer with a three-layer structure, including the second silicon layer, the third insulating layer and the third silicon layer stacked in layers; and when the second wafer is thinned, the third silicon layer and the third insulating layer are removed.

[0010] In some embodiments, the driving function layer includes a piezoelectric layer and a top electrode stacked on the second silicon layer, wherein the second silicon layer containing doped ions is disposed as a bottom electrode and opposite to the top electrode on both sides of the piezoelectric layer.

[0011] In some embodiments, the driving function layer includes a bottom electrode, a piezoelectric layer, and a top electrode stacked on the second silicon layer to drive the resonant body to vibrate.

[0012] In some embodiments, after forming the driving function layer on the second silicon layer and before selectively removing the second silicon layer, the method further includes: forming an insulating protection layer on the driving function layer and performing corresponding etching treatment.

[0013] In some embodiments, the resonant body includes a plurality of separately arranged vibrators, the plurality of vibrators are arranged around the anchor, and at least two vibrators are located on opposite sides of the anchor, and each vibrator is connected to the anchor via a corresponding connecting beam.

[0014] The present application provides a method for preparing a piezoelectric resonator, wherein a first wafer has an anchoring area for cooperating to form an anchor and a release area for providing a vibration space for a resonant body, wherein the release area is formed around the anchoring area, and the release area of ​​the first wafer is first etched to form a groove, and then a second wafer is bonded to the first wafer, and thinned, etc., and a second silicon layer is selectively removed to form a resonant body in the main area, and an anchor is formed in the anchor area in cooperation with the anchor area, wherein the main area is arranged opposite to the groove, and the anchor area is arranged opposite to the anchoring area, and the resonant body formed can be arranged around the anchor, so that the anchor is formed in the middle position around the resonant body, thereby improving the reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 is a schematic flow chart of a method for preparing a piezoelectric resonator provided in the present application;

[0017] Figure 2-Figure 16 It is a schematic diagram of the process structure of the method for preparing a piezoelectric resonator provided by the present application;

[0018] Fig.17 It is a schematic diagram of the planar structure of the piezoelectric resonator provided by the present application. DETAILED DESCRIPTION

[0019] The technical solutions in the embodiments of the present application are clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0020] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the description of the present application, the meaning of "several" is at least one, such as one, two, etc., unless otherwise clearly and specifically defined.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by a person skilled in the art to which this application belongs. The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more related listed items. The terms "connection", "electrical connection", and "electrical connection" used herein include any direct and indirect electrical or structural connection means. Therefore, if the text describes a first device coupled / connected / electrically connected to a second device, it means that the first device can be directly electrically / structurally connected to the second device, or indirectly electrically / structurally connected to the second device through other devices or connection means.

[0022] A piezoelectric resonator is a resonant device based on the piezoelectric effect. It has a resonant body for vibration and an anchor connected to the resonant body for fixing. Piezoelectric resonators can be divided into quartz crystal resonators, piezoelectric ceramic resonators, and piezoelectric MEMS resonators, depending on the materials and manufacturing processes.

[0023] See also Figure 1-Figure 17 , Figure 1 is a schematic flow chart of a method for preparing a piezoelectric resonator provided in the present application; Figure 2-Figure 16 It is a schematic diagram of the process structure of the method for preparing a piezoelectric resonator provided by the present application; Fig.17 Schematic diagram of the planar structure of the piezoelectric resonator provided by the present application. The present application provides a method for preparing a piezoelectric resonator, which specifically includes:

[0024] S11 . Provide a first wafer 100 .

[0025] In some embodiments, the first wafer 100 has a multilayer structure. Specifically, the first wafer 100 includes a first silicon layer 110 and a first insulating layer 120 which are stacked. In this case, the first insulating layer 120 can be used as a hard mask layer in subsequent processes to reduce the process of the hard mask layer. The first insulating layer 120 is a silicon oxide layer or other, which is not limited here. The first silicon layer 110 is composed of silicon.

[0026] Of course, it is not limited thereto, the first wafer 100 may further include a second insulating layer 130 disposed on the other side of the first silicon layer 110 and disposed opposite to the first insulating layer 120. In this case, the second insulating layer 130 may be used to protect the first silicon layer 110 in subsequent processes, reduce the surface stress of the first silicon layer 110, and reduce the risk of cracking of the first silicon layer 110, thereby further improving the reliability of the device. The second insulating layer 130 is a silicon oxide layer or other.

[0027] See also Figure 2 and Figure 3, the first wafer 100 can be formed by a silicon wafer subjected to double-sided thermal oxidation treatment. Specifically, a silicon wafer is provided, and the silicon wafer is subjected to thermal oxidation treatment to generate silicon oxide layers on the upper and lower surfaces of the silicon wafer. Among them, the remaining silicon layer of the silicon wafer is the first silicon layer 110; the two silicon oxide layers on the upper and lower surfaces are the first insulating layer 120 and the second insulating layer 130 respectively. Of course, it is not limited to this, and the first wafer 100 can also be formed by depositing an insulating layer on the surface of a silicon wafer. Specifically, a silicon wafer is provided, and a silicon oxide layer is deposited on one surface of the silicon wafer using a CVD (Chemical Vapor Deposition) process as the first insulating layer 120. Among them, the silicon wafer is the first silicon layer 110. In addition, of course, a silicon oxide layer can also be deposited on the other surface of the silicon wafer as the second insulating layer 130.

[0028] S12 , performing patterning on the first wafer 100 to form a plurality of grooves 112 .

[0029] See also Figure 3 The first wafer 100 has a release area P1 and an anchoring area P2. The anchoring area P2 is used to cooperate to form an anchor. The release area P1 is used to provide a vibration space for the resonant body. The release area P1 is arranged around the anchoring area P2. Specifically, the release area P1 is roughly formed into an annular area, and the anchoring area P2 is located at the center of the annular area.

[0030] In this step, a plurality of grooves 112 are formed in the release region P1. Specifically, the first insulating layer 120 and a portion of the first silicon layer 110 located at corresponding positions in the release region P1 are selectively removed, so that a plurality of grooves 112 can be formed in the release region P1.

[0031] For example, the first insulating layer 120 is patterned using a photolithography process to remove the first insulating layer 120 at the corresponding position in the release area P1, thereby forming a plurality of openings. The first silicon layer 110 is then etched, and the patterned first insulating layer 120 can be used as a hard mask in the current etching process, such as etching the first silicon layer 110 using a DRIE (Deep Reactive Ion Etching) process, thereby forming corresponding grooves 112 at the locations of the openings.

[0032] In some embodiments, at least two of the plurality of grooves 112 are disposed on both sides of the anchoring region P2, and the anchoring region P2 is located between the two grooves. Preferably, at least two grooves 112 are located on opposite sides of the anchoring region P2. The plurality of grooves 112 are symmetrically disposed around the anchoring region P2. In other embodiments, the plurality of grooves 112 may be interconnected to form an annular groove or a semi-enclosed groove surrounding the anchoring region P2. In this case, the anchoring region P2 may be formed as a boss protruding relative to the peripheral groove to serve as a support portion 111 for subsequent cooperation to form an anchor.

[0033] In one embodiment, in step S12, a plurality of positioning grooves 144 are formed in an area near the edge of the first wafer 110. The grooves 112 and the positioning grooves 144 both penetrate the first insulating layer 120 and a portion of the first silicon layer 110. The positioning grooves 144 formed in the edge area are used for positioning in subsequent processes to improve positioning efficiency, thereby shortening the production cycle and reducing costs.

[0034] S13, providing a second wafer 200.

[0035] In some embodiments, see Figure 6 and Figure 7 , the second wafer 200 has a multilayer structure. Specifically, the second wafer 200 includes a second silicon layer 220 and a third insulating layer 210 which are stacked. Among them, the second silicon layer 220 is composed of silicon. The second silicon layer 220 is used as a device layer to form the resonant body of the piezoelectric resonator 10. The third insulating layer 210 can be a silicon oxide layer or other layers, which are not limited here. The third insulating layer 210 can be used to support the second silicon layer 220, so as to facilitate the bonding of the second silicon layer 220 to the first wafer 100 in subsequent processes.

[0036] Alternatively, the second wafer 200 includes a stacked second silicon layer 220, a third insulating layer 210, and a third silicon layer 230. The second silicon layer 220 can be used as a device layer to form a resonant body, etc. The third silicon layer 230 uses bulk silicon material as a substrate layer for support, so as to facilitate the bonding of the second silicon layer 220 and the first wafer 100 in subsequent processes.

[0037] In some embodiments, the second wafer 200 may be formed using a SOI (Silicon On Insulator) wafer preparation process. The thickness of the second silicon layer 220 may be precisely designed based on the existing SOI wafer preparation process, thereby precisely controlling the thickness of the resonant body.

[0038] In this step, the second silicon layer 220 may be subjected to a first doping treatment to form the second silicon layer 220 containing doped ions. Figure 7, a PSG layer 300 (phosphate layer) is deposited on the side of the second silicon layer 220 away from the third insulating layer 210, and then annealing is performed, so that the corresponding ions in the PSG layer 300 can be doped into the second silicon layer 220, thereby achieving doping of the second silicon layer 220. In this case, the second silicon layer 220 can be used as a device layer to form the resonant body of the piezoelectric resonator 10. Doping the second silicon layer 220 in the second wafer 200 can effectively reduce the temperature frequency coefficient TCF, thereby reducing the influence of temperature on the piezoelectric resonator 10, thereby improving the reliability of the device. In addition, the doping concentration of the ions in the second silicon layer 220 can be controlled by doping and annealing times, which is convenient for operation.

[0039] S14 , bonding the second wafer 200 to the first wafer 100 .

[0040] Specifically, see Figure 8 The second wafer 200 is bonded to a surface of the first wafer 100 having the grooves 210 , where the second silicon layer 220 covers each groove to form a corresponding cavity 240 .

[0041] In some embodiments, the second wafer 200 may have a main region D1 and an anchor region D2, wherein the main region D1 refers to a region directly opposite to the cavity 240 and the anchor region D2 refers to a region directly opposite to the anchor region P2.

[0042] S15 , performing a thinning process on the second wafer 200 .

[0043] In some embodiments, the second wafer 200 is formed as a multi-layer structure with a relatively thick thickness. The second wafer 200 needs to be thinned so that the thickness meets the subsequent process requirements and the thickness of the formed resonant body meets the design requirements. Figure 8 and Fig. 9 , the second wafer 200 includes a second silicon layer 220, a third insulating layer 210, and a third silicon layer 230 which are stacked. The third insulating layer 210 and the third silicon layer 230 are removed by a thinning process. The second silicon layer 220 is retained, and the second silicon layer 220 is used as a device layer to form a resonant body later. In this case, the thickness of the second silicon layer 220 can be accurately controlled according to the manufacturing process of the SOI wafer, thereby achieving accurate control of the thickness of the resonant body.

[0044] Alternatively, the second wafer 200 includes a stacked second silicon layer 220 and a third insulating layer 210. In this case, the third insulating layer 210 can be removed by a thinning process.

[0045] In other degraded embodiments, the second wafer 200 can be a single silicon wafer. In this case, the second wafer 200 is bonded to the first wafer 100. Since a too thin silicon wafer is prone to breakage during the bonding process, the thickness of the second wafer 200 is relatively thick. After bonding, the second wafer 200 needs to be thinned. At this time, the error of the thinning process causes the thickness to be more difficult to accurately control than the second wafer 200 using a multi-layer structure. In addition, due to the setting of the cavity 240 below the second wafer 200, it is also easy to break when thinning the silicon wafer. In other words, the second wafer 200 is additionally provided with a third insulating layer 210 and a third silicon layer 230. Compared with the second wafer 200 using a single silicon wafer, the thickness can be better controlled, and the risk of breakage is effectively reduced, thereby improving the reliability of the device.

[0046] In this embodiment, the second wafer 200 may be thinned by mechanical thinning and CMP (Chemical Mechanical Polishing).

[0047] In this step, after the second wafer 200 is thinned, the remaining second silicon layer 220 of the second wafer 200 may be subjected to a second doping process to form a second silicon layer 220 containing doped ions. Fig.10 The PSG layer 300' is annealed to heavily dope the side of the second silicon layer 220 facing away from the first wafer 100 to form a second silicon layer 220 containing doped ions, so that the doping concentration of the second silicon layer 220 is more uniform, thereby further reducing TCF and improving the conductivity of the second silicon layer 220.

[0048] S16 , forming a driving function layer on the second wafer 200 .

[0049] In an embodiment of the present application, the driving function layer is used to drive the resonant body to vibrate after receiving a driving signal. In some embodiments, the driving function layer may include a bottom electrode, a piezoelectric layer 400 and a top electrode 500 that are stacked.

[0050] In some embodiments, a first conductive layer, a piezoelectric material layer, and a second conductive layer are deposited on the second silicon layer 220, and corresponding patterning is performed to form a driving function layer. Specifically, a layer of conductive material is deposited on the second silicon layer 220 to form a first conductive layer, and a layer of piezoelectric material is deposited on the first conductive layer to form a piezoelectric material layer; then, the piezoelectric material layer is patterned by dry etching to form a piezoelectric layer 400; then, the first conductive layer is patterned by dry etching or wet etching to form a bottom electrode; then, a layer of conductive material is deposited on the piezoelectric layer 400 to form a second conductive layer, and a photoresist is deposited on the second conductive layer and patterned; then, the second conductive layer is patterned using the patterned photoresist as a mask to form a top electrode 500, and the bottom electrode, piezoelectric layer 400, and the top electrode 500 formed constitute the driving function layer.

[0051] Of course, it is not limited to this. The present application may also adopt other process steps to form the driving function layer. For example, the first conductive layer may be patterned to form a bottom electrode, and then a piezoelectric material layer is formed on the bottom electrode and patterned to form a piezoelectric layer 400; then, a second conductive layer is deposited on the piezoelectric layer 400, and a photoresist is deposited on the second conductive layer, and the photoresist is patterned; then, the top conductive material layer is patterned using the patterned photoresist as a mask to form a top electrode 500.

[0052] In another embodiment, see Fig.11 and Fig.12 , since the doped second silicon layer 220 has good conductivity, the second silicon layer 220 can serve as the bottom electrode, and there is no need to set an additional bottom electrode on the second silicon layer 220. In this case, the driving function layer includes a stacked piezoelectric layer 400 and a top electrode 500. That is, by depositing a piezoelectric material layer and a second conductive layer on the second silicon layer 220, and performing corresponding patterning, the piezoelectric layer 400 and the top electrode 500 constituting the driving function layer are formed, and the second silicon layer 220 directly serves as the bottom electrode.

[0053] In some embodiments, the first conductive layer may be made of metal material or degenerately doped polysilicon. In some embodiments, the second conductive layer may be made of metal material or degenerately doped polysilicon. In the present application, the top electrode 500 formed of degenerately doped polysilicon has a better anti-fatigue effect than the top electrode 500 formed of metal material, thereby further improving the reliability of the device.

[0054] It should be noted that both the bottom electrode and the top electrode 500 need to be electrically connected to the outside world. In order to facilitate wiring, during the patterning process, the piezoelectric layer 400 and the top electrode 500 can form an opening as an electrical connection hole to expose the bottom electrode. The electrical connection hole can be filled with a conductive material to lead the bottom electrode to the upper surface of the driving function layer. Of course, it is not limited to this. The bottom electrode can also be led to the upper surface of the driving function layer through the edge of the piezoelectric layer 400. It can be understood that when the driving function layer is patterned, the corresponding position can be removed according to the designed resonant body shape to expose the device layer below, so as to facilitate subsequent etching to form the resonant body.

[0055] In some embodiments, in step S16, a conducting pad 900 connected to the bottom electrode and the top electrode 500 may be formed on the driving function layer. There are at least two conducting pads 900, which are electrically connected to the bottom electrode and the top electrode 500, respectively.

[0056] In some embodiments, see Fig.14 In step S16, the method further includes: forming an insulating protective layer 1000 on the driving function layer. The insulating protective layer 1000 may be made of silicon oxide or other insulating materials, which are not limited here. The insulating protective layer 1000 may be formed by a deposition process. It is understood that, see Fig.15 , the bottom electrode and the top electrode need to be electrically connected to the outside world, so the insulating protective layer 1000 needs to be etched, and the insulating protective layer 1000 is selectively removed to form a plurality of electrical connection holes, which respectively expose the top electrode 500, the bottom electrode and the area to be etched, and the conductive pad 900 is arranged in the connection holes located in the edge area and the middle area. In the present application, the insulating protective layer 1000 is arranged on the driving function layer to protect the driving function layer, so as to reduce the influence on the driving function layer in the subsequent processing process, thereby ensuring the performance of the piezoelectric resonator 10.

[0057] S17 , selectively removing the second silicon layer 220 to form a resonant body and an anchor 600 .

[0058] In this step, see Fig.16 , the second silicon layer 220 in the second wafer 200 is selectively removed as a device layer to form a resonant body, and the resonant body may include a vibrator for vibration and a connecting beam connected to the vibrator. Among them, the second silicon layer 220 can be selectively removed by an etching process. Specifically, the second silicon layer 220 located in the main area D1 (and the driving function layer above the second silicon layer 220, etc.) is selectively etched to form a resonant body; the second silicon layer 220 located in the anchor area D2 cooperates with the support part 111 below (i.e., the anchoring area P2) to form an anchor 600. The connecting beam in the resonant body can be used to connect the anchor 600 and the vibrator 700.

[0059] In some embodiments, the second silicon layer 220 is selectively etched until it is penetrated, forming a through hole 800 that penetrates the driving function layer and the second silicon layer 220 and communicates with the cavity 240 below. The presence of the cavity 240 can directly release the resonant body formed by etching, providing a vibration space for the resonant body.

[0060] It is understandable that, depending on the shape of the resonant body, the position to be etched in step S17 is also different. Fig.17 The vibrators 700 shown are generally formed into a square structure and are in multiple numbers, and are arranged on the peripheral side of the anchor 600, and the connecting beams connecting the vibrators 700 are straight beams. The present application is not limited thereto, and a resonance body with different structures can be formed by etching different positions of the main body area D1, without too many restrictions, for example, the vibrators in the resonance body can be formed into a tuning fork shape, one or more circles, etc., and the connecting beams in the resonance body can be formed into a straight beam, a folded beam, or an arc beam, etc.

[0061] In some embodiments, the resonant body includes a plurality of separately arranged vibrators 700. The plurality of vibrators 700 are arranged around the anchor 600. At least two vibrators 700 are located on opposite sides of the anchor 600, and each vibrator 700 is connected to the anchor 600 via a corresponding connecting beam. In this case, the anchor 600 can be located in the middle area of ​​the resonant body, which can improve the reliability of the piezoelectric resonator device.

[0062] Optionally, the plurality of grooves 112 formed on the first wafer 100 in step 12 may correspond to the vibrators one by one. That is, the main area D1 directly opposite to each groove 112 may be etched to form a vibrator 700 and a corresponding connecting beam.

[0063] Of course, it is not limited to this. Each groove 112 formed on the first wafer 100 in step 12 may also correspond to a plurality of vibrators. That is, the main area D1 opposite to each groove 112 may be etched to form a plurality of separately arranged vibrators 700 and corresponding connecting beams. Preferably, the plurality of vibrators 700 are arranged around the peripheral side of the anchor 600. The anchor 600 is roughly located in the middle area of ​​the plurality of vibrators 700, which can improve the reliability of the piezoelectric resonator device.

[0064] In the present application, the first wafer 100 has an anchoring area P2 for cooperating to form an anchor 600 and a release area P1 for providing a vibration space for the resonant body. The release area P1 is formed around the anchoring area P2. The release area P1 of the first wafer 100 is first etched to form a groove 112. After that, the second wafer 200 is bonded to the first wafer 100, and thinning treatment is performed, etc., and the second wafer 200 is selectively removed to form a resonant body in the main area D1, and the anchor area P2 is formed in the anchor area D2 to cooperate with the anchor area 600. Among them, the main area D1 is arranged opposite to the groove 112, and the anchor area D2 is arranged opposite to the anchoring area P2. The resonant body formed can be arranged around the anchor 600, so that the anchor 600 is formed in the middle position around the resonant body, thereby improving the reliability of the device.

[0065] The preparation method provided in the present application does not impose any constraints on the design, and the anchor 600 is set to be located in the middle area, which can reduce the anchor point loss and reduce the size of the device; in addition, the process and etching line width used in the preparation method provided in the present application do not produce large differences, that is, the process adaptability of the present production method is high, and it can be applied to resonators with any in-plane / out-of-plane vibration mode, and has a wide range of applications.

[0066] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structural or equivalent process transformations made using the contents of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A method for preparing a piezoelectric resonator, wherein the piezoelectric resonator has a resonant body for vibration and an anchor connected to the resonant body and used for fixing, characterized in that: The preparation method comprises: Providing a first wafer, the first wafer comprising a first silicon layer and a first insulating layer stacked together, and having an anchoring region for cooperating to form the anchor and a release region for providing a vibration space for the resonant body, wherein the release region is formed around the anchoring region; Performing patterning on the first wafer to form a plurality of grooves in the release area; Providing a second wafer, wherein the second wafer includes a third insulating layer and a second silicon layer which are stacked; Bonding a side of the second wafer provided with the second silicon layer to a side of the first wafer provided with the plurality of grooves, wherein the second silicon layer covers the grooves to form a cavity, and the second wafer has a main body area arranged opposite to the cavity and an anchor point area arranged opposite to the anchor area; Performing a thinning process on the second wafer to remove the third insulating layer; forming a driving function layer on the second silicon layer; The second silicon layer is selectively removed to form the resonant body in the body region, and the anchor is formed in the anchor point region in cooperation with the anchor region.

2. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: Before the second wafer is bonded to the first wafer, the method further includes: The second silicon layer is subjected to a first doping treatment to form a second silicon layer containing doping ions.

3. The method for preparing a piezoelectric resonator according to claim 2, characterized in that: After the second wafer is thinned to remove the third insulating layer and before the driving function layer is formed on the second silicon layer, the method further includes: The second silicon layer is subjected to a second doping treatment to form a second silicon layer containing doping ions.

4. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: The process of patterning the first wafer includes: forming a plurality of positioning grooves in an area close to an edge of the first wafer.

5. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: The first wafer is formed by performing double-sided thermal oxidation treatment on a silicon wafer, and comprises the first insulating layer, the first silicon layer and the second insulating layer which are stacked.

6. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: The second wafer becomes a silicon-on-insulator wafer with a three-layer structure, including the second silicon layer, the third insulating layer and the third silicon layer which are stacked; and when the second wafer is thinned, the third silicon layer and the third insulating layer are removed.

7. The method for preparing a piezoelectric resonator according to claim 2 or 3, characterized in that: The driving function layer includes a piezoelectric layer and a top electrode stacked on the second silicon layer, wherein the second silicon layer containing doped ions is used as a bottom electrode and is arranged opposite to the top electrode on both sides of the piezoelectric layer.

8. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: The driving function layer includes a bottom electrode, a piezoelectric layer and a top electrode stacked on the second silicon layer to drive the resonance body to vibrate.

9. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: After forming the driving function layer on the second silicon layer and before selectively removing the second silicon layer, the method further includes: An insulating protection layer is formed on the driving function layer, and a corresponding etching process is performed.

10. The method for preparing a piezoelectric resonator according to claim 1, characterized in that: The resonant body comprises a plurality of separately arranged vibrators, the plurality of vibrators are arranged around the anchor, and at least two vibrators are located on opposite sides of the anchor, and each vibrator is connected to the anchor via a corresponding connecting beam.

Images