AVS3-oriented intra-frame prediction mode decision device and method
By designing an intra prediction mode decision-making device and method for AVS3, the existing video encoding standards solve the problems of high computational complexity and unstable video quality when processing ultra-high resolution videos, and achieve more efficient coding and more stable video quality.
Patent Information
- Application Number
- CN202411334238.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-24
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2044-09-24
AI Technical Summary
The existing video encoding standards are highly complex when processing ultra-high resolution videos, which increases the hardware resource burden, and are limited in applications on low power consumption and mobile devices. The motion estimation of fast motion scenarios is inaccurate, resulting in video Quality decline.
A method for intra prediction mode decision making device and method for AVS3 is designed. Through the mode rough selection module, mode decision making module and pipeline control module, block type is selected, and prediction mode is adaptively screened to reduce the complexity of the algorithm, and the pipeline control is controlled without Slot to switch prediction mode.
It effectively reduces the complexity of encoding algorithms and hardware resource requirements, improves encoding efficiency and video quality, and is suitable for low-power and mobile devices.
Smart Images

Figure CN119402642A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of video coding technology, and in particular to an intra-frame prediction mode decision device and method for AVS3. Background Art
[0002] In the modern video communication and entertainment industry, there is a growing demand for efficient video coding technology. In particular, in the transmission and storage of 4K and 8K ultra-high-definition video content, traditional video coding methods face severe challenges. These application scenarios require encoders to work at higher compression rates while maintaining video quality to adapt to bandwidth-limited network environments and storage media.
[0003] Currently, a variety of video coding standards are widely used in the field of video coding, such as Advanced Video Coding (H.264 / AVC) and High Efficiency Video Coding (H.265 / HEVC). These standards significantly improve compression efficiency by introducing more complex coding tools and technologies, such as multiple prediction modes, transform quantization, loop filtering, etc. In addition, these standards also support scalable coding unit sizes to adapt to different resolutions and coding requirements.
[0004] Although existing video coding standards have made significant progress in compression efficiency, they still have some defects when processing ultra-high-resolution videos. First, as the size of the coding unit increases, the computational complexity of the encoding process increases significantly, which not only increases the computational burden of the codec, but also prolongs the encoding and decoding time, especially on devices with limited hardware resources. Second, in order to process high-resolution videos, existing technologies often require higher memory bandwidth and processing power, which limits their application on low-power and mobile devices. In addition, existing coding standards may suffer from inaccurate motion estimation when processing fast-motion scenes, resulting in a decrease in the quality of the encoded video. Summary of the invention
[0005] The embodiments of the present application provide an intra-frame prediction mode decision device and method for AVS3. In order to have a basic understanding of some aspects of the disclosed embodiments, a simple summary is given below. This summary is not a general review, nor is it intended to identify key / important components or describe the scope of protection of these embodiments. Its only purpose is to present some concepts in a simple form as a preface to the detailed description that follows.
[0006] In a first aspect, an embodiment of the present application provides an intra-frame prediction mode decision device for AVS3, the device comprising:
[0007] Mode rough selection module, mode decision module and pipeline control module; among them,
[0008] The mode rough selection module, the mode decision module and the pipeline control module are electrically connected; wherein,
[0009] A mode rough selection module is used to obtain the block division information of the maximum coding unit, and filter the block types supported by the AVS3 standard from the block division information to eliminate the 64xN and Nx64 block types to obtain multiple target block types; for the 4x4 block type included in the multiple target block types, filter the initial prediction mode of the 4x4 block; for the non-4x4 block type included in the multiple target block types, use the consistency of the image area to adaptively filter the initial prediction mode of the non-4x4 block; and use the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection result;
[0010] The mode decision module is used to construct an initial mode list of the mode decision stage according to the rough selection result; calculate the rate distortion cost of each prediction mode in the initial mode list; and take the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode;
[0011] The pipeline control module is used to control the seamless switching of intra-frame prediction modes to ensure that the calculation results are error-free and a calculation result is generated in each clock cycle.
[0012] Optionally, the mode rough selection module includes a first intra-frame prediction circuit, a Hadamard transform cost value calculation circuit, and a cost value sorting circuit; the first intra-frame prediction circuit, the Hadamard transform cost value calculation circuit, and the cost value sorting circuit are electrically connected; the first intra-frame prediction circuit adopts 64-pixel parallel calculation, and different prediction modes are calculated in a pipeline manner;
[0013] A first intra-frame prediction circuit is used for traversing prediction mode 0 to prediction mode 32 in a preset intra-frame prediction mode set supported by the AVS3 standard for multiple target block types including a 4×4 block type, and obtaining 33 intra-frame prediction results;
[0014] A Hadamard transform cost value calculation circuit, used for calculating the Hadamard transform cost value by using 33 intra-frame prediction results;
[0015] The cost value sorting circuit is used to sort all the calculated Hadamard transform cost values, and use the sorted N minimum values as the initial prediction mode of the prediction mode 4x4 block.
[0016] Optionally, the mode decision module includes a mode initial list construction circuit, an intra-frame prediction circuit, and a rate-distortion optimization circuit; wherein the mode initial list construction circuit, the second intra-frame prediction circuit, and the rate-distortion optimization circuit are electrically connected; wherein,
[0017] A pattern initial list construction circuit is used to construct an initial pattern list in the pattern decision stage according to the rough selection result;
[0018] A second intra-frame prediction circuit is used to perform intra-frame prediction on each mode in the initial mode list to obtain a residual value of each mode;
[0019] The rate distortion optimization circuit is used to calculate the rate distortion cost of each prediction mode in the initial mode list according to the residual value of each mode; and take the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode.
[0020] Optionally, for a plurality of target block types including non-4x4 block types, the initial prediction mode of the non-4x4 block is adaptively screened by utilizing the consistency of the image region, including:
[0021] Collect the initial prediction modes of the 4x4 blocks of V 4x4 block types in the same area; V is related to the size of N in 4xN; when N is 8, V is 2;
[0022] Determine whether the initial prediction modes of the 4x4 blocks of the V 4x4 block types are consistent;
[0023] If they are consistent, inherit the initial prediction mode of V 4x4 blocks as the initial prediction mode of non-4x4 blocks in the same area;
[0024] If they are inconsistent, merge the initial prediction modes of the 4x4 blocks of V 4x4 block types, eliminate the repeated prediction modes after the merger, calculate the Hadamard transform cost value of each prediction mode after eliminating the repeated prediction modes, and sort the calculated Hadamard transform cost values and select the prediction mode corresponding to the minimum value of a preset number as the initial prediction mode of the non-4x4 block in the same area.
[0025] Optionally, based on the rough selection results, construct an initial list of modes for the mode decision phase, including:
[0026] Traverse the preset intra-frame prediction mode set supported by the AVS3 standard, from mode 33 to mode 65, and obtain the remaining 33 intra-frame prediction results;
[0027] According to the rough selection result and in combination with modes 33 to 65, an initial mode list of the mode decision stage is constructed;
[0028] Determine whether the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block include a plurality of preset angle modes, where the modes of the plurality of preset angle modes are marked with K and L;
[0029] If all are included, calculate the adjacent mode subscripts corresponding to the preset multiple angle modes, and the calculation method of the adjacent mode subscripts is: (32+K-1) and (32+L-2); based on the adjacent mode subscripts, obtain the adjacent modes corresponding to the preset multiple angle modes from the remaining 33 intra-frame prediction results; introduce the adjacent modes corresponding to the preset multiple angle modes into the mode decision, and obtain the initial mode list of the mode decision stage;
[0030] If one is included, no new mode is introduced into the mode decision.
[0031] Optionally, control the seamless switching of intra-frame prediction modes, including:
[0032] When the switch occurs between prediction modes with the same number of pipeline stages, the control switches directly in the next cycle when the current prediction mode is turned on; or,
[0033] When switching from a prediction mode with fewer pipelines to a prediction mode with more pipelines, control starts the new prediction mode (mn-1) cycles in advance, n-stage pipeline with fewer pipelines, m-stage pipeline with more pipelines, m>n; or,
[0034] When switching from a prediction mode with a larger number of pipeline stages to a prediction mode with a smaller number of pipeline stages, the control delays starting the new prediction mode for (m-n+1) cycles.
[0035] Optionally, the pipeline control module is also used to configure prediction mode 0, prediction mode 1 and prediction mode 2 in the preset intra-frame prediction mode set supported by the AVS3 standard as 3-level pipeline, prediction mode 12 and prediction mode 24 as 2-level pipeline, and other prediction modes as 4-level pipeline.
[0036] Optionally, the internal circuits of the mode coarse selection module and the mode decision module adopt a pipeline architecture design; the multiple target block types include 4x 4, 4x 8, 8x 4, 8x 8, 4x 16, 16x 4, 8x 16, 16x 8, 16x 16, 4x 32, 32x 4, 8x 32, 32x 8, 16x 32, 32x 16, and 32x 32 block types.
[0037] In a second aspect, a method for determining an intra-frame prediction mode for AVS3 is provided, the method comprising:
[0038] Obtain block division information of the maximum coding unit, and filter the block types supported by the AVS3 standard from the block division information to eliminate 64xN and Nx64 block types to obtain multiple target block types; filter the initial prediction mode of the 4x4 block for the 4x4 block type included in the multiple target block types; adaptively filter the initial prediction mode of the non-4x4 block by using image region consistency for the non-4x4 block type included in the multiple target block types; use the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection result;
[0039] According to the rough selection results, an initial mode list of the mode decision stage is constructed; the rate distortion cost of each mode in the initial mode list is calculated; the prediction mode corresponding to the minimum rate distortion cost is used as the optimal intra-frame prediction mode;
[0040] Controls the seamless switching of intra prediction modes to ensure that the calculation results are error-free and a calculation result is generated in each clock cycle.
[0041] Optionally, for a plurality of target block types including a 4x4 block type, an initial prediction mode of a 4x4 block is screened, including:
[0042] For multiple target block types including 4x4 block types, traverse prediction mode 0 to prediction mode 32 in the preset intra-frame prediction mode set supported by the AVS3 standard to obtain 33 intra-frame prediction results;
[0043] 33 intra-frame prediction results are used to calculate the Hadamard transform cost value;
[0044] Sort all calculated Hadamard transform cost values;
[0045] The prediction mode corresponding to the sorted N smallest values is the initial prediction mode of the 4x4 block.
[0046] In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there are no bubbles between the prediction results, and one calculation result is obtained for each cycle, which effectively improves the calculation efficiency of the algorithm.
[0047] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0049] Figure 1 It is a schematic diagram of the structure of an intra-frame prediction mode decision device for AVS3 provided in an embodiment of the present application;
[0050] Figure 2 is a schematic diagram of different block types in the same area provided by an embodiment of the present application;
[0051] Figure 3 This is a schematic diagram of an intra-frame prediction mode provided by an embodiment of the present application;
[0052] Figure 4A This is a schematic diagram of intra-frame prediction pipeline control corresponding to a 4x4 coding block provided in an embodiment of the present application;
[0053] Figure 4B This is another schematic diagram of intra-frame prediction pipeline control corresponding to a 4x4 coding block provided in an embodiment of the present application;
[0054] Figure 5 It is a flowchart of an intra-frame prediction mode decision method for AVS3 provided in an embodiment of the present application;
[0055] Figure 6 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0056] The following description and the accompanying drawings sufficiently illustrate specific embodiments of the present application to enable those skilled in the art to practice them.
[0057] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0058] When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.
[0059] In the description of the present application, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances. In addition, in the description of the present application, unless otherwise specified, "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship.
[0060] In order to solve the problems existing in the prior art, the present application proposes an intra-frame prediction mode decision device and method for AVS3. In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there is no bubble between the prediction results, and one calculation result is obtained for one cycle, which effectively improves the calculation efficiency of the algorithm. The following uses an exemplary embodiment to explain in detail.
[0061] See also Figure 1 , Figure 1The present invention is a schematic diagram of the structure of an intra-frame prediction mode decision device for AVS3 provided by an embodiment of the present invention, wherein the device comprises a mode rough selection module, a mode decision module and a pipeline control module; wherein the mode rough selection module, the mode decision module and the pipeline control module are electrically connected; wherein the mode rough selection module is used to obtain block division information of a maximum coding unit, and to filter the block types supported by the AVS3 standard from the block division information to eliminate the block types of 64xN and Nx64, and obtain a plurality of target block types; for the 4x4 block type included in the plurality of target block types, to filter the initial prediction mode of the 4x4 block; for For various target block types including non-4x4 block types, the initial prediction mode of the non-4x4 block is adaptively screened by utilizing image region consistency; the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block are used as rough selection results; a mode decision module is used to construct an initial mode list of the mode decision stage according to the rough selection results; the rate-distortion cost of each prediction mode in the initial mode list is calculated; the prediction mode corresponding to the minimum rate-distortion cost is used as the optimal intra-frame prediction mode; a pipeline control module is used to control the seamless switching of the intra-frame prediction mode to ensure that the calculation result is error-free and a calculation result is generated in each clock cycle.
[0062] Among them, the AVS3 standard is a high-definition video codec technology standard for video data compression. The maximum coding unit (LCU) is the largest processing unit in video coding, and the image is divided into multiple LCUs for encoding. Block partitioning information is information that describes that the LCU is further divided into smaller blocks. The block types of 64xN and Nx64 are specific coding block sizes. These block types are eliminated in this application to simplify the encoding process. The initial prediction mode of the 4x4 block is a prediction mode determined for the 4x4 block type. The initial prediction mode of the non-4x4 block is a prediction mode that is adaptively screened for the non-4x4 block type based on image area consistency. The rate-distortion cost (RDC) is an indicator for evaluating the pros and cons of the prediction mode, taking into account the number of coding bits and the quality of the reconstructed image.
[0063] For example, implement an AVS3 video encoder.
[0064] Experiments show that the block types of 64x N and N x 64 have little impact on the performance of the encoder. By removing the above types of blocks, the code rate of the encoder increases by less than 1%, and the number of block types of the encoder is reduced from the original 23 to 16, which greatly reduces the computational complexity of the encoder. Therefore, this application eliminates the block types of 64x N and Nx 64. This application supports a total of 16 block types: 4x 4, 4x8, 8x 4, 8x 8, 4x 16, 16x 4, 8x 16, 16x 8, 16x 16, 4x 32, 32x 4, 8x 32, 32x8, 16x 32, 32x 16, 32x 32. The encoding speed of the mode coarse selection module is not only affected by the block division type, but also by the number of prediction modes. Therefore, how to adaptively screen the prediction modes is also a problem that needs to be studied in the hardware implementation of video encoding. This application fully considers the consistency of image areas, such as Figure 2 Representing different blocks of the same area, utilizing the correlation between prediction modes of different prediction blocks in the same area, the number of modes that the coarse selection module needs to traverse is adaptively filtered.
[0065] Therefore, the processing process of the mode rough selection module is as follows: receive the block division information of the LCU and determine which block types the LCU is divided into. According to the AVS3 standard, remove the block types of 64xN and Nx64, and retain 16 target block types. For the 4x4 block type, filter the initial prediction mode of the 4x4 block, such as the plane mode, vertical mode, etc. For the non-4x4 block type, use the consistency of the image area to adaptively filter the initial prediction mode of the non-4x4 block; use the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection results. Output the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection results.
[0066] The processing process of the mode decision module is as follows: receiving the rough selection result of the mode rough selection module; constructing the initial mode list of the mode decision stage; calculating the rate distortion cost for each prediction mode in the initial mode list; selecting the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode.
[0067] In order to meet the needs of real-time application scenarios, the present invention adopts a pipeline method for calculation. Since there are 5 types of intra-frame prediction modes, a total of 65 types, and the calculation method of each type of prediction mode is different, the same pipeline level cannot be used. This requires the design of a pipeline control module to achieve seamless switching of intra-frame prediction modes, ensure that the calculation results are free of bubbles, and produce a calculation result in each clock cycle.
[0068] The hardware implementation architecture based on pipeline design is to improve coding efficiency. Different from software platform implementation, the hardware platform needs to balance power consumption, coding efficiency and coding performance under limited resources. Abandoning the idea of software programming, using the parallel characteristics of the hardware platform, and rationally designing the pipeline architecture, the algorithm can be implemented on a hardware platform with limited resources. Therefore, the processing process of the pipeline control module is: control the seamless switching of intra-frame prediction mode to ensure smooth transition of prediction modes of different block types. Ensure that there are no errors in the calculation results, and generate a calculation result for each clock cycle to improve coding efficiency.
[0069] In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there are no bubbles between the prediction results, and one calculation result is obtained for each cycle, which effectively improves the calculation efficiency of the algorithm.
[0070] In some embodiments of the present application, the mode rough selection module includes a first intra-frame prediction circuit, a Hadamard transform cost value calculation circuit and a cost value sorting circuit; the first intra-frame prediction circuit, the Hadamard transform cost value calculation circuit and the cost value sorting circuit are electrically connected; the first intra-frame prediction circuit adopts 64-pixel parallel calculation, and different prediction modes are calculated in a pipeline manner; the first intra-frame prediction circuit is used to traverse prediction mode 0 to prediction mode 32 in the preset intra-frame prediction mode set supported by the AVS3 standard for multiple target block types including 4x4 block types, and obtain 33 intra-frame prediction results; the Hadamard transform cost value calculation circuit is used to calculate the Hadamard transform cost value using the 33 intra-frame prediction results; the cost value sorting circuit is used to sort all the calculated Hadamard transform cost values, and the prediction mode corresponding to the sorted N minimum values is the initial prediction mode of the 4x4 block.
[0071] Among them, the first intra-frame prediction circuit is part of the mode rough selection module and is specifically used to perform intra-frame prediction on image blocks. It processes image data and generates prediction blocks based on different prediction modes. The Hadamard transform cost value calculation circuit is used to calculate the Hadamard transform cost value of the prediction block obtained using different prediction modes, which is a way to measure the prediction error. The cost value sorting circuit is responsible for sorting the Hadamard transform cost values of all prediction modes in order to quickly identify the mode with the lowest cost.
[0072] It should be noted that, in the software platform, intra-frame prediction is calculated in a serial manner, that is, after calculating mode n, mode n+1 is calculated.
[0073] For example, for a 4x4 coding block, 33 prediction modes are traversed, Hadamard transform cost values are calculated, the cost values are compared, and the smallest N prediction modes are selected as the initial prediction mode of the 4x4 block.
[0074] In the embodiment of the present application, the first intra-frame prediction circuit greatly improves the prediction rate by parallel calculation of 64 pixels, so that the encoder can process a large amount of data in a short time. The Hadamard transform cost value calculation circuit performs error analysis on each prediction block to ensure that the selected prediction mode not only considers the accuracy of the prediction, but also the efficiency of the encoding. The cost value sorting circuit ensures that the optimal N modes can be quickly selected from a large number of modes, and these modes have the smallest prediction errors, thereby providing a solid foundation for subsequent encoding decisions.
[0075] In some embodiments of the present application, for non-4x4 block types included in multiple target block types, the specific processing process of adaptively screening the initial prediction mode of non-4x4 blocks by utilizing image area consistency includes: collecting the initial prediction mode of the 4x4 block of each of V 4x4 block types in the same area; V is related to the size of N in 4xN; when N is 8, V is 2; determining whether the initial prediction mode of the 4x4 block of each of the V 4x4 block types is consistent; if consistent, inheriting the initial prediction mode of the V 4x4 blocks as the initial prediction mode of the non-4x4 blocks in the same area; if inconsistent, merging the initial prediction mode of the 4x4 block of each of the V 4x4 block types, and eliminating the repeated prediction mode after the merger, and calculating the Hadamard transform cost value of each prediction mode after eliminating the repeated prediction mode, and sorting the calculated Hadamard transform cost values and selecting the prediction mode corresponding to the minimum value of a preset number as the initial prediction mode of the non-4x4 block in the same area.
[0076] For example, for coding blocks other than 4x4 blocks, the prediction mode is adaptively screened by utilizing the consistency of the image region. The specific method is as follows: for example, the rough initial prediction mode list of the 4x8 coding block is generated by guiding the mode rough selection results of the two 4x4 coding blocks in the same region. When the mode rough selection results of the two 4x4 coding blocks are consistent, the 8x8 coding block directly inherits the mode rough selection result of the 4x4 coding block without calculating the Hadamard transform cost value, and without obtaining the mode rough selection result by comparing the cost value. The mode rough selection result of the 4x8 block is consistent with the mode rough selection result of the 4x4 block in the same region, and its Hadamard transform cost value is 4x The sum of the Hadamard transform cost values of the four blocks; when the mode coarse selection results of two 4x4 coding blocks are inconsistent, the mode coarse selection results of the two 4x4 blocks are combined into a coarse initial prediction list of the 4x8 mode coarse selection module, the repeated modes are eliminated, the Hadamard transform cost value is calculated, and the mode coarse selection result is obtained by comparing the cost value; the mode coarse selection results of other non-4x4 coding blocks are obtained in the same way as the 4x8 coding block. The code rate of this mode adaptive screening method increases by less than 1%, but the number of prediction modes can be greatly reduced. This method of sacrificing a little encoder performance in exchange for reducing the computational complexity of the hardware encoder is desirable. This is a good way to balance the performance, power consumption, and area of the hardware encoder.
[0077] In some embodiments of the present application, the mode decision module includes a mode initial list construction circuit, an intra-frame prediction circuit, and a rate-distortion optimization circuit; wherein the mode initial list construction circuit, the second intra-frame prediction circuit, and the rate-distortion optimization circuit are electrically connected; wherein the mode initial list construction circuit is used to construct an initial mode list of the mode decision stage according to the rough selection result; the second intra-frame prediction circuit is used to perform intra-frame prediction on each mode in the initial mode list to obtain the residual value of each mode; the rate-distortion optimization circuit is used to calculate the rate-distortion cost of each prediction mode in the initial mode list according to the residual value of each mode; and the prediction mode corresponding to the minimum rate-distortion cost is used as the optimal intra-frame prediction mode. The rate-distortion optimization circuit mainly realizes the transformation, quantization, inverse quantization, inverse transformation, and reconstruction of the residual, and decides the optimal intra-frame prediction mode of the current coding block by comparing the rate-distortion cost value.
[0078] Among them, the mode initial list construction circuit is a component in the mode decision module. It builds a more detailed mode list based on the rough selection results provided by the mode rough selection module for the next decision process. The second intra-frame prediction circuit is used to perform intra-frame prediction on each mode in the mode initial list to generate a residual value of the largest coding unit (LCU). The residual value refers to the difference between the original image block and the predicted image block. The rate-distortion optimization circuit is responsible for calculating the rate-distortion cost (Rate-Distortion Cost, RDC) of each prediction mode, which is an indicator that weighs the number of coded bits (rate) and the quality of the reconstructed image (distortion).
[0079] In an embodiment of the present application, the mode initial list construction circuit first generates a comprehensive mode list based on the rough selection results to provide a basis for fine selection. Then, the second intra-frame prediction circuit performs detailed intra-frame prediction on these modes and calculates the image residual corresponding to each mode. Then, the rate-distortion optimization circuit analyzes these residuals and calculates the rate-distortion cost of each mode to ensure that the selected mode is not only accurately predicted but also has high coding efficiency. Finally, the mode with the smallest rate-distortion cost is selected as the optimal prediction mode, which not only ensures the coding quality, but also optimizes the coding bit rate, achieving efficient and high-quality video coding. This refined decision-making process enables the encoder to maintain high efficiency and excellent coding performance when processing complex or changing video content.
[0080] In some embodiments of the present application, based on the rough selection results, the specific process of constructing the initial mode list of the mode decision stage includes: traversing modes 33 to 65 in the preset intra-frame prediction mode set supported by the AVS3 standard to obtain the remaining 33 intra-frame prediction results; based on the rough selection results and in combination with modes 33 to 65, constructing the initial mode list of the mode decision stage; judging whether the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block contain preset multiple angle modes, the mode subscripts of the preset multiple angle modes are K and L; if all are included, calculating the adjacent mode subscripts corresponding to the preset multiple angle modes, and the calculation method of the adjacent mode subscripts is: (32+K-1) and (32+L-2); based on the adjacent mode subscripts, obtaining the adjacent modes corresponding to the preset multiple angle modes from the remaining 33 intra-frame prediction results; introducing the adjacent modes corresponding to the preset multiple angle modes into the mode decision to obtain the initial mode list of the mode decision stage; if one is included, not introducing the new mode into the mode decision.
[0081] For example, in the mode rough selection stage, only 33 modes (mode 0 to mode 32) are used, and the remaining 33 modes (mode 33 to mode 65) are not used. Figure 3The intra-frame prediction mode shown in FIG. 1 is used, so in the mode decision stage, the remaining 33 modes will be used adaptively. The remaining 33 modes are angle prediction modes. The modes of the remaining 33 modes are adaptively selected according to the angle prediction mode in the mode rough selection result and enter the mode decision module, that is, the remaining angle prediction modes adjacent to the angle prediction mode in the mode rough selection result are introduced into the mode decision module. The specific operation is as follows: if the mode rough selection result includes mode K and mode L, then mode (32+K-1) and mode (32+L-2) are introduced into the mode decision. If there is only one angle mode in the mode rough selection result, there is no need to introduce a new mode into the mode decision. For example, if the mode rough selection result includes mode 4 and mode 5, then mode 35 adjacent to mode 4 and mode 5 is introduced into the mode decision; if the mode rough selection result includes mode 4 and mode 6, then mode 35 adjacent to mode 4 and mode 36 adjacent to mode 6 are introduced into the mode decision. The modes in the rough mode list in the mode decision are traversed, the rate distortion cost (RDC) is calculated, the rate distortion cost values are compared, and the intra-frame prediction mode of the coding block is determined.
[0082] In some embodiments of the present application, the pipeline control module is also used to configure prediction mode 0, prediction mode 1 and prediction mode 2 in the preset intra-frame prediction mode set supported by the AVS3 standard as 3-level pipeline, prediction mode 12 and prediction mode 24 as 2-level pipeline, and other prediction modes as 4-level pipeline.
[0083] In some embodiments of the present application, the specific process of controlling the seamless switching of intra-frame prediction modes includes: when the switch occurs between prediction modes with the same number of pipeline levels, the control directly switches in the next cycle when the current prediction mode is turned on; or, when switching from a prediction mode with fewer pipeline levels to a prediction mode with more pipeline levels, the control starts the new prediction mode (mn-1) cycles in advance, with n-level pipelines for fewer pipeline levels and m-level pipelines for more pipeline levels, where m>n; or, when switching from a prediction mode with more pipeline levels to a prediction mode with fewer pipeline levels, the control postpones the start of the new prediction mode by (m-n+1) cycles.
[0084] For example, 3-stage pipeline is used for mode 0, mode 1 and mode 2, 2-stage pipeline is used for mode 12 and mode 24, and 4-stage pipeline is used for other modes of the same type of angle prediction mode. For mode switching with the same pipeline level, the mode can be switched in the next cycle after the current mode is turned on; for mode switching with different pipeline levels, the mode with fewer pipeline levels (n-stage pipeline) is switched to the mode with more pipeline levels (m-stage pipeline), and the mode with more pipeline levels needs to be turned on (mn-1) cycles in advance, and the mode with more pipeline levels (m-stage pipeline) is switched to the mode with fewer pipeline levels (n-stage pipeline), and the mode with more pipeline levels needs to be turned on (m-n+1) cycles later.
[0085] like Figure 4A and 4B The mode switching control method based on pipeline design in the mode rough selection stage of the 4x4 coding block shown in the figure, modes 0, 1, and 2 have the same number of pipeline stages, so the switching between the three modes requires a delay of one clock cycle; the number of pipeline stages between mode 2 and mode 3 is different, so mode 2 and mode 3 start calculation at the same time. Since mode 2 has three-stage pipeline and mode 3 has four-stage pipeline, the calculation result of mode 2 is one clock cycle earlier than that of mode 3; mode 11 has four-stage pipeline and mode 12 has two-stage pipeline. When switching from mode 11 to mode 12, the time interval between the two is 3 cycles; mode 12 has two-stage pipeline and mode 13 has four-stage pipeline. Mode 13 is started two cycles earlier than mode 12.
[0086] In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there are no bubbles between the prediction results, and one calculation result is obtained for each cycle, which effectively improves the calculation efficiency of the algorithm.
[0087] See also Figure 5 , which is a flowchart of a method for determining an intra-frame prediction mode for AVS3 according to an embodiment of the present application, and is applied to a server. Figure 5 As shown, the detection method of the embodiment of the present application may include the following steps:
[0088] S101, obtaining block division information of a maximum coding unit, and filtering block types supported by the AVS3 standard from the block division information to eliminate 64xN and Nx64 block types, and obtaining multiple target block types; for 4x4 block types included in the multiple target block types, filtering initial prediction modes of 4x4 blocks; for non-4x4 block types included in the multiple target block types, using image region consistency, adaptively filtering initial prediction modes of non-4x4 blocks; and using the initial prediction modes of 4x4 blocks and non-4x4 blocks as rough selection results;
[0089] In some embodiments of the present application, for a 4x4 block type included in a plurality of target block types, a specific process of screening an initial prediction mode of a 4x4 block includes: for a 4x4 block type included in a plurality of target block types, traverse prediction mode 0 to prediction mode 32 in a preset intra-frame prediction mode set supported by the AVS3 standard to obtain 33 intra-frame prediction results; calculate Hadamard transform cost values using the 33 intra-frame prediction results; sort all calculated Hadamard transform cost values; and use the prediction mode corresponding to the sorted N minimum values as the initial prediction mode of the 4x4 block. The prediction modes corresponding to the N minimum values may be 1, 2, 3, 4 or 5, which may be set according to actual needs.
[0090] S102, constructing an initial mode list of the mode decision stage according to the rough selection result; calculating the rate distortion cost of each mode in the initial mode list; and taking the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode;
[0091] S103, controlling the seamless switching of the intra-frame prediction mode to ensure that the calculation result has no error and a calculation result is generated in each clock cycle.
[0092] Assuming that N=3 in this method and the size of the largest coding block (LCU) is 64x64, the number of cycles required for a largest coding block (LCU) to complete the intra prediction mode decision in the pipeline architecture of this method can be calculated. This method supports a total of 16 block types: 4x 4, 4x8, 8x 4, 8x 8, 4x 16, 16x 4, 8x 16, 16x 8, 16x 16, 4x 32, 32x 4, 8x 32, 32x 8, 16x 32, 32x16, and 32x 32. For 4x 4 coding blocks, the largest coding block contains 256 4x4 coding blocks. In the prediction mode rough selection stage, a total of 256x 16 / 64x 33=2112 cycles are required; other types of coding blocks do not need to traverse 33 prediction modes. The maximum number of prediction modes for other coding blocks is 2N=6. In the prediction mode rough selection stage, the remaining 15 types of blocks except 4x4 coding blocks require a total of 15x256x16 / 64x6=5760 cycles. Therefore, the largest coding block (LCU) needs 2112+5760=7872 cycles to complete the intra-frame prediction mode rough selection. In the mode decision stage, the number of modes in the initial mode list corresponding to each coding block is less than or equal to 2N=6. Based on the maximum 2N=6, a total of 16x 256x 16 / 64x 6=6144 cycles are required. Since the prediction mode preliminary selection module and the prediction mode decision module adopt a pipeline architecture design, it takes 7872 cycles for the largest coding block (LCU) to complete the intra-frame prediction mode decision, meeting the 4k@30fps throughput requirement under a 500MHz clock pulse.
[0093] In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there are no bubbles between the prediction results, and one calculation result is obtained for each cycle, which effectively improves the calculation efficiency of the algorithm.
[0094] The present application also provides a computer-readable medium having program instructions stored thereon, which, when executed by a processor, implements the intra-frame prediction mode decision method for AVS3 provided by the above-mentioned various method embodiments.
[0095] The present application also provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the intra-frame prediction mode decision method for AVS3 of the above-mentioned various method embodiments.
[0096] See also Figure 6 , is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 6 As shown, the electronic device 1000 may include: at least one processor 1001 , at least one network interface 1004 , a user interface 1003 , a memory 1005 , and at least one communication bus 1002 .
[0097] The communication bus 1002 is used to realize the connection and communication between these components.
[0098] The user interface 1003 may include a display screen (Display) and a camera (Camera), and the optional user interface 1003 may also include a standard wired interface and a wireless interface.
[0099] The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a WI-FI interface).
[0100] Among them, the processor 1001 may include one or more processing cores. The processor 1001 uses various interfaces and lines to connect various parts within the entire electronic device 1000, and executes various functions and processes data of the electronic device 1000 by running or executing instructions, programs, code sets or instruction sets stored in the memory 1005, and calling data stored in the memory 1005. Optionally, the processor 1001 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 1001 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU) and a modem. Among them, the CPU mainly processes the operating system, user interface and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen; the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 1001, and it can be implemented separately through a chip.
[0101] Among them, the memory 1005 may include a random access memory (Random Access Memory, RAM) and may also include a read-only memory (Read-Only Memory). Optionally, the memory 1005 includes a non-transitory computer-readable storage medium. The memory 1005 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 1005 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc.; the data storage area may store data involved in the above-mentioned various method embodiments, etc. The memory 1005 may also be optionally at least one storage system located away from the aforementioned processor 1001. As Figure 6 As shown, the memory 1005 as a computer storage medium may include an operating system, a network communication module, a user interface module, and an intra-frame prediction mode decision application for AVS3.
[0102] exist Figure 6 In the electronic device 1000 shown, the user interface 1003 is mainly used to provide an input interface for the user and obtain data input by the user; and the processor 1001 can be used to call the intra-frame prediction mode decision application for AVS3 stored in the memory 1005, and specifically perform the following operations:
[0103] Obtain block division information of the maximum coding unit, and filter the block types supported by the AVS3 standard from the block division information to eliminate 64xN and Nx64 block types to obtain multiple target block types; filter the initial prediction mode of the 4x4 block for the 4x4 block type included in the multiple target block types; adaptively filter the initial prediction mode of the non-4x4 block by using image region consistency for the non-4x4 block type included in the multiple target block types; use the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection result;
[0104] According to the rough selection results, an initial mode list of the mode decision stage is constructed; the rate distortion cost of each mode in the initial mode list is calculated; the prediction mode corresponding to the minimum rate distortion cost is used as the optimal intra-frame prediction mode;
[0105] Controls the seamless switching of intra prediction modes to ensure that the calculation results are error-free and a calculation result is generated in each clock cycle.
[0106] In one embodiment, when the processor 1001 performs the screening of the initial prediction mode of the 4x4 block for the 4x4 block type included in the multiple target block types, the processor 1001 specifically performs the following operations:
[0107] For multiple target block types including 4x4 block types, traverse prediction mode 0 to prediction mode 32 in the preset intra-frame prediction mode set supported by the AVS3 standard to obtain 33 intra-frame prediction results;
[0108] 33 intra-frame prediction results are used to calculate the Hadamard transform cost value;
[0109] Sort all calculated Hadamard transform cost values;
[0110] The prediction mode corresponding to the sorted N smallest values is the initial prediction mode of the 4x4 block.
[0111] In the embodiments of the present application, on the one hand, in order to adapt the coding algorithm to the hardware platform, the present application screens the block types supported in the AVS3 standard, deletes the 64x N and N x 64 block types, and reduces the number of original block types from 23 to 16, which greatly reduces the complexity of the algorithm, effectively improves the coding efficiency, and can also effectively reduce the area and power consumption of FPGA or ASIC in hardware implementation. On the other hand, the present application utilizes the consistency of the image area, adaptively utilizes the correlation between the modes of different coding blocks in the same area, and adaptively screens the mode to effectively reduce the number of prediction modes, which also greatly reduces the complexity of the algorithm. On the other hand, by controlling the seamless switching of the prediction mode, there are no bubbles between the prediction results, and one calculation result is obtained for each cycle, which effectively improves the calculation efficiency of the algorithm.
[0112] A person skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program for intra-frame prediction mode decision for AVS3 can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the storage medium of the program for intra-frame prediction mode decision for AVS3 can be a disk, an optical disk, a read-only storage memory, or a random access memory, etc.
[0113] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.
[0114] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program for intra-frame prediction mode decision for AVS3 can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the storage medium for intra-frame prediction mode decision for AVS3 can be a disk, an optical disk, a read-only storage memory, or a random access memory, etc.
[0115] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.
Claims
1. An intra-frame prediction mode decision device for AVS3, characterized in that: The device comprises: Mode rough selection module, mode decision module and pipeline control module; among them, The mode rough selection module, the mode decision module and the pipeline control module are electrically connected; wherein, The mode rough selection module is used to obtain block division information of the maximum coding unit, and filter the block types supported by the AVS3 standard from the block division information to eliminate 64xN and Nx64 block types to obtain multiple target block types; for the 4x4 block type included in the multiple target block types, filter the initial prediction mode of the 4x4 block; for the non-4x4 block type included in the multiple target block types, use the consistency of the image area to adaptively filter the initial prediction mode of the non-4x4 block; and use the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as the rough selection result; The mode decision module is used to construct an initial mode list of the mode decision stage according to the rough selection result; calculate the rate distortion cost of each prediction mode in the initial mode list; and use the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode; The pipeline control module is used to control the seamless switching of the intra-frame prediction mode to ensure that the calculation result has no error and a calculation result is generated in each clock cycle.
2. The device according to claim 1, characterized in that The mode rough selection module includes a first intra-frame prediction circuit, a Hadamard transform cost value calculation circuit, and a cost value sorting circuit; the first intra-frame prediction circuit, the Hadamard transform cost value calculation circuit, and the cost value sorting circuit are electrically connected; the first intra-frame prediction circuit adopts 64-pixel parallel calculation, and different prediction modes are calculated in a pipeline manner; The first intra prediction circuit is used for traversing prediction mode 0 to prediction mode 32 in the preset intra prediction mode set supported by the AVS3 standard for the 4x4 block type included in the multiple target block types, and obtaining 33 intra prediction results; The Hadamard transform cost value calculation circuit is used to calculate the Hadamard transform cost value using 33 intra-frame prediction results; The cost value sorting circuit is used to sort all calculated Hadamard transform cost values, and use the prediction mode corresponding to the sorted N minimum values as the initial prediction mode of the 4x4 block.
3. The device according to claim 1, characterized in that The mode decision module includes a mode initial list construction circuit, an intra-frame prediction circuit, and a rate-distortion optimization circuit; wherein the mode initial list construction circuit, the second intra-frame prediction circuit, and the rate-distortion optimization circuit are electrically connected; wherein, The mode initial list construction circuit is used to construct an initial mode list in the mode decision stage according to the rough selection result; The second intra-frame prediction circuit is used to perform intra-frame prediction on each mode in the initial mode list to obtain a residual value of each mode; The rate-distortion optimization circuit is used to calculate the rate-distortion cost of each prediction mode in the initial mode list according to the residual value of each mode; and take the prediction mode corresponding to the minimum rate-distortion cost as the optimal intra-frame prediction mode.
4. The device according to claim 1, characterized in that The method of adaptively screening the initial prediction mode of the non-4x4 block by using the consistency of the image area for the non-4x4 block type included in the multiple target block types includes: Collecting initial prediction modes of 4x4 blocks of V 4x4 block types in the same area; V is related to the size of N in 4xN; when N is 8, V is 2; Determine whether the initial prediction modes of the 4x4 blocks of the V 4x4 block types are consistent; If they are consistent, inherit the initial prediction modes of the V 4x4 blocks as the initial prediction modes of the non-4x4 blocks in the same area; If they are inconsistent, merge the initial prediction modes of the 4x4 blocks of V 4x4 block types, eliminate the repeated prediction modes after the merger, calculate the Hadamard transform cost value of each prediction mode after eliminating the repeated prediction modes, sort the calculated Hadamard transform cost values and select the prediction modes corresponding to the minimum values of a preset number as the initial prediction modes of the non-4x4 blocks in the same area.
5. The device according to claim 1, characterized in that The initial mode list of the mode decision phase is constructed according to the rough selection result, including: Traverse mode 33 to mode 65 in the preset intra prediction mode set supported by the AVS3 standard; According to the rough selection result and in combination with modes 33 to 65, an initial mode list of the mode decision stage is constructed; Determine whether the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block include a plurality of preset angle modes, where the modes of the plurality of preset angle modes are marked with K and L; If all are included, calculate the adjacent mode subscripts corresponding to the preset multiple angle modes, and the calculation method of the adjacent mode subscripts is: (32+K-1) and (32+L-2); based on the adjacent mode subscripts, obtain the adjacent modes corresponding to the preset multiple angle modes from the remaining 33 intra-frame prediction results; introduce the adjacent modes corresponding to the preset multiple angle modes into the mode decision, and obtain the initial mode list of the mode decision stage; If one is included, no new mode is introduced into the mode decision.
6. The device according to claim 1, characterized in that The controlling the seamless switching of intra-frame prediction modes comprises: When the switch occurs between prediction modes with the same number of pipeline stages, the control switches directly in the next cycle when the current prediction mode is turned on; or, When switching from a prediction mode with fewer pipelines to a prediction mode with more pipelines, control starts the new prediction mode (mn-1) cycles in advance, n-stage pipeline with fewer pipelines, m-stage pipeline with more pipelines, m>n; or, When switching from a prediction mode with a larger number of pipeline stages to a prediction mode with a smaller number of pipeline stages, the control delays starting the new prediction mode for (m-n+1) cycles.
7. The device according to claim 1, characterized in that The pipeline control module is also used to configure prediction mode 0, prediction mode 1 and prediction mode 2 in the preset intra-frame prediction mode set supported by the AVS3 standard as 3-level pipeline, prediction mode 12 and prediction mode 24 as 2-level pipeline, and other prediction modes as 4-level pipeline.
8. The device according to claim 1, characterized in that The internal circuits of the mode rough selection module and the mode decision module are designed with a pipeline architecture; the multiple target block types include 4x 4, 4x 8, 8x4, 8x 8, 4x 16, 16x 4, 8x 16, 16x 8, 16x 16, 4x 32, 32x 4, 8x32, 32x 8, 16x 32, 32x 16, and 32x 32 block types.
9. A method for intra-frame prediction mode decision for AVS3, characterized in that: The method comprises: Obtaining block division information of a maximum coding unit, and filtering block types supported by the AVS3 standard from the block division information to eliminate 64xN and Nx64 block types, and obtaining a plurality of target block types; filtering an initial prediction mode of a 4x4 block for a 4x4 block type included in the plurality of target block types; adaptively filtering an initial prediction mode of a non-4x4 block by using image region consistency for a non-4x4 block type included in the plurality of target block types; and using the initial prediction mode of the 4x4 block and the initial prediction mode of the non-4x4 block as a rough selection result; According to the rough selection result, construct an initial mode list of the mode decision stage; calculate the rate distortion cost of each mode in the initial mode list; and use the prediction mode corresponding to the minimum rate distortion cost as the optimal intra-frame prediction mode; Controls the seamless switching of intra prediction modes to ensure that the calculation results are error-free and a calculation result is generated in each clock cycle.
10. The method according to claim 9, characterized in that The screening of the initial prediction mode of the 4x4 block for the 4x4 block type included in the multiple target block types includes: For the 4x4 block type included in the multiple target block types, traverse prediction mode 0 to prediction mode 32 in the preset intra-frame prediction mode set supported by the AVS3 standard to obtain 33 intra-frame prediction results; 33 intra-frame prediction results are used to calculate the Hadamard transform cost value; Sort all calculated Hadamard transform cost values; The prediction mode corresponding to the sorted N minimum values is used as the initial prediction mode of the 4x4 block.
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