Time sequence control circuit, display device and display driving method

By realizing the detection of pixel clock frequency and generating compensation lists in the timing control circuit, the brightness and fine lines caused by pixel charging differences in the high refresh rate display device are solved, and the quality of the display screen is improved.

CN119418634AActive Publication Date: 2025-02-11BOE TECHNOLOGY GROUP CO LTD +1
View PDF 11 Cites 0 Cited by

Patent Information

Application Number
CN202411865116.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-02-11
Estimated Expiration
2044-12-17

AI Technical Summary

Technical Problem

In a high refresh rate display device, the difference in precharge voltage between pixels leads to different charging differences in pixels in different rows, which in turn causes brightness differences and fine lines on the screen to display.

Method used

Design a timing control circuit, including a detection module, an identification module and a compensation output module, detect the pixel clock frequency, identify the target frequency partition, and generate a compensation list to compensate the pixel grayscale value in the display signal according to the compensation list. .

Benefits of technology

The compensation output module compensates the display signal, reduces the charging difference between pixels in different rows, improves the fine lines of the screen caused by brightness differences, and improves the quality of the display screen.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119418634A_ABST
    Figure CN119418634A_ABST
Patent Text Reader

Abstract

The invention provides a time sequence control circuit, a display device and a display driving method, and relates to the technical field of display, the time sequence control circuit comprises a first detection module, a first identification module and a compensation output module; the first detection module is electrically connected with the first identification module and is used for receiving a display signal of a frame of picture, determining a corresponding pixel clock frequency and sending the pixel clock frequency to the first identification module; the first identification module is electrically connected with the compensation output module and is used for determining a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions and sending a first compensation list corresponding to the target frequency partition to the compensation output module; the first compensation list comprises a compensation relationship between gray-scale values of pixels in adjacent pixel rows; and the compensation output module is used for compensating the gray-scale value of the pixel in at least one pixel row in the display signal according to the first compensation list, and outputting the compensated display signal. The pixel brightness difference can be reduced, and the image quality is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a timing control circuit, a display device and a display driving method. Background Art

[0002] With the advancement of display technology and the increase of user demand, the refresh rate of display devices is getting higher and higher, such as MNT displays. In some applications using dual-gate driving (DGD) or triple-gate driving (TGD) technology, the charging time of pixels is getting shorter and shorter.

[0003] For special pixel architectures such as Zigzag, there are differences in pre-charge voltage between pixels, resulting in charging differences between pixels in different rows. As the pixel charging time becomes shorter and shorter, the charging difference leads to more obvious differences in brightness of pixels in different rows, which can easily cause problems such as fine lines on the screen. Summary of the invention

[0004] The present application provides a timing control circuit, a display device and a display driving method, which can solve the technical problem that brightness differences of pixels in different rows easily cause fine lines on the screen.

[0005] In a first aspect, the present application provides a timing control circuit, the timing control circuit comprising: a first detection module, a first identification module and a compensation output module;

[0006] The first detection module is electrically connected to the first identification module, and is used to receive a display signal of a frame of picture, determine a pixel clock frequency corresponding to the display signal, and send the pixel clock frequency to the first identification module;

[0007] The first identification module is electrically connected to the compensation output module, and is used to determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and send a first compensation list corresponding to the target frequency partition to the compensation output module; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows;

[0008] The compensation output module is used to compensate the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation list, and output the compensated display signal.

[0009] Optionally, the first identification module includes a first partitioning unit and a first enabling unit;

[0010] The first partition unit is electrically connected to the first detection module and the first enabling unit respectively, and is used to determine a target frequency partition corresponding to the pixel clock frequency from the preset multiple frequency partitions, and send a first enabling signal corresponding to the target frequency partition to the first enabling unit;

[0011] The first enabling unit is also electrically connected to the compensation output module, and is configured to send the first compensation list corresponding to the first enabling signal to the compensation output module.

[0012] Optionally, the first enabling unit includes a plurality of first controllers;

[0013] The enable terminal of the first controller is electrically connected to the first partition unit, and the output terminal of the first controller is electrically connected to the compensation output module;

[0014] The first controller is used for sending the first compensation list inputted by the input end to the compensation output module through the output end when the enabling end receives the first enabling signal sent by the first partition unit.

[0015] Optionally, the compensation output module includes a first input terminal, and the first input terminal is electrically connected to the output terminals of the plurality of first controllers respectively;

[0016] The compensation output module is used to receive the first compensation list through the first input terminal, and determine the adjusted grayscale value of the pixels in the at least one pixel row after compensation according to the first compensation list, so as to compensate the grayscale value of the pixels in the at least one pixel row in the display signal.

[0017] Optionally, the timing control circuit further includes a second detection module and a second identification module;

[0018] The second detection module is electrically connected to the second identification module, and is used to receive the display signal of the one frame of the picture, determine the first blanking duration corresponding to the display signal, and send the first blanking duration to the second identification module; wherein the first blanking duration is the duration of the vertical scanning blanking area corresponding to the display signal;

[0019] The second identification module is electrically connected to the compensation output module, and is used to send a second compensation list corresponding to the first blanking duration to the compensation output module; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each of the grayscale values;

[0020] The compensation output module is further used to compensate the grayscale value of each pixel in the display signal according to the second compensation list.

[0021] Optionally, the second identification module includes a second partitioning unit and a second enabling unit;

[0022] The second partition unit is electrically connected to the second detection module and the second enabling unit respectively, and is used to compare the first blanking duration with the multiple duration partitions in sequence according to the preset multiple duration partitions from small to large, and send the second enabling signal corresponding to the duration partition to the second enabling unit each time the first blanking duration is greater than the minimum length of one of the duration partitions; wherein the durations of the vertical scanning blanking areas corresponding to the multiple duration partitions do not overlap with each other;

[0023] The second enabling unit is also electrically connected to the compensation output module, and is configured to send the second compensation list corresponding to the second enabling signal to the compensation output module.

[0024] Optionally, the second enabling unit includes a plurality of second controllers;

[0025] The enable terminal of the second controller is electrically connected to the second partition unit, and the output terminal of the second controller is electrically connected to the compensation output module;

[0026] The second controller is used for sending the second compensation list inputted by the input end to the compensation output module through the output end when the enabling end receives the second enabling signal sent by the second partition unit.

[0027] Optionally, the compensation output module includes a plurality of second input terminals, and the plurality of second input terminals are connected to the output terminals of the plurality of second controllers in a one-to-one correspondence;

[0028] The compensation output module is used to receive at least one of the second compensation lists through the multiple second input terminals, and to determine the compensation coefficient corresponding to the grayscale value of each pixel in the display signal by looking up the table according to the last received second compensation list, and to determine the output grayscale value of each pixel in the display signal according to the compensation coefficient, so as to compensate the grayscale value of each pixel in the display signal.

[0029] In a second aspect, the present application provides a display device, the display device comprising a display panel, and the timing control circuit as described in the first aspect;

[0030] The timing control circuit is electrically connected to the display panel, and is used for outputting a compensated display signal to the display panel, so as to drive the display panel to display.

[0031] In a second aspect, the present application provides a display driving method, the display driving method comprising:

[0032] Receive a display signal of a frame of picture, and determine a pixel clock frequency corresponding to the display signal;

[0033] Determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and determine a corresponding first compensation list according to the target frequency partition; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows;

[0034] The grayscale values ​​of pixels in at least one pixel row in the display signal are compensated according to the first compensation list, and the compensated display signal is output to a display panel to drive the display panel for display.

[0035] Optionally, compensating the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation list includes:

[0036] For the grayscale value of a first pixel in a first pixel row in the display signal, determine the grayscale value of a second pixel in a second pixel row adjacent to the first pixel row; wherein the first pixel and the second pixel are connected to the same data line, and the first pixel receives the driving signal transmitted by the data line later than the second pixel;

[0037] According to the grayscale value of the first pixel and the grayscale value of the second pixel, the adjusted grayscale value of the first pixel after compensation is determined based on the first compensation list, so as to compensate for the grayscale value of each of the first pixels in the first pixel row in the display signal; wherein the at least one pixel row includes the first pixel row.

[0038] Optionally, the determining the adjusted grayscale value of the first pixel after compensation based on the first compensation list according to the grayscale value of the first pixel and the grayscale value of the second pixel comprises:

[0039] Determine a preset grayscale value that is the same as the grayscale value of the first pixel according to a first set of grayscale values ​​in the first compensation list, and determine a preset grayscale value that is the same as the grayscale value of the second pixel according to a second set of grayscale values ​​in the first compensation list;

[0040] According to the correspondence between the two preset grayscale values, acquiring a corresponding adjustment grayscale value from the first compensation list as the adjustment grayscale value of the first pixel after compensation;

[0041] Among them, the first compensation list includes the first group of grayscale values, the second group of grayscale values, and multiple adjustment grayscale values ​​corresponding to multiple groups of correspondence relationships; the first group of grayscale values ​​and the second group of grayscale values ​​respectively include multiple preset grayscale values; the multiple groups of correspondence relationships include the correspondence between each preset grayscale value in the first group of grayscale values ​​and different preset grayscale values ​​in the second group of grayscale values.

[0042] Optionally, before outputting the compensated display signal to the display panel, the display driving method further includes:

[0043] Determine a first blanking duration corresponding to the display signal; wherein the first blanking duration is the duration of a vertical scanning blanking area corresponding to the display signal;

[0044] Determine a second compensation list corresponding to the first blanking duration; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each of the grayscale values;

[0045] The grayscale value of each pixel in the display signal is compensated according to the second compensation list.

[0046] Optionally, the determining a second compensation list corresponding to the first blanking duration includes:

[0047] According to the preset multiple time partitions from small to large, the first blanking duration is compared with the multiple time partitions in sequence, and each time the first blanking duration is greater than the minimum length of one of the time partitions, the second compensation list corresponding to the time partition is triggered; wherein the durations of the vertical scanning blanking areas corresponding to the multiple time partitions do not overlap with each other;

[0048] The last triggered second compensation list is determined as the second compensation list corresponding to the first blanking duration.

[0049] Optionally, compensating the grayscale value of each pixel in the display signal according to the second compensation list includes:

[0050] For a target pixel having an adjusted grayscale value, determining an output grayscale value of the target pixel according to the adjusted grayscale value and a compensation coefficient corresponding to the target pixel; wherein the compensation coefficient corresponding to the target pixel is a compensation coefficient corresponding to the grayscale value of the target pixel before compensation;

[0051] For pixels other than the target pixel, determining output grayscale values ​​of the other pixels according to original grayscale values ​​of the other pixels and corresponding compensation coefficients;

[0052] Before outputting the compensated display signal to the display panel, the display driving method further includes:

[0053] The compensated display signal is obtained according to the output grayscale value of the target pixel and the output grayscale values ​​of the other pixels.

[0054] The present application provides a timing control circuit, a display device and a display driving method, which have at least the following advantages: the pixel clock frequency corresponding to the display signal is detected by the first detection module in the timing control circuit, so that the first identification module identifies the correspondence between the pixel clock frequency and the preset multiple frequency partitions. The first identification module outputs the first compensation list corresponding to the target frequency partition to the compensation output module according to the target frequency partition corresponding to the pixel clock frequency. Since the first compensation list includes the compensation relationship between the grayscale values ​​of pixels in adjacent pixel rows, the compensation output module can compensate the grayscale values ​​of pixels in at least one pixel row in the display signal according to the compensation relationship between the grayscale values ​​of pixels in adjacent pixel rows in the first compensation list, and output the compensated display signal. In this way, the compensated display signal drives the display screen, which can reduce the charging difference between the pixels in at least one pixel row and the pixels in the adjacent rows, thereby improving the problem of fine lines on the screen caused by the brightness difference of pixels in different rows, and improving the quality of the display screen. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0056] Figure 1 is a schematic diagram of a pixel architecture in the related art;

[0057] Figure 2 It is a structural schematic diagram of a timing control circuit provided in an embodiment of the present application;

[0058] Figure 3 is a structural schematic diagram of another timing control circuit provided in an embodiment of the present application;

[0059] Figure 4 is a schematic diagram of pixel leakage under variable refresh rate in the related art;

[0060] Figure 5 This is a structural diagram of another timing control circuit provided in an embodiment of the present application.

[0061] Figure 6It is a schematic diagram of a time partition provided in an embodiment of the present application;

[0062] Figure 7 is a structural schematic diagram of another timing control circuit provided in an embodiment of the present application;

[0063] Figure 8 It is a schematic diagram of the steps of a display driving method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0064] The following will be combined with the drawings in some embodiments to clearly and completely describe the technical solutions in some embodiments. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0065] Figure 1 is a schematic diagram of a pixel architecture in the related art, such as Figure 1 As shown, if it is necessary to display a R127 / G127 mixed color picture, R127 represents the red grayscale value, G127 represents the green grayscale value, and the R1 / G1 sub-pixel and the R2 / G2 sub-pixel are compared. Since the charged pixel before sub-pixel R1 is sub-pixel G1, and sub-pixel G1 has a G1(127) grayscale pre-charge voltage, sub-pixel R1 is better charged. The charged pixel before sub-pixel R2 is sub-pixel B1, and the grayscale pre-charge voltage of sub-pixel B1 is B1(0), so sub-pixel R2 is relatively undercharged. Therefore, there is a difference in pre-charge voltage between sub-pixel R1 and sub-pixel R2. Similarly, there is also a difference in pre-charge voltage between sub-pixel G1 and sub-pixel G2, resulting in charging differences between pixels in different rows.

[0066] In the Zigzag pixel architecture in the related art, the nth sub-pixel in each row is driven by the same source line, but the sub-pixels are arranged in an interlaced manner in space. The advantage is that the power consumption of column flipping can achieve the display effect of dot flipping. For special pixel architectures such as Zigzag, when the pixel charging time is getting shorter and shorter, the charging difference leads to more obvious brightness differences of pixels in different rows, which is easy to cause problems such as fine lines on the screen.

[0067] Figure 2 is a structural diagram of a timing control circuit 10 provided in an embodiment of the present application, the timing control circuit 10 comprises: a first detection module 101, a first identification module 102 and a compensation output module 103;

[0068] The first detection module 101 is electrically connected to the first identification module 102, and is used to receive a display signal of a frame, determine a pixel clock frequency corresponding to the display signal, and send the pixel clock frequency to the first identification module 102;

[0069] The first identification module 102 is electrically connected to the compensation output module 103, and is used to determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and send a first compensation list corresponding to the target frequency partition to the compensation output module 103; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows;

[0070] The compensation output module 103 is used to compensate the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation table, and output the compensated display signal.

[0071] In some embodiments, the timing control circuit 10 in the display device may include a detection sub-circuit composed of a first detection module 101, a first identification module 102 and a compensation output module 103. The detection sub-circuit compensates for the grayscale value of the pixel in the display signal by detecting the pixel clock frequency corresponding to the display signal, so that the timing control circuit 10 drives the display panel through the compensated display signal, which can reduce the brightness difference caused by insufficient charging of pixels in different rows, avoid problems such as fine lines on the screen, and improve the display quality.

[0072] For example, the timing control circuit 10 may be a timing controller (TCON), and the TCON may be electrically connected to a mainboard of the display device to receive a display signal sent by the mainboard.

[0073] In some embodiments, the first detection module 101 receives a display signal of a frame, and the display signal is, for example, a low-voltage differential signal (LVDS), an embedded display port (eDP) signal, and a high-definition digital display interface signal (V-by-One, VBO), etc. This is only an example, and the embodiments of the present application are not limited to this.

[0074] The first detection module 101 can detect the pixel clock frequency of the display signal, which refers to the frequency of the pixel clock signal (DCLK) corresponding to the display signal. The pixel clock frequency is related to the total number of horizontal pixels and vertical pixels in the pixel array of the display panel and the refresh rate corresponding to the display signal, and can be calculated by the following formula (1).

[0075] DCLKFreq=H-Total×V-Total×FRS(1)

[0076] Among them, DCLKFreq represents the pixel clock frequency, H-Total represents the total number of horizontal pixels, V-Total represents the total number of vertical pixels, and FRS represents the refresh rate corresponding to the display signal.

[0077] In some embodiments, the first detection module 101 may include a control unit, a computing unit, and a digital circuit unit such as a storage unit. The first detection module 101 may communicate with the mainboard of the display device, receive the display signal sent by the mainboard, and may also obtain the total number of horizontal pixels and the total number of vertical pixels of the display panel of the display device from the mainboard. Then the first detection module 101 obtains the pixel clock frequency of the display signal through internal calculation. For example, the first detection module 101 may be a detector (DCLKDetector), and the DCLKDetector may calculate the size of DCLKFreq according to formula (1) through the H-Total information, V-Total information, and FRS information provided by the mainboard.

[0078] In some embodiments, a plurality of different frequency partitions may be pre-stored in the first identification module 102, each frequency partition being a frequency interval within a certain range, and the frequency ranges of different frequency partitions do not overlap. For example, as shown in Table 1, the maximum value of the pixel clock frequency is 1000 megahertz (MHz), and 1000MHz can be divided into four frequency partitions through partition nodes 400MHz, 600MHz, and 800MHz, namely (0,400], (400,600], (600,800], and (800,1000]).

[0079] In some embodiments, as shown in Table 1, one frequency partition corresponds to one first compensation list, and different frequency partitions correspond to different first compensation lists. In Table 1, LOD_1 to LOD_4 respectively represent the first compensation lists corresponding to the frequency partitions (0, 400], (400, 600], (600, 800], and (800, 1000]. Multiple frequency partitions and their multiple first compensation lists can be pre-stored in the first identification module 102, or multiple frequency partitions can be pre-stored in the first identification module 102 and the multiple first compensation lists can be stored in the external storage unit of the first identification module 102. The embodiment of the present application does not limit this.

[0080] Table 1 Frequency partition

[0081] Frequency partition (0,400] (400,600] (600,800] (800,1000] Partition Node 400 600 800 1000 LOD List LOD_1 LOD_2 LOD_3 LOD_4

[0082] In some embodiments, for brightness differences caused by charging differences in different rows of pixels, this embodiment compensates for the brightness differences between different rows of pixels by using the compensation relationship of grayscale values ​​between pixels in adjacent pixel rows preset in the first compensation list. For adjacent pixel rows, the grayscale values ​​of pixels in one row can be adjusted according to the grayscale values ​​of pixels in another row, so that the grayscale values ​​of the pixels in the row after adjustment can reduce the brightness differences between the two adjacent rows of pixels.

[0083] The first compensation list may include two groups of preset grayscale values ​​and adjusted grayscale values ​​compensated for the preset grayscale values, and the compensation relationship is specifically a corresponding relationship between the preset grayscale values ​​and the adjusted grayscale values.

[0084] In some embodiments, the first detection module 101 sends the detected pixel clock frequency to the first identification module 102, and the first identification module 102 compares the pixel clock frequency with a plurality of preset frequency partitions to determine which frequency partition the pixel clock frequency belongs to, and the frequency partition is the target frequency partition. Then, the first identification module 102 sends the first compensation list corresponding to the target frequency partition to the compensation output module 103, so that the compensation output module 103 compensates the display signal according to the first compensation list.

[0085] In some embodiments, for the grayscale value of a pixel in the display signal, the compensation output module 103 can determine a preset grayscale value that is the same as the grayscale value of the pixel based on the compensation relationship between the grayscale values ​​of pixels in adjacent pixel rows in the first compensation list, and a preset grayscale value that is the same as the grayscale value of pixels connected to the same data line in pixel rows adjacent to the row where the pixel is located, look up the table to determine the adjusted grayscale value corresponding to this group of preset grayscale values, and compensate the grayscale value of the pixel in the display signal to the adjusted grayscale value.

[0086] For problems such as fine lines on the display screen caused by brightness differences between pixels in different rows, the compensation output module 103 can compensate the grayscale value of pixels in at least one pixel row in the display signal to an adjusted grayscale value, so that the compensated display signal can reduce the brightness differences between pixels in different rows. For example, for a 90 grayscale image, pixels in different rows can be given 90 grayscale or 90.5 grayscale values ​​respectively to compensate for the charging differences between pixels in different rows.

[0087] In the embodiment of the present application, the pixel clock frequency corresponding to the display signal is detected by the first detection module 101 in the timing control circuit 10, so that the first identification module 102 identifies the correspondence between the pixel clock frequency and the preset multiple frequency partitions. The first identification module 102 outputs the first compensation list corresponding to the target frequency partition to the compensation output module 103 according to the target frequency partition corresponding to the pixel clock frequency. Since the first compensation list includes the compensation relationship between the grayscale values ​​of pixels in adjacent pixel rows, the compensation output module 103 can compensate the grayscale values ​​of pixels in at least one pixel row in the display signal according to the compensation relationship between the grayscale values ​​of pixels in adjacent pixel rows in the first compensation list, and output the compensated display signal. In this way, by driving the display screen with the compensated display signal, the charging difference between the pixels in at least one pixel row and the pixels in the adjacent rows can be reduced, thereby improving the problem of fine lines on the screen caused by the brightness difference of pixels in different rows, and improving the quality of the displayed screen.

[0088] Optionally, the first identification module 102 includes a first partitioning unit 1021 and a first enabling unit 1022;

[0089] The first partition unit 1021 is electrically connected to the first detection module 101 and the first enabling unit 1022, respectively, and is used to determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and send a first enabling signal corresponding to the target frequency partition to the first enabling unit 1022;

[0090] The first enabling unit 1022 is also electrically connected to the compensation output module 103 , and is configured to send the first compensation list corresponding to the first enabling signal to the compensation output module 103 .

[0091] In some embodiments, multiple frequency partitions can be preset in the first partition unit 1021. The first partition unit 1021 receives the pixel clock frequency sent by the first detection module 101, compares the pixel clock frequency with the preset multiple frequency partitions, determines which frequency partition the pixel clock frequency belongs to, and determines the frequency partition as the target frequency partition.

[0092] For example, the first partition unit 1021 may be a digital signal processor (DSP), and a plurality of frequency partitions may be stored in the DSP in advance. A signal processing algorithm may be written into the DSP, and the signal processing algorithm is used to determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions. After receiving the pixel clock frequency, the DSP executes the signal processing algorithm and outputs a first enabling signal corresponding to the target frequency partition to the first enabling unit 1022. This is merely an example, and the embodiments of the present application are not limited thereto.

[0093] In some embodiments, the first enable signal is used to indicate to the first enabling unit 1022 which one of the preset multiple frequency partitions the target frequency partition is, so that the first enabling unit 1022 sends the first compensation list corresponding to the target frequency partition to the compensation output module 103 .

[0094] Optionally, the first enabling unit 1022 includes a plurality of first controllers;

[0095] The enable terminal of the first controller is electrically connected to the first partition unit 1021, and the output terminal of the first controller is electrically connected to the compensation output module 103;

[0096] The first controller is used for sending the first compensation list inputted by the input end to the compensation output module 103 through the output end when the enabling end receives the first enabling signal sent by the first partitioning unit 1021 .

[0097] In some embodiments, the first partition unit 1021 may include a plurality of output terminals, and the plurality of output terminals of the first partition unit 1021 are connected to the enable terminals of the plurality of first controllers in a one-to-one correspondence, and each output terminal of the first partition unit 1021 is used to output a first enable signal of a corresponding frequency partition. Each first controller corresponds to a preset frequency partition, and is used to enable output of a first compensation list corresponding to the frequency partition to the compensation output module 103. The input terminal of the first controller may be electrically connected to a storage unit in the timing control circuit 10 or an external storage module of the timing control circuit 10, and is used to receive a first compensation list corresponding to the first controller.

[0098] In some embodiments, after the first partition unit 1021 determines the target frequency partition corresponding to the pixel clock frequency, it sends a corresponding first enable signal to the enable terminal of the first controller corresponding to the target frequency partition through the output terminal corresponding to the target frequency partition among the multiple output terminals. In response to the first enable signal received by the enable terminal, the first controller outputs the first compensation list input by the input terminal to the compensation output module 103.

[0099] For example, the first controller may be an enable controller. When the enable terminal of the first controller detects the input of the first enable signal, the first compensation list of the input terminal may be output to the compensation output module 103 through the output terminal.

[0100] Optionally, the compensation output module 103 includes a first input terminal, and the first input terminal is electrically connected to the output terminals of the plurality of first controllers respectively;

[0101] The compensation output module 103 is used to receive a first compensation list through a first input terminal, and determine the adjusted grayscale value of pixels in at least one pixel row after compensation according to the first compensation list, so as to compensate the grayscale value of pixels in at least one pixel row in the display signal.

[0102] In some embodiments, the output terminals of the plurality of first controllers in the first enabling unit 1022 are connected to the same first input terminal of the compensation output module 103. The first partitioning unit 1021 identifies a frequency partition from the preset plurality of frequency partitions according to the pixel clock frequency and determines it as the target frequency partition. Then, the first partitioning unit 1021 outputs a first enabling signal corresponding to the target frequency partition to the corresponding first controller through an output terminal, so that the first controller enables output of the first compensation list corresponding to the target frequency partition. That is, the first enabling unit 1022 outputs only one first compensation list to the compensation output module 103 for the display signal of one frame of the picture.

[0103] In some embodiments, the compensation output module 103 receives a first compensation list output by the first enabling unit 1022 through the first input terminal, and then compensates the display signal according to the first compensation list. Specifically, for pixels in a pixel row to be compensated, the compensation output module 103 can look up a table to determine the adjustment grayscale value corresponding to the set of preset grayscale values ​​according to the preset grayscale values ​​corresponding to the grayscale values ​​of the pixels in the row and the preset grayscale values ​​corresponding to the grayscale values ​​of the pixels in the adjacent pixel row, so as to compensate for the grayscale values ​​of the pixels in the pixels to be compensated.

[0104] Figure 3 is a structural diagram of another timing control circuit 10 provided in an embodiment of the present application, such as Figure 3 As shown, the timing control circuit 10 includes a first detection module 101 (DCLK Detector), a first partition unit 1021 (DSP1), the first partition unit 1021 includes M first controllers (EnableController), and a compensation output module 103 (Synthesizer). Among them, DSP1 includes M output terminals (O_M), M is a positive integer. The enable terminal (EN) of each first controller is electrically connected to the corresponding output terminal O_M in DSP1, the input terminal of the first controller receives the corresponding first compensation list (LOD_M), and the output terminal of the first controller is electrically connected to a first input terminal (LOD) of the compensation output module 103.

[0105] like Figure 3As shown, the first detection module 101 receives a display signal of a frame and detects the display signal, and sends the pixel clock frequency corresponding to the display signal to DSP1. DSP1 determines the target frequency partition corresponding to the pixel clock frequency, and sends a first enable signal to the corresponding first controller through the output terminal O_M corresponding to the target frequency partition. The first controller enables the output of the first compensation list LOD_M corresponding to the target frequency partition to the first input terminal LOD of the compensation output module 103.

[0106] Figure 4 is a schematic diagram of pixel leakage under variable refresh rate in the related art, such as Figure 4 As shown, after the pixel charging is completed within one frame time, if the vertical scanning blanking area (V-Blank) time is long, the charge of the pixel in the V-Blank area will leak out. Figure 4 The horizontal axis represents time, and the vertical axis represents voltage. Under the condition of variable refresh rate (VRR), the V-Blank duration in the display signal of different frames may be different. Different V-Blank durations lead to different leakage times of pixels in different frames, causing differences in the amount of charge in the pixels, and ultimately causing differences in pixel brightness.

[0107] Alternatively, if Figure 5 As shown, the timing control circuit 10 further includes a second detection module 104 and a second identification module 105;

[0108] The second detection module 104 is electrically connected to the second identification module 105, and is used to receive a display signal of a frame, determine a first blanking duration corresponding to the display signal, and send the first blanking duration to the second identification module 105; wherein the first blanking duration is the duration of the vertical scanning blanking area corresponding to the display signal;

[0109] The second identification module 105 is electrically connected to the compensation output module 103, and is used to send a second compensation list corresponding to the first blanking duration to the compensation output module 103; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each grayscale value;

[0110] The compensation output module 103 is further configured to compensate the grayscale value of each pixel in the display signal according to the second compensation list.

[0111] In some embodiments, the detection subcircuit composed of the first detection module 101, the first identification module 102 and the compensation output module 103 in the timing control circuit 10 may further include a second detection module 104 and a second identification module 105. The detection subcircuit may compensate the grayscale value of each pixel in the display signal by detecting the V-Blank duration corresponding to the display signal, so as to compensate the grayscale value of a frame. The timing control circuit 10 drives the display panel through the compensated display signal, which can reduce the leakage time difference caused by the V-Blank duration difference between different frames, improve the pixel brightness difference caused by the leakage time difference, and improve the display image quality.

[0112] In some embodiments, the second detection module 104 receives a display signal of a frame of the picture, and the display signal is, for example, LVDS, eDP, and VBO. The second detection module 104 can detect the V-Blank duration of the display signal, and in this embodiment, the V-Blank duration is referred to as the first blanking duration. Among them, a frame of picture time may include a display phase (V-active) and a vertical scanning blanking area (V-Blank). The second detection module 104 can subtract the display phase duration from the overall time corresponding to the display signal of a frame of the picture to obtain the V-Blank duration, which is also the first blanking duration. This is only an example, and the embodiments of the present application are not limited to this.

[0113] In some embodiments, the second detection module 104 may include a control unit, a computing unit, a storage unit and other digital circuit units. The second detection module 104 may communicate with the mainboard of the display device and receive the display signal sent by the mainboard. For example, the second detection module 104 may be a detector (V-Blank Detector).

[0114] In some embodiments, a plurality of duration partitions may be pre-stored in the second identification module 105, each duration partition being a time interval within a certain range, and the duration ranges of different duration partitions do not overlap with each other. One duration partition corresponds to one second compensation list, and different duration partitions correspond to different second compensation lists. Multiple duration partitions and their multiple second compensation lists may be pre-stored in the second identification module 105, or multiple duration partitions may be pre-stored in the second identification module 105 and multiple second compensation lists may be stored in an external storage unit of the second identification module 105, and the embodiments of the present application do not impose any restrictions on this.

[0115] In some embodiments, the V-Blank durations corresponding to the display signals of different frames are different. In this embodiment, the display signal of a frame is compensated as a whole through the multiple grayscale values ​​preset in the second compensation list and the compensation coefficient corresponding to each grayscale value, that is, the grayscale value of each pixel in the display signal is compensated, thereby reducing the pixel brightness difference caused by the different V-Blank durations of different frames. For example, when displaying a 90 grayscale picture, grayscale values ​​such as 90.1 and 90.2 can be actually displayed to compensate for the brightness difference caused by different V-Blank durations.

[0116] The plurality of grayscale values ​​preset in the second compensation list may include a plurality of grayscale values ​​in the grayscale of the image screen Gray0 to 255, and a corresponding compensation coefficient may be set for each preset grayscale value, the compensation coefficient being the compensation magnification corresponding to the grayscale value. For example, the grayscale of Gray63 may be gained to the grayscale of Gray63.1 through the compensation coefficient.

[0117] In some embodiments, the second detection module 104 sends the detected first blanking duration to the second identification module 105, the second identification module 105 compares the first blanking duration with a plurality of preset duration partitions, and sends a second compensation list corresponding to the first blanking duration to the compensation output module 103, so that the compensation output module 103 compensates the grayscale value of each pixel in the display signal according to the second compensation list.

[0118] Optionally, the second identification module 105 includes a second partitioning unit 1051 and a second enabling unit 1052;

[0119] The second partition unit 1051 is electrically connected to the second detection module 104 and the second enabling unit 1052 respectively, and is used to compare the first blanking duration with the multiple duration partitions in sequence according to the preset multiple duration partitions from small to large, and send the second enabling signal corresponding to the duration partition to the second enabling unit 1052 each time the first blanking duration is greater than the minimum length of a duration partition; wherein the durations of the vertical scanning blanking areas corresponding to the multiple duration partitions do not overlap with each other;

[0120] The second enabling unit 1052 is also electrically connected to the compensation output module 103 , and is configured to send the second compensation list corresponding to the second enabling signal to the compensation output module 103 .

[0121] In some embodiments, the second partition unit 1051 receives the first blanking duration sent by the second detection module 104, and compares the first blanking duration with the preset multiple duration partitions in order from small to large. When the first blanking duration is greater than the minimum length of a duration partition, the second enable signal is triggered once, that is, the second enable signal corresponding to the duration partition is sent to the second enable unit 1052. The second partition unit 1051 sends the second enable signal to the second enable unit 1052 as many times as the second enable signal is triggered during the comparison between the first blanking duration and the preset multiple duration partitions. In this way, the duration partition corresponding to the second enable signal sent by the second partition unit 1051 to the second enable unit 1052 for the last time is the duration range to which the first blanking duration belongs.

[0122] For example, the second partition unit 1051 can be a digital signal processor (DSP), and multiple time partitions can be stored in the DSP in advance. A signal processing algorithm can be written into the DSP, and the signal processing algorithm is used to compare the first blanking duration with multiple time partitions in order from small to large according to the preset multiple time partitions, and determine whether the first blanking duration is greater than the minimum length of a time partition at each comparison. After receiving the first blanking duration, the DSP executes the signal processing algorithm and outputs the second enable signal triggered by each comparison to the second enable unit 1052. This is only an example, and the embodiments of the present application are not limited to this.

[0123] Figure 6 is a schematic diagram of a time partition provided in an embodiment of the present application, such as Figure 6 As shown in FIG. 1 , the duration of the V-active zone is 1440 microseconds (μs), the duration of the V-Blank zone is (1440,7200], and the duration of the V-Blank zone is 5760 μs. The V-Blank zone (1440,7200] can be divided into 6 duration partitions, namely [1440,2400], (2400,3360], (3360, 4320], (4320, 5280], (5280, 6240], and (6240, 7200]. One duration partition corresponds to one second compensation list, and different duration partitions correspond to different second compensation lists. The six duration partitions correspond to GLC_1, GLC_2, GLC_3, GLC_4, GLC_5, and GLC_6, respectively. This is only an example. In actual applications, the number of partitions and the duration range of each duration partition can be set as needed, and the embodiments of the present application are not limited to this.

[0124] Table 2 shows a plurality of second compensation lists GLC_N provided in an embodiment of the present application. Each second compensation list in Table 2 corresponds to a time partition, for example, GLC_1, GLC_2, GLC_3, GLC_4, GLC_5 and GLC_6 correspond to time partitions [1440, 2400], (2400, 3360], (3360, 4320], (4320, 5280], (5280, 6240], and (6240, 7200], respectively. For gray scales Gray0 to 255, each second compensation list sets three gray scale values ​​Gray63, Gray127 and Gray191 and their compensation coefficients, for example, the compensation coefficients 1-1, 1-2 and 1-3 corresponding to the GLC_1 list in Table 2.

[0125] Table 2 GLC_N list

[0126] Gray0 Gray63 Gray127 Gray191 Gray255 GLC_1 - 63*coefficient 1-1 127*factor 1-2 191*coefficient 1-3 - GLC_2 - 63*coefficient 2-1 127*factor 2-2 191*coefficient 2-3 - GLC_3 - 63*coefficient 3-1 127*factor 3-2 191*coefficient 3-3 - GLC_4 - 63*coefficient 4-1 127*factor 4-2 191*coefficient 4-3 - GLC_5 - 63*factor 5-1 127*factor 5-2 191*coefficient 5-3 - GLC_6 - 63*coefficient 6-1 127*coefficient 6-2 191*coefficient 6-3 -

[0127] In some embodiments, the compensation coefficients corresponding to the grayscale values ​​between Gray0~Gray63, Gray63~Gray127, Gray127~Gray191, and Gray191~Gray255 can be obtained by interpolation. For example, linear interpolation compensation can be performed through the internal setting of the GLC digital module to avoid excessive total data calculation. In practical applications, in order to improve the compensation accuracy, the grayscale preset in the second compensation list can be subdivided to achieve higher accuracy compensation. For example, the grayscale values ​​can be subdivided into Gray31, Gray63, Gray95, Gray127, Gray159, Gray191, and Gray223, and Gray0 grayscale and Gray255 grayscale are generally not compensated.

[0128] Optionally, the second enabling unit 1052 includes a plurality of second controllers;

[0129] The enable terminal of the second controller is electrically connected to the second partition unit 1051, and the output terminal of the second controller is electrically connected to the compensation output module 103;

[0130] The second controller is used for sending the second compensation list inputted by the input end to the compensation output module 103 through the output end when the enabling end receives the second enabling signal sent by the second partitioning unit 1051 .

[0131] In some embodiments, the second partition unit 1051 may include a plurality of output terminals, and the plurality of output terminals of the second partition unit 1051 are connected to the enable terminals of the plurality of second controllers in a one-to-one correspondence, and each output terminal of the second partition unit 1051 is used to output the second enable signal of the corresponding duration partition. Each second controller corresponds to a preset duration partition, and is used to enable the output of the second compensation list corresponding to the duration partition to the compensation output module 103. The input terminal of the second controller may be electrically connected to the storage unit in the timing control circuit 10 or the external storage module of the timing control circuit 10, and is used to receive the second compensation list corresponding to the second controller.

[0132] In some embodiments, after the second partition unit 1051 triggers the second enable signal corresponding to a duration partition, the corresponding second enable signal is sent to the enable terminal of the second controller corresponding to the duration partition through the output terminal corresponding to the duration partition among the multiple output terminals. In response to the second enable signal received by the enable terminal, the second controller outputs the second compensation list input by the input terminal to the compensation output module 103.

[0133] For example, the second controller may be an enable controller. When the enable terminal of the second controller detects the input of the second enable signal, the second compensation list of the input terminal may be output to the compensation output module 103 through the output terminal.

[0134] Optionally, the compensation output module 103 includes a plurality of second input terminals, and the plurality of second input terminals are connected to the output terminals of the plurality of second controllers in a one-to-one correspondence;

[0135] The compensation output module 103 is used to receive at least one second compensation list through multiple second input terminals, and determine the compensation coefficient corresponding to the grayscale value of each pixel in the display signal by looking up the table according to the last second compensation list received, and determine the output grayscale value of each pixel in the display signal according to the compensation coefficient to compensate the grayscale value of each pixel in the display signal.

[0136] In some embodiments, each second input terminal of the compensation output module 103 corresponds to a preset duration partition, and each second input terminal is the same as the duration partition corresponding to the second controller connected thereto. The second partition unit 1051 compares the first blanking duration with a plurality of preset duration partitions, triggering a second enable signal at least once, and then at least one second controller in the second enable unit 1052 sends a corresponding second compensation list to the compensation output module 103, so that the compensation output module 103 receives at least one second compensation list through a plurality of second input terminals.

[0137] The order in which the compensation output module 103 receives the second compensation list has nothing to do with the order of the plurality of second input terminals themselves, but only has something to do with the order in which the plurality of second controllers send the second compensation list to the compensation output module 103 .

[0138] In some embodiments, the second enable signal sent by the second partition unit 1051 to the second enable unit 1052 for the last time, then the duration partition corresponding to the second enable signal triggered for the last time is the duration range finally determined by the first blanking duration. Therefore, the compensation output module 103 compensates the grayscale value of each pixel in the display signal according to the last second compensation list received. Specifically, according to the grayscale value of each pixel, the compensation coefficient corresponding to the grayscale value is obtained by looking up the table in the second compensation list, and then the grayscale value is multiplied by the compensation coefficient, and the product result is the grayscale value of the pixel after compensation. The grayscale value of each pixel after compensation is used as the output grayscale value, thereby compensating the grayscale value of each pixel in the display signal.

[0139] Figure 7 is a structural diagram of another timing control circuit 10 provided in an embodiment of the present application, such as Figure 7 As shown, the timing control circuit 10 also includes a second detection module 104 (V-Blank Detector), a second partition unit 1051 (DSP2), and a second enabling unit 1052 including N second controllers (EnableController). Among them, DSP2 includes M output terminals (G_N), and N is a positive integer. The enable terminal (EN) of each second controller is electrically connected to the corresponding output terminal G_N in DSP2, the input terminal of the second controller receives the corresponding second compensation list (GLC_N), and the output terminals of the multiple second controllers are connected to the multiple second input terminals (GLCN) of the compensation output module 103 in a one-to-one correspondence.

[0140] like Figure 7 As shown, the second detection module 104 receives a display signal of a frame and detects the display signal, and sends the first blanking duration corresponding to the display signal to DSP2. DSP2 compares the first blanking duration with a plurality of preset duration partitions in sequence, triggers a second enable signal, and sends the second enable signal to the corresponding second controller through the corresponding output terminal G_N. The second controller enables the output of the corresponding second compensation list GLC_N to the second input terminal GLCN of the compensation output module 103.

[0141] The embodiment of the present application provides a display device, the display device includes a display panel, and a timing control circuit 10 as in the above embodiment;

[0142] The timing control circuit 10 is electrically connected to the display panel, and is used to output a compensated display signal to the display panel, so as to drive the display panel to display.

[0143] In some embodiments, the timing control circuit 10 can drive the display panel through the gate driving circuit and the source driving circuit. The timing control circuit 10 controls the gate driving circuit and the source driving circuit to output driving signals respectively according to the compensated display signal, and drives the display panel to display a frame corresponding to the compensated display signal. For example, the display device can be a liquid crystal display (LCD), and the display panel can be an LCD panel.

[0144] A display device provided in an embodiment of the present application can achieve the same or similar technical effects as the timing control circuit 10 in the aforementioned embodiment, and will not be described again here to avoid repetition.

[0145] Figure 8 Schematic diagram of the steps of a display driving method provided by an embodiment of the present application. Figure 8 As shown, the display driving method includes:

[0146] Step S1, receiving a display signal of a frame of picture, and determining a pixel clock frequency corresponding to the display signal;

[0147] Step S2, determining a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and determining a corresponding first compensation list according to the target frequency partition; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows;

[0148] Step S3 , compensating the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation table, and outputting the compensated display signal to the display panel to drive the display panel for display.

[0149] Optionally, step S3 may include the following sub-steps:

[0150] Sub-step A1, for the grayscale value of a first pixel in a first pixel row in the display signal, determining the grayscale value of a second pixel in a second pixel row adjacent to the first pixel row; wherein the first pixel and the second pixel are connected to the same data line, and the first pixel receives a driving signal transmitted by the data line later than the second pixel;

[0151] Sub-step A2, according to the grayscale value of the first pixel and the grayscale value of the second pixel, determine the adjusted grayscale value of the first pixel after compensation based on the first compensation list, so as to compensate for the grayscale value of each first pixel in the first pixel row in the display signal; wherein, at least one pixel row includes the first pixel row.

[0152] In some embodiments, the first pixel row is a pixel row to be compensated. The compensation output module 103 can compare the grayscale values ​​of pixels between different pixel rows in the display signal of a frame of the picture, and use the pixel row with a large difference in grayscale value between adjacent pixel rows as the pixel row to be compensated, that is, the first pixel row. Alternatively, the compensation output module 103 can directly start from the second row of pixels of the display panel and sequentially use each row of pixels as the first pixel row for grayscale value compensation, which is not limited in the embodiments of the present application.

[0153] In some embodiments, the second pixel row is a pixel row adjacent to the first pixel row, and the second pixel row is the previous row of the first pixel row, that is, the first pixel in the first pixel row receives the driving signal transmitted by the data line later than the second pixel in the second pixel row. In this way, for the first pixel and the second pixel connected to the same data line, the first pixel has the grayscale pre-charge voltage corresponding to the second pixel. If the grayscale values ​​of the second pixels in the second pixel row are different, the pre-charge grayscale voltages of the first pixels in the first pixel row are different.

[0154] In some embodiments, for any first pixel in a first pixel row, a second pixel in a second pixel row adjacent to the first pixel row and connected to the same data line as the first pixel is determined. Then, based on the grayscale value of the group of first pixels and the grayscale value of the second pixel, a table lookup is performed based on the first compensation list to obtain an adjusted grayscale value corresponding to the group of grayscale values ​​as the adjusted grayscale value of the first pixel after compensation.

[0155] In this way, by compensating the original grayscale value of each first pixel in the first pixel row in the display signal with an adjusted grayscale value to compensate for the grayscale value of each first pixel in the first pixel row in the display signal, the charging difference of each first pixel in the first pixel row due to the pre-charge voltage difference can be reduced, and the pixel brightness difference caused by the charging difference between the two adjacent pixel rows, the first pixel row and the second pixel row, can be improved.

[0156] Optionally, sub-step A2 may include the following sub-steps:

[0157] Determine a preset grayscale value that is the same as the grayscale value of the first pixel according to a first set of grayscale values ​​in the first compensation list, and determine a preset grayscale value that is the same as the grayscale value of the second pixel according to a second set of grayscale values ​​in the first compensation list;

[0158] According to the correspondence between the two preset grayscale values, a corresponding adjustment grayscale value is acquired from the first compensation list as the adjustment grayscale value after the first pixel is compensated;

[0159] Among them, the first compensation list includes a first group of grayscale values, a second group of grayscale values, and multiple adjusted grayscale values ​​corresponding to multiple groups of correspondence relationships; the first group of grayscale values ​​and the second group of grayscale values ​​respectively include multiple preset grayscale values; the multiple groups of correspondence relationships include the correspondence between each preset grayscale value in the first group of grayscale values ​​and different preset grayscale values ​​in the second group of grayscale values.

[0160] In some embodiments, the first group of grayscale values ​​in the first compensation list is used to look up the grayscale value of the first pixel in the first pixel row, and the second group of grayscale values ​​in the first compensation list is used to look up the grayscale value of the second pixel in the second pixel row. Multiple preset grayscale values ​​in the first group of grayscale values ​​are paired with multiple preset grayscale values ​​in the second group of grayscale values ​​to obtain multiple groups of correspondences between the preset grayscale values, and an adjustment grayscale value is set for each group of correspondences to obtain multiple adjustment grayscale values. The adjustment grayscale value is used to compensate for the grayscale value of the first pixel in the first pixel row.

[0161] In some embodiments, when a table lookup is performed based on the grayscale value of the first pixel and the grayscale value of the second pixel, a preset grayscale value that is the same as or close to the grayscale value of the first pixel is determined from a plurality of preset grayscale values ​​of the first set of grayscale values, and a preset grayscale value that is the same as or close to the grayscale value of the second pixel is determined from a plurality of preset grayscale values ​​of the second set of grayscale values. If the same preset grayscale value cannot be directly found from the first set of grayscale values ​​and the second set of grayscale values, a temporary grayscale value is determined by interpolating the similar preset grayscale values, and the adjustment grayscale value is also interpolated when the adjustment grayscale value is subsequently searched, and the adjustment grayscale value corresponding to the temporary grayscale value is determined.

[0162] In some embodiments, two preset grayscale values ​​are obtained by looking up a table based on the grayscale value of the first pixel and the grayscale value of the second pixel, and then the same corresponding relationship is determined from multiple groups of corresponding relationships in the first compensation list based on the corresponding relationship between the two preset grayscale values, and then the adjusted grayscale value corresponding to the corresponding relationship is used as the adjusted grayscale value of the first pixel after compensation. If there is a temporary grayscale value determined by interpolation in the two obtained preset grayscale values, a similar corresponding relationship is determined from multiple groups of corresponding relationships and its adjusted grayscale value is interpolated, and the interpolation result is used as the adjusted grayscale value of the first pixel after compensation.

[0163] Table 3 shows a first compensation list, namely, a LOD_M list, provided by an embodiment of the present application. As shown in Table 3, the first row of the table is a first set of preset grayscale values, and the first column of the table is a second set of preset grayscale values. Table 3 also shows the adjusted grayscale values ​​corresponding to multiple sets of correspondences between preset grayscale values. For example, the grayscale value of a first pixel is 127, and the grayscale value of the second pixel corresponding to the first pixel is 63. According to the correspondence between the preset grayscale value 127 in the first set of grayscale values ​​and the preset grayscale value 63 in the second set of grayscale values, the adjusted grayscale value is determined to be 130 by looking up the table. The grayscale value corresponding to the first pixel is adjusted to 130 to compensate for the grayscale value of the first pixel.

[0164] Table 3 LOD _ M-list

[0165]

[0166] Optionally, before outputting the compensated display signal to the display panel, the display driving method further includes:

[0167] Step S4, determining a first blanking duration corresponding to the display signal; wherein the first blanking duration is the time length of a vertical scanning blanking area corresponding to the display signal;

[0168] Step S5, determining a second compensation list corresponding to the first blanking duration; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each grayscale value;

[0169] Step S6, compensating the grayscale value of each pixel in the display signal according to the second compensation table.

[0170] Optionally, step S5 may include the following sub-steps:

[0171] Sub-step B1, comparing the first blanking duration with the multiple time partitions in ascending order of the preset multiple time partitions, and triggering the second compensation list corresponding to the time partition each time the first blanking duration is greater than the minimum length of a time partition; wherein the time lengths of the vertical scanning blanking areas corresponding to the multiple time partitions do not overlap with each other;

[0172] Sub-step B2: determining the last triggered second compensation list as the second compensation list corresponding to the first blanking duration.

[0173] Optionally, step S6 may include the following sub-steps:

[0174] Sub-step C1, for a target pixel having an adjusted grayscale value, determining an output grayscale value of the target pixel according to the adjusted grayscale value and a compensation coefficient corresponding to the target pixel; wherein the compensation coefficient corresponding to the target pixel is a compensation coefficient corresponding to the grayscale value of the target pixel before compensation;

[0175] Sub-step C2, for pixels other than the target pixel, determining output grayscale values ​​of other pixels according to original grayscale values ​​of other pixels and corresponding compensation coefficients;

[0176] Before outputting the compensated display signal to the display panel, the display driving method further includes:

[0177] Step S7, obtaining a compensated display signal according to the output grayscale value of the target pixel and the output grayscale values ​​of other pixels.

[0178] In some embodiments, for a display signal of a frame, the first detection module 101 and the first identification module 102 detect the pixel clock frequency, and the compensation output module 103 receives a first compensation list corresponding to the target frequency partition to which the pixel clock frequency belongs, and the second detection module 104 and the second identification module 105 detect the first blanking duration, and the compensation output module 103 receives at least one second compensation list. The compensation output module 103 performs grayscale value compensation on the display signal according to the first compensation list and the last received second compensation list.

[0179] Specifically, when the compensation output module 103 compensates the grayscale value of each pixel in the display signal according to the second compensation list, if a certain pixel has been compensated by the adjusted grayscale value, then the pixel is the target pixel, and the compensation output module 103 can multiply the adjusted grayscale value by the compensation coefficient to obtain the final output grayscale value of the target pixel. If the pixel has not been compensated by the adjusted grayscale value, then it is other pixels, and the output grayscale value of other pixels is the original grayscale value multiplied by the compensation coefficient. In this way, the signal of each pixel in the display signal is compensated according to the second compensation list.

[0180] In some embodiments, in order to improve processing efficiency, the supplementary output module can compensate the grayscale value of each pixel in the display signal according to the first compensation list and the second compensation list simultaneously. Specifically, the compensation output module 103 can determine the adjusted grayscale value of the pixel after compensation based on the original grayscale value of a certain pixel, based on the first compensation list, and determine the compensation coefficient corresponding to the grayscale value of the pixel based on the second compensation list, and then multiply the adjusted grayscale value by the compensation coefficient to obtain the output grayscale value of the pixel. Among them, the pixel is the target pixel, and the compensation coefficient corresponding to the target pixel is the compensation coefficient corresponding to the grayscale value of the target pixel before compensation.

[0181] In some embodiments, for a display signal of a frame of a picture, the compensation output module 103 compensates the grayscale value of the target pixel to the output grayscale value corresponding to the target pixel, and compensates the grayscale values ​​of other pixels to the output grayscale values ​​corresponding to other pixels, thereby compensating the grayscale value of each pixel in the display signal and obtaining a compensated display signal. In practical applications, the compensation output module 103 can be debugged according to the picture display effect, and the gain coefficient or attenuation coefficient digital signal processing can be performed when calculating the output grayscale value. Then the compensation output module 103 sends the compensated display signal to the display panel to drive the display panel to display the picture, which can avoid problems such as fine lines on the picture and improve the display quality.

[0182] A display driving method provided in an embodiment of the present application can achieve the same or similar technical effect as the timing control circuit 10 in the aforementioned embodiment, and will not be described again here to avoid repetition.

[0183] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0184] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0185] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0186] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0187] The above is a detailed introduction to a timing control circuit, a display device and a display driving method provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for a person skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A timing control circuit, characterized in that: The timing control circuit includes: a first detection module, a first identification module and a compensation output module; The first detection module is electrically connected to the first identification module, and is used to receive a display signal of a frame of picture, determine a pixel clock frequency corresponding to the display signal, and send the pixel clock frequency to the first identification module; The first identification module is electrically connected to the compensation output module, and is used to determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and send a first compensation list corresponding to the target frequency partition to the compensation output module; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows; The compensation output module is used to compensate the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation list, and output the compensated display signal.

2. The timing control circuit according to claim 1, characterized in that: The first identification module includes a first partitioning unit and a first enabling unit; The first partition unit is electrically connected to the first detection module and the first enabling unit respectively, and is used to determine a target frequency partition corresponding to the pixel clock frequency from the preset multiple frequency partitions, and send a first enabling signal corresponding to the target frequency partition to the first enabling unit; The first enabling unit is also electrically connected to the compensation output module, and is configured to send the first compensation list corresponding to the first enabling signal to the compensation output module.

3. The timing control circuit according to claim 2, characterized in that: The first enabling unit includes a plurality of first controllers; The enable terminal of the first controller is electrically connected to the first partition unit, and the output terminal of the first controller is electrically connected to the compensation output module; The first controller is used for sending the first compensation list inputted by the input end to the compensation output module through the output end when the enabling end receives the first enabling signal sent by the first partition unit.

4. The timing control circuit according to claim 1, characterized in that: The compensation output module comprises a first input terminal, wherein the first input terminal is electrically connected to output terminals of a plurality of first controllers respectively; The compensation output module is used to receive the first compensation list through the first input terminal, and determine the adjusted grayscale value of the pixels in the at least one pixel row after compensation according to the first compensation list, so as to compensate the grayscale value of the pixels in the at least one pixel row in the display signal.

5. The timing control circuit according to any one of claims 1 to 4, characterized in that: The timing control circuit also includes a second detection module and a second identification module; The second detection module is electrically connected to the second identification module, and is used to receive the display signal of the one frame of the picture, determine the first blanking duration corresponding to the display signal, and send the first blanking duration to the second identification module; wherein the first blanking duration is the duration of the vertical scanning blanking area corresponding to the display signal; The second identification module is electrically connected to the compensation output module, and is used to send a second compensation list corresponding to the first blanking duration to the compensation output module; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each of the grayscale values; The compensation output module is further used to compensate the grayscale value of each pixel in the display signal according to the second compensation list.

6. The timing control circuit according to claim 5, characterized in that: The second identification module includes a second partitioning unit and a second enabling unit; The second partition unit is electrically connected to the second detection module and the second enabling unit respectively, and is used to compare the first blanking duration with the multiple duration partitions in sequence according to the preset multiple duration partitions from small to large, and send the second enabling signal corresponding to the duration partition to the second enabling unit each time the first blanking duration is greater than the minimum length of one of the duration partitions; wherein the durations of the vertical scanning blanking areas corresponding to the multiple duration partitions do not overlap with each other; The second enabling unit is also electrically connected to the compensation output module, and is configured to send the second compensation list corresponding to the second enabling signal to the compensation output module.

7. The timing control circuit according to claim 6, characterized in that: The second enabling unit includes a plurality of second controllers; The enable terminal of the second controller is electrically connected to the second partition unit, and the output terminal of the second controller is electrically connected to the compensation output module; The second controller is used for sending the second compensation list inputted by the input end to the compensation output module through the output end when the enabling end receives the second enabling signal sent by the second partition unit.

8. The timing control circuit according to claim 5, characterized in that: The compensation output module comprises a plurality of second input terminals, and the plurality of second input terminals are connected to the output terminals of the plurality of second controllers in a one-to-one correspondence; The compensation output module is used to receive at least one of the second compensation lists through the multiple second input terminals, and to determine the compensation coefficient corresponding to the grayscale value of each pixel in the display signal by looking up the table according to the last received second compensation list, and to determine the output grayscale value of each pixel in the display signal according to the compensation coefficient, so as to compensate the grayscale value of each pixel in the display signal.

9. A display device, characterized in that: The display device comprises a display panel, and a timing control circuit as claimed in any one of claims 1 to 8; The timing control circuit is electrically connected to the display panel, and is used for outputting a compensated display signal to the display panel, so as to drive the display panel to display.

10. A display driving method, characterized in that: The display driving method comprises: Receive a display signal of a frame of picture, and determine a pixel clock frequency corresponding to the display signal; Determine a target frequency partition corresponding to the pixel clock frequency from a plurality of preset frequency partitions, and determine a corresponding first compensation list according to the target frequency partition; wherein the first compensation list includes a compensation relationship between grayscale values ​​of pixels in adjacent pixel rows; The grayscale values ​​of pixels in at least one pixel row in the display signal are compensated according to the first compensation list, and the compensated display signal is output to a display panel to drive the display panel for display.

11. The display driving method according to claim 10, characterized in that: The compensating the grayscale values ​​of pixels in at least one pixel row in the display signal according to the first compensation list includes: For the grayscale value of a first pixel in a first pixel row in the display signal, determine the grayscale value of a second pixel in a second pixel row adjacent to the first pixel row; wherein the first pixel and the second pixel are connected to the same data line, and the first pixel receives the driving signal transmitted by the data line later than the second pixel; According to the grayscale value of the first pixel and the grayscale value of the second pixel, the adjusted grayscale value of the first pixel after compensation is determined based on the first compensation list, so as to compensate for the grayscale value of each of the first pixels in the first pixel row in the display signal; wherein the at least one pixel row includes the first pixel row.

12. The display driving method according to claim 11, characterized in that: The step of determining the adjusted grayscale value of the first pixel after compensation based on the first compensation list according to the grayscale value of the first pixel and the grayscale value of the second pixel comprises: Determine a preset grayscale value that is the same as the grayscale value of the first pixel according to a first set of grayscale values ​​in the first compensation list, and determine a preset grayscale value that is the same as the grayscale value of the second pixel according to a second set of grayscale values ​​in the first compensation list; According to the correspondence between the two preset grayscale values, acquiring a corresponding adjustment grayscale value from the first compensation list as the adjustment grayscale value of the first pixel after compensation; Among them, the first compensation list includes the first group of grayscale values, the second group of grayscale values, and multiple adjustment grayscale values ​​corresponding to multiple groups of correspondence relationships; the first group of grayscale values ​​and the second group of grayscale values ​​respectively include multiple preset grayscale values; the multiple groups of correspondence relationships include the correspondence between each preset grayscale value in the first group of grayscale values ​​and different preset grayscale values ​​in the second group of grayscale values.

13. The display driving method according to claim 10, characterized in that: Before outputting the compensated display signal to the display panel, the display driving method further includes: Determine a first blanking duration corresponding to the display signal; wherein the first blanking duration is the duration of a vertical scanning blanking area corresponding to the display signal; Determine a second compensation list corresponding to the first blanking duration; wherein the second compensation list includes a plurality of preset grayscale values ​​and a compensation coefficient corresponding to each of the grayscale values; The grayscale value of each pixel in the display signal is compensated according to the second compensation list.

14. The display driving method according to claim 13, characterized in that: The determining a second compensation list corresponding to the first blanking duration includes: According to the preset multiple time partitions from small to large, the first blanking duration is compared with the multiple time partitions in sequence, and each time the first blanking duration is greater than the minimum length of one of the time partitions, the second compensation list corresponding to the time partition is triggered; wherein the durations of the vertical scanning blanking areas corresponding to the multiple time partitions do not overlap with each other; The last triggered second compensation list is determined as the second compensation list corresponding to the first blanking duration.

15. The display driving method according to claim 13, characterized in that: The compensating the grayscale value of each pixel in the display signal according to the second compensation list includes: For a target pixel having an adjusted grayscale value, determining an output grayscale value of the target pixel according to the adjusted grayscale value and a compensation coefficient corresponding to the target pixel; wherein the compensation coefficient corresponding to the target pixel is a compensation coefficient corresponding to the grayscale value of the target pixel before compensation; For pixels other than the target pixel, determining output grayscale values ​​of the other pixels according to original grayscale values ​​of the other pixels and corresponding compensation coefficients; Before outputting the compensated display signal to the display panel, the display driving method further includes: The compensated display signal is obtained according to the output grayscale value of the target pixel and the output grayscale values ​​of the other pixels.

Citation Information

Patent Citations

  • Mura eliminating method for tri-gate liquid crystal display panel

    CN105280143A

  • Display device and driving device and method thereof

    CN111862889A

  • Display panel and electronic equipment

    CN113658565A

  • Control circuit and control method applied to display

    CN114974136A

  • Brightness compensation method, display panel and display

    CN116758858A