Recoverable watchdog self-locking circuit and application method thereof

Abstract

The invention relates to the technical field of energy storage battery management, and discloses a recoverable watchdog self-locking circuit and an application method of the recoverable watchdog self-locking circuit. The output end of a watchdog in the circuit is connected with the grid electrode of a second transistor, the second end of a first resistor and the first end of a second resistor; the first output end of the MCU is connected with the source electrode of the first transistor and the first end of the third resistor. The grid electrode of the first transistor is connected with the drain electrode of the second transistor, the second end of the third resistor, the first end of the fourth resistor and the grid electrode of the third transistor. The drain electrode of the first transistor is connected with the first end of the first resistor. The drain electrode of the third transistor is connected with the second end of the fifth resistor and the grid electrode of the fourth transistor. The source electrode of the fourth transistor is connected with the first end of the fifth resistor and the external power supply module. The drain electrode of the fourth transistor outputs driving voltage to the charging / discharging transistor. By implementing the invention, the safety of the battery can be further improved while the labor cost is reduced.

Description

Technical Field

[0001] The invention relates to the technical field of energy storage battery management, and in particular to a recoverable watchdog self-locking circuit and an application method thereof. Background Art

[0002] In the battery management system, in order to avoid permanent damage or safety problems of lithium iron phosphate batteries, people usually use two or more methods to cut off the MOS tube to protect the battery. The current solution is to add a watchdog outside the MCU. When the MCU fails, the output pin of the watchdog will control the shutdown of the power supply of the MCU, thereby shutting down the MOS tube to avoid safety problems. This method is to cut off the power supply of the MCU, so that the main controller of the entire circuit is powered off, and then control the MOS tube to shut down. If the MCU returns to normal, but because the entire system has been powered off, the system can no longer continue to work, and the on-site personnel need to manually power on the system before the entire system can continue to work. This is inconvenient and increases labor costs. Summary of the invention

[0003] In view of this, the present invention provides a recoverable watchdog self-locking circuit and an application method thereof to solve the problem that after the MCU fails and recovers, the battery management system needs to be manually powered on by on-site personnel before it can continue to work.

[0004] In a first aspect, the present invention provides a recoverable watchdog self-locking circuit, the circuit comprising: an MCU, a watchdog, a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein:

[0005] The MCU is connected to the watchdog, the output end of the watchdog is respectively connected to the gate of the second transistor, the second end of the first resistor and the first end of the second resistor, and the first output end of the MCU is respectively connected to the source of the first transistor and the first end of the third resistor;

[0006] The gate of the first transistor is respectively connected to the drain of the second transistor, the second end of the third resistor, the first end of the fourth resistor and the gate of the third transistor, and the drain of the first transistor is connected to the first end of the first resistor;

[0007] The drain of the third transistor is connected to the second end of the fifth resistor and the gate of the fourth transistor respectively;

[0008] The source of the fourth transistor is connected to the first end of the fifth resistor and the external power supply module respectively, and the drain of the fourth transistor outputs a driving voltage to the charge / discharge transistor;

[0009] The second end of the second resistor, the source of the second transistor, the second end of the fourth resistor and the source of the third transistor are connected to ground.

[0010] The present invention provides a recoverable watchdog self-locking circuit. When the charge / discharge transistor is normally turned off, the MCU can send a low level to drive, and the watchdog does not work at this time; when the MCU fails, the watchdog can turn off the charge / discharge transistor; when the MCU fails and recovers to normal, there is no need to manually power on the battery management system, and the system can still work normally, thereby reducing labor costs and further improving the safety of the battery.

[0011] In an optional implementation, the external power supply module includes: a first power supply module and a second power supply module, wherein:

[0012] The input end of the first power supply module is connected to the positive electrode of the battery, the first output end of the first power supply module is connected to the input end of the second power supply module, and the second output end of the first power supply module is connected to the source of the fourth transistor and the first end of the fifth resistor.

[0013] In an optional implementation, the circuit further includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a charging transistor and a discharging transistor, wherein:

[0014] The source of the fifth transistor is connected to the drain of the fourth transistor, the drain of the fifth transistor is connected to the gate of the discharge transistor, and the gate of the fifth transistor is connected to the drain of the sixth transistor;

[0015] The gate of the sixth transistor is connected to the second output terminal of the MCU, and the source of the sixth transistor is connected to the ground;

[0016] The source of the seventh transistor is connected to the drain of the fourth transistor, the drain of the seventh transistor is connected to the gate of the charging transistor, and the gate of the seventh transistor is connected to the drain of the eighth transistor;

[0017] The gate of the eighth transistor is connected to the third output terminal of the MCU, and the source of the eighth transistor is connected to the ground;

[0018] The source of the discharge transistor is connected to the negative electrode of the battery, the drain of the discharge transistor is connected to the drain of the charge transistor, and the source of the charge transistor is connected to the negative electrode of the load.

[0019] In an optional implementation, the transistor includes a MOS transistor, a triode, or a thyristor.

[0020] In a second aspect, the present invention provides a battery management system, comprising the recoverable watchdog self-locking circuit of the above-mentioned first aspect or any corresponding embodiment thereof.

[0021] A battery management system provided by the present invention adopts the recoverable watchdog self-locking circuit of the above embodiment. After the MCU fails and recovers to normal, it can resume normal operation without manual power-on, thereby reducing labor costs and further improving battery safety.

[0022] In a third aspect, the present invention provides an application method of a recoverable watchdog self-locking circuit, the application method comprising:

[0023] Monitor the operating status of MCU;

[0024] When the MCU fails, the watchdog is controlled to output a high level signal, the second transistor is controlled to be continuously turned on, and the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor;

[0025] When the MCU recovers to normal operation after failure, the watchdog is controlled to output a low-level signal, the MCU is controlled to output a low-level signal, the first transistor and the second transistor are controlled to be turned off, and then the MCU is controlled to output a high-level signal, thereby controlling the third transistor and the fourth transistor to be turned on, thereby outputting a driving voltage to control the charging transistor and the discharging transistor to be turned on.

[0026] In an optional embodiment, the application method further includes:

[0027] When the MCU operates normally, the watchdog is controlled to output a low-level signal and the MCU is controlled to output a high-level signal, the second transistor is controlled to be turned off, and the third transistor and the fourth transistor are controlled to be turned on, thereby outputting a driving voltage to control the charging transistor and the discharging transistor to be turned on.

[0028] The present invention provides an application method of a recoverable watchdog self-locking circuit. By applying the recoverable watchdog self-locking circuit, when the charge / discharge transistor is normally turned off, the MCU can send a low level to drive, and the watchdog does not work at this time; when the MCU fails, the watchdog can turn off the charge / discharge transistor; when the MCU fails and returns to normal, there is no need to manually power on the battery management system, and the system can still work normally, thereby reducing labor costs and further improving the safety of the battery.

[0029] In an optional implementation, when the MCU fails, controlling the watchdog to output a high level signal, controlling the second transistor to be continuously turned on, and controlling the third transistor and the fourth transistor to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor, comprises:

[0030] When the MCU fails, controlling the watchdog to output a high level signal, and controlling the second transistor to be turned on;

[0031] If the MCU maintains a high level after failure, the first transistor is controlled to be turned on, and the second transistor is kept in an on state;

[0032] The third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor.

[0033] In an optional implementation, when the MCU fails, the watchdog is controlled to output a high level signal, the second transistor is controlled to be continuously turned on, and the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor, and further comprising:

[0034] When the MCU fails, controlling the watchdog to output a high level signal, and controlling the second transistor to be turned on;

[0035] If the MCU maintains a low level after failure, the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor.

[0036] In an optional embodiment, the application method further includes:

[0037] When the MCU operates normally, controlling the MCU to output a low level signal;

[0038] The sixth transistor and the eighth transistor are first controlled to be turned off, and then the fifth transistor and the seventh transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 is a recoverable watchdog self-locking circuit diagram according to an embodiment of the present invention;

[0041] Figure 2 is another recoverable watchdog self-locking circuit diagram according to an embodiment of the present invention;

[0042] Figure 3 It is a flow chart of an application method of a recoverable watchdog self-locking circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0044] In the description of the present invention, it should be noted that the terms "first", "second" and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. Unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal connection of two elements, and it can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0045] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0046] The present invention provides a recoverable watchdog self-locking circuit. After the MCU fails and recovers to normal, the battery management system does not need to be manually powered on and can still work normally. While reducing labor costs, the safety of the battery can also be further improved.

[0047] like Figure 1As shown, a recoverable watchdog self-locking circuit includes: MCU, watchdog, first transistor Q1, second transistor Q2, third transistor Q3, fourth transistor Q4, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4 and fifth resistor R5. Wherein, the watchdog and MCU are connected to each other through WDI and nRESET pins, the output end WDO of the watchdog is respectively connected to the gate of the second transistor Q2, the second end of the first resistor R1 and the first end of the second resistor R2, and the first output end of the MCU is respectively connected to the source of the first transistor Q1 and the first end of the third resistor R3. The gate of the first transistor Q1 is respectively connected to the drain of the second transistor Q2, the second end of the third resistor R3, the first end of the fourth resistor R4 and the gate of the third transistor Q3, and the drain of the first transistor Q1 is connected to the first end of the first resistor R1. The drain of the third transistor Q3 is respectively connected to the second end of the fifth resistor R5 and the gate of the fourth transistor Q4. The source of the fourth transistor Q4 is connected to the first end of the fifth resistor R5 and the external power supply module respectively, and the drain of the fourth transistor Q4 outputs the driving voltage to the charge / discharge transistor. The second end of the second resistor R2, the source of the second transistor Q2, the second end of the fourth resistor R4 and the source of the third transistor Q3 are connected to the ground.

[0048] Specifically, VCC_16V is the power supply voltage provided by the external power supply module, and 16V_DRIVE is the driving voltage of the charge / discharge transistor. When the fourth transistor Q4 is turned on, the power supply loop from the external power supply module to the charge / discharge transistor is turned on, providing the driving voltage for the charge / discharge transistor.

[0049] When the MCU operates normally, the MCU sends a feeding signal to the watchdog. At this time, the output terminal WDO of the watchdog outputs a low-level signal, and the second transistor Q2 is not turned on. At this time, the MCU needs to output a high level through the voltage divided by the third resistor R3 and the fourth resistor R4 to the gate of the third transistor Q3. At this time, the third transistor Q3 is turned on, the gate of the fourth transistor Q4 is grounded, and the fourth transistor Q4 is turned on. The driving voltage of the charge / discharge transistor can turn on the charging transistor and the discharging transistor.

[0050] If the MCU fails, the output terminal WDO of the watchdog will output a high-level signal, and the second transistor Q2 will be turned on, and the gate of the first transistor Q1 will be grounded. If the MCU maintains a high level after failure, the first transistor Q1 will be turned on, and the high level of the MCU is divided by the first resistor R1 and the second resistor R2 to the gate of the second transistor Q2. Therefore, even if the output terminal WDO of the watchdog no longer outputs a high-level signal, the second transistor Q2 can be kept turned on. At this time, the gate of the third transistor Q3 is grounded, the third transistor Q3 and the fourth transistor Q4 are turned off, the driving voltage of the charge / discharge transistor is disconnected, and the charging transistor and the discharge transistor are disconnected. If the MCU outputs a low level after failure, the third transistor Q3 and the fourth transistor Q4 are still in the off state, and the driving voltage of the charge / discharge transistor can still be disconnected, forming a full protection.

[0051] If the MCU returns to normal, the watchdog's output terminal WDO outputs a low-level signal. At this time, the MCU needs software control to output a low-level signal once. At this time, the second transistor Q2 is turned off, and then the first transistor Q1 is turned off. Then the MCU outputs a high-level signal again, and the third transistor Q3 and the fourth transistor Q4 are turned on. The driving voltage of the charge / discharge transistor can turn on the charging transistor and the discharging transistor, and then it can self-recover to normal operation.

[0052] The present invention provides a recoverable watchdog self-locking circuit. When the charge / discharge transistor is normally turned off, the MCU can send a low level to drive, and the watchdog does not work at this time; when the MCU fails, the watchdog can turn off the charge / discharge transistor; when the MCU fails and returns to normal, there is no need to manually power on the battery management system, and the system can still work normally, while reducing labor costs and further improving the safety of the battery. The recoverable watchdog self-locking circuit provides a redundant protection measure after the MCU fails, improves the reliability and safety of the battery, and at the same time increases convenience and reduces more labor costs.

[0053] In an optional embodiment, if Figure 2 As shown, the external power supply module includes: a first power supply module and a second power supply module. The input end of the first power supply module is connected to the positive electrode of the battery, the first output end of the first power supply module is connected to the input end of the second power supply module, and the second output end of the first power supply module is connected to the source of the fourth transistor Q4 and the first end of the fifth resistor R5.

[0054] Specifically, Figure 2 As shown, the positive electrode of the battery undergoes voltage conversion through two power supply modules and then supplies power to the MCU. Among them, the first power supply module provides a driving voltage for the charge / discharge transistor. In an embodiment of the present invention, the first power supply module and the second power supply module are both composed of DC / DC.

[0055] In an optional embodiment, if Figure 2 As shown, a recoverable watchdog self-locking circuit also includes: a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a charging transistor Q9 and a discharging transistor Q10. Among them, the source of the fifth transistor Q5 is connected to the drain of the fourth transistor Q4, the drain of the fifth transistor Q5 is connected to the gate of the discharging transistor Q10, and the gate of the fifth transistor Q5 is connected to the drain of the sixth transistor Q6. The gate of the sixth transistor Q6 is connected to the second output terminal of the MCU, and the source of the sixth transistor Q6 is connected to the ground. The source of the seventh transistor Q7 is connected to the drain of the fourth transistor Q4, the drain of the seventh transistor Q7 is connected to the gate of the charging transistor Q9, and the gate of the seventh transistor Q7 is connected to the drain of the eighth transistor Q8. The gate of the eighth transistor Q8 is connected to the third output terminal of the MCU, and the source of the eighth transistor Q8 is connected to the ground. The source of the discharging transistor Q10 is connected to the negative electrode of the battery, the drain of the discharging transistor Q10 is connected to the drain of the charging transistor Q9, and the source of the charging transistor Q9 is connected to the negative electrode of the load.

[0056] Specifically, when the fourth transistor Q4 is turned on, the second power supply module is connected to the source of the fifth transistor Q5 and the source of the seventh transistor Q7. When the charging transistor Q9 and the discharging transistor Q10 are normally turned off, the MCU outputs a low-level signal to the sixth transistor Q6 and the eighth transistor Q8. At this time, the sixth transistor Q6 and the eighth transistor Q8 are turned off, and then the fifth transistor Q5 and the seventh transistor Q7 are turned off. The driving voltage of the charge / discharge transistor cannot be output to the gate of the charging transistor Q9 and the discharging transistor Q10 because the fifth transistor Q5 and the seventh transistor Q7 are turned off, and then the charging transistor Q9 and the discharging transistor Q10 are turned off, and P+ and P- have no output. When the MCU fails, the communication between the MCU and the watchdog is lost, and the watchdog will Figure 1 The circuit shown turns off the drive voltage of the charge / discharge transistor.

[0057] In an optional implementation, the transistor includes a MOS tube, a triode, or a thyristor.

[0058] Specifically, the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, the eighth transistor Q8, the charging transistor Q9 and the discharging transistor Q10 can be any one of MOS transistors, triodes and thyristors.

[0059] The present invention provides a battery management system, comprising the recoverable watchdog self-locking circuit of the above embodiment.

[0060] Specifically, the battery management system in this embodiment adopts the recoverable watchdog self-locking circuit of the above embodiment. After the MCU fails and recovers to normal, it can resume normal operation without manual power-on, thereby reducing labor costs and further improving battery safety.

[0061] The present invention provides an application method of a recoverable watchdog self-locking circuit, such as Figure 3 As shown, the application method comprises the following steps:

[0062] Step S11, monitoring the operating status of the MCU.

[0063] Specifically, the watchdog monitors the running status of the MCU. When the MCU is running normally, the MCU outputs a feeding signal to the watchdog at regular intervals. If the watchdog is not fed for a specified period of time, the watchdog timing will be exceeded, and a reset signal will be given to the MCU to reset the MCU to prevent the MCU from crashing.

[0064] Step S12, when the MCU fails, the watchdog is controlled to output a high level signal, the second transistor Q2 is controlled to be continuously turned on, and the third transistor Q3 and the fourth transistor Q4 are turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor Q9 and the discharging transistor Q10.

[0065] Specifically, when the MCU fails, the output level after the MCU fails is divided into the following two cases: if the MCU maintains a high level after the failure, execute steps S121-S123; if the MCU maintains a low level after the failure, execute steps S124-S125.

[0066] Step S121, when the MCU fails, the watchdog is controlled to output a high level signal, and the second transistor Q2 is controlled to be turned on.

[0067] Step S122: If the MCU maintains a high level after failure, the first transistor Q1 is controlled to be turned on, and the second transistor Q2 is kept in the on state.

[0068] In step S123, the third transistor Q3 and the fourth transistor Q4 are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor Q9 and the discharging transistor Q10.

[0069] In the embodiment of the present invention, if the MCU fails, the output terminal WDO of the watchdog will output a high-level signal, and the second transistor Q2 is turned on, and the gate of the first transistor Q1 is grounded. If the MCU fails and maintains a high level, the first transistor Q1 is turned on, and the high level of the MCU is divided by the first resistor R1 and the second resistor R2 to the gate of the second transistor Q2. Therefore, even if the output terminal WDO of the watchdog no longer outputs a high-level signal, the second transistor Q2 can be kept turned on. At this time, the gate of the third transistor Q3 is grounded, the third transistor Q3 and the fourth transistor Q4 are turned off, the driving voltage of the charge / discharge transistor is disconnected, and the charging transistor Q9 and the discharging transistor Q10 are disconnected.

[0070] Step S124, when the MCU fails, the watchdog is controlled to output a high level signal, and the second transistor Q2 is controlled to be turned on.

[0071] Step S125 , if the MCU maintains a low level after failure, the third transistor Q3 and the fourth transistor Q4 are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor Q9 and the discharging transistor Q10 .

[0072] In the embodiment of the present invention, if the MCU outputs a low level after failure, the third transistor Q3 and the fourth transistor Q4 are still in the off state, and the driving voltage of the charge / discharge transistor can still be disconnected, thereby forming sufficient protection.

[0073] Step S13, when the MCU recovers to normal operation after failure, the watchdog is controlled to output a low level signal, the MCU is controlled to output a low level signal, the first transistor Q1 and the second transistor Q2 are controlled to be turned off, and then the MCU is controlled to output a high level signal, and then the third transistor Q3 and the fourth transistor Q4 are controlled to be turned on, thereby outputting a driving voltage to control the charging transistor Q9 and the discharging transistor Q10 to be turned on.

[0074] Specifically, when the MCU recovers to normal operation after failure, the watchdog output terminal WDO outputs a low-level signal. At this time, the MCU needs software control to output a low-level signal once. At this time, the second transistor Q2 is turned off, and then the first transistor Q1 is turned off. Then the MCU outputs a high-level signal again, and the third transistor Q3 and the fourth transistor Q4 are turned on. The driving voltage of the charge / discharge transistor can turn on the charging transistor Q9 and the discharging transistor Q10, and then it can self-recover to normal operation.

[0075] In an optional embodiment, the application method further comprises the following steps:

[0076] Step S14, when the MCU operates normally, the watchdog is controlled to output a low level signal and the MCU outputs a high level signal, the second transistor Q2 is controlled to be turned off, and the third transistor Q3 and the fourth transistor Q4 are controlled to be turned on, thereby outputting a driving voltage to control the charging transistor Q9 and the discharging transistor Q10 to be turned on.

[0077] Specifically, when the MCU operates normally, the MCU sends a feeding signal to the watchdog. At this time, the output terminal WDO of the watchdog outputs a low-level signal, and the second transistor Q2 is not turned on. At this time, the MCU needs to output a high level through the voltage divided by the third resistor R3 and the fourth resistor R4 to the gate of the third transistor Q3. At this time, the third transistor Q3 is turned on, the gate of the fourth transistor Q4 is grounded, and the fourth transistor Q4 is turned on. The driving voltage of the charge / discharge transistor can turn on the charging transistor Q9 and the discharging transistor Q10.

[0078] In an optional embodiment, the application method further comprises the following steps:

[0079] Step S15, when the MCU operates normally, the MCU is controlled to output a low level signal.

[0080] In step S16, the sixth transistor Q6 and the eighth transistor Q8 are first turned off, and then the fifth transistor Q5 and the seventh transistor Q7 are turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor Q9 and the discharging transistor Q10.

[0081] Specifically, when the charging transistor Q9 and the discharging transistor Q10 are normally turned off, the MCU outputs a low-level signal to the sixth transistor Q6 and the eighth transistor Q8. At this time, the sixth transistor Q6 and the eighth transistor Q8 are turned off, and then the fifth transistor Q5 and the seventh transistor Q7 are turned off. The driving voltage of the charging / discharging transistor cannot be output to the gate of the charging transistor Q9 and the discharging transistor Q10 because the fifth transistor Q5 and the seventh transistor Q7 are turned off, and then the charging transistor Q9 and the discharging transistor Q10 are turned off, and P+ and P- have no output.

[0082] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A recoverable watchdog self-locking circuit, characterized in that: The circuit includes: an MCU, a watchdog, a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein: The MCU is connected to the watchdog, the output end of the watchdog is respectively connected to the gate of the second transistor, the second end of the first resistor and the first end of the second resistor, and the first output end of the MCU is respectively connected to the source of the first transistor and the first end of the third resistor; The gate of the first transistor is respectively connected to the drain of the second transistor, the second end of the third resistor, the first end of the fourth resistor and the gate of the third transistor, and the drain of the first transistor is connected to the first end of the first resistor; The drain of the third transistor is connected to the second end of the fifth resistor and the gate of the fourth transistor respectively; The source of the fourth transistor is connected to the first end of the fifth resistor and the external power supply module respectively, and the drain of the fourth transistor outputs a driving voltage to the charge / discharge transistor; The second end of the second resistor, the source of the second transistor, the second end of the fourth resistor and the source of the third transistor are connected to ground.

2. The recoverable watchdog self-locking circuit according to claim 1, characterized in that: The external power supply module includes: a first power supply module and a second power supply module, wherein: The input end of the first power supply module is connected to the positive electrode of the battery, the first output end of the first power supply module is connected to the input end of the second power supply module, and the second output end of the first power supply module is connected to the source of the fourth transistor and the first end of the fifth resistor.

3. The recoverable watchdog self-locking circuit according to claim 2, characterized in that: The circuit further includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a charging transistor and a discharging transistor, wherein: The source of the fifth transistor is connected to the drain of the fourth transistor, the drain of the fifth transistor is connected to the gate of the discharge transistor, and the gate of the fifth transistor is connected to the drain of the sixth transistor; The gate of the sixth transistor is connected to the second output terminal of the MCU, and the source of the sixth transistor is connected to the ground; The source of the seventh transistor is connected to the drain of the fourth transistor, the drain of the seventh transistor is connected to the gate of the charging transistor, and the gate of the seventh transistor is connected to the drain of the eighth transistor; The gate of the eighth transistor is connected to the third output terminal of the MCU, and the source of the eighth transistor is connected to the ground; The source of the discharge transistor is connected to the negative electrode of the battery, the drain of the discharge transistor is connected to the drain of the charge transistor, and the source of the charge transistor is connected to the negative electrode of the load.

4. The recoverable watchdog self-locking circuit according to claim 3, characterized in that: The transistors include MOS transistors, triodes and thyristors.

5. A battery management system, characterized in that: The invention comprises the recoverable watchdog self-locking circuit as described in any one of claims 1 to 4.

6. An application method of a recoverable watchdog self-locking circuit, characterized in that: The application method comprises: Monitor the operating status of MCU; When the MCU fails, the watchdog is controlled to output a high level signal, the second transistor is controlled to be continuously turned on, and the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor; When the MCU recovers to normal operation after failure, the watchdog is controlled to output a low-level signal, the MCU is controlled to output a low-level signal, the first transistor and the second transistor are controlled to be turned off, and then the MCU is controlled to output a high-level signal, thereby controlling the third transistor and the fourth transistor to be turned on, thereby outputting a driving voltage to control the charging transistor and the discharging transistor to be turned on.

7. The application method of the recoverable watchdog self-locking circuit according to claim 6 is characterized in that: The application method further comprises: When the MCU operates normally, the watchdog is controlled to output a low-level signal and the MCU is controlled to output a high-level signal, the second transistor is controlled to be turned off, and the third transistor and the fourth transistor are controlled to be turned on, thereby outputting a driving voltage to control the charging transistor and the discharging transistor to be turned on.

8. The application method of the recoverable watchdog self-locking circuit according to claim 6 is characterized in that: When the MCU fails, the watchdog is controlled to output a high level signal, the second transistor is controlled to be continuously turned on, and the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor, including: When the MCU fails, controlling the watchdog to output a high level signal, and controlling the second transistor to be turned on; If the MCU maintains a high level after failure, the first transistor is controlled to be turned on, and the second transistor is kept in an on state; The third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor.

9. The application method of the recoverable watchdog self-locking circuit according to claim 6, characterized in that: When the MCU fails, the watchdog is controlled to output a high level signal, the second transistor is controlled to be continuously turned on, and the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor, and further comprising: When the MCU fails, controlling the watchdog to output a high level signal, and controlling the second transistor to be turned on; If the MCU maintains a low level after failure, the third transistor and the fourth transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor.

10. The application method of the recoverable watchdog self-locking circuit according to claim 7, characterized in that: The application method further comprises: When the MCU operates normally, controlling the MCU to output a low level signal; The sixth transistor and the eighth transistor are first controlled to be turned off, and then the fifth transistor and the seventh transistor are controlled to be turned off, thereby disconnecting the output of the driving voltage to turn off the charging transistor and the discharging transistor.

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