IP message fragmentation and recombination method and system based on FPGA

Abstract

The invention belongs to the technical field of network communication, and particularly relates to an IP message fragmentation and recombination method and system based on an FPGA. According to the method, the process of fragmenting and recombining the IP message is unloaded from the CPU to the FPGA to be executed, so that the load of the CPU is reduced; according to the method, storage and recombination of IP message fragments are divided into two asynchronous processes, the storage process is responsible for writing the IP message fragments and the states of the IP message fragments into various tables, the recombination process is responsible for obtaining the IP message fragments and the states of the IP message fragments from the various tables, and the IP message fragment recombination efficiency is improved through the two-stage assembly line structure. According to the method, the TCAM is adopted for matching the IP message fragments, so that the problem of hash value conflict caused by a common matching method based on hash operation is avoided; and meanwhile, a dynamic resource allocation and recovery mechanism is adopted, so that the resource utilization rate is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of network communication, and more specifically, relates to an IP message fragmentation and reassembly method and system based on FPGA. Background Art

[0002] During network transmission, the MTU of different network devices is inconsistent. When the size of an IP data packet exceeds the MTU of the network device it passes through, the IP layer will fragment the data packet. These fragmented IP packets will be reassembled into complete data packets at the receiving end.

[0003] However, IP packet reassembly requires a large amount of CPU resources, which can easily lead to CPU usage surges and memory overflows, especially in high-load network environments. Therefore, it is necessary to offload the IP packet reassembly work from the CPU to the hardware.

[0004] The common method of reassembling IP packets now is to obtain a hash value through hash operation based on the source IP address, destination IP address, identification and other identification information in the IP packet to match the original IP packet. However, since the mapping of the hash function is limited, different identification information may be mapped to the same hash value, resulting in hash value conflicts. Summary of the invention

[0005] The present invention aims to overcome at least one defect of the above-mentioned prior art, and provides an FPGA-based IP message fragmentation and reassembly method, which offloads the IP message fragmentation and reassembly function to the FPGA for execution, thereby releasing the processing pressure of the CPU. At the same time, the present invention determines the subordinate relationship between IP message fragments and IP messages based on the TCAM memory, thereby avoiding the hash value conflict problem caused by the method based on hash operation.

[0006] The invention also provides a system of an IP message fragmentation and reassembly method based on FPGA.

[0007] The present invention also discloses a computer-readable storage medium for implementing the above-mentioned FPGA-based IP message fragmentation and reassembly method.

[0008] The explanations of the technical terms related to the present invention are as follows: ‌FPGA (Field-Programmable Gate Array) is a programmable logic device that allows users to define its functions by changing configuration information.

[0009] MTU (Maximum Transmission Unit) refers to the maximum transmission unit when transmitting data.

[0010] ‌TCAM (Ternary Content Addressable Memory) is a ternary content addressable memory.

[0011] BRAM (Block Random Access Memory) is a memory resource in FPGA.

[0012] QDR (Quad Data Rate) has independent write and read interfaces, thus achieving 4 times the speed.

[0013] PCIe (peripheral component interconnect express) is a high-speed serial computer expansion bus standard.

[0014] CPU (Central Processing Unit) refers to the central processing unit, which is the computing and control core of the computer system and the final execution unit for information processing and program running.

[0015] IP (Internet Protocol) refers to the Internet Protocol, which is the network layer protocol in the TCP / IP system.

[0016] The detailed technical scheme of the present invention is as follows: An IP message fragmentation and reassembly method based on FPGA, comprising: S1. FPGA stores the IP message fragments sent by the CPU through the PCIe interface. Specifically: After finding the index corresponding to the IP message fragment, FPGA searches and writes the fragment collection status table, offset window matrix, IP length storage table, IP survival table, IP header storage table, and IP payload storage table to realize the storage of the status of the IP message fragment and the message content; S2. Use index values ​​1 to n as addresses to query the n addresses in the IP survival table at the same time, where n is an integer greater than 1; if the survival time queried when a certain index is used as an address is greater than the specified life cycle, then record the index; If there is a recorded index, select the one with the smallest value as the final record of this step, and then enter S3; If there is no recorded index, go to S4; S3, use the index recorded in S2 as the address to query the fragment collection status table. If the fragment collection status queried by the address is "collected", it indicates that the IP message corresponding to the index has collected all message fragments. Record the index again and enter S6; If the fragment collection status queried for the address is "not collected", it means that the IP message corresponding to the index has not collected all message fragments, and the index is recorded again, and the process goes to S10; S4. Use index values ​​1 to n as addresses to query the n addresses in the fragment collection status table at the same time, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as an address is "collected", it means that there is an IP packet with collected fragments, then record the index; If there is a recorded index, then go to S5; If there is no recorded index, return to S2; S5, using the index recorded in S4 as the address, query the corresponding addresses in the IP survival table at the same time, compare the survival time queried for each address, record the index corresponding to the maximum survival time, and enter S6; S6. According to the index recorded in S3 or S5, locate the length storage area corresponding to the index in the IP length storage table, record the total IP length, IP payload length, and IP header length in the length storage area, and enter S7; S7, according to the index recorded in S3 or S5, locate the IP header storage area corresponding to the index in the IP header storage table, and at the same time, replace the IP total length field in the IP header with the IP total length recorded in S6, modify the fragmentation flag and offset field in the IP header, recalculate and fill in the checksum, so as to obtain the IP header of the reassembled IP message, record the new IP header, and enter S8; S8, according to the index recorded in S3 or S5, locate the IP payload storage area corresponding to the index in the IP payload storage table; read the IP payload storage area with 0 as the address starting point of the IP payload storage area and the IP payload length recorded in S7 as the address end point of the IP payload storage area, and enter S9; S9, encapsulate the recorded IP message header and the IP message payload read out in sequence into a PCIe message and upload it to the CPU to obtain a reassembled IP message; after the IP payload is read, the reassembly is completed and enter S10; S10. Initialize the index query module and the status storage module according to the index of the record in S3 or S5, including deleting the correspondence between the unique identifier and the index in the index query table, changing the fragment collection state corresponding to the index in the fragment collection state table to "not enabled", clearing the offset window table corresponding to the index in the offset window matrix, clearing the survival time corresponding to the index in the IP survival table, and clearing the length storage area corresponding to the index in the IP length table, and returning to S2.

[0017] Furthermore, the S1 specifically includes: S101, FPGA caches and parses the IP message fragments sent by the CPU through the PCIe interface, and parses to obtain the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length, and IP header length fields in the IP message header; The IP payload length is obtained by subtracting the IP header length from the total IP length; The source IP address, destination IP address, and identification ID form the unique identification of the IP message; The offset field is used as the starting point of the offset window of the current IP packet fragment, and the sum of the offset and the IP payload length is used as the end point of the offset window of the current IP packet fragment. The starting point and the end point together constitute the offset window of the current IP packet fragment. After completion, enter S102; S102, using the unique identifier recorded in S101 to search in the index query table, if the index corresponding to the unique identifier can be found, the index is recorded and the process proceeds to S103; If the index corresponding to the unique identifier cannot be found, proceed to S104; S103, using the index recorded in S102 to locate the offset window table corresponding to the index in the offset window matrix, and performing a correctness check on the offset window recorded in S101; If the offset window of the current IP packet fragment is correct, proceed to S107; If the offset window of the current IP packet fragment is wrong, go to S112; S104, using index values ​​1 to n as addresses, querying the n addresses in the fragment collection status table at the same time, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as an address is "not enabled", record the index; If there are recorded indexes, the one with the smallest value is selected for final recording in this step, and the process goes to S105; If there is no recorded index, go to S112; S105, write the unique identifier recorded in S101 and the index recorded in S104 into the index query table to form a correspondence between the unique identifier and the index, and proceed to S106; S106, using the index recorded in S104 as the address, write a timing start mark at the corresponding position of the IP survival time table, and enter S107; S107, according to the index recorded in S102 or S104, locate the offset window table corresponding to the index in the offset window matrix, write the offset window recorded in S101 into the offset window table, and enter S108; S108, according to the index recorded in S102 or S104, if the fragmentation mark recorded in S101 shows that the current IP message fragment is the tail fragment, the IP message header is written into the IP header storage area corresponding to the index in the IP header storage table, and then enters S109; If the fragmentation flag recorded in S101 shows that the current IP message fragment is not the last fragment, directly enter S109; S109, according to the index recorded in S102 or S104, locate the IP payload storage area corresponding to the index in the IP payload storage table, use the offset window recorded in S101 as the offset address, write the payload data of the current IP message fragment into the IP payload storage area, and then enter S110; S110, if the currently used index is the index recorded in S102, it indicates that the index has been enabled before processing the current IP message fragment, so the length storage area corresponding to the index in the IP length storage table is located, the IP total length and IP payload length stored in the length storage area are respectively added to the IP payload length recorded in S101, and then enter S111; If the currently used index is the index recorded in S104, it indicates that a new index is enabled for the current message fragment, and the length storage area corresponding to the index in the IP length storage table is located, and the IP header length in the length storage area is filled with the IP header length recorded in S101, and the IP total length is filled with the IP total length recorded in S101, and the IP payload length is recorded as the IP payload length recorded in S101, and then enter S111; S111. If the currently used index is the index recorded in S102, and the fragments can be collected together with the current IP message fragment, then "collected" is written in the position corresponding to the index in the fragment collection status table, and the process returns to S101. If the currently used index is the index recorded in S104, then "Not Completed" is written in the position corresponding to the index in the shard collection status table to overwrite the previous "Not Enabled", and the process returns to S101; S112: discard the IP message fragments cached in S101, and return to S101.

[0018] Furthermore, the correctness judgment principle of the offset window is: in the same offset window table, the current offset window and other offset windows cannot have any intersection, and the starting point of the offset window of the tail piece must be larger than the end point of other offset windows.

[0019] Furthermore, the judgment principle for the fragment collection is: under the premise that the offset window is correct, if the offset of the IP message tail fragment plus the IP payload length of the IP message tail fragment is equal to the IP payload length accumulated in the IP length table, then all message fragments have been collected.

[0020] In another aspect of the present invention, a system for an IP message fragmentation and reassembly method based on FPGA is provided, the system comprising a PCIe interface, an FPGA module and a QDR storage chip; The FPGA module stores and reassembles the IP message fragments sent by the CPU through the PCIe interface; The FPGA module includes a message parsing module, a message encapsulation module, a reorganization control module, an index query module, a state storage module, and a message storage module; The message parsing module is responsible for caching and parsing the IP message fragments sent by the CPU, extracting the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length and IP header length fields in the message header; the IP payload length is obtained by subtracting the IP header length from the IP total length; the source IP address, destination IP address and identification ID form the unique identifier of the IP message; the offset field is used as the offset window starting point of the current IP message fragment, and the sum of the offset and the IP payload length is used as the offset window end point of the current IP message fragment, and the starting point and the end point together constitute the offset window of the current IP message fragment; The message encapsulation module is responsible for encapsulating the reassembled IP message according to the transmission requirements of the PCIe interface and uploading it to the CPU; The reassembly control module is responsible for executing the storage process of IP message fragments and the reassembly process of IP message fragments, including writing and querying the index query module, the state storage module and the message storage module; The index query module includes an index query table, the content recorded in the index query table is the unique identifier of the IP message, and the address recorded in the index query table is recorded as an index; A state storage module is used to store state information generated during the storage and reassembly process of IP message fragments, store the fragment collection state of IP message fragments through a fragment collection state table, store the survival time of IP message fragments through an IP survival time table, store the offset window of IP message fragments through a window offset matrix, and store the IP header length, IP total length and IP payload length of IP messages through an IP length table; the state information includes "collected", "not collected" and "not enabled"; The message storage module is used to store the message header and message payload of the IP message, store the message header of the IP message fragment through the IP header storage table, and store the message payload of the IP message fragment through the IP payload storage table.

[0021] Preferably, the state storage module includes a fragment collection state table, an IP survival table, an offset window matrix, and an IP length storage table; wherein: The fragment collection status table is a register-based storage table used to store the fragment collection status of IP packets; the table contains n fragment collection statuses corresponding to index values ​​1 to n, and fragment collection status n indicates the corresponding fragment collection status when index value n is used as the address; each fragment collection status has three values: "collected", "not collected", and "not enabled", which respectively indicate that the IP packet corresponding to the index has collected fragments, the IP packet corresponding to the index has not collected fragments, and the index is not enabled; The IP survival table is a register-based storage table used to store the survival time of IP message fragments; the table contains n survival times corresponding to index values ​​1 to n, and survival time n represents the survival time corresponding to the index value n as the address; preferably, each survival time starts counting after the corresponding index is enabled; The offset window matrix includes n offset window tables corresponding to index values ​​1 to n. The offset window table is a register-based storage table used to store offset windows of IP packet fragments. The offset window table n represents the offset window table corresponding to the index value n. The IP length storage table is a register-based storage table. There are n length storage areas corresponding to index values ​​1 to n in the table. Length storage area n represents the length storage area corresponding to the index value n. Each length storage area stores the IP header length, IP payload length and IP total length of the IP message.

[0022] Preferably, each offset window table consists of m offset windows, where m is an integer greater than 1; each offset window includes two values, a start point and an end point, wherein the start point is the offset of the IP packet fragment, and the end point is the sum of the offset and the payload length of the IP packet fragment, and the start point and the end point can be used to locate the position interval of the payload data of an IP packet fragment in the complete IP packet payload data.

[0023] The message storage module includes an IP header storage table and an IP payload storage table: The IP header storage table is a BRAM-based storage table used to store IP message headers. The table contains n IP header storage areas corresponding to index values ​​1 to n, where IP header storage n indicates the IP header storage area corresponding to index n. Only when the IP message fragment is the tail fragment, the IP message header will be written into the corresponding IP header storage area. The IP payload storage table is a storage table based on an external QDR storage chip, which is used to store the payload part of the IP packet fragments; there are n IP payload storage areas corresponding to index values ​​1 to n in the table, where IP payload storage area n represents the IP payload storage area corresponding to the index n; in the storage process of the IP packet fragments, when the payload data is written into the IP payload storage area corresponding to the index, the write address in the IP payload storage area is from the start point to the end point of the offset window.

[0024] In another aspect of the present invention, a machine-readable storage medium is provided, which stores executable instructions, and when the instructions are executed, the machine executes the FPGA-based IP message fragmentation and reassembly method as described above.

[0025] Compared with the prior art, the present invention has the following beneficial effects: (1) The present invention provides an FPGA-based IP message fragmentation reassembly method and system, which offloads the IP message fragmentation reassembly work of the CPU to the FPGA for execution, and only transmits the reassembled IP message to the CPU, thereby reducing the CPU load and protecting the CPU from IP fragmentation attacks.

[0026] (2) The present invention provides an FPGA-based IP message fragmentation reassembly method and system, which divides the IP message fragmentation reassembly process into two asynchronous processes: storage of IP message fragments and reassembly of IP message fragments. The storage process is only responsible for recording status and storing messages, and the reassembly process is only responsible for obtaining status and reading messages for reassembly. These two asynchronous processes form a two-level pipeline structure. When executing the reassembly process, the storage process is also executed synchronously, thereby improving the efficiency and speed of IP message fragmentation reassembly. (3) The present invention provides an FPGA-based IP message fragmentation and reassembly method and system, which builds an index query table based on TCAM. Compared with the common hash operation-based method, the TCAM-based index query table avoids query conflicts and has a higher query speed.

[0027] (4) The present invention provides an FPGA-based IP message fragmentation reassembly method and system, which judges the correctness of IP message fragmentation and whether the IP message has all the fragments from two dimensions: the total length of the IP message and the offset window, thereby improving the accuracy of IP message fragmentation reassembly.

[0028] (5) The present invention provides an FPGA-based IP message fragment reassembly method and system, which adopts a dynamic storage resource allocation and recycling mechanism. If the received IP message fragment cannot find the corresponding index and the result of querying the fragment collection status table shows that there is an unenabled index, a new index is enabled at this time; if the survival time of the unreassembled IP message exceeds the life cycle and the fragments are not collected, or the IP message has been reassembled, the index is recycled at this time. This mechanism effectively saves resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a flowchart of the reassembly of IP message fragments according to the present invention; Figure 2It is a schematic diagram of the IP message fragment storage process in Embodiment 1 of the present invention; Figure 3 It is a schematic diagram of the overall architecture of the system described in Example 2 of the present invention; Figure 4 This is the index query representation in Embodiment 2 of the present invention; Figure 5 This is a schematic diagram showing the state of complete shard collection in Embodiment 2 of the present invention; Figure 6 This is a schematic diagram of an IP survival time table in Example 2 of the present invention; Figure 7 is a schematic diagram of an offset window matrix in Embodiment 2 of the present invention; Figure 8 This is a schematic diagram of IP length storage in Embodiment 2 of the present invention; Fig. 9 This is a schematic diagram of IP header storage in Example 2 of the present invention; Fig.10 This is a schematic diagram of IP load storage in Example 2 of the present invention. DETAILED DESCRIPTION

[0030] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0031] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0032] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0033] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0034] Example 1 The present embodiment provides an FPGA-based IP message fragmentation reassembly method, the method includes an IP message fragmentation storage process and an IP message fragmentation reassembly process, the storage process is only responsible for recording status and storing messages, and the reassembly process is only responsible for obtaining status and reading messages for reassembly, and these two asynchronous processes form a two-level pipeline structure, which improves the efficiency and speed of IP message fragmentation reassembly; an FPGA-based IP message fragmentation reassembly method as shown Figure 1 As shown, the details are as follows: S1. FPGA stores the IP message fragments sent by the CPU through the PCIe interface. Specifically: After finding the index corresponding to the IP message fragment, FPGA queries and writes the fragment collection status table, offset window matrix, IP length storage table, IP survival table, IP header storage table, and IP payload storage table to realize the storage of the status of the IP message fragment and the message content.

[0035] Preferably, the IP message fragments can be reassembled after being stored, and then reassembled while being stored; after S1 processes the first received IP message fragment, S1 and S2-S10 can be divided into two independent processes.

[0036] S1 is the storage process of IP message fragments, including storage judgment and storage execution, such as Figure 2 As shown, specifically: S101, FPGA caches and parses the IP message fragments sent by the CPU through the PCIe interface, and parses to obtain the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length, IP header length and other fields in the IP message header; The IP payload length is obtained by subtracting the IP header length from the total IP length; The source IP address, destination IP address, and identification ID form the unique identification of the IP message; The offset field is used as the starting point of the offset window of the current IP packet fragment, and the sum of the offset and the IP payload length is used as the end point of the offset window of the current IP packet fragment. The starting point and the end point together constitute the offset window of the current IP packet fragment. After completion, proceed to S102.

[0037] S102, using the unique identifier recorded in S101 to search in the index query table, if the index corresponding to the unique identifier can be found, the index is recorded and the process proceeds to S103; If the index corresponding to the unique identifier cannot be found, the process proceeds to S104.

[0038] S103, using the index recorded in S102 to locate the offset window table corresponding to the index in the offset window matrix, and performing a correctness check on the offset window recorded in S101; If the offset window of the current IP packet fragment is correct, proceed to S107; If the offset window of the current IP message fragment is wrong, go to S112.

[0039] Furthermore, the correctness judgment principle of the offset window is: in the same offset window table, the current offset window and other offset windows cannot have any intersection, and the starting point of the offset window of the tail piece must be larger than the end point of other offset windows.

[0040] S104, using index values ​​1 to n as addresses, querying the n addresses in the fragment collection status table at the same time, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as an address is "not enabled", record the index; If there are recorded indexes, the one with the smallest value is selected for final recording in this step, and the process goes to S105; If there is no recorded index, go to S112.

[0041] S105 , write the unique identifier recorded in S101 and the index recorded in S104 into the index query table to form a correspondence between the unique identifier and the index, and proceed to S106 .

[0042] S106. Using the index recorded in S104 as the address, write a timing start mark at the corresponding position of the IP survival table, and enter S107.

[0043] S107 . According to the index recorded in S102 or S104 , locate the offset window table corresponding to the index in the offset window matrix, write the offset window recorded in S101 into the offset window table, and proceed to S108 .

[0044] S108, according to the index recorded in S102 or S104, if the fragmentation flag recorded in S101 shows that the current IP packet fragment is the tail piece, the IP packet header is written to the IP header storage table corresponding to the index of the IP header storage area, and then proceeds to S109; If the fragmentation mark recorded in S101 shows that the current IP message fragment is not the last fragment, directly enter S109.

[0045] S109, locate the IP payload storage area corresponding to the index in the IP payload storage table according to the index recorded in S102 or S104, use the offset window recorded in S101 as the offset address, write the payload data of the current IP message fragment into the IP payload storage area, and then enter S110.

[0046] S110, if the currently used index is the index recorded in S102, indicating that the index has been enabled before processing the current IP message fragment, locate the length storage area corresponding to the index in the IP length storage table, update the length storage area, that is, add the IP total length and IP payload length stored in the length storage area to the IP payload length recorded in S101, and then enter S111; If the currently used index is the index recorded in S104, it indicates that a new index has been enabled for the current message fragment. The length storage area corresponding to the index in the IP length storage table is located, and the length storage area is updated, that is, the IP header length in the length storage area is filled with the IP header length recorded in S101, the IP total length is filled with the IP total length recorded in S101, and the IP payload length is recorded as the IP payload length recorded in S101, and then enters S111.

[0047] S111. Update the status of the position corresponding to the index in the shard collection status table according to the recorded index, as follows: If the currently used index is the index recorded in S102, and the fragments can be collected together with the current IP message fragment, then "collected" is written in the position corresponding to the index in the fragment collection status table, and the process returns to S101; If the currently used index is the index recorded in S104, "Not Completed" is written in the position corresponding to the index in the shard collection status table to overwrite the previous "Not Enabled", and the process returns to S101.

[0048] S112: discard the IP message fragments cached in S101, and return to S101.

[0049] Furthermore, the judgment principle for the fragment collection is: under the premise that the offset window is correct, if the offset of the IP message tail fragment plus the IP payload length of the IP message tail fragment is equal to the IP payload length accumulated in the IP length table, then all message fragments have been collected.

[0050] The following S2~S10 are the IP message fragment reassembly process, including reassembly judgment, reassembly execution and index recovery, specifically: S2. Use index values ​​1 to n as addresses to query the n addresses in the IP survival table at the same time, where n is an integer greater than 1; if the survival time queried when a certain index is used as an address is greater than the specified life cycle, then record the index; If there is a recorded index, select the one with the smallest value as the final record of this step, and then enter S3; If there is no recorded index, go to S4.

[0051] S3, use the index recorded in S2 as the address to query the fragment collection status table. If the fragment collection status queried by the address is "collected", it indicates that the IP message corresponding to the index has collected all message fragments. Record the index again and enter S6; If the fragment collection status queried for the address is "not collected", it means that the IP message corresponding to the index has not collected all message fragments, and the index is recorded again to enter S10.

[0052] S4. Use index values ​​1 to n as addresses to query the n addresses in the fragment collection status table at the same time, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as an address is "collected", it means that there is an IP packet with collected fragments, then record the index; If there is a recorded index, then go to S5; If there is no recorded index, return to S2.

[0053] S5. Use the index recorded in S4 as the address to query the corresponding addresses in the IP survival time table at the same time, compare the survival time queried for each address, record the index corresponding to the maximum survival time, and enter S6.

[0054] S6. According to the index recorded in S3 or S5, locate the corresponding length storage area in the IP length storage table, record the total IP length, IP payload length, and IP header length in the length storage area, and enter S7.

[0055] At this point, the index of the IP message to be reassembled has been determined, and the reassembly process begins: S7. According to the index recorded in S3 or S5, locate the corresponding IP header storage area in the IP header storage table. At the same time, replace the IP total length field in the IP header with the IP total length recorded in S6, modify the fragmentation flag and offset field in the IP header, recalculate and fill in the checksum, so as to obtain the IP header of the reassembled IP message, record the new IP header, and enter S8.

[0056] S8. Locate the IP payload storage area corresponding to the current IP message in the IP payload storage table according to the index recorded in S3 or S5; read the IP payload storage area with 0 as the address starting point of the IP payload storage area and the IP payload length recorded in S7 as the address end point of the IP payload storage area, and enter S9.

[0057] S9, encapsulate the recorded IP message header and the IP message payload read out in sequence into a PCIe message and upload it to the CPU to obtain the reassembled IP message; after the IP payload is read, the reassembly is completed and enter S10.

[0058] S10. Recycle the index: Initialize the index query module and the status storage module according to the index of the record in S3 or S5, including deleting the correspondence between the unique identifier and the index in the index query table, changing the fragment collection state corresponding to the index in the fragment collection state table to "not enabled", clearing the offset window table corresponding to the index in the offset window matrix, clearing the survival time corresponding to the index in the IP survival table, and clearing the length storage area corresponding to the index in the IP length table, and returning to S2.

[0059] Example 2 This embodiment provides a system for an IP message fragmentation and reassembly method based on FPGA, such as Figure 3 As shown, the system includes a PCIe interface, an FPGA module and a QDR storage chip: The FPGA module stores and reassembles the IP message fragments sent by the CPU through the PCIe interface; The FPGA module includes a message parsing module, a message encapsulation module, a reorganization control module, an index query module, a state storage module, and a message storage module.

[0060] The message parsing module is responsible for caching and parsing the IP message fragments sent by the CPU, extracting the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length and IP header length fields in the message header; the IP payload length is obtained by subtracting the IP header length from the IP total length; the source IP address, destination IP address and identification ID form the unique identifier of the IP message; the offset field is used as the starting point of the offset window of the current IP message fragment, and the sum of the offset and the IP payload length is used as the end point of the offset window of the current IP message fragment. The starting point and the end point together constitute the offset window of the current IP message fragment.

[0061] The message encapsulation module is responsible for encapsulating the reassembled IP message according to the transmission requirements of the PCIe interface and uploading it to the CPU.

[0062] The reorganization control module is responsible for executing the storage process of IP message fragments and the reorganization process of IP message fragments, including writing and querying the index query module, the state storage module and the message storage module; that is, writing and querying the index query table, the fragment collection state table, the window offset matrix, the IP length storage table, the IP survival table, the IP header storage table, and the IP load storage table.

[0063] The index query module includes an index query table, such as Figure 4As shown. The index query table is a storage table based on TCAM, which can match addresses according to content. The TCAM function is implemented in FPGA. Compared with the common hash operation-based method, the index query table based on TCAM avoids query conflicts and has a higher query speed. The content recorded in the index query table is the unique identifier of the IP message composed of the three fields of the source IP address, destination IP address and identification ID in the IP message header, a total of n, namely unique identifier 1, unique identifier 2... unique identifier n; the address recorded in the index query table is recorded as an index, and the index corresponds to the unique identifier one by one, a total of n, namely index 1, index 2... index n, which is used as the address of the fragment collection state table, IP survival table, IP length table, window offset matrix, IP header storage table, and IP load storage table. Figure 4 In the example, the index value is 1~n, n is an integer greater than 1, and the unique identifier n is the unique identifier of the IP packet corresponding to the index value n.

[0064] The state storage module is used to store the state information generated during the storage and reassembly of IP message fragments; the state storage module includes a fragment collection state table, an IP survival table, an offset window matrix, and an IP length storage table; wherein: The shard collection status table is as follows: Figure 5 As shown, the table is a register-based storage table for storing the fragment collection status of IP packets; the table has n fragment collection states corresponding to index values ​​1~n, and fragment collection state n represents the corresponding fragment collection state when index value n is used as the address; each fragment collection state has three values ​​of "collected", "not collected", and "not enabled", which respectively indicate that the IP packet corresponding to the index has collected fragments, the IP packet corresponding to the index has not collected fragments, and the index is not enabled.

[0065] IP survival time table, such as Figure 6 As shown, the table is a register-based storage table for storing the survival time of IP packet fragments; there are n survival times corresponding to index values ​​1~n in the table, and survival time n represents the corresponding survival time when index value n is used as the address; preferably, each survival time starts counting after the corresponding index is enabled.

[0066] Offset window matrix, such as Figure 7As shown, it includes n offset window tables corresponding to index values ​​1~n. The offset window table is a register-based storage table used to store the offset windows of IP packet fragments; the offset window table n represents the offset window table corresponding to the index value n. Specifically, each offset window table is composed of m offset windows, where m is an integer greater than 1, corresponding to the number of fragments of the IP packet, and the specific values ​​represented in each offset window table may be different. Each offset window includes two values, a starting point and an end point, wherein the starting point is the offset of the IP packet fragment, and the end point is the sum of the offset and the payload length of the IP packet fragment. The starting point and the end point can be used to locate the position interval of the payload data of an IP packet fragment in the complete IP packet payload data. For a group of IP packet fragments selected by the same unique identifier, their offset windows should not have an intersection, and the starting point of the offset window of the tail fragment should be greater than the end point of all other offset windows, such as Figure 7 As shown, the offset window table n is the offset window table corresponding to the index value n; the offset window nm is the mth offset window recorded in the offset window table when the index is n; the starting point nm and the end point nm are respectively the starting point and the end point of the mth offset window recorded in the offset window table when the index is n.

[0067] IP length storage table, such as Figure 8 As shown, the table is a register-based storage table, which contains n length storage areas corresponding to index values ​​1 to n. Length storage area n is represented by the length storage area corresponding to the index n. Each length storage area stores the IP header length, IP payload length and IP total length of the IP message.

[0068] The message storage module is used to store the message header and message payload of the IP message, including an IP header storage table and an IP payload storage table, wherein: IP header storage table, such as Fig. 9 As shown in FIG. 1 , the table is a BRAM-based storage table for storing IP message headers. The table has n IP header storage areas corresponding to index values ​​1 to n, where IP header storage n indicates the IP header storage area corresponding to index n. The IP message header will be written into the corresponding IP header storage area only when the IP message fragment is the tail fragment.

[0069] IP payload storage table, such as Fig.10 As shown, the table is a storage table based on a QDR storage chip, which is used to store the payload part of the IP packet fragment. The table has n IP payload storage areas corresponding to index values ​​1 to n, where IP payload storage area n represents the IP payload storage area corresponding to index n. In the storage process of IP packet fragments, when the payload data is written into the IP payload storage area corresponding to the index, the write address in the IP payload storage area is from the start point to the end point of the offset window.

[0070] Example 3 This embodiment also provides a computer-readable storage medium storing executable instructions, which, when executed, enable the machine to execute the above-mentioned method for implementing FPGA-based IP message fragment reassembly.

[0071] Specifically, a system or device equipped with a readable storage medium can be provided, on which software program codes that implement the functions of any of the above-mentioned embodiments are stored, and a computer or processor of the system or device can read and execute instructions stored in the readable storage medium.

[0072] In this case, the program code itself read from the machine-readable medium can realize the function of any one of the above embodiments, and thus the machine-readable code and the machine-readable storage medium storing the machine-readable code constitute part of this specification.

[0073] Examples of readable storage media include floppy disks, hard disks, magneto-optical disks, optical disks (such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD-RW), magnetic tapes, non-volatile memory cards, and ROMs. Optionally, the program code may be downloaded from a server computer or a cloud via a communication network.

[0074] It should be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware aspects. Moreover, the present invention may take the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0075] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram and the combination of processes and / or blocks in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0076] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0077] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0078] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the technical solution of the present invention, and are not intended to limit the specific implementation methods of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the claims of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. A method for reassembling IP message fragments based on FPGA, characterized in that: The method comprises: S1. FPGA stores the IP message fragments sent by the CPU through the PCIe interface. Specifically: After finding the index corresponding to the IP message fragment, FPGA searches and writes the fragment collection status table, offset window matrix, IP length storage table, IP survival table, IP header storage table, and IP payload storage table to realize the storage of the status of the IP message fragment and the message content; S2. Use index values ​​1 to n as addresses to query the n addresses in the IP survival table at the same time, where n is an integer greater than 1; if the survival time queried when a certain index is used as an address is greater than the specified life cycle, then record the index; If there is a recorded index, select the one with the smallest value as the final record of this step, and then enter S3; If there is no recorded index, go to S4; S3, use the index recorded in S2 as the address to query the fragment collection status table. If the fragment collection status queried by the address is "collected", it indicates that the IP message corresponding to the index has collected all the message fragments. Record the index again and enter S6; If the fragment collection status queried for the address is "not collected", it means that the IP message corresponding to the index has not collected all message fragments, and the index is recorded again, and the process goes to S10; S4. Use index values ​​1 to n as addresses to query the n addresses in the fragment collection status table at the same time, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as the address is "collected", it means that there is an IP packet with collected fragments, then the index is recorded; If there is a recorded index, then go to S5; If there is no recorded index, return to S2; S5, using the index recorded in S4 as the address, query the corresponding addresses in the IP survival table at the same time, compare the survival time queried for each address, record the index corresponding to the maximum survival time, and enter S6; S6. According to the index recorded in S3 or S5, locate the length storage area corresponding to the index in the IP length storage table, record the total IP length, IP payload length, and IP header length in the length storage area, and enter S7; S7, according to the index recorded in S3 or S5, locate the IP header storage area corresponding to the index in the IP header storage table, and at the same time, replace the IP total length field in the IP header with the IP total length recorded in S6, modify the fragmentation flag and offset field in the IP header, recalculate and fill in the checksum, so as to obtain the IP header of the reassembled IP message, record the new IP header, and enter S8; S8, according to the index recorded in S3 or S5, locate the IP payload storage area corresponding to the index in the IP payload storage table; read the IP payload storage area with 0 as the address starting point of the IP payload storage area and the IP payload length recorded in S7 as the address end point of the IP payload storage area, and enter S9; S9, encapsulate the recorded IP message header and the IP message payload read out in sequence into a PCIe message and upload it to the CPU to obtain a reassembled IP message; after the IP payload is read, the reassembly is completed and enter S10; S10. Initialize the index query module and the status storage module according to the index of the record in S3 or S5, including deleting the correspondence between the unique identifier and the index in the index query table, changing the fragment collection state corresponding to the index in the fragment collection state table to "not enabled", clearing the offset window table corresponding to the index in the offset window matrix, clearing the survival time corresponding to the index in the IP survival table, and clearing the length storage area corresponding to the index in the IP length table, and returning to S2.

2. The FPGA-based IP message fragmentation and reassembly method according to claim 1, characterized in that: The S1 specifically includes: S101, FPGA caches and parses the IP message fragments sent by the CPU through the PCIe interface, and parses to obtain the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length, and IP header length fields in the IP message header; The IP payload length is obtained by subtracting the IP header length from the total IP length; The source IP address, destination IP address, and identification ID form the unique identification of the IP message; The offset field is used as the starting point of the offset window of the current IP packet fragment, and the sum of the offset and the IP payload length is used as the end point of the offset window of the current IP packet fragment. The starting point and the end point together constitute the offset window of the current IP packet fragment. After completion, enter S102; S102, using the unique identifier recorded in S101 to search in the index query table, if the index corresponding to the unique identifier can be found, then the index is recorded and the process proceeds to S103; If the index corresponding to the unique identifier cannot be found, proceed to S104; S103, using the index recorded in S102 to locate the offset window table corresponding to the index in the offset window matrix, and performing a correctness check on the offset window recorded in S101; If the offset window of the current IP packet fragment is correct, proceed to S107; If the offset window of the current IP packet fragment is wrong, go to S112; S104, using index values ​​1 to n as addresses, querying the n addresses in the fragment collection status table simultaneously, where n is an integer greater than 1; if the fragment collection status queried when a certain index is used as an address is "not enabled", record the index; If there are recorded indexes, the one with the smallest value is selected for the final record of this step, and the process goes to S105; If there is no recorded index, go to S112; S105, write the unique identifier recorded in S101 and the index recorded in S104 into the index query table to form a correspondence between the unique identifier and the index, and proceed to S106; S106, using the index recorded in S104 as the address, write a timing start mark at the corresponding position of the IP survival time table, and enter S107; S107, according to the index recorded in S102 or S104, locate the offset window table corresponding to the index in the offset window matrix, write the offset window recorded in S101 into the offset window table, and enter S108; S108, according to the index recorded in S102 or S104, if the fragmentation mark recorded in S101 shows that the current IP message fragment is the tail fragment, the IP message header is written into the IP header storage area corresponding to the index in the IP header storage table, and then enters S109; If the fragmentation flag recorded in S101 shows that the current IP message fragment is not the last fragment, directly enter S109; S109, according to the index recorded in S102 or S104, locate the IP payload storage area corresponding to the index in the IP payload storage table, use the offset window recorded in S101 as the offset address, write the payload data of the current IP message fragment into the IP payload storage area, and then enter S110; S110, if the currently used index is the index recorded in S102, it indicates that the index has been enabled before processing the current IP message fragment, so the length storage area corresponding to the index in the IP length storage table is located, the IP total length and IP payload length stored in the length storage area are respectively added to the IP payload length recorded in S101, and then enter S111; If the currently used index is the index recorded in S104, it indicates that a new index is enabled for the current message fragment, and the length storage area corresponding to the index in the IP length storage table is located, and the IP header length in the length storage area is filled with the IP header length recorded in S101, and the IP total length is filled with the IP total length recorded in S101, and the IP payload length is recorded as the IP payload length recorded in S101, and then enter S111; S111. If the currently used index is the index recorded in S102, and the fragments can be collected together with the current IP message fragment, then "collected" is written in the position corresponding to the index in the fragment collection status table, and the process returns to S101. If the currently used index is the index recorded in S104, then "Not Completed" is written in the position corresponding to the index in the shard collection status table to overwrite the previous "Not Enabled", and the process returns to S101; S112: discard the IP message fragments cached in S101, and return to S101.

3. The FPGA-based IP message fragmentation and reassembly method according to claim 2, characterized in that: The correctness judgment principle of the offset window is: in the same offset window table, the current offset window and other offset windows cannot have an intersection, and the starting point of the offset window of the tail piece must be larger than the end point of other offset windows.

4. The FPGA-based IP message fragmentation and reassembly method according to claim 2 or 3, characterized in that: The judgment principle of the fragment collection is: under the premise that the offset window is correct, if the offset of the IP message tail fragment plus the IP payload length of the IP message tail fragment is equal to the IP payload length accumulated in the IP length table, then all message fragments have been collected.

5. A system for an IP message fragmentation and reassembly method based on FPGA, characterized in that: The system includes a PCIe interface, an FPGA module and a QDR storage chip; The FPGA module stores and reassembles the IP message fragments sent by the CPU through the PCIe interface; The FPGA module includes a message parsing module, a message encapsulation module, a reorganization control module, an index query module, a state storage module, and a message storage module; The message parsing module is responsible for caching and parsing the IP message fragments sent by the CPU, extracting the source IP address, destination IP address, identification ID, offset, fragmentation flag, IP total length and IP header length fields in the message header; and calculating the IP payload length, unique identifier and offset window of the IP message fragment; The message encapsulation module is responsible for encapsulating the reassembled IP message according to the transmission requirements of the PCIe interface and uploading it to the CPU; The reassembly control module is responsible for executing the storage process of IP message fragments and the reassembly process of IP message fragments, including writing and querying the index query module, the state storage module and the message storage module; The index query module includes an index query table, the content recorded in the index query table is the unique identifier of the IP message, and the address recorded in the index query table is recorded as an index; A state storage module is used to store the state information generated during the storage and reassembly process of IP message fragments, store the fragment collection state of IP message fragments through a fragment collection state table, store the survival time of IP message fragments through an IP survival table, store the offset window of IP message fragments through a window offset matrix, and store the IP header length, IP total length and IP payload length of IP messages through an IP length table; The message storage module is used to store the message header and message payload of the IP message, store the message header of the IP message fragment through the IP header storage table, and store the message payload of the IP message fragment through the IP payload storage table.

6. The system of the FPGA-based IP message fragmentation and reassembly method according to claim 5, characterized in that: The state storage module includes a fragment collection state table, an IP survival table, an offset window matrix, and an IP length storage table; wherein, The fragment collection status table is a register-based storage table used to store the fragment collection status of IP packets; the table contains n fragment collection statuses corresponding to index values ​​1 to n, and fragment collection status n indicates the corresponding fragment collection status when index value n is used as the address; each fragment collection status has three values: "collected", "not collected", and "not enabled", which respectively indicate that the IP packet corresponding to the index has collected fragments, the IP packet corresponding to the index has not collected fragments, and the index is not enabled; The IP survival table is a register-based storage table used to store the survival time of IP message fragments; the table contains n survival times corresponding to index values ​​1 to n, and survival time n represents the survival time corresponding to the index value n as the address; preferably, each survival time starts counting after the corresponding index is enabled; The offset window matrix includes n offset window tables corresponding to index values ​​1 to n. The offset window table is a register-based storage table used to store offset windows of IP packet fragments. The offset window table n represents the offset window table corresponding to the index value n. The IP length storage table is a register-based storage table. There are n length storage areas corresponding to index values ​​1 to n in the table. Length storage area n represents the length storage area corresponding to the index value n. Each length storage area stores the IP header length, IP payload length and IP total length of the IP message. The message storage module includes an IP header storage table and an IP payload storage table: The IP header storage table is a BRAM-based storage table used to store IP message headers. The table contains n IP header storage areas corresponding to index values ​​1 to n, where IP header storage n indicates the IP header storage area corresponding to index n. Only when the IP message fragment is the tail fragment, the IP message header will be written into the corresponding IP header storage area. The IP payload storage table is a storage table based on an external QDR storage chip, which is used to store the payload part of the IP packet fragments; there are n IP payload storage areas corresponding to index values ​​1 to n in the table, where IP payload storage area n represents the IP payload storage area corresponding to the index n; in the storage process of the IP packet fragments, when the payload data is written into the IP payload storage area corresponding to the index, the write address in the IP payload storage area is from the start point to the end point of the offset window.

7. The system of the FPGA-based IP message fragmentation and reassembly method according to claim 6, characterized in that: Each offset window table consists of m offset windows, where m is an integer greater than 1; each offset window includes two values, a start point and an end point, where the start point is the offset of the IP packet fragment, and the end point is the sum of the offset and the payload length of the IP packet fragment. The start point and the end point are used to locate the position interval of the payload data of an IP packet fragment in the complete IP packet payload data.

8. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.

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