N-type silicon carbide ohmic contact structure and preparation method thereof

Abstract

The invention provides an N-type silicon carbide ohmic contact structure and a preparation method thereof. The N-type silicon carbide ohmic contact structure comprises a silicon carbide epitaxial wafer, and a Ni metal layer, a first Ti metal layer, a TaSi2 metal layer, a Pt metal layer and a second Ti metal layer which are sequentially arranged on the surface of the silicon carbide epitaxial wafer. The Ni of the Ni metal layer and the SiC of the silicon carbide epitaxial wafer can form ohmic contact with relatively low contact resistance, and the separated C elementary substance can react with the Ti of the first Ti metal layer to make the ohmic contact surface smooth, so that the adhesion with the upper layer metal is enhanced, and the ohmic contact quality is improved; taSi2 of the TaSi2 metal layer reacts with Pt of the Pt metal layer to form a diffusion barrier layer, so that mutual diffusion and oxidation of the metal layers are prevented; the second Ti metal layer located on the surface layer can form a compact oxidation film at a high temperature, and ohmic contact is protected from being damaged by oxidation; in addition, a two-step annealing process is used, so that the stability of ohmic contact at high temperature is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an N-type silicon carbide ohmic contact structure and a preparation method thereof. Background Art

[0002] As a third-generation semiconductor, silicon carbide has the characteristics of wide bandgap, high breakdown electric field, high thermal conductivity, high hardness, good chemical inertness, and radiation resistance. The manufactured silicon carbide devices have more advantages than traditional silicon and germanium devices under high temperature and high pressure conditions.

[0003] Ohmic contact refers to the contact formed between metal and semiconductor, which is a key semiconductor manufacturing process. A good ohmic contact has very small resistance, and the voltage drop generated when voltage is added is very low, so it has little effect on the performance of semiconductor devices; in addition, the stability of ohmic contact will also affect the service life of semiconductor devices. The work function between N-type SiC and metal is very different, and the formation of ohmic contact requires a high doping concentration and annealing. In the high temperature and high pressure application scenarios of silicon carbide devices, ohmic contact requires high stability to extend the service life of silicon carbide devices and ensure the performance of the devices.

[0004] At present, the most widely used is the ohmic contact formed by Ni and SiC, which has the advantages of low contact resistance and high repeatability. However, it also has problems such as rough ohmic contact surface morphology, uneven distribution, and free carbon enrichment. At the same time, it will fail due to oxidation when exposed to air in a high temperature environment.

[0005] In view of this, the present invention is proposed. Summary of the invention

[0006] The object of the present invention is to provide an N-type silicon carbide ohmic contact structure and a preparation method thereof, which can improve the quality of the ohmic contact and the stability of the ohmic contact at high temperatures.

[0007] The invention provides an N-type silicon carbide ohmic contact structure, comprising a silicon carbide epitaxial wafer and a Ni metal layer, a first Ti metal layer, a TaSi2 metal layer, a Pt metal layer and a second Ti metal layer which are sequentially arranged on the surface of the silicon carbide epitaxial wafer.

[0008] Furthermore, the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate and a P-type silicon carbide epitaxial layer and an N-type silicon carbide epitaxial layer sequentially arranged on the silicon surface of the N-type silicon carbide substrate. + The thickness of the P-type silicon carbide epitaxial layer is 5-8 μm, for example, 5 μm, and the doping concentration is 5×10 15 cm -3 Up to 1×10 16 cm -3 , for example 5×10 15 cm -3 ; N+ The thickness of the silicon carbide epitaxial layer is 2-3 μm, for example, 2 μm, and the doping concentration is 5×10 18 cm -3 Up to 1×10 19 cm -3 , for example 1×10 19 cm -3 .

[0009] Furthermore, the thickness of the Ni metal layer is 50-100 nm; the thickness of the first Ti metal layer is 50-100 nm; the thickness of the TaSi2 metal layer is 300-400 nm; the thickness of the Pt metal layer is 200-300 nm; and the thickness of the second Ti metal layer is 10-20 nm.

[0010] The N-type silicon carbide ohmic contact structure of the present invention is SiC / Ni / Ti / TaSi2 / Pt / Ti, including epitaxially forming P-type silicon carbide and N-type silicon carbide on an N-type silicon carbide substrate. + The silicon carbide epitaxial wafer of the type silicon carbide is arranged in sequence on N + The Ni metal layer, Ti metal layer, TaSi2 metal layer, Pt metal layer and Ti metal layer on the surface of the silicon carbide epitaxial layer; wherein: Ni can form an ohmic contact with SiC with low contact resistance, and the precipitated C single substance can react with Ti to make the ohmic contact surface flat, enhance the adhesion with the upper metal layer, and improve the ohmic contact quality, that is, the Ni metal layer, the Ti metal layer and the N + TaSi2 reacts with Pt to form silicide, which serves as a diffusion barrier to prevent mutual diffusion and oxidation of metal layers. That is, the TaSi2 metal layer, the Pt metal layer, and the Ti metal layer serve as diffusion barriers to prevent mutual diffusion between metals, and the Pt metal layer also serves as a wiring layer. The Ti located on the surface can form a dense oxide film in a high-temperature air environment to protect the ohmic contact from being damaged by oxidation. That is, the Ti metal layer, as the surface metal, can effectively prevent oxygen from diffusing between metal layers to cause the ohmic contact to fail.

[0011] The present invention also provides a method for preparing the above-mentioned N-type silicon carbide ohmic contact structure, comprising the following steps in order:

[0012] A: N for SiC epitaxial wafers + Type silicon carbide epitaxial layer is etched;

[0013] B: In N + A Ni metal layer and a first Ti metal layer are sequentially deposited on the surface of the silicon carbide epitaxial layer;

[0014] C: Rapid thermal annealing of the structure in step B to form an ohmic contact;

[0015] D: sequentially depositing a TaSi2 metal layer, a Pt metal layer and a second Ti metal layer on the surface of the Ti metal layer;

[0016] E: Anneal the structure of step D to form a diffusion barrier layer.

[0017] Further, step A comprises:

[0018] A1: Perform standard RCA cleaning on silicon carbide epitaxial wafers;

[0019] A2: Spin-coat photoresist on the surface of silicon carbide epitaxial wafer and pattern it;

[0020] A3: Depositing a Ni layer on the surface of the silicon carbide epitaxial wafer;

[0021] A4: Remove the photoresist and pattern the Ni layer to form a Ni mask;

[0022] A5: N for SiC epitaxial wafers + The silicon carbide epitaxial layer is etched to form a boss;

[0023] A6: Remove the Ni mask.

[0024] In step A3, the Ni layer can be deposited by evaporation, sputtering, electroplating and other processes, preferably by magnetron sputtering; in step A4, the Ni layer can be patterned by wet etching, dry etching, stripping and other processes, preferably by stripping; in step A5, etching can be performed by dry etching, laser-assisted etching and other processes, preferably by dry etching, and more preferably by ICP (inductively coupled plasma etching) to etch silicon carbide; in step A6, wet etching is used to remove the Ni mask.

[0025] Further, step B comprises:

[0026] B1: In N + Spin-coat photoresist on the surface of the silicon carbide epitaxial layer and pattern it to expose the ohmic contact area;

[0027] B2: In N + A Ni metal layer is deposited on the surface of the silicon carbide epitaxial layer;

[0028] B3: depositing a first Ti metal layer on the surface of the Ni metal layer;

[0029] B4: Remove the Ni metal layer and the first Ti metal layer outside the ohmic contact area.

[0030] In steps B2 and B3, the Ni metal layer and the first Ti metal layer can be deposited by evaporation, sputtering, electroplating and other processes, preferably by magnetron sputtering; in step B4, the Ni metal layer and the first Ti metal layer outside the ohmic contact area can be removed by wet etching, dry etching, stripping and other processes, preferably by stripping.

[0031] Further, step C includes: annealing in a N2 environment at 1000-1100°C for 1-2 minutes.

[0032] Further, step D comprises:

[0033] D1: Spin-coat photoresist on the surface of the first Ti metal layer and pattern it to expose the ohmic contact area;

[0034] D2: depositing a TaSi2 metal layer on the surface of the first Ti metal layer;

[0035] D3: depositing a Pt metal layer on the surface of the TaSi2 metal layer;

[0036] D4: depositing a second Ti metal layer on the surface of the Pt metal layer;

[0037] D5: Remove the photoresist, and remove the TaSi2 metal layer, the Pt metal layer and the second Ti metal layer outside the ohmic contact area.

[0038] In steps D2, D3, and D4, the TaSi2 metal layer, the Pt metal layer, and the second Ti metal layer can be deposited by evaporation, sputtering, electroplating, and other processes, preferably by magnetron sputtering. In step D5, the TaSi2 metal layer, the Pt metal layer, and the second Ti metal layer outside the ohmic contact area can be removed by wet etching, dry etching, stripping, and other processes, preferably by stripping.

[0039] Further, step E includes: annealing in a N2 environment at 600-700°C for 20-30 minutes.

[0040] The preparation method of the present invention uses a two-step annealing process, wherein the first step annealing of step C forms a high-quality ohmic contact through rapid thermal annealing, and the second step annealing of step E forms a diffusion barrier layer, thereby improving the stability of the ohmic contact at high temperatures. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 It is a schematic structural diagram of an N-type silicon carbide ohmic contact structure of the present invention;

[0043] Figure 2 Schematic diagram of the structure of the N-type silicon carbide ohmic contact structure of Comparative Example 1;

[0044] Figure 3 Schematic diagram of the structure of the N-type silicon carbide ohmic contact structure of Control Example 2.

[0045] Description of reference numerals:

[0046] 1: N-type silicon carbide substrate; 2: P-type silicon carbide epitaxial layer; 3: N + Type silicon carbide epitaxial layer; 4: Ni metal layer; 5: first Ti metal layer; 6: TaSi2 metal layer; 7: Pt metal layer; 8: second Ti metal layer; 9: Ti metal layer. DETAILED DESCRIPTION

[0047] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0048] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form also includes the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this description, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0049] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] Example 1

[0051] Combination Figure 1 As shown, the N-type silicon carbide ohmic contact structure of this embodiment includes a silicon carbide epitaxial wafer and a Ni metal layer 4, a first Ti metal layer 5, a TaSi2 metal layer 6, a Pt metal layer 7 and a second Ti metal layer 8 sequentially arranged on the surface of the silicon carbide epitaxial wafer; wherein the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate 1 and a P-type silicon carbide epitaxial layer 2 and a N-type silicon carbide epitaxial layer 8 sequentially arranged on the silicon surface of the N-type silicon carbide substrate 1 +The thickness of the P-type silicon carbide epitaxial layer 3 and the P-type silicon carbide epitaxial layer 2 is 5 μm, and the doping concentration is 5×10 15 cm -3 , N + The thickness of the silicon carbide epitaxial layer 3 is 2 μm, and the doping concentration is 1×10 19 cm -3 ; The thickness of the Ni metal layer 4 is 50nm; the thickness of the first Ti metal layer 5 is 50nm; the thickness of the TaSi2 metal layer 6 is 300nm; the thickness of the Pt metal layer 7 is 200nm; the thickness of the second Ti metal layer 8 is 10nm.

[0052] The method for preparing the N-type silicon carbide ohmic contact structure of this embodiment includes the following steps performed in sequence:

[0053] A:N + Silicon carbide epitaxial layer etching:

[0054] A1: Select the silicon carbide epitaxial wafer and perform standard RCA cleaning. The steps are as follows:

[0055] A11: 30wt% H2O2 and 95-98% concentrated sulfuric acid are mixed in a volume ratio of 1:3 to prepare a first mixed solution; the silicon carbide epitaxial wafer is immersed in the first mixed solution for 20 minutes, and then washed with ultrapure water.

[0056] A12: Mix 30wt% H2O2, 28-30wt% NH4OH solution and ultrapure water in a volume ratio of 1:1:5 to prepare a second mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A11 in the second mixed solution at 80°C for 10 minutes, and then clean it with ultrapure water.

[0057] A13: Mix 30wt% H2O2, 37wt% HCl solution and ultrapure water in a volume ratio of 1:1:6 to prepare a third mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A12 in the third mixed solution at 80°C, keep it for 10 minutes, and then clean it with ultrapure water.

[0058] A14: Blow dry the silicon carbide epitaxial wafer cleaned in step A13 with N2.

[0059] A2: Spin-coat photoresist on the surface of the silicon carbide epitaxial wafer cleaned in step A1 and perform patterning.

[0060] A3: Use magnetron sputtering to deposit a 100nm Ni layer on the surface of the silicon carbide epitaxial wafer.

[0061] A4: Use acetone to remove the photoresist and use the lift-off process to pattern the Ni layer as a mask.

[0062] A5: Etch N using inductively coupled plasma (ICP) + Type silicon carbide epitaxial layer 3 is formed to form a 2μm high boss for subsequent testing.

[0063] A6: Remove the Ni mask by wet etching.

[0064] B: Ni metal layer and Ti metal layer deposition:

[0065] B1: In N + The surface of the silicon carbide epitaxial layer 3 is spin-coated with photoresist and patterned to expose the ohmic contact area.

[0066] B2: Using magnetron sputtering, N + A Ni metal layer 4 with a thickness of 50 nm is deposited on the surface of the silicon carbide epitaxial layer 3.

[0067] B3: Using magnetron sputtering, a Ti metal layer with a thickness of 50 nm is deposited on the surface of the Ni metal layer 4 as the first Ti metal layer 5 .

[0068] B4: Use acetone to remove the photoresist, and use a lift-off process to remove the Ni metal layer 4 and the first Ti metal layer 5 outside the ohmic contact area.

[0069] C: Rapid thermal annealing to form ohmic contact:

[0070] Specifically, annealing was performed in a N2 environment at 1000°C for 2 minutes.

[0071] D: Deposition of TaSi2 metal layer, Pt metal layer and Ti metal layer:

[0072] D1: Spin-coat photoresist on the surface of the first Ti metal layer 5 and pattern it to expose the ohmic contact area.

[0073] D2: Using magnetron sputtering, a TaSi2 metal layer 6 with a thickness of 300 nm is deposited on the surface of the first Ti metal layer 5 .

[0074] D3: Using magnetron sputtering, a Pt metal layer 7 with a thickness of 200 nm is deposited on the surface of the TaSi2 metal layer 6.

[0075] D4: Using magnetron sputtering, a Ti metal layer with a thickness of 10 nm is deposited on the surface of the Pt metal layer 7 as the second Ti metal layer 8 .

[0076] D5: Remove the photoresist, and remove the TaSi2 metal layer 6, the Pt metal layer 7 and the second Ti metal layer 8 outside the ohmic contact area.

[0077] E: Annealing to form a diffusion barrier layer:

[0078] Specifically, annealing was performed in a N2 environment at 600°C for 30 minutes.

[0079] The N-type silicon carbide ohmic contact structure of the present embodiment is SiC / Ni / Ti / TaSi2 / Pt / Ti, wherein Ni can form an ohmic contact with SiC with low contact resistance, and the precipitated C element can react with Ti to make the ohmic contact surface smooth, enhance adhesion to the upper metal layer, and improve the quality of the ohmic contact; TaSi2 reacts with Pt to form silicide, which serves as a diffusion barrier layer to prevent mutual diffusion and oxidation of metal layers; Ti located on the surface can form a dense oxide film in a high-temperature air environment to protect the ohmic contact from being destroyed by oxidation; in addition, the preparation method of the present embodiment uses a two-step annealing process, in which the first step is to form a high-quality ohmic contact through rapid thermal annealing, and the second step is to form a diffusion barrier layer through annealing, thereby improving the stability of the ohmic contact at high temperatures.

[0080] Example 2

[0081] Combination Figure 1 As shown, the N-type silicon carbide ohmic contact structure of this embodiment includes a silicon carbide epitaxial wafer and a Ni metal layer 4, a first Ti metal layer 5, a TaSi2 metal layer 6, a Pt metal layer 7 and a second Ti metal layer 8 sequentially arranged on the surface of the silicon carbide epitaxial wafer; wherein the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate 1 and a P-type silicon carbide epitaxial layer 2 and a N-type silicon carbide epitaxial layer 8 sequentially arranged on the silicon surface of the N-type silicon carbide substrate 1 + The thickness of the P-type silicon carbide epitaxial layer 3 and the P-type silicon carbide epitaxial layer 2 is 5 μm, and the doping concentration is 5×10 15 cm -3 , N + The thickness of the silicon carbide epitaxial layer 3 is 2 μm, and the doping concentration is 1×10 19 cm -3 ; The thickness of the Ni metal layer 4 is 80nm; the thickness of the first Ti metal layer 5 is 80nm; the thickness of the TaSi2 metal layer 6 is 350nm; the thickness of the Pt metal layer 7 is 250nm; the thickness of the second Ti metal layer 8 is 15nm.

[0082] The method for preparing the N-type silicon carbide ohmic contact structure of this embodiment includes the following steps performed in sequence:

[0083] A:N + Silicon carbide epitaxial layer etching:

[0084] A1: Select the silicon carbide epitaxial wafer and perform standard RCA cleaning. The steps are as follows:

[0085] A11: 30wt% H2O2 and 95-98% concentrated sulfuric acid are mixed in a volume ratio of 1:3 to prepare a first mixed solution; the silicon carbide epitaxial wafer is immersed in the first mixed solution for 20 minutes, and then washed with ultrapure water.

[0086] A12: Mix 30wt% H2O2, 28-30wt% NH4OH solution and ultrapure water in a volume ratio of 1:1:5 to prepare a second mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A11 in the second mixed solution at 80°C for 10 minutes, and then clean it with ultrapure water.

[0087] A13: Mix 30wt% H2O2, 37wt% HCl solution and ultrapure water in a volume ratio of 1:1:6 to prepare a third mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A12 in the third mixed solution at 80°C, keep it for 10 minutes, and then clean it with ultrapure water.

[0088] A14: Blow dry the silicon carbide epitaxial wafer cleaned in step A13 with N2.

[0089] A2: Spin-coat photoresist on the surface of the silicon carbide epitaxial wafer cleaned in step A1 and perform patterning.

[0090] A3: Use magnetron sputtering to deposit a 100nm Ni layer on the surface of the silicon carbide epitaxial wafer.

[0091] A4: Use acetone to remove the photoresist and use the lift-off process to pattern the Ni layer as a mask.

[0092] A5: Etch N using inductively coupled plasma (ICP) + Type silicon carbide epitaxial layer 3 is formed to form a 2μm high boss for subsequent testing.

[0093] A6: Remove the Ni mask by wet etching.

[0094] B: Ni metal layer and Ti metal layer deposition:

[0095] B1: In N + The surface of the silicon carbide epitaxial layer 3 is spin-coated with photoresist and patterned to expose the ohmic contact area.

[0096] B2: Using magnetron sputtering, N + A Ni metal layer 4 with a thickness of 80 nm is deposited on the surface of the silicon carbide epitaxial layer 3.

[0097] B3: Using magnetron sputtering, a Ti metal layer with a thickness of 80 nm is deposited on the surface of the Ni metal layer 4 as the first Ti metal layer 5 .

[0098] B4: Use acetone to remove the photoresist, and use a lift-off process to remove the Ni metal layer 4 and the first Ti metal layer 5 outside the ohmic contact area.

[0099] C: Rapid thermal annealing to form ohmic contact:

[0100] Specifically, annealing is performed in a N2 environment at 1050°C for 90 seconds.

[0101] D: Deposition of TaSi2 metal layer, Pt metal layer and Ti metal layer:

[0102] D1: Spin-coat photoresist on the surface of the first Ti metal layer 5 and pattern it to expose the ohmic contact area.

[0103] D2: Using magnetron sputtering, a TaSi2 metal layer 6 with a thickness of 350 nm is deposited on the surface of the first Ti metal layer 5 .

[0104] D3: Using magnetron sputtering, a Pt metal layer 7 with a thickness of 250 nm is deposited on the surface of the TaSi2 metal layer 6.

[0105] D4: Using magnetron sputtering, a Ti metal layer with a thickness of 15 nm is deposited on the surface of the Pt metal layer 7 as the second Ti metal layer 8 .

[0106] D5: Remove the photoresist, and remove the TaSi2 metal layer 6, the Pt metal layer 7 and the second Ti metal layer 8 outside the ohmic contact area.

[0107] E: Annealing to form a diffusion barrier layer:

[0108] Specifically, annealing was performed in a N2 environment at 600°C for 30 minutes.

[0109] Example 3

[0110] Combination Figure 1 As shown, the N-type silicon carbide ohmic contact structure of this embodiment includes a silicon carbide epitaxial wafer and a Ni metal layer 4, a first Ti metal layer 5, a TaSi2 metal layer 6, a Pt metal layer 7 and a second Ti metal layer 8 sequentially arranged on the surface of the silicon carbide epitaxial wafer; wherein the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate 1 and a P-type silicon carbide epitaxial layer 2 and a N-type silicon carbide epitaxial layer 8 sequentially arranged on the silicon surface of the N-type silicon carbide substrate 1 + The thickness of the P-type silicon carbide epitaxial layer 3 and the P-type silicon carbide epitaxial layer 2 is 5 μm, and the doping concentration is 5×10 15 cm -3 , N + The thickness of the silicon carbide epitaxial layer 3 is 2 μm, and the doping concentration is 1×10 19 cm -3; The thickness of the Ni metal layer 4 is 100nm; the thickness of the first Ti metal layer 5 is 100nm; the thickness of the TaSi2 metal layer 6 is 400nm; the thickness of the Pt metal layer 7 is 300nm; the thickness of the second Ti metal layer 8 is 20nm.

[0111] The method for preparing the N-type silicon carbide ohmic contact structure of this embodiment includes the following steps performed in sequence:

[0112] A:N + Silicon carbide epitaxial layer etching:

[0113] A1: Select the silicon carbide epitaxial wafer and perform standard RCA cleaning. The steps are as follows:

[0114] A11: 30wt% H2O2 and 95-98% concentrated sulfuric acid are mixed in a volume ratio of 1:3 to prepare a first mixed solution; the silicon carbide epitaxial wafer is immersed in the first mixed solution for 20 minutes, and then washed with ultrapure water.

[0115] A12: Mix 30wt% H2O2, 28-30wt% NH4OH solution and ultrapure water in a volume ratio of 1:1:5 to prepare a second mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A11 in the second mixed solution at 80°C for 10 minutes, and then clean it with ultrapure water.

[0116] A13: Mix 30wt% H2O2, 37wt% HCl solution and ultrapure water in a volume ratio of 1:1:6 to prepare a third mixed solution; immerse the silicon carbide epitaxial wafer cleaned in step A12 in the third mixed solution at 80°C, keep it for 10 minutes, and then clean it with ultrapure water.

[0117] A14: Blow dry the silicon carbide epitaxial wafer cleaned in step A13 with N2.

[0118] A2: Spin-coat photoresist on the surface of the silicon carbide epitaxial wafer cleaned in step A1 and perform patterning.

[0119] A3: Use magnetron sputtering to deposit a 100nm Ni layer on the surface of the silicon carbide epitaxial wafer.

[0120] A4: Use acetone to remove the photoresist and use the lift-off process to pattern the Ni layer as a mask.

[0121] A5: Etch N using inductively coupled plasma (ICP) + Type silicon carbide epitaxial layer 3 is formed to form a 2μm high boss for subsequent testing.

[0122] A6: Remove the Ni mask by wet etching.

[0123] B: Ni metal layer and Ti metal layer deposition:

[0124] B1: In N + The surface of the silicon carbide epitaxial layer 3 is spin-coated with photoresist and patterned to expose the ohmic contact area.

[0125] B2: Using magnetron sputtering, N + A Ni metal layer 4 with a thickness of 100 nm is deposited on the surface of the silicon carbide epitaxial layer 3.

[0126] B3: Using magnetron sputtering, a Ti metal layer with a thickness of 100 nm is deposited on the surface of the Ni metal layer 4 as the first Ti metal layer 5 .

[0127] B4: Use acetone to remove the photoresist, and use a lift-off process to remove the Ni metal layer 4 and the first Ti metal layer 5 outside the ohmic contact area.

[0128] C: Rapid thermal annealing to form ohmic contact:

[0129] Specifically, annealing was performed in a N2 environment at 1100°C for 1 min.

[0130] D: TaSi2 metal layer, Pt metal layer 7 and Ti metal layer deposition:

[0131] D1: Spin-coat photoresist on the surface of the first Ti metal layer 5 and pattern it to expose the ohmic contact area.

[0132] D2: Using magnetron sputtering, a TaSi2 metal layer 6 with a thickness of 400 nm is deposited on the surface of the first Ti metal layer 5 .

[0133] D3: Using magnetron sputtering, a Pt metal layer 7 with a thickness of 300 nm is deposited on the surface of the TaSi2 metal layer 6.

[0134] D4: Using magnetron sputtering, a Ti metal layer with a thickness of 20 nm is deposited on the surface of the Pt metal layer 7 as the second Ti metal layer 8 .

[0135] D5: Remove the photoresist, and remove the TaSi2 metal layer 6, the Pt metal layer 7 and the second Ti metal layer 8 outside the ohmic contact area.

[0136] E: Annealing to form a diffusion barrier layer:

[0137] Specifically, annealing was performed in a N2 environment at 600°C for 30 minutes.

[0138] Comparative Example 1

[0139] Combination Figure 2As shown, the N-type silicon carbide ohmic contact structure of the comparative example includes a silicon carbide epitaxial wafer and a Ni metal layer 4, a Ti metal layer 9 and a Pt metal layer 7 sequentially arranged on the surface of the silicon carbide epitaxial wafer; wherein the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate 1 and a P-type silicon carbide epitaxial layer 2 and a N-type silicon carbide epitaxial layer 7 sequentially arranged on the silicon surface of the N-type silicon carbide substrate 1 + The thickness of the P-type silicon carbide epitaxial layer 3 and the P-type silicon carbide epitaxial layer 2 is 5 μm, and the doping concentration is 5×10 15 cm -3 , N + The thickness of the silicon carbide epitaxial layer 3 is 2 μm, and the doping concentration is 1×10 19 cm -3 ; The thickness of the Ni metal layer 4 is 100nm; the thickness of the Ti metal layer 9 is 10nm; the thickness of the Pt metal layer 7 is 300nm.

[0140] The N-type silicon carbide ohmic contact structure of this comparative example is SiC / Ni / Ti / Pt, which is an ohmic contact structure widely used in silicon carbide. The Ni metal layer 4 forms an ohmic contact with SiC, and the Ni / SiC ohmic contact system has a low specific contact resistivity. The product after annealing is single, and there will be no conversion between products during high-temperature aging. However, Ni and SiC will react to form silicide during the annealing process, and the precipitated C single substance will increase the roughness of the ohmic contact surface, reduce the adhesion with the upper metal, and increase the specific contact resistivity; the Ti metal layer 9 is relatively thin, and only plays a role in improving the adhesion of the interlayer metal, and cannot prevent the mutual diffusion of the metal layer at high temperature; the Pt metal layer 7, as a wiring layer, will diffuse into the ohmic contact area to form platinum silicide under high temperature environment, resulting in an increase in specific contact resistivity and a decrease in mechanical properties.

[0141] Comparative Example 2

[0142] Combination Figure 3 As shown, the N-type silicon carbide ohmic contact structure of the comparative example includes a silicon carbide epitaxial wafer and a Ti metal layer (i.e., a first Ti metal layer 5), a TaSi2 metal layer 6, and a Pt metal layer 7 sequentially arranged on the surface of the silicon carbide epitaxial wafer; wherein the silicon carbide epitaxial wafer includes an N-type silicon carbide substrate 1 and a P-type silicon carbide epitaxial layer 2 and a N-type silicon carbide epitaxial layer 7 sequentially arranged on the silicon surface of the N-type silicon carbide substrate 1. + The thickness of the P-type silicon carbide epitaxial layer 3 and the P-type silicon carbide epitaxial layer 2 is 5 μm, and the doping concentration is 5×10 15 cm -3 , N + The thickness of the silicon carbide epitaxial layer 3 is 2 μm, and the doping concentration is 1×10 19 cm -3 ; The thickness of the first Ti metal layer 5 is 100nm; the thickness of the TaSi2 metal layer 6 is 400nm; the thickness of the Pt metal layer 7 is 300nm.

[0143] The N-type silicon carbide ohmic contact structure of this comparative example is SiC / Ti / TaSi2 / Pt, where Ti forms an ohmic contact with SiC. The annealing temperature required for the Ti / SiC ohmic contact system is relatively low, and the reaction generates titanium silicide and titanium carbide. The ohmic contact interface is smoother and more firmly bonded to the upper metal layer. However, the specific contact resistivity of the Ti / SiC ohmic contact system is larger than that of the Ni / SiC ohmic contact system; in a high temperature environment, Pt will diffuse to the ohmic contact surface to replace titanium silicide to form platinum silicide, resulting in an increase in the specific contact resistivity and a decrease in mechanical properties; the replaced Ti diffuses outward and locally gathers in the metal layer to produce cracks, causing O2 to diffuse to the SiC surface through the cracks, resulting in uneven oxidation and delamination of the metal layer.

[0144] Comparative Example 3

[0145] Except that the second annealing in step E is not performed, the rest is the same as that in Example 1.

[0146] The N-type silicon carbide ohmic contact structure of this control example only performs the first step annealing of step C to form an ohmic contact, and then deposits the TaSi2 metal layer, the Pt metal layer and the Ti metal layer. The second step annealing of step E is not performed. The TaSi2 / Pt / Ti metal layer is in an unstable state. When working in a high-temperature environment thereafter, the TaSi2 / Pt / Ti metal layers will diffuse with each other, causing changes in performance and affecting the accuracy of the measurement.

[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An N-type silicon carbide ohmic contact structure, characterized in that: The invention comprises a silicon carbide epitaxial wafer and a Ni metal layer, a first Ti metal layer, a TaSi2 metal layer, a Pt metal layer and a second Ti metal layer which are sequentially arranged on the surface of the silicon carbide epitaxial wafer.

2. The N-type silicon carbide ohmic contact structure according to claim 1, characterized in that: The silicon carbide epitaxial wafer comprises an N-type silicon carbide substrate and a P-type silicon carbide epitaxial layer and an N-type silicon carbide epitaxial layer which are sequentially arranged on the silicon surface of the N-type silicon carbide substrate. + Type silicon carbide epitaxial layer.

3. The N-type silicon carbide ohmic contact structure according to claim 2, characterized in that: The thickness of the P-type silicon carbide epitaxial layer is 5-8 μm, and the doping concentration is 5×10 15 cm -3 Up to 1×10 16 cm -3 ; N + The thickness of the silicon carbide epitaxial layer is 2-3 μm and the doping concentration is 5×10 18 cm -3 Up to 1×10 19 cm -3 .

4. The N-type silicon carbide ohmic contact structure according to claim 1, characterized in that: The thickness of the Ni metal layer is 50-100 nm; the thickness of the first Ti metal layer is 50-100 nm; the thickness of the TaSi2 metal layer is 300-400 nm; the thickness of the Pt metal layer is 200-300 nm; and the thickness of the second Ti metal layer is 10-20 nm.

5. The method for preparing an N-type silicon carbide ohmic contact structure according to any one of claims 1 to 4, characterized in that: The steps include the following steps in order: A: N for SiC epitaxial wafers + Type silicon carbide epitaxial layer is etched; B: In N + A Ni metal layer and a first Ti metal layer are sequentially deposited on the surface of the silicon carbide epitaxial layer; C: Rapid thermal annealing of the structure in step B to form an ohmic contact; D: depositing a TaSi2 metal layer, a Pt metal layer and a second Ti metal layer on the surface of the Ti metal layer in sequence; E: Anneal the structure of step D to form a diffusion barrier layer.

6. The preparation method according to claim 5, characterized in that: Step A includes: A1: Perform standard RCA cleaning on silicon carbide epitaxial wafers; A2: Spin-coat photoresist on the surface of silicon carbide epitaxial wafer and pattern it; A3: Depositing a Ni layer on the surface of the silicon carbide epitaxial wafer; A4: Remove the photoresist and pattern the Ni layer to form a Ni mask; A5: N for SiC epitaxial wafers + The silicon carbide epitaxial layer is etched to form a boss; A6: Remove the Ni mask.

7. The preparation method according to claim 5, characterized in that: Step B includes: B1: In N + Spin-coat photoresist on the surface of the silicon carbide epitaxial layer and pattern it to expose the ohmic contact area; B2: In N + A Ni metal layer is deposited on the surface of the silicon carbide epitaxial layer; B3: depositing a first Ti metal layer on the surface of the Ni metal layer; B4: Remove the Ni metal layer and the first Ti metal layer outside the ohmic contact area.

8. The preparation method according to claim 5, characterized in that: Step C includes: annealing in a N2 environment at 1000-1100°C for 1-2 minutes.

9. The preparation method according to claim 5, characterized in that: Step D includes: D1: Spin-coat photoresist on the surface of the first Ti metal layer and pattern it to expose the ohmic contact area; D2: depositing a TaSi2 metal layer on the surface of the first Ti metal layer; D3: depositing a Pt metal layer on the surface of the TaSi2 metal layer; D4: depositing a second Ti metal layer on the surface of the Pt metal layer; D5: Remove the photoresist, and remove the TaSi2 metal layer, the Pt metal layer and the second Ti metal layer outside the ohmic contact area.

10. The preparation method according to claim 5, characterized in that: Step E includes: annealing in a N2 environment at 600-700°C for 20-30 minutes.

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