DSP (Digital Signal Processor) chip test method for booting startup configuration by utilizing host interface based on ATE (Automatic Train Equipment)

Abstract

The invention discloses a DSP (Digital Signal Processor) chip testing method by utilizing a host interface to guide startup configuration based on ATE (Automatic Train Equipment), which comprises the following steps of: firstly, acquiring Stil files of different DSP chip test items and storing the Stil files in the ATE, then repeatedly guiding startup configuration by the ATE through the host interface, importing the Stil files into a test program in a configuration vector format, and configuring and testing the Stil files, so as to obtain a test result. The problem of off-line repetitive function configuration in a DSP test technology based on ATE is solved. The method has the advantages that off-line repeated function configuration testing can be carried out on the DSP chip to be tested on the basis of the ATE, a PC does not need to be connected online to download a program in the testing process, and the program does not need to be burnt in a plug-in FLASH in advance. Compared with a traditional plug-in FLASH configuration method, the plug-in FLASH configuration method is more flexible, the test configuration code stream can be changed at any time according to the test requirement, the FLASH device read-write service life problem in the plug-in FLASH configuration mode test does not exist, and compared with plug-in FLASH starting configuration, the to-be-tested DSP chip is higher in starting configuration speed through the host interface, and the test efficiency is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of DSP chip testing, and more specifically, relates to a DSP chip testing method based on ATE (Automatic Test Equipment) using a host interface to boot and start configuration. Background Art

[0002] At present, DSP chip testing generally uses external FLASH to load and store test executable files, that is, test programs. During the test process, the test program is often only loaded once, so the test coverage of the internal resources of the DSP chip is low. For those who require higher test coverage, the emulator is connected through JTAG and the DSP chip is configured via the PC host. Although this meets the test coverage requirements of the DSP chip, the test process is cumbersome and requires manual intervention, which is not conducive to automated testing.

[0003] In the Chinese invention patent application published on April 7, 2023, with publication number CN115933579A and titled “A DSP chip test system based on ATE”, Figure 1 As shown, the test system includes: a configuration program writing module, which is used to write a DSP configuration program adapted to the test items of the DSP chip to be tested; the DSP configuration program includes a test configuration subroutine corresponding to each test item; the DSP configuration program is used to perform power-on configuration on the DSP chip to be tested; the ATE test equipment includes: an instruction storage module, which is used to store the GPIO test interaction instructions corresponding to each test item; a test control module, which is used to send the GPIO test interaction instructions corresponding to the test item to the DSP chip to be tested, so that the DSP chip to be tested runs the test configuration subroutine corresponding to the test item based on the received GPIO test interaction instructions, and outputs a test observation signal; a test analysis module, which is used to determine whether the test item has passed the test based on the test observation signal. Compared with the prior art, the test items can be arbitrarily tailored, and the full coverage test of DSP resources can be realized; the test is carried out by using an external chip, which greatly reduces the dependence of the test process on the ATE test equipment; and the switching of the DSP chip pins between ATE and peripherals is realized by the relay module, without manual switching, which can realize the intelligent test of the test system and effectively improve the test efficiency.

[0004] Although the invention improves the internal resource test coverage, it still requires external FLASH, and when the next test item is performed, ATE needs to send the next GPIO test instruction. It is impossible to perform offline repeated functional configuration on the DSP chip to be tested, and the test efficiency needs to be improved. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a DSP chip testing method based on ATE using a host interface to boot and configure, so as to achieve offline repeated function configuration and improve test efficiency.

[0006] To achieve the above-mentioned purpose, the present invention is based on the ATE to boot and start the configuration of the DSP chip test method using the host interface, characterized in that it includes the following steps:

[0007] (1) Obtain the Stil files of different DSP chip test items and store them in ATE

[0008] 1.1) For the DSP chip test items to be tested, write an application for DSP chip testing: C user code, i.e. C source file, and then compile it with a C language compiler to obtain a target file;

[0009] 1.2) Link the compiled library through the linker and compile the target file into an executable target file;

[0010] 1.3) Use the conversion tool to convert the executable target file into a binary file;

[0011] 1.4) Use transcoding software to convert the converted binary file into a Stil (Standard Test Interface Language) file;

[0012] Before the test begins, program different DSP chip test items, generate executable files, convert them into binary files and transcode them into Stil files according to steps 1.1) to 1.4), and then store the Stil files of different DSP chip test items in ATE;

[0013] (2) Test the DSP chip

[0014] 2.1) ATE controls the DSP chip to reset and enter the host interface boot mode;

[0015] 2.2) ATE imports the Stil file into the test program in the format of a configuration vector: ATE acts as a host and sends the configuration vector to the DSP chip through the host interface to configure it;

[0016] 2.3.) After the configuration vector is sent, ATE interrupts the DSP chip through the host interface, causing the DSP to start executing the test program from address 0;

[0017] 2.4.) ATE controls the state of the DSP chip according to the interactive instructions agreed upon when writing the program, and performs DC and AC parameter tests and outputs internal resource test results. ATE determines whether it passes by capturing the internal resource test results output by the DSP chip and the output status of the pins. If it fails the test, the test is terminated. If it passes the test, it returns to step 2.1), and ATE controls the DSP reset again, loads the next configuration vector, and tests different resources inside the DSP chip until all configuration vectors are loaded.

[0018] The object of the present invention is achieved in this way.

[0019] The present invention is based on the DSP chip testing method of ATE using the host interface to boot the configuration. First, the Stil files of different DSP chip test items are obtained and stored in ATE. Then, ATE repeats the boot configuration through the host interface, imports the Stil file into the test program in the format of the configuration vector, and configures and tests it, thereby solving the problem of offline repeated function configuration in the DSP testing technology based on ATE. The advantages of the present invention are: based on ATE, the DSP chip to be tested can be tested for offline repeated function configuration, and the test process does not need to be connected to a PC online to download the program, nor does it need to burn the program into an external FLASH in advance. Compared with the configuration method of the traditional external FLASH, it is more flexible, the test configuration code stream can be changed at any time according to the test requirements, and there is no problem of the read-write life of the FLASH device in the external FLASH configuration mode test, and compared with the startup configuration of the external FLASH, the startup configuration speed of the DSP chip to be tested through the host interface is faster, thereby improving the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic diagram of the connection structure between ATE as a host and the host port interface (HPI for short);

[0021] Figure 2 It is a flowchart of the host reading and writing DSP chip through HPI interface;

[0022] Figure 3 It is a flowchart of a specific implementation method of the DSP chip testing method based on ATE using the host interface to boot and start the configuration;

[0023] Figure 4 It is a hardware architecture diagram of a specific implementation method of the DSP chip testing method based on ATE using the host interface to boot and start the configuration;

[0024] Figure 5 yes Figure 1The figure shows a schematic diagram of the process of obtaining Stil files of different DSP chip test items and storing them in ATE. DETAILED DESCRIPTION

[0025] The specific implementation of the present invention is described below in conjunction with the accompanying drawings so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0026] The present invention realizes the boot configuration of the DSP chip and performs the internal resource test of the DSP chip by communicating with the host interface through the ATE. The offline repeated function configuration method reduces the demand of the DSP chip for peripheral circuits, reduces the hardware design cost, and improves the efficiency of the DSP internal resource test.

[0027] In the system design of DSP application, boot program startup is one of the difficulties. TMS320C6x and TMS320C5x series DSP chips do not have internal FLASH storage, and need to load programs from external devices. During the power-on or reset startup process, the DSP chip will first read the high and low level information of the BOOT pin to determine how to boot. The startup methods of TMS320C6x and TMS320C5x series DSP chips can be divided into three types: No boot, external FLASH startup, and host interface boot startup.

[0028] like Figure 1 As shown. The host port interface (HPI) is the interface between the host and the DSP chip. The host can access the internal resources of the DSP chip through the 8-bit, 16-bit or 32-bit parallel interface of the HPI, including the internal RAM and the external memory through the memory interface, which can realize high-speed and parallel data transmission. HPI has 3 registers, namely the control register (HPIC), the address register (HPIA) and the data register (HPID).

[0029] The external host reads and writes related registers through the HPI interface, and uses DMA to write or read the data or address to be read or written through the exchange control logic. Figure 2 As shown, if the external host needs to read and write DSP internal resources through HPI, it needs to initialize the HPIC register to control whether the data is written first, the first half word or the second half word, and then initialize the HPIA register to write the address to be operated, and finally write the data to be read and written into the HPID register.

[0030] The process of host interface booting is: the external host inputs the program code into the DSP through the host interface (including initialization registers, initialization EMIF and other peripherals). Once the host has completed all necessary initializations, the host can set the DSPINT position in the HPIC register to 1, thereby completing the entire boot process. After that, the DSP core starts to execute the program from address 0x0 and enters the normal operating state. During this entire host boot process, the DSP core is suspended and other peripherals are still enabled. The host can read or write all mounted memories on the DSP, and can also access the internal peripheral configuration registers. Therefore, the host can not only write data to the available address range inside the DSP at will, but also verify the data.

[0031] Figure 3 It is a flowchart of a specific implementation of the DSP chip testing method based on ATE using the host interface to boot and start the configuration.

[0032] like Figure 3 As shown, the present invention is divided into two parts, namely, the preliminary preparations that ATE needs to make through the host interface, writing an application program adapted to the test items of the DSP chip to be tested, and obtaining the Stil file and storing it in ATE, and then ATE repeatedly configures the DSP chip to be tested based on the host interface and in combination with the converted binary file and tests the internal resources of the DSP.

[0033] Specifically, in this embodiment, if Figure 3 , 4 As shown, the present invention is based on the DSP chip testing method of ATE using the host interface to boot and start the configuration, which is characterized by comprising the following steps:

[0034] Step S1: Get the Stil files of different DSP chip test items and store them in ATE

[0035] In this embodiment, if Figure 3 As shown, the following steps are included:

[0036] Step S1.1: Write an application for DSP chip testing and compile it to obtain the target file

[0037] For the test items of the DSP chip to be tested, write an application for DSP chip testing: C user code, that is, C source file, and then compile it with a C language compiler to obtain a target file.

[0038] In this embodiment, if Figure 5As shown, before the test starts, the C user code for the test, namely the C source file, is written using TI (Texas Instruments) official EDA software Code Composer Studio 3.3. Then it is compiled using the C compiler to obtain the object file.

[0039] Step S1.2: Link the compiled library through the linker to compile the target file into an executable target file.

[0040] In this embodiment, if Figure 5 As shown, the linker Linker of Code Composer Studio 3.3 software generates an executable file Executable object file by linking the official compilation library Support Library and the target file Object file.

[0041] Step S1.3: Use a conversion tool to convert the executable object file into a binary file.

[0042] In this embodiment, if Figure 5 As shown, use the HEX6x.exe conversion tool to convert the executable object file into a binary file.

[0043] Step S1.4: Use transcoding software to convert the converted binary file into a Stil (Standard Test Interface Language) file.

[0044] In this embodiment, if Figure 5 As shown, the binary file obtained by transcoding is converted into a Stil file using dat2stil.exe transcoding software. In this way, the ATE test program can import the Stil file and load it as a test vector file.

[0045] Before the test starts, according to steps S1.1 to S1.4, different DSP chip test items are programmed, executable files are generated, converted into binary files and transcoded into Stil files, and then the Stil files of different DSP chip test items are stored in ATE.

[0046] Step S2: Test the DSP chip

[0047] In this embodiment, if Figure 3 As shown, the following steps are included:

[0048] Step S2.1: ATE controls the DSP chip to reset and enter the host interface boot mode.

[0049] Step S2.2: ATE imports the Stil file into the test program in the format of a configuration vector Config vector: ATE, as a host, sends the configuration vector Config vector to the DSP chip, namely DUT (Device Under Test), through the host interface to configure it.

[0050] Step S2.3: After the configuration vector is sent, ATE interrupts the DSP chip through the host interface, so that the DSP starts to execute the test program from address 0;

[0051] Step S2.4: ATE controls the state of the DSP chip according to the interactive instructions agreed upon when the program was written, and performs DC and AC parameter tests and outputs internal resource test results. ATE determines whether the test is passed by capturing the internal resource test results output by the DSP chip and the output status of the pins. If the test fails, the test is terminated. If the test passes, it returns to step S2.1, and ATE controls the DSP to reset again, loads the next configuration vector, and tests different resources inside the DSP chip until all configuration vectors are loaded.

[0052] In this way, different configuration vectors can be repeatedly loaded offline to test different resources inside the DSP, thereby improving the test coverage of the internal resources of the DSP.

[0053] Although the above describes the illustrative specific embodiments of the present invention to facilitate those skilled in the art to understand the present invention, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations using the concept of the present invention are protected.

Claims

1. A DSP chip testing method based on ATE using a host interface boot configuration, characterized in that it includes the following steps: (1) Obtain the Stil files of different DSP chip test items and store them in ATE 1.1) For the DSP chip test items to be tested, write an application for DSP chip testing: C user code, i.e. C source file, and then compile it with a C language compiler to obtain a target file; 1.2) Link the compiled library through the linker and compile the target file into an executable target file; 1.3) Use the conversion tool to convert the executable target file into a binary file; 1.4) Use transcoding software to convert the converted binary file into a Stil (Standard Test Interface Language) file; Before the test begins, program different DSP chip test items, generate executable files, convert them into binary files and transcode them into Stil files according to steps 1.1) to 1.4), and then store the Stil files of different DSP chip test items in ATE; (2) Test the DSP chip 2.1) ATE controls the DSP chip to reset and enter the host interface boot mode; 2.2) ATE imports the Stil file into the test program in the format of a configuration vector: ATE acts as a host and sends the configuration vector to the DSP chip through the host interface to configure it; 2.3.) After the configuration vector is sent, ATE interrupts the DSP chip through the host interface, causing the DSP to start executing the test program from address 0; 2.4.) ATE controls the state of the DSP chip according to the interactive instructions agreed upon when writing the program, and performs DC and AC parameter tests and outputs internal resource test results. ATE determines whether it passes by capturing the internal resource test results output by the DSP chip and the output status of the pins. If it fails the test, the test is terminated. If it passes the test, it returns to step 2.1), and ATE controls the DSP reset again, loads the next configuration vector, and tests different resources inside the DSP chip until all configuration vectors are loaded.

2. The DSP chip testing method configured by booting and starting up in ATE using a host interface according to claim 1 is characterized in that the C user code for testing, i.e., the C source file C source file, is written using TI's official EDA software Code Composer Studio 3.3, and then compiled using a C language compiler Ccompiler to obtain an object file Objectfile.

3. The DSP chip testing method of claim 1 wherein the ATE uses a host interface to boot and configure the DSP chip. The linker Linker of de Composer Studio 3.3 software is used to link the official compilation library SupportLibrary with the target file Object file to compile and generate the executable file Executable object file.

4. The DSP chip testing method of claim 1 wherein the ATE uses a host interface to boot and configure the DSP chip. Use the HEX6x.exe conversion tool to convert the executable object file into a binary file.

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