Alarm method of register chip, storage medium and electronic device

Abstract

The invention provides an alarm method of a register chip, a storage medium and an electronic device. According to the alarm method of the register chip, each bit of the register chip corresponds to one kind of alarm information, a to-be-detected target bit can be determined according to to-be-detected information corresponding to the current register chip; therefore, the alarm operation can be executed according to the alarm information corresponding to the target bit under the condition that the target bit is detected to be abnormal. Therefore, the alarm information of the register chip can be flexibly configured through the target bit, all possible conditions can be covered as much as possible, the problem of flexibly configuring the alarm information of the register chip can be solved, the effect of improving the detection accuracy and flexibility of the register chip is achieved, the chip fault detection rate is increased, and the detection efficiency is improved. And the operation stability and accuracy are ensured.

Description

Technical Field

[0001] The present application relates to the field of chip alarm technology, and in particular to an alarm method, storage medium and electronic device for a register chip. Background Art

[0002] Key chip alarm is a widely used chip status monitoring method. The alarm in the related technology has poor flexibility in configuration. The impact on engineering services may be inconsistent with expectations due to the location of the network element to which the single board belongs, or the alarm behavior does not meet the needs of users. The flexibility is poor when registering chip alarms, affecting the normal use of users. Summary of the invention

[0003] The embodiments of the present application provide an alarm method, storage medium and electronic device for a register chip, so as to at least solve the problem of poor flexibility of the alarm of the register chip in the related art.

[0004] According to an embodiment of the present application, an alarm method for a register chip is provided, wherein each bit of the register chip corresponds to a type of alarm information, and the method includes:

[0005] Get the information to be detected corresponding to the current register chip;

[0006] Determining a target bit to be detected according to the information to be detected;

[0007] When an abnormality is detected in the target bit, an alarm operation is performed according to the alarm information corresponding to the target bit.

[0008] According to another embodiment of the present application, an alarm device for a register chip is provided, wherein each bit of the register chip corresponds to a type of alarm information, and the device comprises:

[0009] An acquisition module is used to obtain the information to be detected corresponding to the current register chip;

[0010] A determination module, used to determine a target bit to be detected according to the information to be detected;

[0011] The execution module is used to perform an alarm operation according to the alarm information corresponding to the target bit when an abnormality is detected in the target bit.

[0012] According to another embodiment of the present application, a storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0013] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0014] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art:

[0015] Through this application, since each bit of the register chip corresponds to a kind of alarm information, the target bit to be detected can be determined according to the information to be detected corresponding to the current register chip, so that the alarm operation can be performed according to the alarm information corresponding to the target bit when an abnormality is detected in the target bit. Therefore, the alarm information of the register chip can be flexibly configured through the target bit to cover all possible situations as much as possible, which can solve the problem of flexibly configuring the alarm information of the register chip, achieve the effect of improving the detection accuracy and flexibility of the register chip, improve the chip fault detection rate, and ensure the stability and accuracy of operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application;

[0018] Figure 2 It is a flowchart of an alarm method for a register chip provided by an embodiment of the present application;

[0019] Figure 3 It is a flowchart of an alarm method for a register chip provided by another embodiment of the present application;

[0020] Figure 4 It is a structural schematic diagram of an alarm device for a register chip provided in one embodiment of the present application. DETAILED DESCRIPTION

[0021] The present application will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict.

[0022] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0023] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device, for example, it can be executed on a register chip. Taking running on a mobile terminal as an example, Figure 1 1 is a hardware structure block diagram of a mobile terminal of an alarm method of a register chip in an embodiment of the present application. Figure 1 As shown, the mobile terminal 10 may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. Optionally, the mobile terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is for illustration only and does not limit the structure of the mobile terminal. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0024] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the alarm method of the register chip in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the mobile terminal 10 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0025] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the mobile terminal 10. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0026] In order to facilitate understanding of the solution of the present application, some problems existing in the related art are first described in detail.

[0027] In the field of packet transmission technology, such as Packet Transport Network (PTN) or Slicing Packet Network (SPN) products, due to the important role of key chips such as SA chips, SF chips, FPGA chips, etc. in the products, the chips need to be tested. When an abnormality is detected in a module in the chip, different treatments are carried out according to the severity of the impact of the abnormality on the business and the severity of the fault level. For example, only logs are recorded, or alarms are reported, or the chip is self-repaired, or the business is switched and the line card is restarted to avoid long-term business impact.

[0028] Generally, the processing steps for chip alarm behavior are as follows:

[0029] Scan the chip's underlying registers regularly;

[0030] If the scan result indicates that the chip is abnormal, choose to only record logs, report alarms, or switch services and restart the line card based on the severity of the impact of the abnormality on the service.

[0031] After receiving the alarm information, the upper-layer platform reports the alarm to the network management station (also referred to as the network management station), switches the service and resets the board according to the demand;

[0032] After receiving the alarm information from the network management, the user can replace the board as needed.

[0033] In the above processing flow, some alarms have poor flexibility during configuration. The impact on engineering services may be inconsistent with expectations due to the location of the network element to which the board belongs, or the alarm behavior may not meet user needs. In the case of register chip alarms, the flexibility is poor, affecting the normal use of users. The default alarm behavior needs to be modified.

[0034] In order to at least partially solve the above problem, an alarm method running on the above mobile terminal or running on the register chip is provided in this embodiment, and each bit of the register chip corresponds to a kind of alarm information. Figure 2 is a flow chart of an alarm method for a register chip according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0035] Step S202, obtaining the information to be detected corresponding to the current register chip.

[0036] The information to be detected may be information used to determine a target bit position for alarm detection of a register chip. The form of the information to be detected is not specifically limited and may include at least the following two types.

[0037] In the first form, the information to be detected can be target identification information, and the target identification information can represent the target bit to be detected for alarm detection. For example, each bit of the register chip corresponds to an identification information one-to-one, and the bit corresponding to the identification information matching the target identification information can be used as the target bit to be detected. For example, the register chip includes 32 bits (bits), and identification information is configured for each bit. For example, the identification information of the 32 bits is identification 1, identification 2, identification 3... identification 32. If the target identification information is identification 1, it means that the first bit is the target bit to be detected. If the target identification information is identification 2 and identification 3, it means that the second bit and the third bit are the target bits. In other words, the target bit can be one of the 32 bits, or multiple bits, without limitation.

[0038] In the second form, the information to be detected can be mask information, and each bit of the mask information corresponds to the bit of the register chip one by one. For example, if the bit of the register chip is 32 bits, the mask information is also a 32-bit mask, and each bit of the 32-bit mask corresponds to the bit of the register chip one by one. The target bit to be detected can be determined according to the different identifiers of each bit of the mask, or the bit corresponding to the mask bit can be determined according to the value of the mask bit to determine whether it participates in the alarm detection. For example, if the mask bit is 1, it means that the bit corresponding to the mask is the target bit to be detected that participates in the alarm detection, and if the mask bit is 0, it means that the bit corresponding to the mask does not participate in the alarm detection.

[0039] It should be noted that the 32-bit bit of the above register chip is only for example and does not represent a limitation on the register chip model. The information to be detected can be target identification information, mask information, or other forms of information without limitation.

[0040] Step S204, determining the target bit to be detected according to the information to be detected.

[0041] In one embodiment, when the information to be detected includes target identification information, each bit of the register chip corresponds one-to-one to an identification information, the information to be detected includes the target identification information, the target identification information represents the identification information of the bit to be detected, and the target bit to be detected is determined according to the information to be detected, including: determining the target bit to be detected according to the target identification information.

[0042] In this embodiment, when the information to be detected includes target identification information, the target bit to be detected can be determined according to the target identification information. Specifically, the bit corresponding to the identification information matching the target identification information can be used as the target bit to be detected. For example, the register chip includes 32 bits (bits), and identification information is configured for each bit. For example, the identification information of the 32 bits is identification 1, identification 2, identification 3... identification 32. If the target identification information is identification 1, it means that the first bit is the target bit to be detected. If the target identification information is identification 2 and identification 3, it means that the second bit and the third bit are the target bits. That is, the target bit matching the target identification information can be one of the 32 bits, or multiple bits, without limitation.

[0043] In one embodiment, when the information to be detected includes mask information, each bit mask of the mask information corresponds one-to-one to a bit of the register chip, and the target bit to be detected is determined according to the information to be detected, including: when the mask is a first identifier, determining the bit at the corresponding position of the mask as the target bit to be detected.

[0044] In this embodiment, when the mask is the first identifier, it indicates that the corresponding target bit does not participate in alarm detection, and when the mask is the second identifier, it indicates that the corresponding target bit participates in alarm detection.

[0045] For example, if the bit of the register chip is 32 bits, the mask information is also a 32-bit mask. Each bit mask in the 32-bit mask corresponds to the bit of the register chip one by one. The target bit to be detected can be determined according to the different identifiers of each bit mask, or the bit corresponding to the mask bit can be determined according to the value of the mask bit to determine whether the bit to be detected is involved in the alarm detection. The first identifier can be 1, and the second identifier can be 0. For example, when the mask of the third mask bit is 1 and the masks of the remaining mask bits are all 0, it means that the third bit is the target bit participating in the alarm detection, and the remaining bits do not participate in the alarm detection. If the mask bits of the first mask bit and the second mask bit are 1, and the masks of the remaining mask bits are all 0, it means that the first bit and the second bit are the target bits participating in the alarm detection, and the remaining bits do not participate in the alarm detection.

[0046] Step S206: When an abnormality is detected in the target bit, an alarm operation is performed according to the alarm information corresponding to the target bit.

[0047] Through the above steps, since each bit of the register chip corresponds to a kind of alarm information, the target bit to be detected can be determined according to the information to be detected corresponding to the current register chip, so that the alarm operation can be performed according to the alarm information corresponding to the target bit when an abnormality is detected in the target bit. Therefore, the alarm information of the register chip can be flexibly configured through the target bit to cover all possible situations as much as possible, which can solve the problem of flexible configuration of the register chip alarm information, achieve the effect of improving the detection accuracy and flexibility of the register chip, improve the chip fault detection rate, and ensure the stability and accuracy of operation.

[0048] Of course, in order to implement the above-mentioned alarm method of performing an alarm operation according to the alarm information corresponding to the target bit, in one embodiment, before obtaining the information to be detected corresponding to the current register chip, it is also necessary to perform an alarm configuration for each bit, including: obtaining the information to be configured for each bit of the register chip, and performing an alarm configuration for each bit according to the information to be configured.

[0049] In one embodiment, the information to be configured includes first parameter information and alarm information. The first parameter information is used to characterize the bit corresponding to the alarm information. The alarm information includes alarm behavior, alarm trigger conditions and the number of times the exception occurs. The alarm is configured for each bit according to the first parameter information, alarm behavior, alarm trigger conditions and the number of times the exception occurs.

[0050] Specifically, the first parameter information may be identification information. Taking the register chip including 32 bits as an example, identification information and alarm information are configured for each bit. For example, the identification information of the 32 bits are identification 1, identification 2, identification 3...identification 32, and the alarm information of the 32 bits are alarm information 1, alarm information 2, alarm information 3...alarm information 32. Alarm configuration is performed for each bit according to the identification information and the alarm information. For example, after the first bit is configured, the identification information is identification 1, and the specific alarm information is alarm information 1. When the information to be detected corresponding to the register chip is identification 1, it is determined that the target bit to be detected is the first bit, and then an alarm operation is performed according to alarm information 1.

[0051] The first parameter information may be mask position information. For example, a register chip includes 32 bits. The alarm information of the 32 bits are respectively alarm information 1, alarm information 2, alarm information 3, ... alarm information 32. Each bit of alarm information corresponds to a mask position information. Alarm configuration is performed on each bit according to the mask position information and the alarm information. It should be understood that, at this time, the information to be detected of the register chip includes mask information. When the mask is the first identifier, the bit at the corresponding position of the mask is determined to be the target bit to be detected, and an alarm operation is performed according to the alarm information corresponding to the target bit.

[0052] The alarm behavior may be preset according to various alarms that may occur in the chip, for example, any of the following may be included:

[0053] Keep a log;

[0054] Report to the police;

[0055] Report alarms and switch services;

[0056] Report an alarm, switch services, and restart the board.

[0057] In this embodiment, each first parameter information may correspond to a target alarm behavior, and each target alarm behavior may also be stored by multiple bits, that is, the same target alarm behavior may be stored by multiple bits. The first parameter information may be identification information, mask position information, or other forms of identification, without limitation.

[0058] In addition, in the processing flow of the existing technology, if some alarms have an impact on the engineering business that is inconsistent with expectations due to the location of the network element to which the single board belongs, or the alarm behavior does not meet the needs of the customer, the default alarm behavior needs to be modified. However, since the alarm behavior is fixed in the version, it can only be solved by changing the version or patching. However, patch releases or version releases need to go through the release process and have a clear time point. Patches cannot be released at any time, which has flexibility issues. The release of patches requires a lot of development and testing manpower, and there is also the risk of introducing faults. Even if the patch is released, the project may not be fully loaded.

[0059] To solve the above problem in the process of modifying the alarm behavior, in one embodiment, after the alarm configuration is performed for each bit according to the first parameter information, the alarm behavior, the alarm triggering condition and the number of abnormality occurrences, the method further includes:

[0060] Responding to the configuration modification information of the bit, wherein the configuration modification information includes the first parameter information corresponding to the bit to be modified and the alarm information to be modified, and the alarm information to be modified includes the alarm behavior to be modified, the alarm triggering condition to be modified, and the number of abnormality occurrences to be modified;

[0061] The bit is reconfigured according to the first parameter information corresponding to the bit to be modified, the alarm behavior to be modified, the alarm triggering condition to be modified, and the number of abnormality occurrences to be modified.

[0062] In this embodiment, there is no need to release patches or versions, but only to obtain the configuration modification information of the bit. By reconfiguring the bit through the configuration modification information, the alarm behavior of the bit can be quickly reconfigured, which reduces the risks that may exist in the process of modifying the alarm behavior. After the bit is modified, the modified content can be directly replaced. After the modified identification information indicates that the target bit participates in alarm detection and meets the modified alarm triggering conditions, the alarm is directly issued according to the modified target alarm behavior, thereby maximizing the stability and accuracy of the project's existing network operation.

[0063] In one embodiment, the method further includes: saving the information to be configured and / or the configuration modification information to a database, so that when the configuration of the bit is lost, the bit is reconfigured according to the information to be configured and / or the configuration modification information in the database.

[0064] In this embodiment, when a network element board is restarted or abnormally powered off, the configuration information in the register chip may be abnormally lost. Saving the information to be configured and the configuration modification information to the database can ensure that when the network element board is restarted, the bits can be reconfigured according to the information to be configured or the configuration modification information in the database during the restart process. For example, when the board is restarted, the information to be configured and the configuration modification information in the database are read, and the latest configuration information of each bit is determined according to the save time or version information of the information to be configured and the configuration modification information. The bits are configured according to the latest configuration information, so that the configuration information of the bits is consistent with that before the restart, thereby ensuring the accuracy of the chip alarm.

[0065] In one embodiment, after the alarm is configured for each bit according to the first parameter information, alarm behavior, alarm trigger condition and number of exceptions, the method also includes: exporting the first parameter information, alarm behavior, alarm trigger condition and number of exceptions for each target bit, generating a configuration template, and the configuration template is used to configure alarms for other register chips of the same model.

[0066] In this embodiment, in order to facilitate the rapid configuration of other alarm detection register chips of the same model, the first parameter information, alarm behavior, alarm trigger condition and number of exceptions generated for each configured target bit can be exported as a configuration template for the register chip of this model, so as to facilitate users to quickly configure the register chip of the same model.

[0067] In one embodiment, an alarm operation is performed according to the alarm information corresponding to the target bit, including: determining the target alarm behavior, target alarm trigger conditions and target abnormality generation times of the target bit according to the alarm information corresponding to the target bit, and when it is determined that the target alarm trigger conditions are met according to the target abnormality generation times, an alarm is issued through the target alarm behavior.

[0068] In this embodiment, when the target abnormality generation frequency satisfies the target alarm triggering condition, an alarm is issued through the target alarm behavior.

[0069] Specifically, the alarm trigger conditions include: triggering an alarm action when an abnormality is detected once, triggering an alarm action when a first target number of abnormalities are detected cumulatively within a first preset time period, or triggering an alarm action when a second target number of abnormalities are detected continuously within a second preset time period.

[0070] In this embodiment, for example, the alarm trigger conditions can be divided into: triggering the alarm action when one abnormality is detected, triggering the alarm action when 10 abnormalities are detected cumulatively in one day, or triggering the alarm action when 10 abnormalities are detected continuously in one day, etc., without restriction. By setting different target alarm trigger conditions for different alarms, a serious alarm will trigger the alarm action when one abnormality is detected, and a general alarm can be triggered when a first target number of abnormalities are detected cumulatively or a second target number of abnormalities are detected continuously. The alarms can be managed in a hierarchical manner to improve the stability of the register chip operation.

[0071] It should be noted that the first preset duration, the first target number of times, the second preset duration and the second target number of times can be set and modified as needed, and the embodiments of the present application do not limit them.

[0072] In one embodiment, the method further includes: generating configuration modification information of the target bit when the abnormality detected at the target bit does not match the current alarm information of the target bit.

[0073] In this embodiment, the situation where the abnormality detected by the target bit does not match the current alarm information of the target bit includes, for example, if some alarms have an impact on the engineering service that is inconsistent with expectations due to the location of the network element to which the single board belongs (for example, the abnormality affects the on-site service, but the service has not been switched, so the alarm information needs to be changed), or the alarm behavior does not meet customer needs, etc., then it is determined that the abnormality detected by the target bit does not match the current alarm information, and the current alarm information of the target bit needs to be modified.

[0074] In this embodiment, if an abnormality is detected in the target bit, but the corresponding current alarm information does not match the abnormality, configuration modification information of the target bit can be automatically generated. After the alarm information of the target bit is modified according to the configuration modification information, the abnormality detected by the target bit can be matched, and an alarm can be issued according to the modified alarm information matching the abnormality, thereby achieving the effect of adaptively modifying the alarm of the register chip, improving the accuracy and flexibility of alarm detection, and ensuring the stability of operation.

[0075] In a specific embodiment, each bit of the key chip alarm detection register (ie, register chip) can be used as a detection item, and its detection conditions, alarm levels, abnormal trigger conditions, and alarm times can be configured individually through the following members.

[0076] Each bit of the key chip alarm detection register is bound to a mask bit, indicating whether the bit needs to participate in the detection. If the mask corresponding to the first bit is 0, it means that the bit does not participate in the alarm detection.

[0077] Each bit of the key chip alarm detection register is bound to an alarm level, including: log recording, alarm reporting, alarm reporting + service switching, alarm reporting + service switching + board restart, etc. If the alarm level bound to the first bit is 0, it means that when the first bit is abnormal, only log recording is performed. When multiple bits of the register detect abnormalities, different actions can be triggered according to the alarm levels bound to them.

[0078] Each bit of the key chip alarm detection register is bound to an alarm trigger condition. The alarm trigger conditions can be divided into: the alarm action is triggered when one abnormality is detected, the alarm action is triggered when 10 abnormalities are detected cumulatively in one day, or the alarm action is triggered when 10 abnormalities are detected continuously in one day.

[0079] Each bit of the key chip alarm detection register is bound to an alarm generation count.

[0080] After the board is powered on, a set of default values ​​will be configured for each alarm detection register. If the alarm level does not meet the service requirements of the existing network or the customer's needs, the customer can customize the information of any alarm detection register by configuring the mask, alarm level, and alarm trigger condition of any bit of the alarm detection register through the network management.

[0081] After receiving the configuration information from the network management, the platform sends the configuration information to the chip and saves the data configuration information in the database to ensure that the configuration information remains effective even when the network element board is restarted.

[0082] In this embodiment, the behavior of key chip alarms, detection conditions, etc. can be flexibly configured according to customer needs or the impact of faults on the existing project network, thereby improving the flexibility and accuracy of project use, avoiding alarms that customers do not care about or have no impact on customer services, triggering single board resets and affecting services, and also avoiding alarms that customers care about or have an impact on services, resulting in long-term service impacts due to no action taken.

[0083] In one embodiment, the alarm method of the register chip can be applied in PTN equipment, and by flexibly configuring the alarm behavior of key chips, the fault detection rate of engineering network chips can be improved, and the stability and accuracy of the operation of the existing engineering network can be guaranteed to the maximum extent. Figure 3 , this embodiment is further described in detail, and the method includes the following steps.

[0084] The register starts scanning; the scanning cycle can be set as needed, for example, it can be scanned once every 100ms without restriction;

[0085] Check whether the first bit is abnormal; if there is no abnormality, continue scanning according to the scanning cycle;

[0086] If there is an abnormality, determine whether it is necessary to report to the police;

[0087] If an alarm is required, report the abnormal information to the platform. If an alarm is not required, record the log.

[0088] The network management displays alarm information based on the abnormal information. If it is determined that the alarm behavior does not meet the user's needs, the register information is modified.

[0089] In this embodiment, it is assumed that the reg_id of the alarm detection register address of a key chip is 0x1, the corresponding address reg_addr is 0xa, and the default mask reg_mask is 0x1, that is, only the first bit of the register needs to detect the alarm, the corresponding alarm action reg_action is 0x1, indicating that the log is recorded and the alarm is reported, and the corresponding detection condition reg_trig is 0x1, indicating that a fault is considered when an abnormality is detected. reg_exp_cnt is used to record the number of times the abnormality occurs.

[0090] The chip bottom layer detects the status of the register every 100ms. If the first bit is detected to be abnormal, the alarm detection condition is met: a fault is detected once, and the mask corresponding to the first bit is 1, and the alarm needs to be paid attention to. Then the corresponding action in the alarm level is executed: report the alarm. Therefore, the abnormal information will be recorded in the log, and the abnormal alarm will be reported to the platform. The platform will then notify the network management of the alarm, and the alarm information will be displayed on the network management, prompting the customer that the single board is abnormal and needs to consider replacing the single board.

[0091] If the abnormality affects the on-site business, but the business has not been switched, the customer may require to change the alarm. In this case, you can enter the register number 0x1 corresponding to the alarm on the network management, select the bit 0x1 to be modified, and change the alarm action reg_action to 0x4, indicating that the alarm needs to be reported and the business needs to be switched.

[0092] After the network management modifies the register alarm information, it pushes the information to the device platform. After the device platform parses each message field, it sends the corresponding information to the chip. The chip modifies the corresponding alarm action to 0x4. At the same time, the device platform stores the configuration information in the database to prevent the configuration from taking effect after the single board is restarted.

[0093] At this time, after the chip scans the exception again and reads reg_action as 0x4, it reports the alarm and switches the service at the same time.

[0094] When the project wants to add an alarm detection to a register 0xb, it can be added in the network management in the same way.

[0095] In this embodiment, by adding flexible configuration of the alarm behavior of the key chip, it is possible to flexibly determine whether the target bit is involved in the alarm detection through the identification information, and when the identification information indicates that the target bit is involved in the alarm detection and meets the alarm triggering conditions, an alarm can be issued according to the target alarm behavior, thereby improving the accuracy, flexibility, and pertinence of the alarm detection of the key chips of the project. In addition, the method of configuring the alarm behavior through the bit is simple and easy to operate when modifying, without the need for complicated version release and patch release, etc., thereby reducing the difficulty of implementation for users.

[0096] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0097] In this embodiment, an alarm device for a register chip is also provided, which is used to implement the above embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0098] Figure 4 is a structural block diagram of an alarm device of a register chip according to an embodiment of the present application, such as Figure 4 As shown, the device comprises:

[0099] The acquisition module 402 is used to acquire the information to be detected corresponding to the current register chip;

[0100] A determination module 404 is used to determine a target bit to be detected according to the information to be detected;

[0101] The execution module 406 is used to perform an alarm operation according to the alarm information corresponding to the target bit when an abnormality is detected in the target bit.

[0102] In this device, since each bit of the register chip corresponds to a kind of alarm information, the target bit to be detected can be determined according to the information to be detected corresponding to the current register chip, so that the alarm operation can be performed according to the alarm information corresponding to the target bit when an abnormality is detected in the target bit. Therefore, the alarm information of the register chip can be flexibly configured through the target bit to cover all possible situations as much as possible, which can solve the problem of flexibly configuring the alarm information of the register chip, achieve the effect of improving the detection accuracy and flexibility of the register chip, improve the chip fault detection rate, and ensure the stability and accuracy of operation.

[0103] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0104] An embodiment of the present application further provides a storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0105] Optionally, in this embodiment, each bit of the register chip corresponds to a type of alarm information, and the storage medium may be configured to store a computer program for executing the following steps:

[0106] Get the information to be detected corresponding to the current register chip;

[0107] Determining a target bit to be detected according to the information to be detected;

[0108] When an abnormality is detected in the target bit, an alarm operation is performed according to the alarm information corresponding to the target bit.

[0109] Optionally, in this embodiment, the above-mentioned storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store computer programs.

[0110] The embodiment of the present application further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above method embodiments. Figure 1 The memory 104 in is taken as an example of a memory in the electronic device.

[0111] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0112] Optionally, in this embodiment, each bit of the register chip corresponds to a type of alarm information, and the processor may be configured to execute the steps in the method embodiment through a computer program.

[0113] Optionally, the electronic device may be a PTN or SPN product.

[0114] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0115] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, and optionally, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0116] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. An alarm method for a register chip, wherein each bit of the register chip corresponds to an alarm message, and the method comprises: Get the information to be detected corresponding to the current register chip; Determining a target bit to be detected according to the information to be detected; When an abnormality is detected in the target bit, an alarm operation is performed according to the alarm information corresponding to the target bit.

2. The method according to claim 1, characterized in that Each bit of the register chip corresponds to an identification information one by one, and the information to be detected includes target identification information, and the target identification information represents the identification information of the bit to be detected; The step of determining a target bit to be detected according to the information to be detected includes: The target bit to be detected is determined according to the target identification information.

3. The method according to claim 1, characterized in that The information to be detected includes mask information, and each bit of the mask information corresponds one-to-one to a bit of the register chip; The step of determining a target bit to be detected according to the information to be detected includes: When the mask is the first identifier, the bit position corresponding to the mask is determined as the target bit position to be detected.

4. The method according to any one of claims 1 to 3, characterized in that: Before obtaining the information to be detected corresponding to the current register chip, the method further includes: Obtaining information to be configured for each bit of the register chip; wherein the information to be configured includes first parameter information and alarm information, the first parameter information is used to characterize the bit corresponding to the alarm information, and the alarm information includes alarm behavior, alarm triggering conditions, and the number of abnormality occurrences; An alarm is configured for each bit according to the first parameter information, the alarm behavior, the alarm triggering condition and the number of times the abnormality occurs.

5. The method according to claim 4, characterized in that After respectively configuring an alarm for each of the bits according to the first parameter information, the alarm behavior, the alarm triggering condition, and the number of times the abnormality occurs, the method further includes: Responsive to the configuration modification information of the bit; wherein the configuration modification information includes the first parameter information corresponding to the bit to be modified and the alarm information to be modified, and the alarm information to be modified includes the alarm behavior to be modified, the alarm triggering condition to be modified, and the number of abnormality occurrences to be modified; The bit is reconfigured according to the first parameter information corresponding to the bit to be modified, the alarm behavior to be modified, the alarm triggering condition to be modified, and the number of times the abnormality to be modified occurs.

6. The method according to claim 5, characterized in that The method further comprises: The information to be configured and / or the configuration modification information is saved in a database, so that when the configuration of the bit is lost, the bit can be reconfigured according to the information to be configured and / or the configuration modification information in the database.

7. The method according to claim 4, characterized in that The warning behavior includes one of the following: Keep a log; Report to the police; Report alarms and switch services; Report an alarm, switch services, and restart the board.

8. The method according to claim 4, characterized in that The performing an alarm operation according to the alarm information corresponding to the target bit position includes: Determine the target alarm behavior, target alarm triggering condition and target abnormality generation times of the target bit according to the alarm information corresponding to the target bit; When it is determined that the target alarm triggering condition is met according to the target abnormality generation frequency, an alarm is issued through the target alarm behavior.

9. The method according to claim 4, characterized in that The alarm triggering condition includes one of the following: triggering an alarm action when an abnormality is detected once, triggering an alarm action when a first target number of abnormalities are detected cumulatively within a first preset time period, or triggering an alarm action when a second target number of abnormalities are detected continuously within a second preset time period.

10. The method according to claim 1, characterized in that The method further includes: generating configuration modification information of the target bit when the abnormality detected by the target bit does not match the current alarm information of the target bit.

11. A storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program is configured to execute the method according to any one of claims 1 to 10 when executed.

12. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to perform the method according to any one of claims 1 to 10.

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