Selection circuit

Abstract

The embodiment of the invention provides a selection circuit. The selection circuit comprises a first selection circuit, a first transmission circuit and a second transmission circuit, the first selection circuit is provided with a first power input end, a second power input end and an output end; the first selection circuit is used for maintaining transmission from the first power input end and the second power input end to the output end within a certain period of time and disconnecting when the system is turned off; the first transmission circuit is connected with the first power input end and the output end. The control end of the first transmission circuit is connected with the second power input end. The second transmission circuit is connected with the second power input end and the output end; the control end of the second transmission circuit is connected with the first power input end; after the system is turned off, the first transmission circuit or the second transmission circuit is turned on so as to transmit a signal with relatively high voltage in the first power input end and the second power input end to the output end for output. The circuit is used for realizing substrate selection.

Description

Technical Field

[0001] The present application relates to the field of analog integrated circuit design, and in particular to a selection circuit. Background Art

[0002] In recent years, with the rapid development of the integrated circuit industry, the complexity of chips has greatly increased, and the requirements for chip design have become increasingly higher. In the design of analog integrated circuit chips, the design of power tubes is a crucial part of the entire chip system.

[0003] In practical applications, when the chip system is working, it is hoped that the power port voltage will be transmitted to the output port output as needed. However, when the chip system is turned off, since there is a PN junction in the substrate circuit connected to the output port, in order to prevent the substrate PN junction from being turned on and causing damage to the chip, it is necessary to automatically identify the larger voltage output in the power port voltage. Therefore, it is necessary to provide a selection circuit that can meet the above substrate selection needs. Summary of the invention

[0004] An embodiment of the present application provides a selection circuit for implementing substrate selection.

[0005] In a first aspect, an embodiment of the present application provides a selection circuit, including: a first selection circuit, a first transmission circuit and a second transmission circuit; the first selection circuit has a first power input terminal, a second power input terminal and an output terminal; the first selection circuit is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is shut down; the first transmission circuit connects the first power input terminal and the output terminal, and the control terminal of the first transmission circuit is connected to the second power input terminal; the second transmission circuit connects the second power input terminal and the output terminal, and the control terminal of the second transmission circuit is connected to the first power input terminal; after the system is shut down, the first transmission circuit or the second transmission circuit is turned on to transmit the signal with a higher voltage in the first power input terminal and the second power input terminal to the output terminal for output.

[0006] In a possible implementation manner, the first selection circuit is further configured to, when the system is in operation, respond to a selection signal to conduct transmission between one of the first power input terminal or the second power input terminal and the output terminal.

[0007] In a possible implementation, the first selection circuit includes a third transmission circuit, a fourth transmission circuit, a first processing circuit and a second processing circuit; the third transmission circuit is connected to the first power input terminal and the output terminal, and the control terminal of the third transmission circuit is connected to the first processing circuit; the third transmission circuit is used to respond to the first control signal of different states to turn on or off, so as to turn on or off the path from the first power input terminal to the output terminal; the fourth transmission circuit is connected to the second power input terminal and the output terminal, and the control terminal of the fourth transmission circuit is connected to the second processing circuit; the fourth transmission circuit is used to respond to the second control signal of different states to turn on or off, so as to turn on or off the path from the second power input terminal to the output terminal; the first processing circuit and the second processing circuit are used to output the first control signal and the second control signal respectively according to the selection signal when the enable signal indicates that the current system is in a working state.

[0008] In a possible implementation, when the enable signal indicates that the current system is in a working state, at the same time, the signal states of the first control signal output by the first processing circuit and the second control signal output by the second processing circuit are different.

[0009] In a possible implementation, the first processing circuit includes a first control circuit and a first switch; one end of the first switch is connected to the control end of the third transmission circuit, the other end of the first switch is grounded, and the control end of the first switch is connected to the first control circuit, and is used to respond to the third control signal of the first state to be turned on, and respond to the third control signal of the second state to be turned off to output the first control signal; the first control circuit is used to output the third control signal of the first state if the selection signal indicates that the first power supply is selected when the enable signal indicates that the current system is in a working state, and output the third control signal of the second state if the selection signal indicates that the second power supply is selected.

[0010] In a possible implementation, the second processing circuit includes a second control circuit and a second switch; one end of the second switch is connected to the control end of the fourth transmission circuit, the other end of the second switch is grounded, and the control end of the second switch is connected to the second control circuit, and is used to respond to the fourth control signal of the third state to be turned on, and respond to the fourth control signal of the fourth state to be turned off, so as to output the second control signal; the second control circuit is used to output the fourth control signal of the fourth state if the selection signal indicates that the first power supply is selected when the enable signal indicates that the current system is in a working state, and output the fourth control signal of the third state if the selection signal indicates that the second power supply is selected.

[0011] In a possible implementation, the third transmission circuit includes a first PMOS tube, and the first processing circuit also includes a first resistor; the drain of the first PMOS tube is connected to the first power input terminal, the gate of the first PMOS tube is connected to one end of the first switch, and the source of the first PMOS tube is connected to the output terminal; one end of the first resistor is connected to one end of the first switch, and the other end of the first resistor is connected to the output terminal.

[0012] In a possible implementation, the fourth transmission circuit includes a second PMOS tube, and the second processing circuit also includes a second resistor; the drain of the second PMOS tube is connected to the second power supply input terminal, the gate of the second PMOS tube is connected to one end of the second switch, and the source of the second PMOS tube is connected to the output terminal; one end of the second resistor is connected to one end of the second switch, and the other end of the second resistor is connected to the output terminal.

[0013] In one possible implementation, the first control circuit includes a first NOT gate and a first AND gate; the input end of the first NOT gate receives a selection signal, the output end of the first NOT gate is connected to the first input end of the first AND gate, the second input end of the first AND gate receives an enable signal, and the output end of the first AND gate is connected to the control end of the first switch.

[0014] In one possible implementation, the second control circuit includes a second NOT gate and a second AND gate; the input end of the second NOT gate is connected to the output end of the first AND gate, the output end of the second NOT gate is connected to the first input end of the second AND gate, the second input end of the second AND gate receives an enable signal, and the output end of the second AND gate is connected to the control end of the second switch.

[0015] In a possible implementation, the first transmission circuit includes a third switch; the second transmission circuit includes a fourth switch; one end of the third switch is connected to the first power input terminal, the other end of the third switch is connected to the output terminal, and the control end of the third switch is connected to the second power input terminal; one end of the fourth switch is connected to the second power input terminal, the other end of the fourth switch is connected to the output terminal, and the control end of the fourth switch is connected to the first power input terminal.

[0016] In the selection circuit provided in the embodiment of the present application, the selection circuit includes: a first selection circuit, a first transmission circuit and a second transmission circuit; the first selection circuit has a first power input terminal, a second power input terminal and an output terminal; the first selection circuit is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is turned off; the first transmission circuit connects the first power input terminal and the output terminal, and the control terminal of the first transmission circuit is connected to the second power input terminal; the second transmission circuit connects the second power input terminal and the output terminal, and the control terminal of the second transmission circuit is connected to the first power input terminal; after the system is turned off, the first transmission circuit or the second transmission circuit is turned on to transmit the signal with a higher voltage in the first power input terminal and the second power input terminal to the output terminal for output. Using the circuit in this scheme, after the chip system is turned off, it can automatically determine the voltage size of the power port, and transmit the larger voltage in the power port to the output port for output, simplifying the circuit, reducing the static current of the system in the off state, saving power consumption, and also avoiding abnormal penetration of the power tube, protecting the circuit, and improving the robustness of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0018] Figure 1 exemplarily shows a structural schematic diagram of a selection circuit provided in Embodiment 1 of the present application;

[0019] Figure 2 A schematic diagram of a selection circuit provided for this example;

[0020] Figure 3 A schematic diagram of a selection circuit provided as an example;

[0021] Figure 4 A schematic diagram of a selection circuit provided as an example;

[0022] Figure 5 A schematic diagram of a selection circuit provided as an example;

[0023] Figure 6 A schematic diagram of the structure of a selection circuit provided for this example.

[0024] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0025] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application.

[0026] The terms "including" and "having" in this application are used to express an open-ended inclusion, and mean that in addition to the listed elements / components / etc., there may be additional elements / components / etc.; the terms "first" and "second" etc. are only used as marks or distinctions, and are not intended to limit the order or quantity of their objects. In addition, the different elements and areas in the drawings are only shown schematically, and are therefore not limited to the sizes or distances shown in the drawings. The technical solution is described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0027] Chip, also known as integrated circuit (IC), or microcircuit, microchip, can be understood as a miniaturized circuit. Specifically, a chip is a part of a computer or electronic device that performs calculations, processing tasks, and storage functions.

[0028] In integrated circuits, the substrate is the carrier of the internal circuit of the chip and has important mechanical and electrical properties. The selection circuit is an important part of connecting the substrate with the internal circuit of the chip. Its main task is to make the substrate and the circuit have the same potential to ensure the normal operation of the power tube, thereby improving the performance and stability of the integrated circuit.

[0029] In practical applications, when the chip system is working, it is hoped that the power port voltage will be transmitted to the output port output as needed. However, when the chip system is turned off, since there is a PN junction in the substrate circuit connected to the output port, in order to prevent the substrate PN junction from being turned on and causing damage to the chip, it is necessary to automatically identify the larger voltage output in the power port voltage. Therefore, it is necessary to provide a selection circuit that can meet the above substrate selection needs.

[0030] The technical content provided by this application is intended to solve the above-mentioned technical problems of the related technology. In the embodiment of this application, the selection circuit includes: a first selection circuit, a first transmission circuit and a second transmission circuit; the first selection circuit has a first power input terminal, a second power input terminal and an output terminal; the first selection circuit is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is turned off; the first transmission circuit connects the first power input terminal and the output terminal, and the control terminal of the first transmission circuit is connected to the second power input terminal; the second transmission circuit connects the second power input terminal and the output terminal, and the control terminal of the second transmission circuit is connected to the first power input terminal; after the system is turned off, the first transmission circuit or the second transmission circuit is turned on to transmit the signal with a higher voltage in the first power input terminal and the second power input terminal to the output terminal for output. The scheme of this application can automatically determine the voltage size of the power port after the chip system is turned off, and transmit the larger voltage in the power port to the output port for output, simplify the circuit, reduce the static current of the system in the off state, save power consumption, and also avoid abnormal penetration of the power tube, protect the circuit, and improve the robustness of the circuit.

[0031] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0032] Embodiment 1

[0033] Figure 1 The structural diagram of the selection circuit provided in the first embodiment of the present application is exemplarily shown in FIG. Figure 1 As shown, the circuit includes: a first selection circuit 10, a first transmission circuit 11 and a second transmission circuit 12;

[0034] The first selection circuit 10 has a first power input terminal, a second power input terminal and an output terminal; the first selection circuit 10 is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is shut down;

[0035] The first transmission circuit 11 is connected to the first power input terminal and the output terminal, and the control terminal of the first transmission circuit 11 is connected to the second power input terminal; the second transmission circuit 12 is connected to the second power input terminal and the output terminal, and the control terminal of the second transmission circuit 12 is connected to the first power input terminal; after the system is shut down, the first transmission circuit 11 or the second transmission circuit 12 is turned on to transmit the signal with a higher voltage between the first power input terminal and the second power input terminal to the output terminal for output.

[0036] In this example, the first selection circuit 10 has two input terminals, namely a first power input terminal and a second power input terminal. The first power input terminal receives a first power supply, and the second power input terminal receives a second power supply. The first power supply and the second power supply are power supplies for the functional modules in the integrated circuit, and the voltages of the first power supply and the second power supply are different.

[0037] In one example, the first selection circuit 10 is also used to, when the system is in operation, respond to a selection signal to conduct transmission between one of the first power input terminal or the second power input terminal and the output terminal. Specifically, the first power input terminal inputs the first power supply, and the second power input terminal inputs the second power supply. When the system is in operation, that is, when the system is in a power-on state, the first power supply or the second power supply output needs to be selected as needed. In one example, the first selection circuit 10 can be instructed to output the first power supply or the second power supply by a selection signal.

[0038] As an example, if the system chooses to output the first power supply, the first selection circuit 10 is instructed by a selection signal to turn on the path from the first power supply input terminal to the first selection circuit 10 to the output terminal, the first transmission circuit 11 and the second transmission circuit 12 are disconnected, and the path from the second power supply input terminal to the first selection circuit 10 to the output terminal is disconnected, thereby transmitting the first power supply to the output terminal for output; if the system chooses to output the second power supply, the first selection circuit 10 is instructed by a selection signal to turn on the path from the second power supply input terminal to the first selection circuit 10 to the output terminal, the first transmission circuit 11 and the second transmission circuit 12 are disconnected, and the path from the first power supply input terminal to the first selection circuit 10 to the output terminal is disconnected, thereby transmitting the second power supply to the output terminal for output.

[0039] The selection signal may be generated by other circuits or processors. In one example, different states of the selection signal may be used to represent the selection of the first power supply or the second power supply. As an example, a high level of the selection signal represents the selection of the second power supply, and a low level of the selection signal represents the selection of the first power supply.

[0040] The above is the working principle of the selection circuit when the system is in operation. As an example, when the system is turned off, such as when the system is powered off, based on the selection circuit of this embodiment, the first selection circuit 10 will still maintain the transmission conduction between the first power input terminal and the second power input terminal and the output terminal. Correspondingly, the voltage at the output terminal at this time depends on the larger voltage of the first power supply and the second power supply. At the same time, the voltage at one end of the first transmission circuit 11 is the voltage of the first power supply, the voltage at the other end is the voltage at the output terminal, and the voltage at the control terminal is the voltage of the second power supply; the voltage at one end of the second transmission circuit 12 is the voltage of the second power supply, the voltage at the other end is the voltage at the output terminal, and the voltage at the control terminal is the voltage of the first power supply. In other words, at this time, voltage differences of different magnitudes are formed at each end of the first transmission circuit 11 and the second transmission circuit 12. Based on the above state, this scheme controls one of the two transmission circuits to be turned on and the other to be turned off, thereby achieving a larger voltage output.

[0041] As an example, if the first power supply is greater than the second power supply, the first transmission circuit 11 is controlled to be turned on, the second transmission circuit 12 is controlled to be turned off, the path from the first power supply input terminal to the first transmission circuit 11 to the output terminal is turned on, the path from the second power supply input terminal to the second transmission circuit 12 to the output terminal is turned off, and the larger first power supply of the first power supply and the second power supply is output from the output terminal; if the first power supply is less than the second power supply, the second transmission circuit 12 is controlled to be turned on, the first transmission circuit 11 is controlled to be turned off, the path from the second power supply input terminal to the second transmission circuit 12 to the output terminal is turned on, the path from the first power supply input terminal to the first transmission circuit 11 to the output terminal is turned off, and the larger second power supply of the first power supply and the second power supply is output from the output terminal. After the larger voltage forms a steady-state output, the first selection circuit 10 can disconnect the transmission conduction between the first power supply input terminal and the second power supply input terminal and the output terminal to save power consumption. Among them, the time for the first selection circuit 10 to maintain the transmission conduction between the first power supply input terminal and the second power supply input terminal and the output terminal can be set according to the response time of the first transmission circuit 11 and the second transmission circuit 12.

[0042] In the above example, after the system is shut down, the selection circuit can determine the voltage of the power port and transmit the larger voltage in the power port to the output port, thereby simplifying the circuit, reducing the static current of the system in the shutdown state, and saving power consumption.

[0043] Specifically, the first selection circuit 10 is used to select the required power supply when the system is working, and transmit the required power supply to the output end for output. The specific implementation structure of the first selection circuit 10 is not limited. In one example, Figure 2 A schematic diagram of a selection circuit provided for this example is shown in FIG. Figure 2As shown, the first selection circuit 10 includes a third transmission circuit 101, a fourth transmission circuit 102, a first processing circuit 103 and a second processing circuit 104;

[0044] The third transmission circuit 101 is connected to the first power input terminal and the output terminal, and the control terminal of the third transmission circuit 101 is connected to the first processing circuit 103; the third transmission circuit 101 is used to respond to the first control signal of different states to turn on or off, so as to turn on or off the path from the first power input terminal to the output terminal;

[0045] The fourth transmission circuit 102 is connected to the second power input terminal and the output terminal, and the control terminal of the fourth transmission circuit 102 is connected to the second processing circuit 104; the fourth transmission circuit 102 is used to respond to the second control signal of different states to turn on or off, so as to turn on or off the path from the second power input terminal to the output terminal;

[0046] The first processing circuit 103 and the second processing circuit 104 are used to respectively output a first control signal and a second control signal according to a selection signal when the enable signal indicates that the current system is in a working state.

[0047] In one example, when the system is working, there is an external processor that provides a selection signal according to actual output requirements. The enable signal represents the current working state of the system. When the system is working, the enable signal is in an active state, such as a high level state; when the system is shut down, the enable signal is in an inactive state, such as a low level state.

[0048] Specifically, when the system is working, the first processing circuit 103 receives a selection signal and an enable signal, and the enable signal is in an activated state. As an example, if the selection signal represents the output of the first power supply, in one example, the selection signal is a low level to represent the selection of the first power supply. After being processed by the first processing circuit 103, a first control signal for controlling the conduction of the third transmission circuit 101 is output, and the third transmission circuit 101 is turned on. The second processing circuit 104 outputs a second control signal for controlling the disconnection of the fourth transmission circuit 102 according to the selection signal and the enable signal, and the fourth transmission circuit 102 is disconnected. Correspondingly, the first power input to the first power supply input terminal is transmitted to the output terminal through the turned-on third transmission circuit 101. As another example, if the selection signal represents the output of the second power supply, in one example, the selection signal is a high level to represent the selection of the second power supply. After being processed by the first processing circuit 103, a first control signal for controlling the disconnection of the third transmission circuit 101 is output, and the third transmission circuit 101 is disconnected. The second processing circuit 104 outputs a second control signal for controlling the fourth transmission circuit 102 to be turned on according to the selection signal and the enable signal. Accordingly, the second power inputted from the second power input terminal is transmitted to the output terminal through the turned-on fourth transmission circuit 102.

[0049] In one example, the third transmission circuit 101 and the fourth transmission circuit 102 may be MOS tubes or transmission gates, which are not limited here. In combination with the above principles, when the system is in operation, when the first power supply or the second power supply is selected for output, the on / off states of the third transmission circuit 101 and the fourth transmission circuit 102 are different. That is, in one example, when the enable signal indicates that the current system is in operation, the signal states of the first control signal output by the first processing circuit 103 and the second control signal output by the second processing circuit 104 are different at the same time.

[0050] As an example, the on / off states of the third transmission circuit 101 and the fourth transmission circuit 102 can be controlled differently by the first control signal and the second control signal in different states. In one example, when the system is working, when the enable signal is in an activated state, the first processing circuit 103 and the second processing circuit 104 respectively output the first control signal and the second control signal according to the selection signal.

[0051] In the above example, the first processing circuit 103 outputs a first control signal to control the third transmission circuit 101 to be turned on or off, and the second processing circuit 104 outputs a second control signal to control the fourth transmission circuit 102 to be turned on or off, which can transmit the first power supply and the second power supply to the output end for output, and can realize independent control of the circuit, which is convenient for layout and integration.

[0052] Figure 3 The structural diagram of the selection circuit provided for an example. Figure 3 As shown, the first processing circuit 103 includes a first control circuit 1031 and a first switch K1; one end of the first switch K1 is connected to the control end of the third transmission circuit 101, and the other end of the first switch K1 is grounded, and the control end of the first switch K1 is connected to the first control circuit 1031, and is used to respond to the third control signal of the first state to be turned on, and respond to the third control signal of the second state to be turned off, so as to output the first control signal; the first control circuit 1031 is used to output the third control signal of the first state if the selection signal indicates that the first power supply is selected when the enable signal indicates that the current system is in a working state, and output the third control signal of the second state if the selection signal indicates that the second power supply is selected.

[0053] In this example, when the system is in working state, if the selection signal represents the selection of the first power supply, the first control circuit 1031 outputs the third control signal of the first state to control the first switch K1 to be turned on; if the selection signal represents the selection of the second power supply, the first control circuit 1031 outputs the third control signal of the second state to control the first switch K1 to be turned off. Among them, the first switch K1 can be an NMOS tube, a PMOS tube, or other devices, which are not limited here. In one example, the first switch K1 is an NMOS tube, the first state is a high level, and the second state is a low level; in another example, the first switch K1 is a PMOS tube, the first state is a low level, and the second state is a high level.

[0054] Specifically, taking the first switch K1 as an NMOS tube as an example, the drain of the NMOS tube is connected to the control end of the third transmission circuit 101, the gate of the NMOS tube is connected to the first control circuit 1031, and the source of the NMOS tube is grounded. As an example, when the selection signal represents the selection of the first power supply, the first control circuit 1031 outputs a third control signal of the first state, that is, a high-level signal, to control the NMOS tube to be turned on, so as to apply the first control signal for turning on the third transmission circuit 101 to the control end of the third transmission circuit 101, and the third transmission circuit 101 is turned on accordingly, thereby turning on the transmission between the first power input terminal and the output terminal, and outputting the first power supply; at this time, the transmission between the second power input terminal and the output terminal is disconnected. Similar principles apply, when the selection signal represents the selection of the second power supply, the first control circuit 1031 outputs a third control signal of the second state, i.e., a low-level signal, to control the NMOS tube to be disconnected, thereby applying a first control signal for disconnecting the third transmission circuit 101 to the control end of the third transmission circuit 101, and the third transmission circuit 101 is disconnected accordingly. At this time, the transmission between the second power supply input terminal and the output terminal is turned on, thereby outputting the second power supply.

[0055] Through the solution of this example, when the selection signal represents the selection of different power outputs, the third control signal is output to control the on and off of the first switch K1 and output the corresponding power supply, which can realize independent control of the circuit and facilitate layout and integration.

[0056] Combined with the above examples, Figure 3As shown, the second processing circuit 104 includes a second control circuit 1041 and a second switch K2; one end of the second switch K2 is connected to the control end of the fourth transmission circuit 102, the other end of the second switch K2 is grounded, and the control end of the second switch K2 is connected to the second control circuit 1041, and is used to respond to the fourth control signal of the third state to be turned on, and respond to the fourth control signal of the fourth state to be turned off, so as to output the second control signal; the second control circuit 1041 is used to output the fourth control signal of the fourth state if the selection signal indicates that the first power supply is selected when the enable signal indicates that the current system is in a working state, and output the fourth control signal of the third state if the selection signal indicates that the second power supply is selected.

[0057] In this example, when the system is in working state, if the selection signal indicates the selection of the first power supply, the second control circuit 1041 outputs the fourth control signal of the fourth state to control the second switch K2 to be disconnected; if the selection signal indicates the selection of the second power supply, the second control circuit 1041 outputs the fourth control signal of the third state to control the second switch K2 to be turned on. Among them, the second switch K2 can be an NMOS tube, a PMOS tube, or other devices, which are not limited here. In one example, the second switch K2 is an NMOS tube, the third state is a high level, and the fourth state is a low level; in another example, the second switch K2 is a PMOS tube, the third state is a low level, and the fourth state is a high level.

[0058] Specifically, taking the second switch K2 as an NMOS tube as an example, the drain of the NMOS tube is connected to the control end of the fourth transmission circuit 102, the gate of the NMOS tube is connected to the second control circuit 1041, and the source of the NMOS tube is grounded. As an example, when the selection signal represents the selection of the second power supply, the second control circuit 1041 outputs the fourth control signal of the third state, that is, the high-level signal, to control the NMOS tube to be turned on, so as to apply the second control signal for turning on the fourth transmission circuit 102 to the control end of the fourth transmission circuit 102, and the fourth transmission circuit 102 is turned on accordingly, so as to turn on the transmission between the second power supply input terminal and the output terminal, and output the second power supply; at this time, the transmission between the first power supply input terminal and the output terminal is disconnected. Similar principles, when the selection signal represents the selection of the first power supply, the second control circuit 1041 outputs a fourth control signal of a fourth state, i.e., a low-level signal, to control the NMOS tube to be disconnected, thereby applying a second control signal for disconnecting the fourth transmission circuit 102 to the control end of the fourth transmission circuit 102, and the fourth transmission circuit 102 is disconnected. At this time, the transmission between the input end and the output end of the first power supply is turned on, thereby outputting the first power supply.

[0059] Through the solution of this example, when the selection signal represents the selection of different power outputs, the fourth control signal is output to control the conduction and disconnection of the second switch K2 and output the corresponding power supply, which can realize independent control of the circuit and facilitate layout and integration.

[0060] Figure 4 The third transmission circuit 101 includes a first PMOS transistor PM1, and the first processing circuit 103 also includes a first resistor R1; the drain of the first PMOS transistor PM1 is connected to the first power input terminal, the gate of the first PMOS transistor PM1 is connected to one end of the first switch K1, and the source of the first PMOS transistor PM1 is connected to the output terminal; one end of the first resistor R1 is connected to one end of the first switch K1, and the other end of the first resistor R1 is connected to the output terminal.

[0061] In this example, when the system is in working state, if the selection signal represents the selection of the first power supply, the first processing circuit 103 outputs a low-level first control signal to control the first PMOS tube PM1 to be turned on, thereby turning on the transmission between the first power supply input terminal and the output terminal, and outputting the first power supply; at this time, the transmission between the second power supply input terminal and the output terminal is disconnected. Similarly, if the selection signal represents the selection of the second power supply, the first processing circuit 103 outputs a high-level first control signal to control the first PMOS tube PM1 to be turned off, thereby disconnecting the transmission between the first power supply input terminal and the output terminal, at this time, the transmission between the second power supply input terminal and the output terminal is turned on, and the second power supply is output.

[0062] Correspondingly, when the system is turned off, the first processing circuit 103 outputs a high-level first control signal to control the first PMOS tube PM1 to be disconnected. However, due to the presence of a parasitic diode in the first PMOS tube PM1, the first power supply will be transmitted from the first power supply input terminal to the output terminal through the parasitic diode of the first PMOS tube PM1, and the transmission between the first power supply input terminal and the output terminal is maintained, so that the first transmission circuit 11 and the second transmission circuit 12 determine to output the larger voltage of the first power supply and the second power supply. The first processing circuit 103 also includes a first resistor R1, one end of the first resistor R1 is connected to one end of the first switch K1, and the other end of the first resistor R1 is connected to the output terminal.

[0063] In another example, the first PMOS tube PM1 in the third transmission circuit 101 may also be an NMOS tube, a triode or other devices, which are not limited here. Taking the third transmission circuit 101 including the first NMOS tube as an example, the drain of the first NMOS tube is connected to the output end, the gate of the first NMOS tube is connected to one end of the first switch K1, and the source of the first NMOS tube is connected to the first power input end to receive the first power. When the system is in a working state, if the selection signal represents the selection of the first power supply, the first processing circuit 103 outputs a high-level first control signal to control the first NMOS tube to be turned on, thereby turning on the transmission between the first power input end and the output end, and outputting the first power; at this time, the transmission between the second power input end and the output end is disconnected. Similar principle, if the selection signal represents the selection of the second power supply, the first processing circuit 103 outputs a low-level first control signal to control the first NMOS tube to be turned off, thereby disconnecting the transmission between the first power input end and the output end, at this time, the transmission between the second power input end and the output end is turned on, and the second power is output.

[0064] Correspondingly, when the system is turned off, the first processing circuit 103 outputs a low-level first control signal to control the first NMOS tube to be disconnected. However, due to the presence of a parasitic diode in the first NMOS tube, the first power supply will be transmitted from the first power supply input terminal to the output terminal through the parasitic diode of the first NMOS tube, and the transmission between the first power supply input terminal and the output terminal is maintained, so that the first transmission circuit 11 and the second transmission circuit 12 determine to output the larger voltage of the first power supply and the second power supply. The first processing circuit 103 also includes a third resistor R3, one end of the third resistor R3 is connected to one end of the first switch K1, and the other end of the third resistor R3 is connected to the first power supply input terminal.

[0065] Through the solution of this example, the static current of the system in the shutdown state is reduced, power consumption is saved, the circuit is protected, and the robustness of the circuit is improved.

[0066] Based on the above example, Figure 4 As shown, the fourth transmission circuit 102 includes a second PMOS transistor PM2, and the second processing circuit 104 also includes a second resistor R2; the drain of the second PMOS transistor PM2 is connected to the second power input terminal, the gate of the second PMOS transistor PM2 is connected to one end of the second switch K2, and the source of the second PMOS transistor PM2 is connected to the output terminal; one end of the second resistor R2 is connected to one end of the second switch K2, and the other end of the second resistor R2 is connected to the output terminal.

[0067] In this example, when the system is in working state, if the selection signal represents the selection of the second power supply, the second processing circuit 104 outputs a low-level second control signal to control the second PMOS tube PM2 to be turned on, thereby turning on the transmission between the second power supply input terminal and the output terminal, and outputting the second power supply; at this time, the transmission between the first power supply input terminal and the output terminal is disconnected. Similarly, if the selection signal represents the selection of the first power supply, the second processing circuit 104 outputs a high-level second control signal to control the second PMOS tube PM2 to be turned off, thereby disconnecting the transmission between the second power supply input terminal and the output terminal, at this time, the transmission between the first power supply input terminal and the output terminal is turned on, and the first power supply is output.

[0068] Correspondingly, when the system is turned off, the second processing circuit 104 outputs a high-level second control signal to control the second PMOS tube PM2 to be disconnected. However, due to the presence of a parasitic diode in the second PMOS tube PM2, the second power supply will be transmitted from the second power supply input terminal to the output terminal through the parasitic diode of the second PMOS tube PM2, and the transmission between the second power supply input terminal and the output terminal is maintained, so that the first transmission circuit 11 and the second transmission circuit 12 determine to output the larger voltage of the first power supply and the second power supply. The second processing circuit 104 also includes a second resistor R2, one end of the second resistor R2 is connected to one end of the second switch K2, and the other end of the second resistor R2 is connected to the output terminal.

[0069] In another example, the second PMOS transistor PM2 in the fourth transmission circuit 102 may also be an NMOS transistor, a triode or other device, which is not limited here. Taking the fourth transmission circuit 102 including the second NMOS transistor as an example, the drain of the second NMOS transistor is connected to the output end, the gate of the second NMOS transistor is connected to one end of the second switch K2, and the source of the second NMOS transistor is connected to the second power input end to receive the second power supply. When the system is in a working state, if the selection signal represents the selection of the second power supply, the second processing circuit 104 outputs a high-level second control signal to control the second NMOS transistor to be turned on, thereby turning on the transmission between the second power input end and the output end, and outputting the second power supply; at this time, the transmission between the first power input end and the output end is disconnected. Similar principle, if the selection signal represents the selection of the first power supply, the second processing circuit 104 outputs a low-level second control signal to control the second NMOS transistor to be turned off, thereby disconnecting the transmission between the second power input end and the output end, at this time, the transmission between the first power input end and the output end is turned on, and the first power supply is output.

[0070] Correspondingly, when the system is turned off, the second processing circuit 104 outputs a low-level second control signal to control the second NMOS tube to be disconnected. However, due to the presence of a parasitic diode in the second NMOS tube, the second power supply will be transmitted from the second power supply input terminal to the output terminal through the parasitic diode of the second NMOS tube, maintaining the transmission between the second power supply input terminal and the output terminal, so that the first transmission circuit 11 and the second transmission circuit 12 determine to output the larger voltage of the first power supply and the second power supply. The second processing circuit 104 also includes a fourth resistor R4, one end of the fourth resistor R4 is connected to one end of the second switch K2, and the other end of the fourth resistor R4 is connected to the second power supply input terminal.

[0071] Through the solution of this example, the static current of the system in the shutdown state is reduced, power consumption is saved, the circuit is protected, and the robustness of the circuit is improved.

[0072] In one example, the first control circuit 1031 includes a first NOT gate and a first AND gate; the input end of the first NOT gate receives a selection signal, the output end of the first NOT gate is connected to the first input end of the first AND gate, the second input end of the first AND gate receives an enable signal, and the output end of the first AND gate is connected to the control end of the first switch K1.

[0073] Specifically, when the system is working, the second input end of the first AND gate receives an enable signal of an activated state, that is, a high-level signal. When the input end of the first NOT gate receives a low-level selection signal, it is converted into a high-level signal through the first NOT gate. The first input end of the first AND gate receives a high-level signal, and the second input end receives a high-level signal, and a high-level signal is output to control the first switch K1. When the input end of the first NOT gate receives a high-level selection signal, it is converted into a low-level signal through the first NOT gate. The first input end of the first AND gate receives a low-level signal, and the second input end receives a high-level signal, and a low-level signal is output to control the first switch K1.

[0074] Correspondingly, when the system is turned off, the second input end of the first AND gate receives an enable signal in an inactive state, that is, a low-level signal. When the input end of the first NOT gate receives a low-level selection signal, it becomes a high-level signal through the first NOT gate. The first input end of the first AND gate receives a high-level signal, and the second input end receives a low-level signal, and outputs a low-level signal to control the first switch K1. When the input end of the first NOT gate receives a high-level selection signal, it becomes a low-level signal through the first NOT gate. The first input end of the first AND gate receives a low-level signal, and the second input end receives a low-level signal, and outputs a low-level signal to control the first switch K1. Through the scheme of this example, the first switch K1 is controlled to be turned on or off through enable signals and selection signals in different states, which can realize independent control of the circuit and facilitate layout and integration.

[0075] In one example, the second control circuit 1041 includes a second NOT gate and a second AND gate; the input end of the second NOT gate is connected to the output end of the first AND gate, the output end of the second NOT gate is connected to the first input end of the second AND gate, the second input end of the second AND gate receives an enable signal, and the output end of the second AND gate is connected to the control end of the second switch K2.

[0076] Specifically, when the system is working, the second input end of the second AND gate receives an enable signal of an activated state, that is, a high-level signal. When the input end of the second NOT gate receives a low-level selection signal output by the first AND gate, it becomes a high-level signal through the second NOT gate. The first input end of the second AND gate receives a high-level signal, and the second input end receives a high-level signal, and outputs a high-level signal to control the second switch K2. When the input end of the second NOT gate receives a high-level selection signal output by the first AND gate, it becomes a low-level signal through the second NOT gate. The first input end of the second AND gate receives a low-level signal, and the second input end receives a high-level signal, and outputs a low-level signal to control the second switch K2.

[0077] Correspondingly, when the system is turned off, the second input end of the second AND gate receives an enable signal in an inactive state, i.e., a low-level signal. When the input end of the second NOT gate receives a low-level selection signal output by the first AND gate, it becomes a high-level signal through the second NOT gate. The first input end of the second AND gate receives a high-level signal, and the second input end receives a low-level signal, and outputs a low-level signal to control the second switch K2. When the input end of the second NOT gate receives a high-level selection signal output by the first AND gate, it becomes a low-level signal through the second NOT gate. The first input end of the second AND gate receives a low-level signal, and the second input end receives a low-level signal, and outputs a low-level signal to control the second switch K2. Through the scheme of this example, the second switch K2 is controlled to be turned on or off through enable signals and selection signals in different states, which can realize independent control of the circuit and facilitate layout and integration.

[0078] Based on any of the above examples, Figure 5 The structural diagram of the selection circuit provided as an example. The first transmission circuit 11 includes a third switch K3; the second transmission circuit 12 includes a fourth switch K4; one end of the third switch K3 is connected to the first power input terminal, the other end of the third switch K3 is connected to the output terminal, and the control end of the third switch K3 is connected to the second power input terminal; one end of the fourth switch K4 is connected to the second power input terminal, the other end of the fourth switch K4 is connected to the output terminal, and the control end of the fourth switch K4 is connected to the first power input terminal.

[0079] In this example, the third switch K3 and the fourth switch K4 may be a PMOS tube, an NMOS tube, a triode or a switch. Taking the third switch K3 as a PMOS tube and the fourth switch K4 as a PMOS tube as an example, the first transmission circuit 11 includes a third PMOS tube PM3, and the third PMOS tube PM3 has a parasitic diode, and the second transmission circuit 12 includes a fourth PMOS tube PM4, and the fourth PMOS tube PM4 has a parasitic diode. The drain of the third PMOS tube PM3 is connected to the first power input terminal to receive the first power supply, the gate of the third PMOS tube PM3 is connected to the second power input terminal to receive the second power supply, and the source of the third PMOS tube is connected to the output terminal. The drain of the fourth PMOS tube PM4 is connected to the second power input terminal to receive the second power supply, the source of the fourth PMOS tube PM4 is connected to the output terminal, and the gate of the fourth PMOS tube PM4 is connected to the first power input terminal to receive the first power supply.

[0080] Specifically, when the system is shut down, when the first power supply is greater than the second power supply, the voltage at the source of the third PMOS tube PM3 is the first power supply voltage, and the voltage at the gate is the second power supply voltage. At this time, the third PMOS tube PM3 is turned on, and the source and drain of the third PMOS tube PM3 are both the first power supply voltage. The voltages at both ends of the parasitic diode of the third PMOS tube PM3 are equal and will not be broken down; correspondingly, the voltage at the source of the fourth PMOS tube PM4 is the first power supply voltage, and the gate is also the first power supply voltage. The fourth PMOS tube PM4 will not be turned on, and the positive electrode voltage of the parasitic diode of the fourth PMOS tube PM4 is less than the negative electrode voltage, and will not be broken down. At this time, the output end outputs the larger first power supply between the first power supply and the second power supply. When the first power supply is less than the second power supply, the voltage at the source of the third PMOS tube PM3 is the first power supply voltage, and the gate is the second power supply voltage. At this time, the third PMOS tube PM3 will not be turned on, and the positive electrode voltage of the parasitic diode of the third PMOS tube PM3 is less than the negative electrode voltage, and will not be broken down; correspondingly, the voltage at the source of the fourth PMOS tube PM4 is the second power supply voltage, and the gate is the first power supply voltage, the fourth PMOS tube PM4 is turned on, the source and drain of the fourth PMOS tube PM4 are both the second power supply voltage, and the voltages at both ends of the parasitic diode of the fourth PMOS tube PM4 are equal, and will not be broken down; at this time, the output end outputs the larger second power supply between the first power supply and the second power supply.

[0081] Specifically, taking the third switch K3 as an NMOS tube and the fourth switch K4 as an NMOS tube as an example, the first transmission circuit 11 includes a third NMOS tube NM3, and the third NMOS tube NM3 has a parasitic diode, and the second transmission circuit 12 includes a fourth NMOS tube NM4, and the fourth NMOS tube NM4 has a parasitic diode. The drain of the third NMOS tube NM3 is connected to the output end, the gate of the third NMOS tube NM3 is connected to the second power input end, and receives the second power supply, and the source of the third NMOS tube NM3 is connected to the first power input end, and receives the first power supply. The drain of the fourth NMOS tube NM4 is connected to the output end, the source of the fourth NMOS tube NM4 is connected to the second power input end, and receives the second power supply, and the gate of the fourth NMOS tube NM4 is connected to the first power input end, and receives the first power supply.

[0082] In the above example, after the chip system is shut down, it can automatically determine the voltage size of the power port and transmit the larger voltage in the power port to the output port, simplifying the circuit, reducing the static current of the system in the shutdown state, saving power consumption, and also avoiding abnormal penetration of the power tube, protecting the circuit, and improving the robustness of the circuit.

[0083] In the selection circuit provided in this embodiment, the selection circuit includes: a first selection circuit 10, a first transmission circuit 11 and a second transmission circuit 12; the first selection circuit 10 has a first power input terminal, a second power input terminal and an output terminal; the first selection circuit 10 is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is turned off; the first transmission circuit 11 connects the first power input terminal and the output terminal, and the control terminal of the first transmission circuit 11 is connected to the second power input terminal; the second transmission circuit 12 connects the second power input terminal and the output terminal, and the control terminal of the second transmission circuit 12 is connected to the first power input terminal; after the system is turned off, the first transmission circuit 11 or the second transmission circuit 12 is turned on to transmit the signal with a higher voltage in the first power input terminal and the second power input terminal to the output terminal for output. The scheme of the present application can automatically determine the voltage size of the power port after the chip system is turned off, and transmit the larger voltage in the power port to the output port for output, simplify the circuit, reduce the static current of the system in the off state, save power consumption, and also avoid abnormal penetration of the power tube, protect the circuit, and improve the robustness of the circuit.

[0084] Embodiment 2

[0085] The selection circuit of the above example is described below with an example.

[0086] Figure 6 A schematic diagram of a selection circuit is provided for this example. Figure 6 As shown, the description is as follows: Figure 6The first transmission circuit 11 includes a third PMOS tube PM3 and a parasitic diode, the second transmission circuit 12 includes a fourth PMOS tube PM4 and a parasitic diode, the third transmission circuit 101 includes a first PMOS tube PM1 and a parasitic diode, the fourth transmission circuit includes a second PMOS tube PM2 and a parasitic diode, the first control circuit 1031 includes a first NOT gate and a first AND gate, the second control circuit 1041 includes a second NOT gate and a second AND gate, the first switch K1 is a first NMOS tube NM1, the second switch K2 is a second NMOS tube NM2, the first processing circuit 103 also includes a first resistor R1, and the second processing circuit 104 also includes R2.

[0087] When the system is working, if the selection signal selection represents the selection of the first power supply, the selection signal is a low-level signal, which becomes a high-level signal after passing through the first NOT gate, and the enable signal is in an active state, that is, a high-level signal, which becomes a high-level signal output after passing through the first AND gate, the first NMOS tube NM1 is turned on, and the first PMOS tube PM1 is turned on; the second NOT gate receives the high-level signal, which becomes a low-level signal after passing through the second NOT gate, and becomes a low-level signal output after passing through the second AND gate, the second NMOS tube NM2 is disconnected, the second PMOS tube PM2 is disconnected, and the first power supply is transmitted to the output end through the first PMOS tube PM1 for output. If the selection signal selection represents the selection of the second power supply, the selection signal is a high-level signal, which becomes a low-level signal after passing through the first NOT gate, and the enable signal is in an active state, that is, a high-level signal, which becomes a low-level signal output after passing through the first AND gate, and the first NMOS tube NM1 is disconnected, and the first PMOS tube PM1 is disconnected; the second NOT gate receives the low-level signal, which becomes a high-level signal after passing through the second NOT gate, and becomes a high-level signal output after passing through the second AND gate, the second NMOS tube NM2 is turned on, the second PMOS tube PM2 is turned on, and the second power supply is transmitted to the output end through the second PMOS tube PM2 for output.

[0088] When the system is turned off, the first AND gate outputs a low-level signal, the first NMOS tube NM1 is disconnected in response to the low-level signal, and the second NMOS tube NM2 is also disconnected in response to the low-level signal. Correspondingly, the first PMOS tube PM1 is disconnected, and the second PMOS tube PM2 is disconnected. However, at this time, the first power supply transmits the first power supply to the source of the third PMOS tube PM3 through the parasitic diode of the first PMOS tube PM1. After the system is turned off, the gate of the third PMOS tube PM3 is the second power supply voltage. If the first power supply is greater than the second power supply, the third PMOS tube PM3 is turned on, and accordingly, the fourth PMOS tube PM4 is disconnected, and the output end outputs a larger first power supply. Similarly, when the system is turned off, the first AND gate outputs a low-level signal, the first NMOS tube NM1 is disconnected in response to the low-level signal, and the second NMOS tube NM2 is also disconnected in response to the low-level signal. Correspondingly, the first PMOS tube PM1 is disconnected, and the second PMOS tube PM2 is disconnected. However, at this time, the second power supply transmits the second power supply to the source of the fourth PMOS tube PM4 through the parasitic diode of the second PMOS tube PM2. After the system is shut down, the gate of the fourth PMOS tube PM4 is at the first power supply voltage. If the first power supply is less than the second power supply, the fourth PMOS tube PM4 is turned on, and accordingly, the third PMOS tube PM3 is turned off, and the output end outputs the larger second power supply.

[0089] Among them, the specific selection circuit can refer to the content of the above embodiment. In summary, the selection circuit provided in this example can automatically determine the voltage size of the power port after the chip system is turned off, and transmit the larger voltage in the power port to the output port for output, simplifying the circuit, reducing the static current of the system in the off state, saving power consumption, and also avoiding abnormal penetration of the power tube, protecting the circuit, and improving the robustness of the circuit.

[0090] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0091] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A selection circuit, characterized in that: include: a first selection circuit, a first transmission circuit, and a second transmission circuit; The first selection circuit has a first power input terminal, a second power input terminal and an output terminal; The first selection circuit is used to maintain the transmission from the first power input terminal and the second power input terminal to the output terminal for a certain period of time and disconnect when the system is shut down; The first transmission circuit is connected to the first power input terminal and the output terminal, and the control terminal of the first transmission circuit is connected to the second power input terminal; the second transmission circuit is connected to the second power input terminal and the output terminal, and the control terminal of the second transmission circuit is connected to the first power input terminal; after the system is shut down, the first transmission circuit or the second transmission circuit is turned on to transmit the signal with a higher voltage between the first power input terminal and the second power input terminal to the output terminal for output.

2. The selection circuit according to claim 1, characterized in that: The first selection circuit is further configured to, when the system is in operation, respond to a selection signal to conduct transmission between one of the first power input terminal or the second power input terminal and the output terminal.

3. The selection circuit according to claim 2, characterized in that: The first selection circuit includes a third transmission circuit, a fourth transmission circuit, a first processing circuit and a second processing circuit; The third transmission circuit is connected to the first power input terminal and the output terminal, and the control terminal of the third transmission circuit is connected to the first processing circuit; The third transmission circuit is used to be turned on or off in response to the first control signal of different states, so as to turn on or off the path from the first power input terminal to the output terminal; The fourth transmission circuit is connected to the second power input terminal and the output terminal, and the control terminal of the fourth transmission circuit is connected to the second processing circuit; The fourth transmission circuit is used to be turned on or off in response to the second control signal of different states, so as to turn on or off the path from the second power input terminal to the output terminal; The first processing circuit and the second processing circuit are used to respectively output the first control signal and the second control signal according to the selection signal when the enable signal indicates that the current system is in a working state.

4. The selection circuit according to claim 3, characterized in that: When the enable signal indicates that the current system is in a working state, the signal states of the first control signal output by the first processing circuit and the second control signal output by the second processing circuit at the same time are different.

5. The selection circuit according to claim 3, characterized in that: The first processing circuit includes a first control circuit and a first switch; One end of the first switch is connected to the control end of the third transmission circuit, the other end of the first switch is grounded, and the control end of the first switch is connected to the first control circuit, and is used to be turned on in response to the third control signal of the first state, and turned off in response to the third control signal of the second state, so as to output the first control signal; The first control circuit is used for outputting the third control signal of the first state if the selection signal indicates that the first power supply is selected, and outputting the third control signal of the second state if the selection signal indicates that the second power supply is selected when the enable signal indicates that the current system is in a working state.

6. The selection circuit according to claim 5, characterized in that: The second processing circuit includes a second control circuit and a second switch; One end of the second switch is connected to the control end of the fourth transmission circuit, the other end of the second switch is grounded, and the control end of the second switch is connected to the second control circuit, and is used to be turned on in response to the fourth control signal of the third state, and turned off in response to the fourth control signal of the fourth state, so as to output the second control signal; The second control circuit is used for outputting the fourth control signal of the fourth state if the selection signal indicates that the first power supply is selected when the enable signal indicates that the current system is in a working state, and outputting the fourth control signal of the third state if the selection signal indicates that the second power supply is selected.

7. The selection circuit according to claim 5, characterized in that: The third transmission circuit includes a first PMOS tube, and the first processing circuit also includes a first resistor; The drain of the first PMOS tube is connected to the first power input terminal, the gate of the first PMOS tube is connected to one end of the first switch, and the source of the first PMOS tube is connected to the output terminal; one end of the first resistor is connected to one end of the first switch, and the other end of the first resistor is connected to the output terminal.

8. The selection circuit according to claim 6, characterized in that: The fourth transmission circuit includes a second PMOS tube, and the second processing circuit also includes a second resistor; The drain of the second PMOS tube is connected to the second power input terminal, the gate of the second PMOS tube is connected to one end of the second switch, and the source of the second PMOS tube is connected to the output terminal; one end of the second resistor is connected to one end of the second switch, and the other end of the second resistor is connected to the output terminal.

9. The selection circuit according to claim 6, characterized in that: The first control circuit includes a first NOT gate and a first AND gate; The input end of the first NOT gate receives the selection signal, the output end of the first NOT gate is connected to the first input end of the first AND gate, the second input end of the first AND gate receives the enable signal, and the output end of the first AND gate is connected to the control end of the first switch.

10. The selection circuit according to claim 9, characterized in that: The second control circuit includes a second NOT gate and a second AND gate; The input end of the second NOT gate is connected to the output end of the first AND gate, the output end of the second NOT gate is connected to the first input end of the second AND gate, the second input end of the second AND gate receives the enable signal, and the output end of the second AND gate is connected to the control end of the second switch.

11. The selection circuit according to any one of claims 1 to 10, characterized in that: The first transmission circuit includes a third switch; the second transmission circuit includes a fourth switch; One end of the third switch is connected to the first power input end, the other end of the third switch is connected to the output end, and the control end of the third switch is connected to the second power input end; One end of the fourth switch is connected to the second power input end, the other end of the fourth switch is connected to the output end, and the control end of the fourth switch is connected to the first power input end.

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