Communication circuit of megasonic generator and megasonic generator

By using the TDA515S485HC chip and isolation, matching and filtering design in the communication circuit of the megasonic wave generator, the problems of instability and insufficient anti-interference are solved, and signal transmission with high stability and anti-interference ability are achieved.

CN119449072APending Publication Date: 2025-02-14HARBIN INSTITUTE OF TECHNOLOGY (SHENZHEN) (INSTITUTE OF SCIENCE AND TECHNOLOGY INNOVATION HARBIN INSTITUTE OF TECHNOLOGY SHENZHEN)
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Patent Information

Application Number
CN202411547142.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-01
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

The communication circuits of existing megasonic wave generators are unstable and have insufficient anti-interference, resulting in signal attenuation and communication instability.

Method used

The TDA515S485HC chip is used as the core of the RS485 communication circuit, combining isolation design, resistance matching design and filter design to maximize the reduction of circuit and external noise interference.

Benefits of technology

Ensure the stability and reliability of communication circuits, realize high-stable and efficient signal transmission, and enhance anti-interference ability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of signal processing, and provides a communication circuit of a megasonic generator and the megasonic generator. In the communication circuit, a VCC interface is connected with a first power supply, a first end of a first capacitor and a first end of a second capacitor; the second end of the first capacitor and the second end of the second capacitor are connected with the first GND1 interface; the A interface is connected with the second end of the first resistor and the first end of the third resistor; the B interface is connected with the second end of the third resistor and the first end of the second resistor; the first GND2 interface is connected with the second end of the second resistor, the second end of the third capacitor, the second end of the fourth capacitor, the second end of the fifth capacitor and the second grounding end; the VISO interface is connected with the first end of the first resistor, the first end of the third capacitor, the first end of the fourth capacitor and the first end of the fifth capacitor. According to the scheme, stable signal transmission is realized, and the anti-interference capability is high.
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Description

Technical Field

[0001] The present invention relates to the technical field of signal processing, and in particular to a communication circuit of a megasonic wave generator and a megasonic wave generator. Background Art

[0002] Megasonic generator, also known as megasonic generator box, megasonic source, megasonic power supply, is an important component of megasonic cleaning machine. Its quality and matching degree directly determine the cleaning effect of the cleaning machine.

[0003] The function of the megasonic generator is to convert the power supply voltage (220V / 50Hz or 380V / 60Hz) used in our daily life into a high-frequency AC signal that matches the megasonic transducer. The principle is: the signal generator generates a pulse signal or a sine signal of a specific frequency, and the megasonic generator increases the frequency of this signal to a certain value, that is, the frequency of the transducer. The megasonic frequencies generally used in megasonic equipment are 20KHz, 28KHz, 40KHz, and 60KHz. The power amplifier can be in many forms, such as vacuum tube class A amplifier, class A and B amplifier, transistor class A or class B amplifier, transistor switching amplifier, etc., and the power is generally between 50W and 3000W. The frequency signal generated by the signal generator needs to be impedance matched after passing through the power amplifier, so that the output impedance matches the transducer, and the transducer is driven to convert the electrical signal into mechanical vibration, thereby performing cleaning work. At present, the megasonic generators used in the ultrasonic industry are mainly divided into self-excited and other-excited power supplies.

[0004] The communication circuit is used as the serial communication interface between the upper computer and the lower computer to realize the data exchange between the megasonic generator and external devices (such as programmable logic controller PLC, server or PC, etc.). RS485 communication (half-duplex asynchronous serial communication) has the advantages of long transmission distance (up to several thousand meters), high transmission rate (up to 10Mbps), strong anti-interference ability (differential signal) and support for multi-node communication. Therefore, it is very beneficial to use RS485 to form a communication circuit to transmit signals.

[0005] Through the RS485 communication interface, the megasonic generator can accept setting instructions from external devices such as PLC, server or PC to achieve fast setting and accurate operation. This is especially important for precision cleaning systems in the medical, electronic, automotive and other industries that require precise control of megasonic energy transmission. The RS485 communication circuits currently on the market have problems with signal attenuation and communication instability caused by long communication lines or impedance mismatch. The communication environment also has a great impact on the stability of RS485 communication, and additional anti-interference measures need to be taken to ensure the reliability of communication. Therefore, improving the anti-interference ability of communication signals and ensuring the stability and reliability of communication are currently urgent needs to be met.

[0006] Most of the existing communication circuits rely on 485 chips to achieve communication effects, or add EMC circuits to prevent interference such as surges or lightning strikes, and the anti-interference design of peripheral circuits is insufficient. In application scenarios such as megasonic generators, there are many sources of noise, and no surge protection design is required, so the existing solutions alone cannot meet the needs.

[0007] Therefore, there is an urgent need to provide a communication circuit and a megasonic wave generator for a megasonic wave generator, which can be used to meet the communication needs of the megasonic wave generator with high stability and efficiency, ensure the stability and reliability of the communication circuit, and achieve stable transmission of signals with strong anti-interference ability.

[0008] The above information disclosed in the Background section is only for enhancement of understanding of the background of the present application and therefore it may contain information that does not constitute the prior art that is already known to a person of ordinary skill in the art. Summary of the invention

[0009] The main purpose of the present invention is to overcome the problems of instability and weak anti-interference of the communication circuit of the megasonic wave generator, and to provide a communication circuit and a megasonic wave generator for meeting the communication needs of the megasonic wave generator with high stability and high efficiency, ensuring the stability and reliability of the communication circuit, and realizing stable transmission of signals with strong anti-interference ability.

[0010] As a first aspect of the present invention, the present invention provides a communication circuit of a megasonic wave generator, comprising a communication circuit and an enabling circuit;

[0011] The communication circuit includes a TDA515S485HC chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first power supply, a first ground terminal, a second ground terminal, a first resistor, a second resistor, and a third resistor;

[0012] The TDA515S485HC chip includes a VCC interface, a first GND1 interface, an RXD interface, an RE interface, a DE interface, a TXD interface, a third GDN1 interface, a VISO interface, a first GND2 interface, a B interface, an A interface, and a second GND2 interface;

[0013] The first capacitor includes a first terminal and a second terminal, the second capacitor includes a first terminal and a second terminal, the third capacitor includes a first terminal and a second terminal, the fourth capacitor includes a first terminal and a second terminal, and the fifth capacitor includes a first terminal and a second terminal;

[0014] The first resistor includes a first end and a second end, the second resistor includes a first end and a second end, and the third resistor includes a first end and a second end;

[0015] The VCC interface is connected to the first power supply, the first end of the first capacitor, the first end of the second capacitor, and the first end of the fourth resistor;

[0016] The first GND1 interface is connected to the first ground terminal, the second end of the first capacitor, and the second end of the second capacitor;

[0017] The RXD interface is connected to the RS485 signal transmitting terminal;

[0018] The RE interface and the DE interface are connected to the port of the RS485 chip access enable signal;

[0019] The TXD interface is connected to the RS485 receiving signal terminal;

[0020] The third GND1 interface is connected to the first ground terminal;

[0021] The second GND2 interface is connected to the second ground terminal;

[0022] The A interface is connected to the second end of the first resistor and the first end of the third resistor;

[0023] The B interface is connected to the second end of the third resistor and the first end of the second resistor;

[0024] The first GND2 interface is connected to the second end of the second resistor, the second end of the third capacitor, the second end of the fourth capacitor, the second end of the fifth capacitor, and the second grounding end;

[0025] The VISO interface is connected to a first end of the first resistor, a second end of the fourth resistor, a first end of the third capacitor, a first end of the fourth capacitor, and a first end of the fifth capacitor.

[0026] According to an exemplary embodiment of the present invention, the communication circuit further includes a J1 module, the J1 module includes a first end and a second end, the first end of the J1 module is connected to the B interface, and the second end of the J1 module is connected to the A interface.

[0027] According to an exemplary embodiment of the present invention, the communication circuit further includes a J1A module, the J1A module includes a first end and a second end, the first end of the J1A module is connected to the B interface, and the second end of the J1A module is connected to the A interface.

[0028] According to an exemplary embodiment of the present invention, the communication circuit further includes a fourth resistor, the fourth resistor including a first end and a second end, the first end of the fourth resistor is connected to the VCC interface, and the second end of the fourth resistor is connected to the VISO interface.

[0029] According to an exemplary embodiment of the present invention, the communication circuit further includes a fifth resistor, the fifth resistor including a first end and a second end, the second end of the fifth resistor is connected to the first ground end, and the second end of the fifth resistor is connected to the second ground end.

[0030] According to an exemplary embodiment of the present invention, the resistance values ​​of the first resistor and the second resistor are 330Ω, and the resistance value of the third resistor is 120Ω.

[0031] According to an exemplary embodiment of the present invention, the capacitance of the first capacitor and the third capacitor are both 0.1 uF, the capacitance of the second capacitor and the fourth capacitor are both 10 uF, and the capacitance of the fifth capacitor is 1 uF.

[0032] According to an exemplary embodiment of the present invention, the first power source is 3.3V.

[0033] As a second aspect of the present invention, the present invention provides a megasonic wave generator, comprising a megasonic wave generating circuit and a communication circuit of the megasonic wave generator;

[0034] The megasonic wave generating circuit is connected to the communication circuit of the megasonic wave generator and is used to generate megasonic waves;

[0035] The communication circuit of the megasonic wave generator is used to receive communication instructions and control the megasonic wave generating circuit to generate megasonic waves.

[0036] According to an exemplary embodiment of the present invention, the megasonic wave generator further comprises an enabling circuit of the megasonic wave generator;

[0037] The enabling circuit of the megasonic wave generator is connected to the megasonic wave generating circuit and is used to generate an enabling signal.

[0038] The advantages of the present invention are:

[0039] The present invention improves the communication circuit, adopts the best performance chip, performs isolation design, resistor matching design and filter design on the outside of the chip to minimize the interference of circuit and external noise, ensure the stability and reliability of the communication circuit, and achieve high stability and high efficiency transmission of communication signals. The structural design of this solution is ingenious and reasonable, effectively simplifies the circuit and achieves the best optimization effect. It can be applied to the design of communication interface in industrial applications, which is conducive to wide promotion and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above and other objects, features and advantages of the present application will become more apparent by describing in detail the exemplary embodiments thereof with reference to the accompanying drawings. The accompanying drawings described below are only some embodiments of the present application, and it is clear to a person skilled in the art that other accompanying drawings can be obtained from these accompanying drawings without creative effort.

[0041] Figure 1 A circuit diagram of a communication circuit is schematically shown. DETAILED DESCRIPTION

[0042] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this application will be comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.

[0043] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0044] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0045] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0046] It should be understood that although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another component. Therefore, the first component discussed below can be referred to as the second component without departing from the teachings of the concepts of the present application. As used herein, the term "and / or" includes any one of the associated listed items and all combinations of one or more.

[0047] Those skilled in the art will appreciate that the drawings are merely schematic diagrams of example embodiments, and the modules or processes in the drawings are not necessarily necessary for implementing the present application, and therefore cannot be used to limit the scope of protection of the present application.

[0048] According to a first specific embodiment of the present invention, the present invention provides a megasonic wave generator, comprising a megasonic wave generating circuit, a communication circuit of the megasonic wave generator and an enabling circuit of the megasonic wave generator.

[0049] The megasonic wave generating circuit is connected to the communication circuit of the megasonic wave generator and is used to generate megasonic waves. The communication circuit is connected to the corresponding pins of the microcontroller of the megasonic wave generating circuit.

[0050] The communication circuit of the megasonic wave generator is used to receive communication instructions and control the megasonic wave generating circuit to generate megasonic waves.

[0051] The enabling circuit of the megasonic wave generator is connected to the megasonic wave generating circuit and is used to generate an enabling signal.

[0052] The communication circuit is designed based on RS485 communication principle and Modbus communication protocol, and the enabling circuit is designed based on optocoupler isolation and Schmitt trigger.

[0053] The specific principle of RS485 communication is: the serial port controller in the node uses RX and TX signal lines to connect to the 485 transceiver, and then the 485 transceiver is connected to the network bus through differential lines. TTL signal transmission is generally used between the serial port controller and the transceiver, and differential signal transmission is used between the transceiver and the bus. The 485 transceiver is used to convert TTL level and RS485 level. When sending data, the TX signal of the serial port controller is converted into a differential signal by the transceiver and transmitted to the bus. When receiving data, the differential signal on the bus is converted into a TTL signal by the transceiver, and then transmitted to the serial port controller through the RX pin to realize the communication conversion of different signals between serial ports. The Modbus communication protocol used in this process is the communication mechanism of the signal on the bus, that is, the signal transmission process follows the master-slave communication mode of host polling and slave response. During the communication process, the signal is packaged into a data packet of the Modbus protocol type to realize the accurate communication between the "one master and multiple slaves" machines between the upper and lower computers.

[0054] The communication circuit includes a TDA515S485HC chip, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first power supply, a first ground terminal GND1, a second ground terminal GND2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a J1 module, and a J1A module.

[0055] like Figure 1As shown, as a transceiver of the RS485 communication circuit, the TDA515S485HC chip includes a VCC interface, a first GND1 interface, a RXD interface, a RE interface, a DE interface, a TXD interface, a second GDN1 interface, a third GDN1 interface, a VISO interface, a first GND2 interface, a second NC interface, a B interface, an A interface, a second NC interface, a SEL interface, and a second GND2 interface. The second GND1 interface, the SEL interface, the first NC interface, and the second NC interface are not connected to other circuits.

[0056] The first capacitor C1 includes a first end and a second end, the second capacitor C2 includes a first end and a second end, the third capacitor C3 includes a first end and a second end, the fourth capacitor C4 includes a first end and a second end, and the fifth capacitor C5 includes a first end and a second end. The capacitance of the first capacitor C1 and the third capacitor C3 is 0.1uF. As a preferred embodiment, the first capacitor C1 and the third capacitor C3 use a 104 type capacitor, the capacitance of the second capacitor C2 and the fourth capacitor C4 are both 10uF, and the capacitance of the fifth capacitor C5 is 1uF.

[0057] The first resistor R1 includes a first end and a second end, the second resistor R2 includes a first end and a second end, the third resistor R3 includes a first end and a second end, and the fourth resistor R4 includes a first end and a second end. The resistance of the first resistor R1 and the second resistor R2 is 330Ω, and the resistance of the third resistor R3 is 120Ω. The fifth resistor R5 includes a first end and a second end, the second end of the fifth resistor R5 is connected to the first ground terminal, and the second end of the fifth resistor R5 is connected to the second ground terminal. The fourth resistor R4 and the fifth resistor R5 are both NC resistors. NC means that there is no posting here, that is, no electronic device is posted here. It is used here to indicate the isolation of two different power supplies or the isolation of two different grounds.

[0058] The first power supply is 3.3 V. The chip power supply circuit includes a VCC interface (pin 1), a first GND1 interface (pin 2), an RXD interface (pin 3), an RE interface (pin 4), a DE interface (pin 5), a TXD interface (pin 6), a second GND1 interface (pin 7), and a third GND1 interface (pin 8).

[0059] The VCC interface is connected to the first power source, the first end of the first capacitor C1 , the first end of the second capacitor C2 , and the first end of the fourth resistor R4 .

[0060] The first GND1 interface is connected to the first ground terminal GND1, the second end of the first capacitor C1, and the second end of the second capacitor C2. The first capacitor C1 and the second capacitor C2 are connected in parallel between the VCC interface (pin 1) and the first GND1 interface (pin 2). The capacitor decouples the power supply from the ground. When the power supply voltage is unstable due to the power consumption of the circuit, the decoupling capacitor can achieve the purpose of storing or releasing the capacitor to improve the stability of VCC and reduce noise interference.

[0061] The RXD interface is connected to the RS485 sending signal terminal. The RXD interface is pin 3 of the chip, which is connected to the RX of the microcontroller.

[0062] The RE interface and the DE interface are connected to the port of the RS485 chip to access the enable signal (i.e. the enable signal sent from the GPIO port of the microcontroller of the host computer) to access the enable signal EN to control the output state of the differential signal. The RE interface is pin 4, and the DE interface is pin 5. The DE interface is connected to the GPIO of the microcontroller as a transceiver control enable.

[0063] The third GND1 interface is connected to the first ground terminal GND1.

[0064] TXD interface and RS485 receiving signal end (pin 16), first GND2 interface (pin 15), B interface (pin 13), A interface (pin 12), second NC interface (pin 11), SEL interface (pin 10), and second GND2 interface (pin 9).

[0065] The second GND2 interface is connected to the second ground terminal GND2.

[0066] The A interface is connected to the second end of the first resistor R1 and the first end of the third resistor R3. The first resistor R1 is a pull-up resistor, and the A interface is connected to the VCC interface through the pull-up resistor.

[0067] The B interface is connected to the second end of the third resistor R3 and the first end of the second resistor R2. The second resistor R2 is a pull-down resistor, and the B interface is connected to the second ground terminal through the pull-down resistor.

[0068] The A line connected to the A interface is connected to the power supply provided by the chip (here is the VISO interface) through a pull-up resistor, and the B line connected to the B interface is connected to GND through a pull-down resistor, leading to the high and low levels of A and B, forming a differential signal between AB, and transmitted to the interface (J1 module) through the third resistor R3. This part of the circuit of the A and B interfaces is responsible for completing the mutual conversion between high and low level signals and differential signals to realize the communication transmission between the upper computer and the lower computer. The third resistor is connected between the A and B interfaces to reduce the reflection of the signal in the bus, and is connected to the 2PIN pin header (J1A module) as an external interface. In this way, the communication between the microcontroller serial port and other devices is realized. When RS485EN is high, it is in output mode. The microcontroller sends a signal to the chip through TX. After receiving the signal, the chip TXD end converts it into a differential signal that meets the RS485 standard and sends it to the bus through the A and B signal lines. When RS485EN is low, it is in input mode, and the differential signal received by the A and B signal lines is converted into a serial port signal, which is sent to the microcontroller through the RXD port to complete the signal reception. Since RS485 communication (half-duplex asynchronous serial communication) has the advantages of long transmission distance (up to several thousand meters), high transmission rate (up to 10Mbps), strong anti-interference ability (differential signal) and support for multi-node communication, it is very suitable for application in the communication of ultrasonic generators.

[0069] The first GND2 interface is connected to the second end of the second resistor R2, the second end of the third capacitor C3, the second end of the fourth capacitor C4, the second end of the fifth capacitor C5, and the second ground terminal GND2.

[0070] The VISO interface is connected to the first end of the first resistor R1, the second end of the fourth resistor R4, the first end of the third capacitor C3, the first end of the fourth capacitor C4, and the first end of the fifth capacitor C5. The first power supply is an external power supply, and the VISO interface is a power supply generated by the TDA515S485HC chip, and the power supply generated by the VISO interface is 3.3V.

[0071] The third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 reduce high frequency noise. The second NC interface (pin 11) and the SEL interface (pin 10) can be configured in a high state.

[0072] The power generated by the first power supply and VISO are not the same, and the first ground terminal GND1 and the second ground terminal GND2 are not the same, otherwise the effect of isolating the power supply cannot be achieved. Therefore, a fourth resistor R4 is added between the VCC interface and the VISO interface to indicate that the VCC on both sides are isolated, and a fifth resistor R5 is also added between the first ground terminal GND1 and the second ground terminal GND2 to indicate isolation.

[0073] The J1 module includes a first end and a second end. The first end of the J1 module is connected to the B interface, and the second end of the J1 module is connected to the A interface.

[0074] The J1A module includes a first end and a second end. The first end of the J1A module is connected to the B interface, and the second end of the J1A module is connected to the A interface.

[0075] Both J1 module and J1A module are interface modules, which are connected to the subsequent DSP (digital signal processor) circuit. There is no essential difference, except that the wires are different. J1 module is used to connect to the RS485 bus, and J1A is a terminal that is convenient for oscilloscope testing.

[0076] The TDA515S485HC chip is selected because of its strong anti-interference performance, isolation design, and complete core pin functions. Since the chip has its own isolated power supply, the left and right sides of the chip need to be connected to VCC (power) and GND (ground). At the same time, according to the internal circuit diagram of the chip, the VCC and GND on the left and right sides are independent and share the same ground. Therefore, only one grounding is required for the GND on the left side, and only one grounding is required for the GND2 on the right side, without the need for additional grounding.

[0077] The left and right sides are connected to the first power supply and the first ground terminal, the second power supply and the second ground terminal respectively, and 10uF and 0.1uF parallel decoupling capacitors are added to isolate the power supply from the ground. When the power supply voltage is unstable due to the large and small power consumption of the circuit, the decoupling capacitor can achieve the purpose of storing or releasing capacitance to improve the stability of VCC and reduce noise interference. In this way, combined with the power isolation inside the chip, the effect of internal and external isolation is achieved, which minimizes the noise interference of the circuit. At the same time, the third resistor is connected in parallel between the A and B lines as a terminal matching resistor to prevent signal reflection and echo. A 0.1uF (first capacitor C1, third capacitor C3) and a 10uF (second capacitor C2, fourth capacitor C4) capacitor are set on both sides of the chip, which are decoupling capacitors. A 1uF (fifth capacitor C5) capacitor is added on the right side because of the chip itself.

[0078] This solution improves the communication circuit and enabling circuit, adopts the best performance chip, performs isolation design, resistor matching design and filter design on the outside of the chip to minimize circuit and external noise interference, and promotes the stability of communication signals through various filtering and anti-interference designs, ensuring the stability and reliability of communication circuits, and achieving high stability and high efficiency transmission of communication signals. The structural design of this solution is ingenious and reasonable, effectively simplifies the circuit and achieves the best optimization effect. It can be applied to communication interface design in industrial applications and is conducive to wide promotion and application.

[0079] The exemplary embodiments of the present invention are specifically shown and described above. It should be understood that the present invention is not limited to the detailed structure, configuration or implementation method described herein; on the contrary, the present invention is intended to cover various modifications and equivalent configurations included in the spirit and scope of the appended claims.

Claims

1. A communication circuit of a megasonic generator, characterized in that: It includes a TDA51S485HC chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first power supply, a first ground terminal, a second ground terminal, a first resistor, a second resistor, and a third resistor; The TDA51S485HC chip includes a VCC interface, a first GND1 interface, an RXD interface, an RE interface, a DE interface, a TXD interface, a third GND1 interface, a VISO interface, a first GND2 interface, a B interface, an A interface, and a second GND2 interface; The first capacitor includes a first terminal and a second terminal, the second capacitor includes a first terminal and a second terminal, the third capacitor includes a first terminal and a second terminal, the fourth capacitor includes a first terminal and a second terminal, and the fifth capacitor includes a first terminal and a second terminal; The first resistor includes a first end and a second end, the second resistor includes a first end and a second end, and the third resistor includes a first end and a second end; The VCC interface is connected to the first power supply, the first end of the first capacitor, and the first end of the second capacitor; The first GND1 interface is connected to the first ground terminal, the second end of the first capacitor, and the second end of the second capacitor; The RXD interface is connected to the RS485 signal transmitting terminal; The RE interface and the DE interface are connected to the port of the RS485 chip access enable signal; The TXD interface is connected to the RS485 receiving signal terminal; The third GND1 interface is connected to the first ground terminal; The second GND2 interface is connected to the second ground terminal; The A interface is connected to the second end of the first resistor and the first end of the third resistor; The B interface is connected to the second end of the third resistor and the first end of the second resistor; The first GND2 interface is connected to the second end of the second resistor, the second end of the third capacitor, the second end of the fourth capacitor, the second end of the fifth capacitor, and the second grounding end; The VISO interface is connected to the first end of the first resistor, the first end of the third capacitor, the first end of the fourth capacitor, and the first end of the fifth capacitor.

2. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The communication circuit also includes a J1 module, which includes a first end and a second end. The first end of the J1 module is connected to the B interface, and the second end of the J1 module is connected to the A interface.

3. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The communication circuit also includes a J1A module, which includes a first end and a second end. The first end of the J1A module is connected to the B interface, and the second end of the J1 module is connected to the A interface.

4. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: A fourth resistor is also included. The fourth resistor includes a first end and a second end. The first end of the fourth resistor is connected to the VCC interface, and the second end of the fourth resistor is connected to the VISO interface.

5. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The communication circuit further includes a fifth resistor, which includes a first end and a second end. The first end of the fifth resistor is connected to the first ground end, and the second end of the fifth resistor is connected to the second ground end.

6. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The resistance values ​​of the first resistor and the second resistor are both 330Ω, and the resistance value of the third resistor is 120Ω.

7. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The capacitance of the first capacitor and the third capacitor are both 0.1uF, the capacitance of the second capacitor and the fourth capacitor are both 10uF, and the capacitance of the fifth capacitor is 1uF.

8. The communication circuit of the megasonic wave generator according to claim 1, characterized in that: The first power supply is 3.3V.

9. A megasonic generator, characterized in that: A communication circuit comprising a megasonic wave generating circuit and the megasonic wave generator according to any one of claims 1 to 8; The megasonic wave generating circuit is connected to the communication circuit of the megasonic wave generator and is used to generate megasonic waves; The communication circuit of the megasonic wave generator is used to receive communication instructions and control the megasonic wave generating circuit to generate megasonic waves.

10. The megasonic generator according to claim 9, characterized in that: Also included is an enabling circuit for the megasonic wave generator; The enabling circuit of the megasonic wave generator is connected to the megasonic wave generating circuit and is used to generate an enabling signal.

Citation Information

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