Circuit board manufacturing method and circuit board

Abstract

A manufacturing method of a circuit board comprises the following steps: providing a first copper-clad plate; a middle circuit substrate is provided, the middle circuit substrate comprises a middle dielectric layer, a first middle circuit layer and a middle copper layer, the middle circuit substrate is divided into a press fit area and an extension area, the middle dielectric layer is located in the press fit area and the extension area, the first middle circuit layer is located in the press fit area, and the middle copper layer is located in the extension area; laminating the first copper-clad plate and the middle circuit substrate, wherein the middle copper layer is exposed on the first copper-clad plate; forming a first via hole to electrically connect the first copper-clad plate and the intermediate circuit substrate; and after the first via hole is formed, performing circuit manufacturing on the middle copper layer to form a second middle circuit layer. According to the manufacturing method of the circuit board provided by the embodiment of the invention, the circuit is manufactured after the step of manufacturing the via hole, so that the exposed area of the dielectric layer is reduced, and the influence on the dielectric layer in the step of manufacturing the via hole is reduced or avoided. The invention further provides a circuit board.

Description

Technical Field

[0001] The present application relates to the field of circuit boards, and in particular to a method for manufacturing a circuit board and a circuit board. Background Art

[0002] When circuit boards are used in the field of high-frequency transmission, LCP is usually used as the dielectric layer. LCP is a thermoplastic material that is tightly connected to the circuit layer after high-temperature lamination. Therefore, after lamination, it is difficult to open the cover using traditional laser cutting. If the cover is opened before lamination, the exposed dielectric layer needs to be shielded during the step of making the via hole to prevent the dielectric layer from generating a black shadow, and the shielding material is easy to contaminate the black shadow agent, and the above-mentioned production steps are complicated. Summary of the invention

[0003] A method for manufacturing a circuit board includes the following steps: providing a first copper-clad laminate; providing an intermediate circuit substrate, including an intermediate dielectric layer, a first intermediate circuit layer and an intermediate copper layer, wherein the intermediate circuit substrate is divided into a pressing area and an extension area, wherein the intermediate dielectric layer is located in the pressing area and the extension area, the first intermediate circuit layer is located in the pressing area, and the intermediate copper layer is located in the extension area; pressing the first copper-clad laminate and the intermediate circuit substrate, wherein the intermediate copper layer is exposed to the first copper-clad laminate; forming a first conductive hole to electrically connect the first copper-clad laminate and the intermediate circuit substrate; after forming the first conductive hole, performing circuit manufacturing on the intermediate copper layer to form a second intermediate circuit layer.

[0004] In some embodiments of the present application, the first copper-clad laminate includes a first dielectric layer, and the materials of the first dielectric layer and the intermediate dielectric layer are both liquid crystal polymers.

[0005] In some embodiments of the present application, the step of forming a first conductive hole includes: forming a first blind hole penetrating the first copper clad board, wherein the first intermediate circuit layer is exposed to the first blind hole; adsorbing a shadow agent on the surface of the first dielectric layer exposed to the first blind hole; and forming a first conductive hole in the first blind hole.

[0006] In some embodiments of the present application, the intermediate copper layer includes interconnected prefabricated circuits and circuit areas, the prefabricated circuits are located on a side close to the first intermediate circuit layer, there is a gap between the circuit area and the first intermediate circuit layer, and the width of the gap is greater than 0.1 mm.

[0007] In some embodiments of the present application, the first copper clad laminate includes a first copper layer; after forming the first via hole, the manufacturing method further includes: performing circuit manufacturing on the first copper layer to form a first circuit layer.

[0008] In some embodiments of the present application, the manufacturing method also includes: providing a second copper clad laminate; pressing the second copper clad laminate onto a surface of the intermediate circuit substrate facing away from the first copper clad laminate; forming a second conductive hole to electrically connect the second copper clad laminate and the intermediate circuit substrate; before the step of forming the second intermediate circuit layer, forming a second conductive hole to electrically connect the second copper clad laminate and the intermediate circuit substrate.

[0009] In some embodiments of the present application, the second copper clad laminate includes a second dielectric layer, and the material of the second dielectric layer is liquid crystal polymer.

[0010] In some embodiments of the present application, the second copper clad laminate further includes a second copper layer. After the steps of forming the first via hole and the second via hole, the manufacturing method further includes: performing circuit manufacturing on the second copper layer to form a second circuit layer.

[0011] A circuit board includes a first circuit substrate and an intermediate circuit substrate. The first circuit substrate includes a first dielectric layer and a first circuit layer located on the surface of the first dielectric layer; the intermediate circuit substrate includes an intermediate dielectric layer, a first intermediate circuit layer and a second intermediate circuit layer, the intermediate circuit substrate is divided into a pressing area and an extension area, the intermediate dielectric layer is located in the pressing area and the extension area, the first intermediate circuit layer is located in the pressing area, and the second intermediate circuit layer is located in the extension area. The first circuit substrate is located on the surface of the pressing area, and the extension area is exposed to the first circuit substrate; there is a gap between the first intermediate circuit layer and the second intermediate circuit layer, and part of the first dielectric layer overflows into the gap.

[0012] In some embodiments of the present application, the intermediate circuit substrate further includes a prefabricated circuit, which is located on the surface of the intermediate dielectric layer and between the first intermediate circuit layer and the second intermediate circuit layer, and the first dielectric layer also overflows to the surface of the prefabricated circuit.

[0013] In the method for manufacturing a circuit board provided in an embodiment of the present application, after the lamination step and before the step of manufacturing via holes (e.g., the first via hole, the second via hole, the second intermediate via hole), the copper layer (e.g., the intermediate copper layer, the first copper layer, the second copper layer) exposed on the outer surface is not subjected to circuit manufacturing to reduce the exposed area of ​​the dielectric layer (e.g., the first dielectric layer, the second dielectric layer), thereby reducing or avoiding the impact on the dielectric layer in the step of manufacturing the via holes. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic cross-sectional view of a first copper clad laminate provided in an embodiment of the present application.

[0015] Figure 2 A schematic cross-sectional view of a second copper clad laminate provided in an embodiment of the present application.

[0016] Figure 3A schematic top view of an intermediate circuit substrate provided in an embodiment of the present application.

[0017] Figure 4 for Figure 3 The schematic cross-sectional view of the intermediate circuit substrate along the AA direction is shown.

[0018] Figure 5 for Figure 3 The cross-sectional view of the intermediate circuit substrate along the BB direction is shown.

[0019] Figure 6 It is a cross-sectional schematic diagram along the AA direction after the first copper clad laminate, the intermediate circuit substrate and the second copper clad laminate are pressed together in this order.

[0020] Figure 7 For Figure 6 The cross-sectional schematic diagram along the AA direction after a first via hole is formed on the first copper clad laminate and a second via hole is formed on the second copper clad laminate is shown.

[0021] Figure 8 For Figure 6 The cross-sectional schematic diagram along the BB direction after a first via hole is formed on the first copper clad laminate and a second via hole is formed on the second copper clad laminate is shown.

[0022] Fig. 9 For Figure 7 The schematic cross-sectional view of a circuit board obtained by manufacturing circuits using the first copper clad laminate, the second copper clad laminate and the intermediate circuit substrate along the AA direction is shown.

[0023] Main component symbols

[0024]

[0025] DETAILED DESCRIPTION

[0026] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. In the following description, many specific details are set forth to facilitate a full understanding of the present application, and the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this article are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes all and any combination of one or more related listed items.

[0028] In the embodiments of the present application, for the convenience of description and not to limit the present application, the term "connection" used in the patent application specification and claims of the present application is not limited to physical or mechanical connection, whether direct or indirect. "Up", "down", "above", "below", "left", "right", etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship also changes accordingly.

[0029] See also Figures 1 to 9 The present invention provides a method for manufacturing a circuit board 100, which may include the following steps:

[0030] Step S1: Please refer to Figure 1 , providing a first copper clad laminate 11.

[0031] The first copper clad laminate 11 includes a first dielectric layer 112 and a first copper layer 114, and the first copper layer 114 is located on the surface of the first dielectric layer 112. The first copper clad laminate 11 can be a single-sided copper clad laminate or a double-sided copper clad laminate. In this embodiment, the first copper clad laminate 11 is a single-sided copper clad laminate.

[0032] In some embodiments, when the first copper clad laminate 11 is a double-sided copper clad laminate, the double-sided copper clad laminate includes a first dielectric layer 112 and a first copper layer 114 located on two opposite surfaces of the first dielectric layer 112. Before the subsequent pressing step, one of the first copper layers 114 can be firstly processed to form a circuit layer, and the side of the circuit layer formed is pressed inward.

[0033] Step S2: Please refer to Figure 2 , providing a second copper clad laminate 21.

[0034] The second copper clad laminate 21 includes a second dielectric layer 212 and a second copper layer 214, and the second copper layer 214 is located on the surface of the second dielectric layer 212. The second copper clad laminate 21 can be a single-sided copper clad laminate or a double-sided copper clad laminate. In this embodiment, the second copper clad laminate 21 is a single-sided copper clad laminate.

[0035] In some embodiments, when the second copper clad laminate 21 is a double-sided copper clad laminate, the double-sided copper clad laminate includes a second dielectric layer 212 and a second copper layer 214 located on two opposite surfaces of the second dielectric layer 212. Before the subsequent pressing step, one of the second copper layers 214 can be firstly processed to form a circuit layer, and the circuit layer is pressed inward on one side.

[0036] The first dielectric layer 112 and the second dielectric layer 212 are both made of liquid crystal polymer (LCP), which is a thermoplastic material.

[0037] Step S3: Please refer to Figures 3 to 5 , providing an intermediate circuit substrate 30, including an intermediate dielectric layer 31, a first intermediate circuit layer 33 and an intermediate copper layer 35, the intermediate circuit substrate 30 is divided into a pressing area I and an extension area II, the intermediate dielectric layer 31 is located in the pressing area I and the extension area II, the first intermediate circuit layer 33 is located in the pressing area I, and the intermediate copper layer 35 is located in the extension area II.

[0038] In this embodiment, the intermediate dielectric layer 31 is a single layer, and the first intermediate circuit layer 33 is located on two opposite surfaces of the intermediate dielectric layer 31. The intermediate circuit substrate 30 further includes a first intermediate conductive hole 37, which penetrates the intermediate dielectric layer 31 and conducts the first intermediate circuit layer 33 located on two opposite surfaces of the intermediate dielectric layer 31.

[0039] In other embodiments, the number of layers of the first intermediate circuit layer 33 may be greater than two, and the number of layers of the intermediate dielectric layer 31 may be increased accordingly. In some embodiments, the number of layers of the first intermediate circuit layer 33 may also be one.

[0040] The middle copper layer 35 is located on the outer surface of the middle circuit substrate 30. Figure 4 and Figure 5 In some embodiments, the intermediate copper layer 35 includes a prefabricated circuit 351 and a circuit area 3522. The prefabricated circuit 351 and the circuit area 3522 are connected to each other. The prefabricated circuit 351 is located on a side close to the first intermediate circuit layer 33. The prefabricated circuit 351 can be connected to the first intermediate circuit layer 33. The prefabricated circuit 351 is a pre-prepared circuit, and the circuit area 3522 is used for subsequent circuit manufacturing. There is a gap 40 between the circuit area 3522 and the first intermediate circuit layer 33 located on the same side of the intermediate dielectric layer 31. The width of the prefabricated circuit 351 and the gap 40 can be the same.

[0041] The material of the intermediate dielectric layer 31 is LCP.

[0042] Step S4: Please refer to Figure 6 , Figure 7 and Figure 8, the first copper clad laminate 11, the intermediate circuit substrate 30 and the second copper clad laminate 21 are pressed in order, the first copper clad laminate 11 and the second copper clad laminate 21 are pressed on the opposite surfaces of the pressing area I, and the intermediate copper layer 35 is exposed to the first copper clad laminate 11.

[0043] The first copper layer 114 and the second copper layer 214 are pressed together with the first dielectric layer 112 and the first dielectric layer 112 facing inward, and the first dielectric layer 112 and the second dielectric layer 212 are respectively filled in the gaps between the first intermediate circuit layers 33 and connected to the intermediate dielectric layer 31 exposed to the first intermediate circuit layer 33. LCP is a thermoplastic material, and after pressing together, the adjacent dielectric layers and circuit layers can be tightly combined.

[0044] In this embodiment, the length of the first copper clad laminate 11 is equal to the length of the lamination area I, the first copper clad laminate 11 is arranged corresponding to the lamination area I and covers the lamination area I, the extension area II protrudes from the first copper clad laminate 11, and the intermediate copper layer 35 located in the extension area II is exposed to the first copper clad laminate 11. The second copper clad laminate 21 is equal to the length of the intermediate circuit substrate 30, and covers the lamination area I and the extension area II. The first intermediate circuit layer 33 is located and connected to the first copper clad laminate 11 and the second copper clad laminate 21.

[0045] In other embodiments, the length of the second copper clad laminate 21 may also be less than the length of the intermediate circuit substrate 30, and after the two are pressed together, part of the surface of the intermediate circuit substrate 30 is exposed to the second copper clad laminate 21; the length of the second copper clad laminate 21 may also be greater than the length of the intermediate circuit substrate 30, and after the two are pressed together, part of the surface of the second copper clad laminate 21 is exposed to the intermediate circuit substrate 30. Among them, the exposed copper layer is not made into a circuit to minimize the exposed area of ​​the dielectric layer. In some embodiments, the second copper clad laminate 21 may also be omitted.

[0046] During the lamination process, since the dielectric layer will produce overflow glue, the overflow glue 1122 produced by the first dielectric layer 112 near the side of the extension area II can overflow into the gap 40 to prevent the overflow glue 1122 from overflowing to the surface of the circuit area 3522. The overflow glue 1122 overflowing to the circuit area 3522 will affect the subsequent circuit production, and it is necessary to increase the production cost to remove the overflow glue 1122 overflowing to the middle copper layer 35. Among them, the overflow glue 1122 can overflow to the surface of the prefabricated circuit 351. Since the prefabricated circuit 351 is a prefabricated circuit, the overflow glue 1122 will not affect the prefabricated circuit 351. In some embodiments, the width W of the gap 40 is greater than 0.1 mm to ensure that the overflow glue 1122 will not contact the circuit area 3522 as much as possible.

[0047] Step S5: Please refer again Figure 7 and Figure 8, forming a first conductive via 50 to electrically connect the first copper clad board 11 and the intermediate circuit substrate 30 , and forming a second conductive via 60 to electrically connect the second copper clad board 21 and the intermediate circuit substrate 30 .

[0048] The steps of forming the first conductive via 50 and the second conductive via 60 may include the following steps:

[0049] Step S51: A first blind hole 52 penetrating the first copper clad board 11 and a second blind hole 62 penetrating the second copper clad board 21 need to be formed respectively. The first blind hole 52 penetrates the first copper layer 114 and the first dielectric layer 112, and the first dielectric layer 112 and the first intermediate circuit layer 33 facing the first copper clad board 11 are exposed to the first blind hole 52; the second blind hole 62 penetrates the second copper layer 214 and the second dielectric layer 212, and the second dielectric layer 212 and the first intermediate circuit layer 33 facing the second copper clad board 21 are exposed to the second blind hole 62.

[0050] Step S52: adsorbing a black shadow agent on the surfaces of the first dielectric layer 112 exposed to the first blind hole 52 and the second dielectric layer 212 exposed to the second blind hole 62 to make the surfaces of the first dielectric layer 112 exposed to the first blind hole 52 and the second dielectric layer 212 exposed to the second blind hole 62 conductive.

[0051] Step S53 : electroplating to form a first via 50 in the first blind hole 52 to electrically connect the first copper clad board 11 and the intermediate circuit substrate 30 , and forming a second via 60 in the second blind hole 62 to electrically connect the second copper clad board 21 and the intermediate circuit substrate 30 .

[0052] In the step of absorbing the black shadow agent, the area of ​​the exposed dielectric layer is minimized to reduce the influence of the black shadow agent on the area of ​​the dielectric layer that does not need to be conductive. Among them, the first copper layer 114, the second copper layer 214 and the intermediate copper layer 35 are not made into circuits before the step of forming the first conductive hole 50 and the second conductive hole 60, which can effectively reduce the influence of the black shadow agent on the dielectric layer. In addition, the overflow glue 1122 shields the intermediate dielectric layer 31 partially exposed to the gap 40, which can reduce the exposed area of ​​the intermediate dielectric layer 31, which is conducive to further reducing the generation of black shadows.

[0053] The step of forming the first conductive via 50 and the second conductive via 60 may further include the step of forming a second intermediate conductive via 39 , wherein the second intermediate conductive via 39 conducts electricity between the intermediate copper layer 35 and the first intermediate circuit layer 33 on two opposite surfaces of the intermediate dielectric layer 31 .

[0054] Step S6: Please refer to Fig. 9 After forming the first conductive via 50 and the second conductive via 60 , the circuit area 3522 of the middle copper layer 35 is processed to form a second middle circuit layer 352 .

[0055] In the step of fabricating the circuit of the middle copper layer 35, the first copper layer 114 and the second copper layer 214 may also be fabricated to form the first circuit layer 13 and the second circuit layer 23, respectively. The first circuit layer 13 and the first dielectric layer 112 together form the first circuit substrate 10, and the second circuit layer 23 and the second dielectric layer 212 together form the second circuit substrate 20.

[0056] In other embodiments, before the lamination step, other circuit substrates may be arranged between the first copper clad laminate 11 and the intermediate circuit substrate 30 and / or between the second copper clad laminate 21 and the intermediate circuit substrate 30 according to actual requirements of the circuit layer.

[0057] See also Fig. 9 The embodiment of the present application further provides a circuit board 100 , which includes a first circuit substrate 10 , an intermediate circuit substrate 30 and a second circuit substrate 20 , wherein the intermediate circuit substrate 30 is located between the first circuit substrate 10 and the second circuit substrate 20 .

[0058] The first circuit substrate 10 includes a first dielectric layer 112 and a first circuit layer 13 located on the surface of the first dielectric layer 112 . The second circuit substrate 20 includes a second dielectric layer 212 and a second circuit layer 23 located on the surface of the second dielectric layer 212 .

[0059] The intermediate circuit substrate 30 includes an intermediate dielectric layer 31, a first intermediate circuit layer 33, and a second intermediate circuit layer 352; the intermediate circuit substrate 30 is divided into a pressing area I and an extension area II, the intermediate dielectric layer 31 is located in the pressing area I and the extension area II, the first intermediate circuit layer 33 is located in the pressing area I, and the second intermediate circuit layer 352 is located in the extension area II. The first circuit substrate 10 and the second circuit substrate 20 are pressed in the pressing area I, the first intermediate circuit layer 33 is pressed in the first circuit substrate 10 and the second circuit substrate 20; the second intermediate circuit layer 352 is exposed to the first circuit substrate 10.

[0060] There is a gap 40 between the first intermediate circuit layer 33 and the second intermediate circuit layer 352. The first dielectric layer 112 near the extension region II has overflow glue 1122 that overflows into the gap 40. In some embodiments, the width W of the gap 40 is greater than 0.1 mm.

[0061] Can be combined Figure 8 and Fig. 9 The intermediate circuit substrate 30 may further include a prefabricated circuit 351 , which is located on the surface of the intermediate dielectric layer 31 and between the first intermediate circuit layer 33 and the second intermediate circuit layer 352 , and the first dielectric layer 112 also overflows to the surface of the prefabricated circuit 351 .

[0062] The materials of the first dielectric layer 112 , the second dielectric layer 212 , and the intermediate dielectric layer 31 are all LCP.

[0063] In other embodiments, the second circuit substrate 20 may be omitted; or the length of the second circuit substrate 20 may be set as required, and may be equal to, less than, or greater than the length of the intermediate circuit substrate 30 .

[0064] In other embodiments, the number of circuit layers in the first circuit substrate 10 , the second circuit substrate 20 , and the intermediate circuit substrate 30 is not limited.

[0065] In the method for manufacturing the circuit board 100 provided in the embodiment of the present application, after the pressing step and before the step of manufacturing the via holes (e.g., the first via hole 50, the second via hole 60, and the second intermediate via hole 39), the copper layer (e.g., the intermediate copper layer 35, the first copper layer 114, and the second copper layer 214) exposed on the outer surface is not subjected to circuit manufacturing, so as to reduce the exposed area of ​​the dielectric layer (e.g., the first dielectric layer 112 and the second dielectric layer 212), thereby reducing or avoiding the impact on the dielectric layer in the step of manufacturing the via holes.

[0066] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that: The following steps are involved: Providing a first copper clad laminate; Providing an intermediate circuit substrate, comprising an intermediate dielectric layer, a first intermediate circuit layer and an intermediate copper layer, wherein the intermediate circuit substrate is divided into a pressing area and an extension area, the intermediate dielectric layer is located in the pressing area and the extension area, the first intermediate circuit layer is located in the pressing area, and the intermediate copper layer is located in the extension area; Laminating the first copper-clad laminate and the intermediate circuit substrate, wherein the intermediate copper layer is exposed to the first copper-clad laminate; forming a first via hole to electrically connect the first copper-clad laminate and the intermediate circuit substrate; as well as After forming the first via hole, the middle copper layer is subjected to circuit fabrication to form a second middle circuit layer.

2. The method for manufacturing a circuit board according to claim 1, characterized in that: The first copper-clad laminate includes a first dielectric layer, and the first dielectric layer and the intermediate dielectric layer are both made of liquid crystal polymer.

3. The method for manufacturing a circuit board according to claim 2, characterized in that: The step of forming the first conductive hole comprises: forming a first blind hole penetrating through the first copper-clad board, wherein the first intermediate circuit layer is exposed to the first blind hole; Adsorbing a shadow agent on a surface of the first dielectric layer exposed to the first blind hole; and The first via hole is formed in the first blind hole.

4. The method for manufacturing a circuit board according to claim 1, characterized in that: The intermediate copper layer includes interconnected prefabricated circuits and a circuit area. The prefabricated circuit is located on a side close to the first intermediate circuit layer. There is a gap between the circuit area and the first intermediate circuit layer. The width of the gap is greater than 0.1 mm.

5. The method for manufacturing a circuit board according to claim 1, characterized in that: The first copper-clad laminate includes a first copper layer; after forming the first via hole, the manufacturing method further includes: performing circuit manufacturing on the first copper layer to form a first circuit layer.

6. The method for manufacturing a circuit board according to any one of claims 1 to 5, characterized in that: The production method further comprises: providing a second copper clad laminate; Pressing the second copper-clad laminate onto the surface of the intermediate circuit substrate facing away from the first copper-clad laminate; forming a second via hole to electrically connect the second copper-clad laminate and the intermediate circuit substrate; and Before the step of forming the second intermediate circuit layer, a second via hole is formed to electrically connect the second copper-clad board and the intermediate circuit substrate.

7. The method for manufacturing a circuit board according to claim 6, characterized in that: The second copper-clad laminate includes a second dielectric layer, and the material of the second dielectric layer is liquid crystal polymer.

8. The method for manufacturing a circuit board according to claim 6, characterized in that: The second copper-clad laminate further includes a second copper layer. After the steps of forming the first conductive hole and the second conductive hole, the manufacturing method further includes: performing circuit manufacturing on the second copper layer to form a second circuit layer.

9. A circuit board, characterized in that: include: A first circuit substrate, comprising a first dielectric layer and a first circuit layer located on a surface of the first dielectric layer; as well as An intermediate circuit substrate, comprising an intermediate dielectric layer, a first intermediate circuit layer and a second intermediate circuit layer, wherein the intermediate circuit substrate is divided into a pressing area and an extension area, the intermediate dielectric layer is located in the pressing area and the extension area, the first intermediate circuit layer is located in the pressing area, and the second intermediate circuit layer is located in the extension area; Wherein, the first circuit substrate is located on the surface of the pressing area, and the extension area is exposed to the first circuit substrate; There is a gap between the first intermediate circuit layer and the second intermediate circuit layer, and a portion of the first dielectric layer overflows into the gap.

10. The circuit board according to claim 9, characterized in that: The intermediate circuit substrate further includes a prefabricated circuit, which is located on the surface of the intermediate dielectric layer and between the first intermediate circuit layer and the second intermediate circuit layer. The first dielectric layer also overflows onto the surface of the prefabricated circuit.

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