Manufacturing method of circuit board assembly and circuit board assembly

Abstract

A manufacturing method of a circuit board assembly comprises the steps that a first substrate is provided and comprises a dielectric layer and a first copper layer located on the surface of the dielectric layer; etching the first copper layer to form a plurality of first blind holes, wherein the first copper layer which is not etched forms a first circuit layer; etching the first circuit layer to form a plurality of second blind holes, wherein a second blind hole is formed between every two adjacent first blind holes; and filling conductive paste in the first blind hole, mounting an IC chip on the first circuit layer, and connecting the first circuit layer and the IC chip after the conductive paste is cured. The invention further provides a circuit board assembly.

Description

Technical Field

[0001] The present application relates to the field of IC chip connection, and in particular to a method for manufacturing a circuit board assembly and a circuit board assembly. Background Art

[0002] IC chips need to be electrically connected to the circuit board through multiple pads in a limited space. When connecting by vias, bubbles are likely to appear in the vias, resulting in reduced connection reliability; connecting by pads to vias occupies a large area. Summary of the invention

[0003] A method for manufacturing a circuit board assembly comprises: providing a first substrate, comprising a dielectric layer and a first copper layer located on the surface of the dielectric layer; etching the first copper layer to form a plurality of first blind holes, and the unetched first copper layer forms a first circuit layer; etching the first circuit layer to form a plurality of second blind holes, and forming a second blind hole between two adjacent first blind holes; filling the first blind holes with conductive paste, and mounting an IC chip on the first circuit layer, and connecting the first circuit layer and the IC chip after the conductive paste is cured.

[0004] In some embodiments of the present application, the first substrate also includes a second copper layer, and the second copper layer is located on the surface of the dielectric layer away from the first copper layer; after the step of mounting the IC chip, the manufacturing method also includes: etching the second copper layer and the dielectric layer to form a third blind hole connected to the second blind hole, and the unetched second copper layer forms a second circuit layer; and forming a conductive layer on the inner walls of the second blind hole and the third blind hole, and the conductive layer connects the first circuit layer and the second circuit layer.

[0005] In some embodiments of the present application, each interconnected second blind hole is connected to the third blind hole to form a receiving cavity; the manufacturing method also includes: filling the receiving cavity with coolant; covering the second substrate on the surface of the second circuit layer to seal the coolant in the receiving cavity.

[0006] In some embodiments of the present application, the material of the conductive layer is copper or tin.

[0007] In some embodiments of the present application, the cross-section of the first blind hole is trapezoidal, and the cross-section of the conductive paste filled in the first blind hole is trapezoidal.

[0008] A circuit board assembly includes a circuit substrate, a conductive paste and an IC chip. The circuit substrate includes a dielectric layer and a first circuit layer. The first circuit layer is provided with a plurality of first blind holes and a plurality of second blind holes, and a second blind hole is provided between two adjacent first blind holes. The conductive paste is filled in the first blind holes. The IC chip is located on the surface of the first circuit layer and connected to the conductive paste.

[0009] In some embodiments of the present application, the circuit substrate also includes a second circuit layer and a conductive layer; the second circuit layer is located on the surface of the dielectric layer away from the first circuit layer; the first circuit substrate is also provided with a plurality of third blind holes, the third blind holes are connected to the second blind holes, and each interconnected second blind hole is connected to the third blind hole to form a receiving cavity; the conductive layer is located on the inner wall of the receiving cavity and connects the first circuit layer and the second circuit layer.

[0010] In some embodiments of the present application, the circuit board assembly further includes a coolant and a second substrate. The coolant is filled in the receiving cavity. The second substrate is located on a surface of the circuit substrate away from the IC chip to seal the coolant in the receiving cavity.

[0011] In some embodiments of the present application, the material of the conductive layer is copper or tin.

[0012] In some embodiments of the present application, the cross-section of the first blind hole is trapezoidal, and the cross-section of the conductive paste filled in the first blind hole is trapezoidal.

[0013] The manufacturing method of the circuit board assembly provided in the embodiment of the present application can reduce or avoid the bubbles generated by the conductive paste in the narrow space in the related art by filling the conductive paste in the first blind hole to connect the IC chip and the circuit substrate, and conduct the circuit layer of the circuit substrate through the conductive layer, and it is not necessary to use a steel plate to shape the conductive paste, and the step of filling the glue layer in the related art is omitted. The circuit board assembly manufactured by the above manufacturing method omits the glue layer, that is, the thickness of the glue layer is omitted, which is conducive to reducing the thickness of the circuit board assembly; and the solder pads of the circuit board assembly in the embodiment of the present application are more compact, which is conducive to increasing the number of solder pads in a limited space. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A cross-sectional schematic diagram of a circuit board assembly provided in the related art of this application.

[0015] Figure 2 A top view schematic diagram of a pad connecting a via provided by another related technology of the present application.

[0016] Figure 3 A schematic cross-sectional view of the first substrate provided in an embodiment of the present application.

[0017] Figure 4 For etching Figure 3 The cross-sectional schematic diagram shown is after the first copper layer forms the first blind hole and the first circuit layer.

[0018] Figure 5 For Figure 4 The cross-sectional schematic diagram after the second blind hole is formed on the first circuit layer is shown.

[0019] Figure 6 For Figure 5 The cross-sectional schematic diagram is shown after the first blind hole is filled with conductive paste and the IC chip is mounted on the first circuit layer.

[0020] Figure 7 For curing Figure 6 Schematic cross-sectional view of the conductive paste shown.

[0021] Figure 8 For etching Figure 7 A cross-sectional schematic diagram of a second copper layer and a dielectric layer formed to form a third blind hole connected to the second blind hole, and a conductive layer formed on the inner walls of the second blind hole and the third blind hole.

[0022] Fig. 9 For Figure 8 The schematic cross-sectional view of the circuit board assembly shown is obtained after the second blind hole and the third blind hole are filled with coolant and sealed with the second substrate.

[0023] Main component symbols

[0024]

[0025] DETAILED DESCRIPTION

[0026] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. In the following description, many specific details are set forth to facilitate a full understanding of the present application, and the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this article are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes all and any combination of one or more related listed items.

[0028] In the various embodiments of the present application, for the convenience of description rather than limitation of the present application, the term "connection" used in the patent application specification and claims of the present application is not limited to physical or mechanical connection, whether direct or indirect.

[0029] See also Figure 1The related technology of the present application provides a circuit board assembly 100', including a circuit substrate 20', a conductive paste 30' and an IC chip 40', wherein the conductive paste 30' connects the circuit substrate 20' and the IC chip 40', and the conductive paste 30' is connected to the circuit layer in the circuit substrate 20' through a via (not shown). Since the conductive paste 30' occupies a small area in the via, during the welding process, the conductive paste 30' is prone to generate bubbles 35' in a small space; and during the welding process, a steel plate is required to shape the conductive paste 30'; furthermore, after connecting the IC chip 40', a glue layer 80' needs to be filled between the IC chip 40' and the circuit substrate 20', so that the glue layer 80' connects the IC chip 40' and the circuit substrate 20'.

[0030] See also Figure 2 Another related technology of the present application adopts the method of connecting the IC chip (not shown) and the circuit substrate 20" by connecting the welding pad 82" to the via 83", wherein the welding pad 82" is used to connect the IC chip, and the via 83" is used to connect the circuit layers of different layers in the circuit substrate 20". This connection method occupies a large area.

[0031] See also Figures 3 to 9 The present application embodiment provides a method for manufacturing a circuit board assembly 100 to improve the above connection method. The manufacturing method may include the following steps:

[0032] Step S1: Please refer to Figure 3 , providing a first substrate 10 , the first substrate 10 includes a dielectric layer 11 and a first copper layer 13 and a second copper layer 15 located on two opposite surfaces of the dielectric layer 11 .

[0033] In this embodiment, the first substrate 10 is a double-sided copper-clad laminate. In other embodiments, the first substrate 10 may also be a double-sided copper-clad laminate, or may be a substrate including at least one circuit layer.

[0034] Step S2: Please refer to Figure 4 , the first copper layer 13 is etched to form a plurality of first blind holes 134 , and the unetched first copper layer 13 forms a first circuit layer 132 .

[0035] The plurality of first blind holes 134 may be formed by laser etching, and the plurality of first blind holes 134 are arranged in an array. The cross section of the first blind holes 134 formed by laser etching may be trapezoidal, and each first blind hole 134 has a larger opening at one end away from the dielectric layer 11 and a smaller opening at the end close to the dielectric layer 11.

[0036] The dielectric layer 11 is exposed to the first blind hole 134 .

[0037] Step S3: Please refer to Figure 5 , etching the first circuit layer 132 to form a plurality of second blind holes 136 .

[0038] A second blind hole 136 is formed between two adjacent first blind holes 134, and a plurality of second blind holes 136 are arranged in an array to facilitate subsequent formation of a plurality of mutually independent solder pads 32 (see Figure 7 ).

[0039] Step S4: Please refer to Figure 6 and Figure 7 , the conductive paste 30 is filled in the first blind hole 134 , and an IC (integrated circuit) chip 40 is mounted on the first circuit layer 132 . After the conductive paste 30 is cured, the first circuit layer 132 and the IC chip 40 are connected.

[0040] The IC chip 40 needs to be connected to the first circuit layer 132 through a plurality of pads 32. The IC chip 40 can be packaged in a BGA package, a CSP package, or the like.

[0041] When the conductive paste 30 is in a molten state, each first blind hole 134 has a limiting effect on the liquid conductive paste 30, and there is no need to use a steel plate in the related art to limit the conductive paste 30', nor is there a need to set a glue layer 80' to fix the conductive paste 30'. In addition, the conductive paste 30 is filled in the first circuit layer 132, and no additional thickness is required for setting the conductive paste 30, which is conducive to reducing the overall thickness of the circuit board assembly 100; furthermore, the conductive paste 30 is filled in the first blind hole 134 opened in the first circuit layer 132, which is conducive to ensuring the coplanarity of the conductive paste 30.

[0042] When the cross-section of the first blind hole 134 is a trapezoid, the cross-section of the conductive paste 30 after curing is also a trapezoid, forming a complementary structure with the first circuit layer 132, wherein the size of the end of the conductive paste 30 close to the IC chip 40 is large, and the connection area with the IC chip 40 is large, which is beneficial to reducing the distance between two adjacent welding pads 32, thereby facilitating increasing the number of welding pads 32 within a limited area.

[0043] Step S5: Please refer to Figure 8 , the second copper layer 15 and the dielectric layer 11 are etched to form a third blind hole 17 connected to the second blind hole 136 , and the unetched second copper layer 15 forms a second circuit layer 152 .

[0044] Each interconnected second blind hole 136 is connected to the third blind hole 17 to form a receiving cavity 18. The dielectric layer 11, the first circuit layer 132 and the second circuit layer 152 together form a circuit substrate 20.

[0045] In this embodiment, the steps of forming the third blind hole 17 and the second blind hole 136 are formed in two steps; in other embodiments, the second blind hole 136 and the third blind hole 17 can also be formed in the same step. The two steps are separated, and the depth of each blind hole is relatively small, which is conducive to ensuring that each blind hole is etched.

[0046] In other embodiments, when the first substrate 10 is a single-sided copper-clad board or a substrate including a circuit layer, the step of etching the second copper layer 15 and subsequent processes can be adaptively adjusted.

[0047] Step S6: Please refer again Figure 8 A conducting layer 50 is formed on the inner walls of the second blind hole 136 and the third blind hole 17 , and the conducting layer 50 connects the first circuit layer 132 and the second circuit layer 152 .

[0048] The conductive layer 50 may be formed in the same step, or part of the conductive layer 50 may be formed on the inner wall of the second blind hole 136 after the second blind hole 136 is formed, and the remaining part of the conductive layer 50 may be formed on the inner wall of the third blind hole 17 after the third blind hole 17 is formed.

[0049] In some embodiments, the manufacturing method further includes step S7: see Fig. 9 , the receiving cavity 18 is filled with a coolant 60, and the surface of the circuit substrate 20 facing away from the IC chip 40 is covered with a second substrate 70, and the coolant 60 is sealed in the receiving cavity 18 to obtain another circuit board assembly 100a.

[0050] The material of the coolant 60 can be an insulating material or a conductive material. When the material of the coolant 60 is a conductive material, an insulating layer needs to be provided on the inner wall of the receiving cavity 18 to prevent short circuit. In this embodiment, the insulating material is used for cooling the heat. The coolant 60 is directly connected to the IC chip 40, and the heat generated by the IC chip 40 can be quickly transferred out.

[0051] The second substrate 70 may be an insulating layer or a substrate including a circuit layer.

[0052] Please refer again Figure 8 The embodiment of the present application further provides a circuit board assembly 100 , which may include a circuit substrate 20 , a conductive paste 30 , and an IC chip 40 , wherein the conductive paste 30 electrically connects the circuit substrate 20 and the IC chip 40 .

[0053] The circuit substrate 20 may include a dielectric layer 11 and a first circuit layer 132 and a second circuit layer 152 located on opposite surfaces of the dielectric layer 11. In other embodiments, the number of circuit layers is not limited and may be one or more layers, and the number of dielectric layers 11 may also be changed accordingly.

[0054] The first circuit layer 132 is provided with a plurality of first blind holes 134 and a plurality of second blind holes 136, the first blind holes 134 are filled with conductive paste 30, and the IC chip 40 is located on the surface of the first circuit layer 132 away from the second circuit layer 152. There is a second blind hole 136 between two adjacent first blind holes 134, so that the first circuit layer 132 filled with conductive paste 30 forms a plurality of mutually independent pads 32 to connect the IC chip 40. Each pad 32 is composed of the first circuit layer 132 and the conductive paste 30 filled in the first circuit layer 132, and is mutually conductively connected by the conductive layer 50 surrounding each pad 32 extending toward the second circuit layer 152 and connected to the second circuit layer 152.

[0055] The cross section of the first blind hole 134 is trapezoidal, the cross section of the conductive paste 30 filled in the first blind hole 134 is trapezoidal, and the first circuit layer 132 and the conductive paste 30 are complementary structures.

[0056] A plurality of third blind holes 17 may be provided on the circuit substrate 20, each of which penetrates the second circuit layer 152 and the dielectric layer 11, and each of which is connected to the second blind hole 136 to form a receiving cavity 18. The circuit substrate 20 may further include a conductive layer 50, which is located on the inner wall of the receiving cavity 18 and connected to the first circuit layer 132 and the second circuit layer 152.

[0057] The material of the conducting layer 50 can be copper, tin, etc.

[0058] Please refer again Fig. 9 In other embodiments, the circuit board assembly 100a may further include a coolant 60 and a second substrate 70, wherein the coolant 60 is filled in the receiving cavity 18, and the second substrate 70 covers the surface of the circuit substrate 20 away from the IC chip 40 to seal the coolant 60 in the receiving cavity 18.

[0059] The manufacturing method of the circuit board assembly 100 (or 100a) provided in the embodiment of the present application can reduce or avoid the bubbles 35' generated by the conductive paste 30' in the narrow space in the related art by filling the conductive paste 30 in the first blind hole 134 to connect the IC chip 40 and the circuit substrate 20, and conduct the circuit layer of the circuit substrate 20 through the conductive layer 50, and it is not necessary to use a steel plate to shape the conductive paste 30', and the step of filling the glue layer 80' in the related art is omitted. The circuit board assembly 100 (or 100a) manufactured by the above manufacturing method omits the glue layer 80', that is, the thickness of the glue layer 80' is omitted, which is conducive to reducing the thickness of the circuit board assembly 100 (or 100a); and the solder pads 32 of the circuit board assembly 100 (or 100a) in the embodiment of the present application are more compact, which is conducive to increasing the number of solder pads 32 in a limited space.

[0060] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for manufacturing a circuit board assembly, characterized in that: include: Providing a first substrate, comprising a dielectric layer and a first copper layer located on a surface of the dielectric layer; Etching the first copper layer to form a plurality of first blind holes, and the first copper layer that has not been etched forms a first circuit layer; Etching the first circuit layer to form a plurality of second blind holes, wherein one second blind hole is formed between two adjacent first blind holes; as well as The first blind hole is filled with conductive paste, and an IC chip is mounted on the first circuit layer. After the conductive paste is cured, the first circuit layer and the IC chip are connected.

2. The method for manufacturing a circuit board assembly according to claim 1, characterized in that: The first substrate further includes a second copper layer, and the second copper layer is located on a surface of the dielectric layer away from the first copper layer; After the step of mounting the IC chip, the manufacturing method further comprises: Etching the second copper layer and the dielectric layer to form a third blind hole connected to the second blind hole, and the unetched second copper layer forms a second circuit layer; as well as A conducting layer is formed on the inner walls of the second blind hole and the third blind hole, and the conducting layer connects the first circuit layer and the second circuit layer.

3. The method for manufacturing a circuit board assembly according to claim 2, characterized in that: Each of the second blind holes that are interconnected is connected to the third blind hole to form a receiving cavity; the manufacturing method further includes: Filling the receiving cavity with cooling liquid; and The second substrate is covered on the surface of the second circuit layer to seal the cooling liquid in the receiving cavity.

4. The method for manufacturing a circuit board assembly according to claim 2, characterized in that: The material of the conducting layer is copper or tin.

5. The method for manufacturing a circuit board assembly according to any one of claims 1 to 4, characterized in that: The cross section of the first blind hole is trapezoidal, and the cross section of the conductive paste filled in the first blind hole is trapezoidal.

6. A circuit board assembly, characterized in that: include: A circuit substrate comprises a dielectric layer and a first circuit layer, wherein the first circuit layer is provided with a plurality of first blind holes and a plurality of second blind holes, and a second blind hole is provided between two adjacent first blind holes; Conductive paste, filled in the first blind hole; as well as The IC chip is located on the surface of the first circuit layer and connected to the conductive paste.

7. The circuit board assembly according to claim 6, characterized in that: The circuit substrate also includes a second circuit layer and a conductive layer; the second circuit layer is located on the surface of the dielectric layer away from the first circuit layer; the first circuit substrate is also provided with a plurality of third blind holes, the third blind holes are connected to the second blind holes, and each of the interconnected second blind holes is connected to the third blind holes to form a receiving cavity; the conductive layer is located on the inner wall of the receiving cavity and connects the first circuit layer and the second circuit layer.

8. The circuit board assembly according to claim 7, characterized in that: The circuit board assembly also includes a cooling liquid and a second substrate. The cooling liquid is filled in the receiving cavity. The second substrate is located on the surface of the circuit substrate away from the IC chip to seal the cooling liquid in the receiving cavity.

9. The circuit board assembly according to claim 7, characterized in that: The material of the conducting layer is copper or tin.

10. The circuit board assembly according to any one of claims 6 to 9, characterized in that: The cross section of the first blind hole is trapezoidal, and the cross section of the conductive paste filled in the first blind hole is trapezoidal.

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