Solar cell, preparation method thereof and photovoltaic module

Abstract

The invention relates to a solar cell, a preparation method thereof and a photovoltaic module. The solar cell comprises a semiconductor substrate which is provided with a first surface and a second surface which are opposite to each other, the first surface is provided with a first doped region and a second doped region which are arranged in a staggered mode, the second doped region comprises a contact region and isolation regions located on the two sides of the contact region, and the isolation regions are connected with the first doped region; the first doped layer is positioned in the first doped region; the first isolation layer is located in the isolation region; the second doping layer at least covers the contact region and one side, deviating from the semiconductor substrate, of the first isolation layer; the conduction type of the second doping layer is opposite to that of the first doping layer; and a first electrode and a second electrode, the first electrode being in electrical contact with the first doped layer, and the second electrode being in electrical contact with the second doped layer located in the contact region. The isolation effect can be improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art

[0002] The tunnel oxide passivated back contact cell is a new type of solar cell structure formed by combining the tunnel oxide passivated contact cell structure with the interdigitated back contact cell structure. The backlight side of this cell has two doping regions with different conductivity types at the same time. In order to prevent leakage caused by contact between different doping regions, isolation grooves are usually formed between different doping regions or isolation film layers are deposited for isolation. However, the current isolation method has poor isolation effect. Summary of the invention

[0003] Based on this, the present application provides a solar cell and a preparation method thereof, and a photovoltaic module for improving the isolation effect.

[0004] In a first aspect, the present application provides a solar cell, comprising:

[0005] A semiconductor substrate, wherein the semiconductor substrate has a first surface and a second surface opposite to each other, the first surface has first doped regions and second doped regions arranged alternately, the second doped regions include a contact region and isolation regions located on both sides of the contact region, and the isolation regions are connected to the first doped regions;

[0006] a first doping layer located in the first doping region;

[0007] a first isolation layer located in the isolation area;

[0008] a second doped layer, the second doped layer at least covering the contact region and a side of the first isolation layer away from the semiconductor substrate; the second doped layer has a conductivity type opposite to that of the first doped layer;

[0009] and a first electrode and a second electrode, wherein the first electrode is in electrical contact with the first doped layer, and the second electrode is in electrical contact with the second doped layer located in the contact region.

[0010] In one embodiment, a dimension of the first isolation layer along a thickness direction of the semiconductor substrate is 0.5 mm to 2 mm.

[0011] In one embodiment, the solar cell further includes a second isolation layer, which is located between the first doping layer and the second doping layer. Along the thickness direction of the semiconductor substrate, the size of the second isolation layer is the same as that of the first doping layer.

[0012] In one embodiment, along the direction in which the first doping regions and the second doping regions are alternately arranged, the size of the second isolation layer is 0.5 mm to 1.5 mm.

[0013] In one of the embodiments, the solar cell further comprises a first interface passivation layer and a second interface passivation layer at least located in the second doping region;

[0014] The first interface passivation layer is located between the semiconductor substrate and the first doped layer;

[0015] In the isolation region, the second interface passivation layer is located between the second doping layer and the first isolation layer; in the contact region, the second interface passivation layer is located between the second doping layer and the semiconductor substrate.

[0016] In a second aspect, the present application also provides a method for preparing a solar cell, comprising:

[0017] A semiconductor substrate is provided, wherein the semiconductor substrate has a first surface and a second surface opposite to each other, wherein the first surface has first doped regions and second doped regions arranged alternately, wherein the second doped regions include contact regions and isolation regions located on both sides of the contact regions, and the isolation regions are connected to the first doped regions;

[0018] forming a first doping layer in the first doping region;

[0019] forming a first isolation layer in the isolation region;

[0020] forming a second doped layer at least on the contact region and the first isolation layer on a side facing away from the semiconductor substrate, wherein the conductivity type of the second doped layer is opposite to that of the first doped layer;

[0021] A first electrode electrically contacting the first doped layer and a second electrode electrically contacting the second doped layer located in the contact region are formed.

[0022] In one embodiment, forming a first isolation layer in the isolation region includes:

[0023] forming an isolation film layer in the second doping region by an oxidation process;

[0024] The isolation film layer located in the contact region is removed, so that the isolation film layer located in the isolation region forms a first isolation layer.

[0025] In one embodiment, forming the isolation film layer in the second doping region by an oxidation process further comprises:

[0026] A second isolation layer is formed on a side where the first doped layer is connected to the isolation region by an oxidation process.

[0027] In one embodiment, the oxidation process is wet oxidation.

[0028] In one embodiment, before forming the first doping layer in the first doping region, the method for preparing a solar cell further includes:

[0029] forming a first interface passivation layer in the first doped region;

[0030] After forming the first isolation layer in the isolation region and before forming the second doping layer at least on the contact region and on the side of the first isolation layer facing away from the semiconductor substrate, the method for preparing a solar cell further includes:

[0031] A second interface passivation layer is formed at least on a surface of the first isolation layer facing away from the semiconductor substrate and a surface of the semiconductor substrate located in the contact region.

[0032] In a third aspect, the present application further provides a photovoltaic assembly, comprising the solar cell described in any one of the above embodiments.

[0033] The solar cell and its preparation method, and photovoltaic module are divided into a contact region and an isolation region, and the isolation region is located on both sides of the contact region, so that the second doping region can contact the first doping region through the isolation region. The isolation region has a first isolation layer located between the first surface of the semiconductor substrate and the second doping layer, which can block the diffusion of doping atoms in the second doping layer into the interior of the semiconductor substrate in the isolation region as much as possible, so that the internal diffusion of doping atoms in the second doping layer basically occurs in the contact region that is not in contact with the first doping region, thereby achieving effective isolation of the internal diffusion of the first doping region and the second doping region, and reducing the occurrence of leakage of the solar cell as much as possible. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG. 1 is a schematic diagram of the structure of a solar cell provided in an embodiment of the present application.

[0035] FIG. 2 is another schematic diagram of the structure of a solar cell provided in an embodiment of the present application.

[0036] FIG. 3 is a flow chart of a method for preparing a solar cell provided in an embodiment of the present application.

[0037] 4 to 10 are schematic diagrams of various stages of the method for preparing a solar cell provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0039] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0040] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0041] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0042] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0043] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0044] Tunneling Oxide passivated interdigitated back contact (TBC) cell, referred to as TBC cell, is a new type of solar cell structure formed by combining Tunneling Oxide Passivated Contact (TOPCon) cell structure with Interdigitated back contact (IBC) cell structure. This type of cell has both P-type doped region and N-type doped region on the back.

[0045] In order to prevent the P-type doped region and the N-type doped region from contacting and causing leakage, an isolation trench of a certain depth is usually formed between the P-type doped region and the N-type doped region, or an isolation film layer is deposited for isolation. Although this isolation method has a certain isolation effect on P-type doped polysilicon and N-type doped polysilicon, it has a poor isolation effect on the inner diffusion layer of the P-type doped region and the N-type doped region.

[0046] Fig. 1 is a schematic diagram of a structure of a solar cell provided in an embodiment of the present application. Fig. 2 is a schematic diagram of another structure of a solar cell provided in an embodiment of the present application.

[0047] As shown in Figures 1 and 2, an embodiment of the present application provides a solar cell, including: a semiconductor substrate 10, the semiconductor substrate 10 has a first surface and a second surface relative to each other, the first surface has first doping regions 11 and second doping regions 12 arranged alternately, the second doping region 12 includes a contact region 122 and an isolation region 121 located on both sides of the contact region 122, the isolation region 121 is connected to the first doping region 11; a first doping layer 211 located in the first doping region 11; a first isolation layer 31 located in the isolation region 121; a second doping layer 222, the second doping layer 222 at least covers a side of the contact region 122 and the first isolation layer 31 away from the semiconductor substrate 10; the second doping layer 222 is opposite to the first doping layer 211 in conductivity type; and a first electrode 80 and a second electrode 90, the first electrode 80 is in electrical contact with the first doping layer 211, and the second electrode 90 is in electrical contact with the second doping layer 222 located in the contact region 122.

[0048] It can be known from the composition structure of the above-mentioned solar cell that, as shown in FIG1 and FIG2, the first surface of the semiconductor substrate 10 has a staggered first doping region 11 and a second doping region 12, and the first doping layer 211 located in the first doping region 11 and the second doping layer 222 located in the second doping region 12 have opposite conductivity types. Furthermore, the first doping layer 211 and the second doping layer 222 are doped with doping atoms of opposite conductivity types, respectively. In the solar cell, some of the doping atoms in the first doping layer 211 and the second doping layer 222 will diffuse into the interior of the semiconductor substrate 10, forming an inner diffusion layer near the first surface of the semiconductor substrate 10. If the doping atoms of opposite conductivity types diffused into the interior of the semiconductor substrate 10 contact each other, it is equivalent to the first doping region 11 and the second doping region 12 contacting each other, which will also cause leakage.

[0049] Based on this, as shown in Figures 1 and 2, the embodiment of the present application divides the second doping region 12 into a contact region 122 and an isolation region 121, wherein the isolation region 121 is located on both sides of the contact region 122, so that the second doping region 12 can contact the first doping region 11 through the isolation region 121; the isolation region 121 has a first isolation layer 31, and the first isolation layer 31 is located between the first surface of the semiconductor substrate 10 and the second doping layer 222, which can block the doping atoms in the second doping layer 222 from diffusing into the interior of the semiconductor substrate 10 in the isolation region 121 as much as possible. It can be seen that the embodiment of the present application can use the first isolation layer 31 to block the internal diffusion of doping atoms in the second doping layer 222 in the isolation region 121 in contact with the first doping region 11 as much as possible, so that the internal diffusion of doping atoms in the second doping layer 222 basically occurs in the contact region 122 that is not in contact with the first doping region 11, and the doping atoms diffused from the first doping region 11 and the second doping region 12 to the inside of the semiconductor substrate 10 will hardly come into contact, thereby achieving effective isolation of the internal diffusion of the first doping region 11 and the second doping region 12, minimizing the occurrence of leakage in the solar cell and improving the electrical stability of the solar cell.

[0050] Exemplarily, the first surface of the semiconductor substrate 10 is the light-facing surface, and the second surface is the backlight surface. At this time, the first electrode 80 and the second electrode 90 are both located on the backlight surface of the solar cell, so that the light-facing surface of the solar cell is not blocked by the electrodes. Further, as shown in Figures 1 and 2, the first surface of the semiconductor substrate 10 has a velvet structure, and the second surface is a polished surface.

[0051] For example, the material of the semiconductor substrate 10 may be silicon (Si) or germanium (Ge) or a semiconductor material such as gallium arsenide (GaAs). In terms of conductivity type, the semiconductor substrate 10 may be an n-type semiconductor substrate or a p-type semiconductor substrate.

[0052] For example, the semiconductor substrate 10 may be an n-type silicon substrate.

[0053] Exemplarily, both the first doping layer 211 and the second doping layer 222 are semiconductor doping layers. In terms of the internal arrangement of the material, the first doping layer 211 and the second doping layer 222 may be amorphous, microcrystalline, single crystal, nanocrystalline or polycrystalline. In terms of specific materials, the materials of the first doping layer 211 and the second doping layer 222 may be silicon (Si), germanium (Ge), silicon carbide (SiCx) or gallium arsenide (GaAs). In terms of conductivity type, the first doping layer 211 and the second doping layer 222 may be n-type doping layers or p-type doping layers; for example, the first doping layer 211 may be an n-type doping layer, and the second doping layer 222 may be a p-type doping layer, or the first doping layer 211 may be a p-type doping layer, and the second doping layer 222 may be an n-type doping layer.

[0054] For example, the first doping layer 211 may be an n-type doped polysilicon layer, and the second doping layer 222 may be a p-type doped polysilicon layer; or the first doping layer 211 may be a p-type doped polysilicon layer, and the second doping layer 222 may be an n-type doped polysilicon layer.

[0055] In some examples, the material of the first isolation layer 31 may include any one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, and amorphous silicon.

[0056] Exemplarily, the material of the first isolation layer 31 may be silicon oxide.

[0057] In some examples, the size of the first isolation layer 31 along the thickness direction of the semiconductor substrate 10 can be 0.5 mm to 2 mm. Within this size range, the first isolation layer 31 can fully block the diffusion of doping atoms in the second doping layer 222 into the interior of the semiconductor substrate 10 in the isolation region 121, and effectively isolate the diffusion of the first doping layer 211 and the second doping layer 222, thereby minimizing the occurrence of leakage and further improving the electrical stability of the solar cell. If the size of the first isolation layer 31 in the thickness direction of the semiconductor substrate 10 is too small, the isolation effect of the first isolation layer 31 on the internal diffusion of the first doping layer 211 and the second doping layer 222 is poor, which may cause leakage.

[0058] Illustratively, the dimension of the first isolation layer 31 along the thickness direction of the semiconductor substrate 10 may be 0.5 mm, 0.7 mm, 1 mm, 1.3 mm, 1.5 mm, 1.7 mm or 2 mm, etc., which are merely examples and are not specifically limited.

[0059] As a possible implementation, as shown in Figures 1 and 2, the solar cell also includes a second isolation layer 32, which is located between the first doping layer 211 and the second doping layer 222. Along the thickness direction of the semiconductor substrate 10, the size of the second isolation layer 32 is the same as the size of the first doping layer 211.

[0060] Based on this, as shown in Figures 1 and 2, the second isolation layer 32 can block the direct contact between the first doping layer 211 and the second doping layer 222, and the size of the second isolation layer 32 in the thickness direction of the semiconductor substrate 10 is the same as the size of the first doping layer 211 in the thickness direction of the semiconductor substrate 10, completely isolating the possibility of contact between the first doping layer 211 and the second doping layer 222, thereby achieving further isolation of the first doping region 11 and the second doping region 12, which is beneficial to further reduce the occurrence of leakage of solar cells and further improve the electrical stability of solar cells.

[0061] In some examples, the material of the first isolation layer 31 may also include any one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, and amorphous silicon.

[0062] Exemplarily, the material of the first isolation layer 31 may also be silicon oxide.

[0063] In some examples, the size of the second isolation layer 32 can be 0.5 mm to 1.5 mm along the direction in which the first doping region 11 and the second doping region 12 are staggered. Within this size range, the second isolation layer 32 can fully block the contact between the first doping layer 211 and the second doping layer 222, achieve effective isolation of the first doping region 11 and the second doping region 12, further reduce the occurrence of solar cell leakage, and thus further improve the electrical stability of the solar cell. If the size of the second isolation layer 32 in the direction in which the first doping region 11 and the second doping region 12 are staggered is too small, the second isolation layer 32 has a poor isolation effect on the first doping layer 211 and the second doping layer 222, which may cause leakage.

[0064] For example, along the direction in which the first doping regions 11 and the second doping regions 12 are staggered, the size of the second isolation layer 32 may be 0.5 mm, 0.7 mm, 0.9 mm, 1 mm, 1.2 mm, 1.4 mm or 1.5 mm, etc. This is only an example and is not specifically limited.

[0065] As a possible implementation, as shown in Figures 1 and 2, the solar cell also includes a first interface passivation layer 41 and a second interface passivation layer 42 located at least in the second doping area 12; the first interface passivation layer 41 is located between the semiconductor substrate 10 and the first doping layer 211; in the isolation area 121, the second interface passivation layer 42 is located between the second doping layer 222 and the first isolation layer 31; in the contact area 122, the second interface passivation layer 42 is located between the second doping layer 222 and the semiconductor substrate 10.

[0066] Based on this, as shown in Figures 1 and 2, the first interface passivation layer 41 can perform interface passivation on the semiconductor substrate 10, and the second interface passivation layer 42 can perform interface passivation on the semiconductor substrate 10 and the first isolation layer 31, reducing the recombination of carriers at the interface and ensuring the transmission efficiency of carriers. On the other hand, the interface passivation layer and the semiconductor doping layer constitute a passivation contact structure, which improves the passivation performance of the solar cell, reduces the recombination of carriers at the interface, and thus improves the conversion efficiency of the solar cell.

[0067] In some examples, the first interface passivation layer 41 and the second interface passivation layer 42 may be one or more of oxide, nitride, carbide, and hydrogenated amorphous silicon. Among them, the oxide includes silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, hafnium dioxide (HfO 2 ), gallium oxide (Ga 2 O 3 ), Tantalum pentoxide (Ta 2 O 5 ), niobium pentoxide (Nb 2 O 5 ) and the like; nitrides include one or more of silicon nitride, silicon carbonitride, aluminum nitride, titanium nitride (TiN), titanium carbide nitride (TiCN) and the like; carbides include silicon carbide (SiC).

[0068] Exemplarily, when the first doping layer 211 and the second doping layer 222 are semiconductor doping layers, the first interface passivation layer 41 and the second interface passivation layer 42 may be tunneling oxide layers. In this case, the tunneling oxide layer and the semiconductor doping layer form a tunneling oxide layer passivation contact structure.

[0069] For example, both the first interface passivation layer 41 and the second interface passivation layer 42 may be silicon oxide interface passivation layers.

[0070] As a possible implementation, as shown in Figures 1 and 2, the solar cell also includes a first surface passivation layer 51 and a second surface passivation layer 52, the first surface passivation layer 51 covers the surface of the first doping layer 211 and the second doping layer 222 on one side away from the semiconductor substrate 10, and the second surface passivation layer 52 covers the second surface of the semiconductor substrate 10, and the first electrode 80 and the second electrode 90 are electrically contacted with the first doping layer 211 and the second doping layer 222 located in the contact area 122 through the openings on the first surface passivation layer 51.

[0071] In some examples, the material of the first surface passivation layer 51 and the second surface passivation layer 52 may be one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, and amorphous silicon.

[0072] In some examples, the first surface passivation layer 51 and the second surface passivation layer 52 also have an anti-reflection effect. Alternatively, an additional anti-reflection layer may be provided, and the surface passivation layer and the anti-reflection layer may be stacked to achieve passivation and anti-reflection effects as a whole.

[0073] Exemplarily, the anti-reflection layer may be magnesium fluoride (MgF 2 ), silicon dioxide (SiO 2 )、Alumina(Al 2 O 3 )、ZnS、SiN、TiO 2 ) and other substances.

[0074] Exemplarily, the first surface passivation layer 51 and the second surface passivation layer 52 may be aluminum oxide passivation layers, and the aluminum oxide passivation layers may also play an anti-reflection role.

[0075] In one embodiment, as shown in FIG. 2 , the second doping layer 222 and the second interface passivation layer 42 may be located only in the second doping region 12 .

[0076] In another embodiment, as shown in FIG1 , the second doping layer 222 and the second interface passivation layer 42 may extend to the first doping region 11, overlap with the first interface passivation layer 41 and the second isolation layer 32 in the thickness direction of the semiconductor substrate 10, but do not overlap with the first doping layer 211, and the second doping layer 222 and the second interface passivation layer 42 extending to the first doping region 11 are stacked on the side of the first interface passivation layer 41 and the second isolation layer 32 away from the semiconductor substrate 10. In this case, the second isolation layer 32 is located between the first doping layer 211 and the second interface passivation layer 42; at the position where the second interface passivation layer 42 and the second isolation layer 32 are stacked, the solar cell may further include a third doping layer 60 located between the second interface passivation layer 42 and the second isolation layer 32, and further, the third doping layer 60 is a doped silicon oxide layer formed in the diffusion doping process of the first doping layer 211, and the doping atoms in the third doping layer 60 are the same as those in the first doping layer 211.

[0077] Exemplarily, in the thickness direction of the semiconductor substrate 10, the second doping layer 222 and the second interface passivation layer 42 extending to the first doping region 11 may overlap with the first interface passivation layer 41 and the second isolation layer 32 in the range from the side of the second isolation layer 32 close to the isolation region 121 to the side of the second isolation layer 32 connected to the first doping layer 211. Along the direction in which the first doping region 11 and the second doping region 12 are staggered, the width of the third doping layer 60 depends on the range in which the second doping layer 222 and the second interface passivation layer 42 overlap with the first interface passivation layer 41 and the second isolation layer 32 in the thickness direction of the semiconductor substrate 10.

[0078] Figure 3 is a flow chart of the method for preparing a solar cell provided in an embodiment of the present application. Figures 4 to 10 are schematic diagrams of various stages of the method for preparing a solar cell provided in an embodiment of the present application.

[0079] As shown in FIG. 3 to FIG. 10 , the embodiment of the present application further provides a method for preparing a solar cell, comprising:

[0080] S100, providing a semiconductor substrate 10, the semiconductor substrate 10 having a first surface and a second surface relative to each other, the first surface having first doping regions 11 and second doping regions 12 arranged alternately, the second doping regions 12 including a contact region 122 and an isolation region 121 located on both sides of the contact region 122, the isolation region 121 being connected to the first doping region 11.

[0081] The semiconductor substrate 10 needs to be polished, cleaned, or otherwise damaged.

[0082] In some examples, the semiconductor substrate 10 may be polished using an alkaline solution, the concentration of the alkaline solution used may be 2 wt % to 4 wt %, the polishing temperature may be 60° C. to 80° C., and the polishing time may be 150 s to 400 s.

[0083] Illustratively, the concentration of the alkaline solution used can be 2wt%, 2.5wt%, 3wt%, 3.5wt% or 4wt%, etc., the polishing temperature can be 60°C, 65°C, 70°C, 75°C or 80°C, etc., and the polishing time can be 150s, 200s, 250s, 300s, 350s or 400s, etc. These are only examples and are not specifically limited.

[0084] S200 , as shown in FIG. 5 , a first doping layer 211 is formed in the first doping region 11 .

[0085] Further, as shown in Figure 4, forming a first doping layer 211 in the first doping region 11 may include: forming a first doping film layer 21 that covers the entire surface of the semiconductor substrate 10; removing the first doping film layer 21 located in the second doping region 12, so that the first doping film layer 21 located in the first doping region 11 is the first doping layer 211.

[0086] The process for forming the first doped film layer 21 may be a plasma chemical vapor deposition (PECVD) process, a hot wire chemical vapor deposition (HFCVD) process, a physical vapor deposition (PVD) process, a low pressure chemical vapor deposition (LPCVD) process or a catalytic chemical vapor deposition process, etc.

[0087] As a possible implementation, as shown in FIG5 , before forming the first doping layer 211 in the first doping region 11, the method for preparing a solar cell further includes:

[0088] A first interface passivation layer 41 is formed on the first doping region 11 .

[0089] The first interface passivation layer 41 can play a role in interface passivation on the first surface of the semiconductor substrate 10. When the first doping layer 211 is a semiconductor doping layer, the first interface passivation layer 41 can be a tunneling oxide layer. At this time, the first interface passivation layer 41 and the first doping layer 211 constitute a tunneling oxide layer passivation contact structure, which can achieve excellent interface passivation and selective collection of carriers, thereby improving the photoelectric conversion efficiency of the solar cell.

[0090] Further, as shown in FIG4 , forming the first interface passivation layer 41 in the first doping region 11 may include: forming a first interface passivation film layer 40 that covers the entire surface of the semiconductor substrate 10; removing the first interface passivation film layer 40 located in the second doping region 12, so that the first interface passivation film layer 40 located in the first doping region 11 is the first interface passivation layer 41. At this time, the first doping film layer 21 is formed on the surface of the first interface passivation film layer 40 that is away from the semiconductor substrate 10, and the first doping film layer 21 and the first interface passivation film layer 40 can be removed at the same time.

[0091] For example, the process of forming the first interface passivation film layer 40 may be a plasma chemical vapor deposition (PECVD) process, an atmospheric pressure chemical vapor deposition (APCVD) process, a thermal growth process, and the like.

[0092] Exemplarily, as shown in Figure 4, when the first interface passivation layer 41 is a tunneling oxide layer and the first doping layer 211 is a doped polysilicon layer, the first interface passivation film layer 40 and the first doped film layer 21 can be formed in one process, that is, the tunneling oxide film layer and the doped polysilicon film layer are directly grown; or, the first interface passivation film layer 40 and the intrinsic amorphous silicon film layer can be first formed in one process, and then the intrinsic amorphous silicon film layer is doped and crystallized through a high-temperature diffusion process to form a doped polysilicon film layer, and at the same time, a doped silicon oxide film layer is formed on the surface of the doped polysilicon film layer facing away from the semiconductor substrate 10, which is the third doping layer 60.

[0093] Exemplarily, as shown in FIG5 , when removing the doped silicon oxide film layer, the first doped film layer 21 and the first interface passivation film layer 40 located in the second doped region 12, the doped silicon oxide film layer located in the second doped region 12 can be firstly melted by laser, and then the exposed first doped film layer 21 and the first interface passivation film layer 40 in the second doped region 12 can be removed by alkaline etching process. In addition, when the first doped film layer 21 and the first interface passivation film layer 40 are formed on the first surface of the semiconductor substrate 10, the first interface passivation film layer 40, the first doped film layer 21 and the doped silicon oxide film layer are simultaneously formed on the second surface of the semiconductor substrate 10, so it is necessary to remove the first interface passivation film layer 40, the first doped film layer 21 and the doped silicon oxide film layer that are plated on the second surface of the semiconductor substrate 10.

[0094] In some examples, along the thickness direction of the semiconductor substrate 10 , the thickness of the first interface passivation layer 41 may be 1 nm to 2 nm, the thickness of the first doping layer 211 may be 70 nm to 300 nm, and the thickness of the third doping layer 60 may be 50 nm to 120 nm.

[0095] Illustratively, along the thickness direction of the semiconductor substrate 10, the thickness of the first interface passivation layer 41 can be 1nm, 1.2nm, 1.4nm, 1.6nm, 1.8nm or 2nm, etc., the thickness of the first doping layer 211 can be 70nm, 100nm, 150nm, 200nm, 250nm or 300nm, etc., the thickness of the third doping layer 60 can be 50nm, 70nm, 90nm, 100nm, 110nm or 120nm, etc. These are just examples and are not specifically limited.

[0096] S300 , as shown in FIGS. 6 and 7 , a first isolation layer 31 is formed in the isolation region 121 .

[0097] The step of forming the first isolation layer 31 in the isolation region 121 includes:

[0098] Forming an isolation film layer 30 in the second doping region 12 by an oxidation process;

[0099] The isolation film layer 30 located in the contact region 122 is removed, so that the isolation film layer 30 located in the isolation region 121 forms a first isolation layer 31 .

[0100] As shown in FIG6 and FIG7, after removing the doped silicon oxide film layer, the first doped film layer 21 and the first interface passivation film layer 40 located in the second doped region 12, the second surface of the semiconductor substrate 10 located in the second doped region 12 is exposed, and the surface of the semiconductor substrate 10 exposed in the second doped region 12 can be oxidized by an oxidation process to form an isolation film layer 30 in the second doped region 12, and then the isolation film layer 30 located in the contact region 122 is removed to obtain the first isolation layer 31. This method of forming the first isolation layer 31 does not require additional deposition of isolation materials, simplifies the production process of solar cells, and does not require the addition of additional deposition equipment, thereby reducing production costs.

[0101] Exemplarily, the size of the formed isolation film layer 30 along the thickness direction of the semiconductor substrate 10 is the same as that of the first isolation layer 31 .

[0102] In some examples, as shown in FIG. 6 , forming the isolation film layer 30 in the second doping region 12 by an oxidation process further includes:

[0103] The second isolation layer 32 is formed on a side where the first doping layer 211 is connected to the isolation region 121 by an oxidation process.

[0104] As shown in FIG6 , after removing the doped silicon oxide film layer, the first doped film layer 21 and the first interface passivation film layer 40 located in the second doped region 12, the side of the first doped layer 211 located in the first doped region 11 close to the isolation region 121 will also be exposed. Therefore, while forming the isolation film layer 30 through the oxidation process, the side where the first doped layer 211 intersects with the isolation region 121 will be oxidized, thereby forming a second isolation layer 32 on the side where the first doped layer 211 intersects with the isolation region 121. Compared with the isolation film that requires additional deposition of isolation material, the embodiment of the present application can form the second isolation layer 32 through oxidation treatment, thereby achieving effective isolation of the first doped layer 211 and the second doped layer 222, further simplifying the production process of the solar cell and further reducing the production cost.

[0105] For example, the oxidation process can be wet oxidation. The wet oxidation process is simple and easy to operate, not only does it not require additional deposition equipment, but also compared with the overall temperature increase annealing oxidation, the wet oxidation process is better controlled, the equipment cost is also lower, which is conducive to further reducing production costs.

[0106] For example, hydrogen peroxide or ozone may be used for wet oxidation. Taking hydrogen peroxide for wet oxidation as an example, the concentration of hydrogen peroxide may be 5% to 15%; for example, the concentration of hydrogen peroxide may be 5%, 8%, 10%, 13% or 15%, etc., which are only examples and are not specifically limited.

[0107] As a possible implementation method, as shown in Figure 7, when removing the isolation film layer 30 located in the contact area 122, the isolation film layer 30 located in the contact area 122 can be melted by laser to expose the semiconductor substrate 10; then, the laser damage of the semiconductor substrate 10 located in the contact area 122 is removed by wet etching, and a groove is formed in the contact area 122, and the width of the contact area 122 along the direction of the staggered arrangement of the first doping region 11 and the second doping region 12 is the width of the groove.

[0108] In some instances, the depth of the groove formed in the contact area 122 along the thickness direction of the semiconductor substrate 10 can be 0.5 μm~1.5 μm; along the direction of the staggered arrangement of the first doping region 11 and the second doping region 12, the width of the groove can account for 5%~90% of the width of the second doping region 12.

[0109] Illustratively, along the thickness direction of the semiconductor substrate 10, the depth of the groove formed in the contact area 122 can be 0.5μm, 0.7μm, 0.9μm, 1μm, 1.3μm or 1.5μm, etc.; along the direction of the staggered arrangement of the first doping region 11 and the second doping region 12, the width of the groove can account for 5%, 10%, 20%, 40%, 60%, 80% or 90% of the width of the second doping region 12, etc. This is only an example and is not specifically limited.

[0110] S400 , as shown in FIGS. 8 to 10 , a second doping layer 222 is formed at least on the contact region 122 and the side of the first isolation layer 31 away from the semiconductor substrate 10 , and the conductivity type of the second doping layer 222 is opposite to that of the first doping layer 211 .

[0111] Further, as shown in Figures 8 to 10, forming a second doping layer 222 at least on the side of the contact area 122 and the first isolation layer 31 away from the semiconductor substrate 10 includes: forming a second doping film layer 22 that covers the entire surface of the first surface of the semiconductor substrate 10, the second doping film layer 22 covering the surface of the third doping layer 60 away from the semiconductor substrate 10, the surface of the first isolation layer 31 away from the semiconductor substrate 10, and the groove formed in the contact area 122; removing at least a portion of the second doping film layer 22 located in the first doping area 11, so that the remaining second doping film layer 22 is the second doping layer 222.

[0112] The process for forming the second doped film layer 22 may be a plasma chemical vapor deposition (PECVD) process, a hot wire chemical vapor deposition (HFCVD) process, a physical vapor deposition (PVD) process, a low pressure chemical vapor deposition (LPCVD) process or a catalytic chemical vapor deposition process, etc.

[0113] As a possible implementation, as shown in FIGS. 8 to 10 , after forming the first isolation layer 31 in the isolation region 121 and before forming the second doping layer 222 at least on the contact region 122 and the side of the first isolation layer 31 away from the semiconductor substrate 10 , the method for preparing a solar cell further includes:

[0114] A second interface passivation layer 42 is formed at least on a surface of the first isolation layer 31 facing away from the semiconductor substrate 10 and a surface of the semiconductor substrate 10 located in the contact region 122 .

[0115] The second interface passivation layer 42 can at least play a role in interface passivation for the surface of the first isolation layer 31 facing away from the semiconductor substrate 10, and the surface of the semiconductor substrate 10 located in the contact area 122. When the second doping layer 222 is a semiconductor doping layer, the second interface passivation layer 42 can be a tunneling oxide layer. At this time, the second interface passivation layer 42 and the second doping layer 222 constitute a tunneling oxide layer passivation contact structure, which can achieve excellent interface passivation and selective collection of carriers, thereby improving the photoelectric conversion efficiency of the solar cell.

[0116] Further, as shown in Figure 8, forming a second interface passivation layer 42 at least on the surface of the first isolation layer 31 away from the semiconductor substrate 10, and the surface of the semiconductor substrate 10 located in the contact area 122 may include: forming a second interface passivation layer 42 that covers the entire first surface of the semiconductor substrate 10, at this time, the second interface passivation layer 42 covers the surface of the third doping layer 60 away from the semiconductor substrate 10, the surface of the first isolation layer 31 away from the semiconductor substrate 10 and the contact area 122, and the second doped film layer 22 is formed on the side surface of the second interface passivation layer 42 away from the semiconductor substrate 10.

[0117] For example, the process of forming the second interface passivation layer 42 may be a plasma chemical vapor deposition (PECVD) process, an atmospheric pressure chemical vapor deposition (APCVD) process, a thermal growth process, and the like.

[0118] Exemplarily, as shown in Figure 8, when the second interface passivation layer 42 is a tunneling oxide layer and the second doping layer 222 is a doped polysilicon layer, the second interface passivation layer 42 and the second doped film layer 22 can be formed in one process, that is, the tunneling oxide layer and the doped polysilicon film layer are directly grown; or, the second interface passivation layer 42 and the intrinsic amorphous silicon film layer can be first formed in one process, and then the intrinsic amorphous silicon film layer is doped and crystallized through a high-temperature diffusion process to form a doped polysilicon film layer. At the same time, a doped silicon oxide film layer is formed on the surface of the doped polysilicon film layer on the side away from the semiconductor substrate 10, which is the fourth doping layer 70, and the doping atoms in the fourth doping layer 70 are the same as those in the second doping layer 222.

[0119] For example, as shown in FIG9 , when removing at least a portion of the second doping film layer 22 located in the first doping region 11, the local fourth doping layer 70 in the first doping region 11 can be firstly melted by laser, and then the exposed second doping film layer 22 in the first doping region 11 can be removed by an alkaline etching process to expose the second interface passivation layer 42 underneath, and the second surface of the semiconductor substrate 10 can be textured; as shown in FIG10 , the exposed second interface passivation layer 42 and the third doping layer 60 in the first doping region 11 can then be removed by a wet etching process.

[0120] S500 , as shown in FIG. 1 and FIG. 2 , a first electrode 80 electrically contacting the first doping layer 211 and a second electrode 90 electrically contacting the second doping layer 222 located in the contact region 122 are formed.

[0121] Exemplarily, the process of forming the first electrode 80 and the second electrode 90 may be an electroplating process, a transfer process (such as a laser transfer process, a thermal transfer process, etc.), screen printing, a physical vapor deposition process of metal or metal oxide electrodes, and the like.

[0122] In some examples, as shown in FIG. 1 and FIG. 2 , after the exposed second interface passivation layer 42 and the third doping layer 60 in the first doping region 11 are removed by a wet etching process, before the first electrode 80 and the second electrode 90 are formed, a first surface passivation layer 51 may be formed on the first surface of the semiconductor substrate 10, and a second surface passivation layer 52 may be formed on the second surface of the semiconductor substrate 10, and the formed first surface passivation layer 51 covers the surface of the first doping layer 211 and the second doping layer 222 facing away from the semiconductor substrate 10. In addition, an anti-reflection layer may be formed on the first surface passivation layer 51 and the second surface passivation layer 52.

[0123] Exemplarily, the process of forming the first surface passivation layer 51, the second surface passivation layer 52 and the anti-reflection layer can be a plasma chemical vapor deposition (PECVD) process, a hot wire chemical vapor deposition process, an atomic layer deposition (ALD) process, a physical vapor deposition (PVD) process, a low pressure chemical vapor deposition (LPCVD) process or a catalytic chemical vapor deposition process, etc.

[0124] Taking the manufacture of the n-type solar cell shown in FIG. 1 as an example, the manufacturing method thereof is specifically described as follows.

[0125] S10, providing an n-type silicon substrate as the semiconductor substrate 10, and then performing polishing, cleaning and other damage removal treatments on the n-type silicon substrate in sequence, wherein the concentration of the alkaline solution used during polishing is 3wt%, the temperature is 70°C, and the time is 300s;

[0126] S20, as shown in FIG4, a tunneling silicon oxide layer and an intrinsic amorphous silicon layer as a first interface passivation film layer 40 are sequentially formed on the backlight surface of the n-type silicon substrate by an LPCVD process, and boron atoms are diffused into the intrinsic amorphous silicon layer by a high-temperature boron diffusion process to form a boron-doped polysilicon layer as a first doped film layer 21 and a borosilicate glass layer (BSG) as a third doped layer 60;

[0127] S30, as shown in FIG5, using green picosecond laser patterning to melt the BSG located in the second doping region 12, removing the exposed boron-doped polysilicon layer and the tunneling silicon oxide layer by alkaline etching to form a first interface passivation layer 41 and a first doping layer 211; using a single-side cleaning machine to remove the BSG on the light-facing surface, and using an alkaline solution to remove the exposed boron-doped polysilicon layer on the light-facing surface of the n-type silicon substrate;

[0128] S40, as shown in FIG6, the n-type silicon substrate located in the second doping region 12 and the side of the first doping layer 211 close to the isolation region 121 are oxidized by hydrogen peroxide to form silicon oxide as the isolation film layer 30 and the second isolation layer 32; the concentration of hydrogen peroxide is 10%, and the thickness of the formed silicon oxide is 1.7 mm;

[0129] S50, as shown in FIG7, using a green picosecond laser and wet etching to remove the isolation film layer 30 located in the contact area 122, to form a first isolation layer 31 and a groove;

[0130] S60, as shown in FIG8, a tunneling oxide layer as the second interface passivation layer 42, a phosphorus-doped polysilicon layer as the second doped film layer 22, and a phosphorus-silicate glass layer (PSG) as the fourth doped layer 70 are formed on the backlight surface of the n-type silicon substrate by a PECVD process;

[0131] S70, as shown in FIG9 , at least a portion of the PSG located in the first doping region 11 is melted by a green picosecond laser to expose at least a portion of the phosphorus-doped polysilicon layer located in the first doping region 11, and the phosphorus-doped polysilicon layer in the exposed region is etched with alkali to form a second doping layer 222, and the front surface is textured;

[0132] S80, as shown in FIG. 10, using a hydrofluoric acid (HF) solution to remove the fourth doping layer 70 and the second interface passivation layer 42 and BSG exposed in the first doping region 11;

[0133] S90, depositing aluminum oxide as a first surface passivation layer 51 and a second surface passivation layer 52 on the light-facing surface and the backlight surface of the n-type silicon substrate by an ALD process, and depositing an anti-reflection layer on the surfaces of the first surface passivation layer 51 and the second surface passivation layer 52 by a PECVD process;

[0134] The paste is printed on the first doping region 11 and the contact region 122 by a screen printing process to form the first electrode 80 and the second electrode 90 , thereby obtaining the solar cell shown in FIG. 1 .

[0135] An embodiment of the present application also provides a photovoltaic assembly, comprising the solar cell described in any of the above embodiments.

[0136] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0137] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: include: A semiconductor substrate, wherein the semiconductor substrate has a first surface and a second surface opposite to each other, the first surface has first doped regions and second doped regions arranged alternately, the second doped regions include a contact region and isolation regions located on both sides of the contact region, and the isolation regions are connected to the first doped regions; a first doping layer located in the first doping region; a first isolation layer located in the isolation area; a second doped layer, the second doped layer at least covering the contact region and a side of the first isolation layer facing away from the semiconductor substrate; The conductivity type of the second doped layer is opposite to that of the first doped layer; and a first electrode and a second electrode, wherein the first electrode is in electrical contact with the first doped layer, and the second electrode is in electrical contact with the second doped layer located in the contact region.

2. The solar cell according to claim 1, characterized in that: The dimension of the first isolation layer along the thickness direction of the semiconductor substrate is 0.5 mm to 2 mm.

3. The solar cell according to claim 1, characterized in that The solar cell further includes a second isolation layer, which is located between the first doping layer and the second doping layer. Along the thickness direction of the semiconductor substrate, the size of the second isolation layer is the same as that of the first doping layer.

4. The solar cell according to claim 3, characterized in that: Along the direction in which the first doping regions and the second doping regions are staggered, a size of the second isolation layer is 0.5 mm to 1.5 mm.

5. The solar cell according to claim 2, characterized in that: The solar cell further comprises a first interface passivation layer and a second interface passivation layer at least located in the second doping region; The first interface passivation layer is located between the semiconductor substrate and the first doped layer; In the isolation region, the second interface passivation layer is located between the second doping layer and the first isolation layer; in the contact region, the second interface passivation layer is located between the second doping layer and the semiconductor substrate.

6. A method for preparing a solar cell, characterized in that: include: A semiconductor substrate is provided, wherein the semiconductor substrate has a first surface and a second surface opposite to each other, the first surface has first doped regions and second doped regions arranged alternately, the second doped regions include contact regions and isolation regions located on both sides of the contact regions, and the isolation regions are connected to the first doped regions; forming a first doping layer in the first doping region; forming a first isolation layer in the isolation region; forming a second doped layer at least on the contact region and the first isolation layer on a side facing away from the semiconductor substrate, wherein the second doped layer has a conductivity type opposite to that of the first doped layer; A first electrode electrically contacting the first doped layer and a second electrode electrically contacting the second doped layer located in the contact region are formed.

7. The method for preparing a solar cell according to claim 6, characterized in that: The forming of a first isolation layer in the isolation region comprises: forming an isolation film layer on the second doping region by an oxidation process; The isolation film layer located in the contact area is removed, so that the isolation film layer located in the isolation area forms a first isolation layer.

8. The method for preparing a solar cell according to claim 7, characterized in that: The forming of the isolation film layer in the second doping region by an oxidation process further comprises: A second isolation layer is formed on a side of the first doping layer connected to the isolation region through an oxidation process.

9. The method for preparing a solar cell according to claim 7, characterized in that: The oxidation process is wet oxidation.

10. The method for preparing a solar cell according to claim 6, characterized in that: Before forming the first doping layer in the first doping region, the method for preparing the solar cell further includes: forming a first interface passivation layer in the first doped region; After forming the first isolation layer in the isolation region and before forming the second doping layer at least on the contact region and on the side of the first isolation layer facing away from the semiconductor substrate, the method for preparing the solar cell further includes: A second interface passivation layer is formed at least on a surface of the first isolation layer facing away from the semiconductor substrate and a surface of the semiconductor substrate located in the contact region.

11. A photovoltaic module, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 5.

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