Method, device and equipment for determining light source mask collaborative optimization IRO model

Abstract

The invention provides a method, device and equipment for determining a light source mask collaborative optimization IRO model, and the method comprises the steps: inputting a pre-obtained test pattern into an initial IRO model, obtaining an initial light source corresponding to an initial design layout, the test pattern comprising a key pattern in the initial design layout; according to the initial light source, photoetching a test mask by using a target photoresist to obtain actual exposure energy matrix FEM data and actual cross section data of the target photoresist at a key position of the test mask, and determining the test mask according to the test pattern; and determining a photoresist model according to the actual FEM data and the actual cross section data, and optimizing the initial IRO model to obtain a target IRO model. According to the embodiment of the invention, the optimization accuracy of the IRO model can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device and equipment for determining an IRO model for collaborative optimization of a light source and a mask. Background Art

[0002] With the continuous advancement of integrated circuit technology, especially the move towards higher integration and smaller process nodes, the accuracy and efficiency of lithography as a core link have become key factors restricting the improvement of chip performance. The limitations of the existing Illumination and Reticle Optimization (IRO) model have gradually become apparent when dealing with these increasingly complex manufacturing processes. In particular, for manufacturing processes involving complex chemical interactions, such as certain special development processes, the traditional IRO model method based on simplified optical models is difficult to fully capture the physical and chemical changes in the actual process, resulting in a significant deviation between the predicted results and the actual lithography effect, which makes the existing IRO model optimization accuracy poor. Summary of the invention

[0003] The present application provides a method, device and equipment for determining a light source mask collaborative optimization IRO model, which can improve the optimization accuracy of the IRO model.

[0004] In a first aspect, an embodiment of the present application provides a method for determining a light source mask collaborative optimization IRO model, the method comprising:

[0005] Inputting the pre-acquired test pattern into the initial IRO model to obtain an initial light source corresponding to the initial design layout, wherein the test pattern includes key patterns in the initial design layout;

[0006] According to the initial light source, the test mask is photolithographically processed using the target photoresist to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist located at a key position of the test mask, and the test mask is determined according to the test pattern;

[0007] Determine the photoresist model according to the actual FEM data and the actual cross-section data;

[0008] Based on the photoresist model, the initial IRO model is optimized to obtain the target IRO model.

[0009] In a second aspect, the present application provides a device for determining a light source mask collaborative optimization IRO model, the device comprising:

[0010] A first determination module is used to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout;

[0011] A photolithography module, used to perform photolithography on a test mask using a target photoresist according to the initial light source, to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist located at a key position of the test mask, the test mask being determined according to the test pattern;

[0012] A second determination module, used for determining a photoresist model according to the actual FEM data and the actual cross-sectional data;

[0013] The optimization module is used to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

[0014] In a third aspect, an embodiment of the present application provides an electronic device, the electronic device comprising: a processor and a memory storing computer program instructions;

[0015] When the processor executes the computer program instructions, it implements the method for determining the light source mask collaborative optimization IRO model as in any one of the embodiments of the first aspect.

[0016] In a fourth aspect, an embodiment of the present application provides a computer storage medium having computer program instructions stored thereon. When the computer program instructions are executed by a processor, a method for determining a light source mask collaborative optimization IRO model as in any one of the embodiments in the first aspect is implemented.

[0017] In a fifth aspect, an embodiment of the present application provides a computer program product. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes a method for determining a light source mask collaborative optimization IRO model as in any one of the embodiments of the first aspect described above.

[0018] In a method, device and equipment for determining a light source mask collaborative optimization IRO model provided in an embodiment of the present application, a more accurate photoresist model is constructed by introducing the actual exposure energy matrix FEM data and the actual cross-sectional data of the photoresist in the actual lithography process. Subsequently, based on this high-precision photoresist model, the initial IRO model is deeply optimized to make it closer to the actual production environment. The optimized target IRO model effectively overcomes the limitations of traditional optical models in prediction accuracy, and can fully simulate the actual behavior of the target photoresist under complex chemical interactions, so that when predicting the lithography effect, the deviation from the actual result can be significantly reduced, and the consistency between the predicted result and the actual lithography effect is significantly improved, thereby greatly improving the accuracy of the IRO model optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0020] Figure 1 This is one of the flow diagrams of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0021] Figure 2 This is one of the flow diagrams of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0022] Figure 3 This is one of the flow diagrams of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0023] Figure 4 It is a structural schematic diagram of a device for determining a light source mask collaborative optimization IRO model provided in an embodiment of the present application;

[0024] Figure 5 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0026] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0027] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0028] Integrated circuit technology is the core technology of the semiconductor industry. It precisely integrates electronic components such as transistors, resistors, and capacitors on tiny chips, and then forms chips with specific circuit functions through packaging. In this process, photolithography plays a vital role. It uses photochemical principles to accurately draw circuit patterns on the surface of the wafer, which is the key force driving Moore's Law forward.

[0029] As chip performance requirements continue to increase, especially the dual challenges of reducing power consumption and increasing computing power, chip manufacturers continue to pursue higher integration, that is, maximizing the number of transistors per unit area. This directly leads to the continuous reduction of the line width of the lithography process. After entering the sub-wavelength field, traditional lithography technology faces severe challenges. In order to overcome these difficulties, light source mask collaborative optimization technology came into being, becoming an important means to improve the imaging performance of the lithography system and approach the resolution limit.

[0030] The existing IRO optimization process is a multi-stage iterative process, the core of which is to optimize the lithography imaging quality by precisely adjusting the light source shape, intensity distribution, and mask pattern. The process first performs preliminary optimization based on the optical model and critical patterns, and extracts sub-resolution assist features (SBAR) through simulation calculation. These SBARs can further assist the imaging quality of the main pattern. Subsequently, it enters a more refined optimization stage, taking into account the synergy of the main pattern, SBAR, and light source, and achieves the best imaging effect through repeated iterative adjustments.

[0031] However, it is worth noting that the existing IRO optimization process mainly focuses on the optimization of the optical model, and its output result is the aerial image (AI), that is, the image formed on the surface of the photoresist after the light passes through the optical system. This method is relatively effective when dealing with the positive tone development (PTD) process, because the exposed part of the photoresist in the positive tone development process will be developed away, and its imaging process is more consistent with the optical simulation. However, in the negative tone development (NTD) process, the situation is quite different. In the negative tone development process, the exposed photoresist will undergo complex chemical reactions, such as the resist shrinkage effect (RSE), resulting in a significant deviation between the actual imaging and the optical simulation. Therefore, the ability to predict the process window (PW) of the NTD process based on the optical model alone is limited, and it is often necessary to rely on experienced engineers to repeatedly debug in combination with the actual situation to obtain a light source configuration that meets the requirements. Therefore, although the existing IRO optimization process has achieved remarkable results in promoting the advancement of photolithography, it is still insufficient when facing complex processes such as negative development.

[0032] In order to solve the problems existing in the prior art, the embodiments of the present application provide a method, device and equipment for determining a light source mask collaborative optimization IRO model.

[0033] The embodiment of the present application provides a method, device and apparatus for determining a light source mask collaborative optimization IRO model. The following first introduces the method for determining a light source mask collaborative optimization IRO model provided by the embodiment of the present application. Figure 1 As shown, the method specifically comprises the following steps:

[0034] S100, inputting a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout.

[0035] Optionally, in an embodiment of the present application, the test pattern is a specific set of patterns used in the light source mask collaborative optimization process. The test pattern contains the most critical and representative graphic elements in the initial design layout, which are crucial to the performance and yield of the final chip. These test patterns can be selected based on historical data, simulation analysis or engineering experience, and can fully reflect the various challenges and complexities that may be encountered in the manufacturing process.

[0036] Key graphics refer to the graphic elements in the initial design layout that have the greatest impact on chip performance, yield and reliability. These key graphics have complex shapes or tight layouts, so they are more susceptible to various physical and chemical effects during the lithography process. The imaging quality of key graphics directly determines the performance and reliability of the final chip.

[0037] Optionally, the initial design layout contains the layout information of all the expected circuit elements and connecting lines on the chip. These elements include transistors, resistors, capacitors, wires, etc., which are precisely placed on the chip according to specific logic and functional requirements. In the photolithography process, the initial design layout is the starting point of the manufacturing process, which determines the shape and position of the circuit on the final chip. However, due to various physical and chemical effects in the photolithography process, the actual manufactured graphics may deviate from the design layout to a certain extent.

[0038] Optionally, in a feasible implementation of the present application, when the test pattern is input into the initial IRO model, the initial IRO model will simulate and calculate the test pattern based on its built-in optical imaging principle, lithography process parameters, material properties, etc. This calculation process will consider multiple factors such as the shape, intensity distribution, wavelength of the light source, and the layout and size of the mask pattern to predict the image quality that these patterns may form on the wafer under specific lithography conditions.

[0039] Through this simulation calculation, the initial IRO model can output an initial light source configuration corresponding to the test pattern. This initial light source configuration is the best prediction result that the initial IRO model can provide based on the current settings and input conditions. It is designed to achieve the best imaging effect for the lithography process under specific conditions. However, it should be noted that due to the limitations of the initial IRO model, this initial light source configuration is not completely accurate or optimal. Therefore, the initial light source configuration output by S100 will serve as the starting point for subsequent steps, and through further experimental verification and model optimization, it will gradually approach the true optimal light source configuration.

[0040] S200, according to the initial light source, use the target photoresist to perform photolithography on the test mask to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist located at a key position of the test mask, the test mask being determined according to the test pattern.

[0041] Optionally, the actual exposure energy matrix (Focus-Energy Matrix, FEM) data refers to the exposure energy distribution diagram formed on the wafer surface by the lithography machine through precise control of the light source and exposure conditions during the lithography process. FEM data is a two-dimensional matrix in which each element represents the exposure energy intensity received at the corresponding position on the wafer. FEM data is essential for evaluating the uniformity and resolution of the lithography process and predicting the shape and size of the final graphics. By comparing the simulated value of FEM data with the actual value, problems with the light source distribution, deviations in exposure time, or errors in the calibration of the lithography machine can be identified.

[0042] Optionally, the key positions of the test mask refer to some representative areas or patterns selected on the test mask that have a greater impact on the lithography results. These areas contain key patterns in the initial design layout, such as small-size lines, dense pattern arrays, combinations of different line widths and spacings, etc. By performing detailed measurements and analysis at these key positions, the performance and consistency of the lithography process can be more accurately evaluated.

[0043] The target photoresist refers to the specific type of photoresist used when the initial design layout is subjected to the photolithography process.

[0044] Optionally, the actual cross-sectional data of the target photoresist refers to the data of the actual graphic cross-section formed by the photoresist after the exposure, development and other steps, obtained by a high-precision measurement tool (such as a scanning electron microscope (SEM)). These data include key information such as the thickness, profile, line edge roughness, and graphic distortion of the photoresist. By comparing with the actual design layout, the transfer accuracy and fidelity of the photolithography process to the graphic can be evaluated, and potential process problems can be identified and optimized. The actual cross-sectional data is an important basis for verifying the accuracy of the photoresist model and optimizing the photolithography process.

[0045] Optionally, in a feasible implementation of the present application, first, a test mask determined according to the test pattern is prepared, and the test mask contains key patterns in the initial design layout, which is used to simulate the photolithography scene in the real manufacturing environment. Then, the initial light source is irradiated onto the test mask using a photolithography machine, and the experimental conditions are ensured to be consistent with expectations by precisely controlling parameters such as exposure time and light source intensity.

[0046] During the exposure process, the target photoresist will undergo different degrees of chemical reactions according to the exposure energy to form a specific pattern. In order to quantify this process, the lithography machine records the actual exposure energy matrix (FEM) data, which describes in detail the intensity of light energy received at each point in the exposure area. At the same time, in order to more intuitively understand the changes in the photoresist after exposure, the target photoresist at key positions on the test mask will also be analyzed in cross section, and its actual cross-sectional data will be obtained through a scanning electron microscope or other high-precision measurement tools.

[0047] S300, determining a photoresist model according to the actual FEM data and the actual cross-sectional data.

[0048] Optionally, the photoresist model is a mathematical or physical model that is used to simulate and predict how a target photoresist responds to exposure energy and subsequently forms patterns during development under specific lithography conditions. This model is constructed based on experimental data (such as actual exposure energy matrix FEM data and actual cross-sectional data) and takes into account the physical and chemical properties of the photoresist, exposure conditions (such as light source intensity, wavelength, exposure time, etc.), and development process parameters (such as developer type, concentration, temperature, and time, etc.).

[0049] Optionally, in a feasible implementation of the present application, first, these actual FEM data and actual cross-sectional data are input into professional simulation software, which can simulate the chemical reaction, solubility change and final pattern formation process of photoresist under different exposure energies. The actual FEM data provides key exposure condition input for simulation. At the same time, the actual cross-sectional data provides the actual graphic features formed by the photoresist after exposure and development, such as line width, edge roughness, bottom profile, etc., which are used to verify and calibrate the accuracy of the simulation model.

[0050] During the simulation process, the parameters of the photoresist model can be continuously adjusted according to the physical and chemical properties of the target photoresist (such as photosensitivity, development rate, etc.) and experimental conditions (such as exposure time, developer concentration, etc.) until the simulation results are highly consistent with the experimental data. This process may require multiple iterations, including adjusting parameters such as exposure energy distribution, photoresist thickness, and development time to optimize the model's predictive ability.

[0051] Once the photoresist model is successfully constructed and verified, it can be used to simulate the lithography process of the target photoresist under different light sources and mask conditions, and predict and evaluate the shape and size of the final graphics. This is crucial for subsequent light source mask co-optimization, because it allows the feasibility of different design schemes to be quickly evaluated without the need for actual lithography experiments, and to find the optimal light source and mask configuration.

[0052] S400, optimizing the initial IRO model based on the photoresist model to obtain a target IRO model.

[0053] Optionally, in a feasible implementation method of the present application, the photoresist model can first be integrated into the optimization algorithm. The optimization algorithm is based on the initial IRO model and continuously adjusts the light source parameters (such as light intensity distribution, wavelength, etc.) and mask design (such as line width, spacing, phase, etc.) to minimize the deviation between the lithography results and the expected design.

[0054] During the optimization process, the photoresist model will simulate the corresponding lithography effect according to each adjusted light source and mask configuration, and output the predicted actual graphic features. These prediction results will be compared with the FEM data and photoresist cross-section data obtained from the actual test to evaluate the lithography performance under the current configuration. Based on this evaluation, the optimization algorithm will further adjust the light source and mask parameters until a set of configurations is found so that the predicted lithography effect is highly consistent with the actual test results and meets the key indicators in the design requirements (such as line accuracy, edge roughness, etc.). Finally, when the optimization algorithm converges to a stable and optimal solution, the optimized IRO model obtained is the target IRO model.

[0055] In a method for determining a light source mask collaborative optimization IRO model provided in an embodiment of the present application, a more accurate photoresist model is constructed by introducing the actual exposure energy matrix FEM data and the actual cross-sectional data of the photoresist in the actual lithography process. Subsequently, based on this high-precision photoresist model, the initial IRO model is deeply optimized to make it closer to the actual production environment. The optimized target IRO model effectively overcomes the limitations of traditional optical models in prediction accuracy, and can fully simulate the actual behavior of the target photoresist under complex chemical interactions, so that when predicting the lithography effect, the deviation from the actual result can be significantly reduced, and the consistency between the predicted result and the actual lithography effect is significantly improved, thereby greatly improving the accuracy of the IRO model optimization.

[0056] In one embodiment, the process of performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask includes:

[0057] Constructing the test mask according to the test pattern;

[0058] Based on the initial light source, photolithography is performed on the test mask;

[0059] Collecting the actual FEM data of the test mask during the photolithography process by scanning electron microscope;

[0060] Actual cross-sectional data of the target photoresist at key positions of the test mask during the photolithography process are collected by a transmission electron microscope.

[0061] Optionally, in a specific implementation of the present application, first, test patterns are prepared, which cover and represent all key feature information on the initial design layout. These key feature information include but are not limited to line width, spacing, density changes, and possible complex structures.

[0062] Next, the prepared test pattern is input into the existing light source mask co-optimization framework (i.e., the initial IRO model). Within the initial IRO model, an initial light source configuration that meets specific lithography performance requirements is found through simulation and debugging. This initial light source configuration is the basis for subsequent lithography experiments, aiming to ensure that the expected lithography effect can be produced in the actual lithography process.

[0063] Then, the actual photolithography operation phase begins. First, a corresponding test mask is made according to the test pattern. This is a key component in the photolithography process and is used to transfer the pattern information from the mask to the photoresist. Then, the test mask is photolithographically processed using the initial light source debugged in the initial IRO model. During the photolithography process, the exposure time, light source intensity and other parameters are precisely controlled to ensure that the photolithography process is carried out according to the predetermined plan.

[0064] In order to evaluate the lithography effect, it is also necessary to use advanced microscopy technology to collect key data. Specifically, the actual exposure energy matrix (FEM) data of the test mask during the lithography process is collected by scanning electron microscope equipment. At the same time, in order to gain a deeper understanding of the behavioral changes of the photoresist during the lithography process, especially its cross-sectional morphology, the actual cross-sectional data of the target photoresist at the key positions of the test mask can also be collected using transmission electron microscope equipment.

[0065] In these optional embodiments, the comprehensiveness and accuracy of the lithography process data are ensured through precise experimental design and microscopic observation technology, providing a reliable basis for building accurate photoresist models and optimizing the lithography process, thereby effectively improving the accuracy and efficiency of semiconductor manufacturing.

[0066] In one embodiment, determining the photoresist model according to the actual FEM data and the actual cross-sectional data includes:

[0067] Inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data and the actual cross-sectional data into a preset simulation tool, simulating the photolithography process by the preset simulation tool, and obtaining the physical parameters of the target photoresist;

[0068] The physical parameters are input into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

[0069] Optionally, in an embodiment of the present application, the exposure information of the initial design layout refers to the exposure conditions defined in the design layout for the photolithography process during the semiconductor manufacturing process. These conditions include, but are not limited to, exposure dose (i.e., the total amount of light energy irradiated to the photoresist), exposure time (duration of light irradiation), exposure wavelength (wavelength of the light source used), etc. The exposure information directly affects the exposure effect of the photoresist and is one of the key factors determining the quality of the photolithography pattern.

[0070] Optionally, the material information of each thin film layer in the initial design layout refers to: In semiconductor manufacturing, multiple thin film layers are stacked on the surface of the chip, including a photoresist layer, an anti-reflection layer, a dielectric layer, a metal layer, etc. Each thin film layer has its specific material composition, and these materials have different physical and chemical properties, such as refractive index, absorption coefficient, thickness, etc. This material information is crucial for simulation tools because it determines the behavior of light when passing through different thin film layers, which in turn affects the formation of lithography patterns.

[0071] Optionally, the mask information of the test mask includes the specific patterns on the mask and the size, position, shape and other details of these patterns. This information is crucial for accurately simulating the lithography process because they are the direct objects of the interaction between light and photoresist in the actual lithography process. By inputting the mask information into the simulation tool, it is possible to simulate how light penetrates the mask and irradiates the photoresist in the actual lithography process, thereby predicting the formation of the lithography pattern.

[0072] Optionally, the physical parameters of the target photoresist refer to key numerical indicators obtained after high-precision simulation using a preset simulation tool. These physical parameters directly reflect the behavioral characteristics of the photoresist under specific process conditions, including but not limited to the thickness change, side wall angle, bottom residue, refractive index and extinction coefficient of the photoresist, etc. They together describe how the photoresist responds to external conditions during the photolithography process and ultimately forms the fine contour of the desired graphics. The accuracy of these parameters plays a vital role in the optimization of subsequent photolithography processes, the prediction of product performance, and the stability of the overall manufacturing process.

[0073] Optionally, in a specific implementation of the present application, the characteristics of the initial light source (such as wavelength, intensity distribution, etc.), the exposure information of the initial design layout (including exposure dose, time, etc.), the material information of each thin film layer (such as photoresist, anti-reflective layer, substrate, etc.) in the design layout (such as refractive index, absorption coefficient, etc.), and the precise mask information of the test mask obtained through actual experiments, the actual FEM data and the actual cross-sectional data of the target photoresist at key positions are all used as input data to comprehensively and detailedly characterize the actual state of the lithography process.

[0074] Subsequently, these input data undergo complex physical and chemical process simulations in preset simulation tools. The simulation tools use advanced algorithms and models, such as ray tracing, electromagnetic field simulation, chemical reaction kinetics, etc., to accurately calculate the interaction between light and matter in the photolithography process, thereby predicting and deriving the physical parameters of the target photoresist under specific conditions, such as thickness variation, sidewall angle, bottom residue, etc. These physical parameters are key indicators for evaluating the effects of photolithography and are directly related to the performance and quality of the final chip.

[0075] Finally, the physical parameters of the target photoresist obtained by simulation are further input into a preset optical model. This optical model is based on the wave and interference principles of light, and takes into account the optical properties of the photoresist, such as the refractive index and extinction coefficient, as well as the complex mechanism of the interaction between light and photoresist during the lithography process. Through the calculation of the optical model, a photoresist model containing the detailed physical parameters of the target photoresist can be generated. This model not only reflects the morphological changes of the photoresist in three-dimensional space, but also includes the influence of its optical properties on lithography imaging, providing a solid theoretical foundation and reliable reference basis for subsequent process optimization, layout design adjustment, etc.

[0076] Optionally, in other embodiments of the present application, the photoresist model obtained by strict simulation can be replaced by the OPC model, which incorporates the lithography parameters of the rich photoresist to simulate the physical effects of the photoresist and has predictive capabilities. Although the OPC model is a semi-empirical and semi-physical model optimized for a specific case, it can effectively simulate the behavior of the photoresist, realize the functional replacement of the photoresist model, and provide strong support for the optimization of the lithography process.

[0077] In these optional embodiments, by integrating experimental data and simulation technology, the photolithography process of the target photoresist is accurately simulated, the detailed physical parameters of the target photoresist are obtained, and a high-precision photoresist model is constructed accordingly. This method not only improves the accuracy of the model, but also provides a reliable basis for photolithography process optimization, significantly enhancing the accuracy and efficiency of semiconductor manufacturing.

[0078] In one embodiment, if Figure 2As shown, the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data and the actual cross-sectional data are input into a preset simulation tool, and the photolithography process is simulated by the preset simulation tool to obtain the physical parameters of the target photoresist, including:

[0079] S310, inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into a preset simulation tool, simulating the process through the preset simulation tool, and obtaining a first simulation result;

[0080] S320, determining a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data respectively;

[0081] S330, adjusting a preset simulation tool according to the first difference degree to obtain an adjusted simulation tool;

[0082] S340, inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into the adjusted simulation tool, and simulating the photolithography process by the adjusted simulation tool to obtain a second simulation result;

[0083] S350, when the second difference degree between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfies a preset convergence condition, obtaining the physical parameters of the target photoresist from the second simulation result.

[0084] Optionally, the preset simulation tool is a computer software or system specifically used to simulate and predict various physical and chemical changes in the lithography process. It integrates advanced physical models, chemical models and numerical calculation methods, and can perform high-precision simulation of the lithography process based on the input initial conditions (such as initial light source, exposure information of the design layout, material information of the thin film layer, mask information of the test mask, etc.).

[0085] Optionally, in the embodiment of the present application, the simulation result obtained by the preset simulation tool is a simulation prediction of the photolithography process, which is based on the input initial light source characteristics, the exposure information of the initial design layout, the material information of each thin film layer in the design layout, and the mask information of the test mask. Through the calculation of physical and chemical models, the interaction between light and matter in the photolithography process, the exposure reaction of the photoresist, and the final formed graphic contour and other key links are simulated. Specifically, the simulation results include the exposure energy distribution of the photoresist at different positions (i.e., a simulation of FEM data), the chemical changes of the photoresist after exposure (such as photolysis, cross-linking, etc.), the cross-sectional morphology of the photoresist (including line width, side wall angle, bottom residue, etc.), and the trend of how these parameters change with changes in exposure conditions.

[0086] In this application, the degree of difference is determined by comparing key parameters in the simulation results (such as exposure energy distribution, photoresist cross-sectional morphology, etc.) with the actual FEM data and actual cross-sectional data collected during the experiment. The degree of difference can be measured by various metrics, such as numerical difference, graphic similarity, error percentage, etc. By calculating the degree of difference, the accuracy and reliability of the simulation model can be evaluated, and the simulation tool can be adjusted and optimized accordingly.

[0087] Optionally, in a specific implementation of the present application, first, the characteristics of the initial light source, the exposure conditions of the initial design layout, the detailed material parameters of each thin film layer in the design layout, and the precise mask information of the test mask are imported as input into a preset rigorous simulation tool. This simulation tool is based on advanced physical models and algorithms and can simulate the complex interaction between light and matter in the lithography process.

[0088] Next, a simulation tool is used to perform a preliminary lithography process simulation to obtain a first simulation result. Although this first simulation result is based on accurate input data, due to the possible deviation between the simulation model and the actual process, the first simulation result often cannot completely match the actual lithography effect.

[0089] In order to narrow this gap, it is necessary to determine the first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data, which can be achieved by comparing key parameters in the simulation result (such as exposure energy distribution, photoresist cross-sectional morphology, etc.) with corresponding values ​​of the experimental data.

[0090] Based on the analysis of the first degree of difference, the preset simulation tool is adjusted in a targeted manner. This process specifically involves adjusting the parameters in the preset simulation tool, such as the refractive index of the optical model and the reaction rate constant of the chemical model, so as to more accurately reflect the physical and chemical changes in the actual lithography process. This parameter adjustment is accomplished through the automatic calibration function of the simulation tool, which can automatically optimize the simulation model based on the feedback of the experimental data, so that the simulation results gradually approach the actual situation.

[0091] The adjusted simulation tool is used again to simulate the photolithography process to obtain a second simulation result. Compared with the first simulation, the second simulation result should be closer to the actual data. At this time, the second degree of difference between the second simulation result and the actual FEM data and the actual cross-sectional data is compared again.

[0092] This process will be repeated until the difference between the simulation results and the actual data is reduced to an acceptable range, that is, the preset convergence condition is met. Each iteration is an optimization of the simulation model and an approximation to the actual data. Through this method of continuous iterative optimization and verification, it can be ensured that the final photoresist physical parameters are both accurate and reliable, and can truly reflect the behavioral characteristics of the photoresist under specific process conditions.

[0093] If the second difference degree meets the preset convergence condition (i.e. the difference is small enough to be acceptable), the simulation result is considered to be accurate enough and the physical parameters of the target photoresist can be extracted from the second simulation result. These physical parameters not only reflect the behavior characteristics of the photoresist under specific process conditions, but also have wide applicability because they are obtained through rigorous simulation and can be applied to any manufacturing scenario using this target photoresist.

[0094] Optionally, in an embodiment of the present application, the physical properties of the target photoresist are obtained by strict simulation, and parameterized to construct a photoresist model. This photoresist model not only simulates optical imaging, but also considers the physical effect of the photoresist in detail. Then, the photoresist model is utilized to optimize the initial IRO model, and the optimization process not only considers the spatial image, but also deeply calculates the photoresist image, so as to be closer to the actual process situation. Through optimization, the target IRO model is obtained. When optimizing the light source, the mask pattern and the sub-resolution auxiliary feature (SBAR), the target IRO model is based on the photoresist image, and the prediction ability is significantly improved. The optimized SBAR is placed more reasonably, and is closer to the mask pattern after the OPC correction, which helps to reduce the workload of the later correction and improves manufacturing efficiency and product quality.

[0095] In these optional embodiments, the difference between simulation and experimental results is effectively reduced through precise input and iterative optimization, ensuring the accuracy of the photoresist physical parameters. This iterative optimization process not only improves the reliability of the simulation tool, but also provides solid data support for the optimization of semiconductor manufacturing processes, which helps to improve product yield and performance.

[0096] In one embodiment, if Figure 3 As shown, the initial IRO model is optimized based on the photoresist model to obtain the target IRO model, and the following further includes:

[0097] S500, optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout.

[0098] Optionally, in the present application embodiment, the process window of the initial design layout is an important concept in the semiconductor manufacturing process, which refers to the process condition range that the graphics on the design layout can be successfully accurately transferred to the silicon wafer during the photolithography process, and the quality of the graphics meets the specific standard. Specifically, the process window includes multiple parameters, and these parameters jointly define the stability and repeatability of the photolithography process. The parameters of the process window size can include exposure energy, the focal length of the optical system, the thickness of the photoresist (photoresist), soft baking after glue coating, baking after exposure, hard baking temperature and anti-reflection layer thickness, etc. The changes of these factors will affect the quality of the photolithography graphics.

[0099] Optionally, in a specific implementation of the present application, the target IRO model is used to optimize the initial design layout. In this process, the IRO model analyzes the geometric features, material stacking, and expected exposure and development conditions of the initial layout, and automatically adjusts the line width, spacing, and possible auxiliary graphics (such as SRAF) of the layout through an algorithm to maximize the process window, that is, to ensure that a qualified pattern can still be obtained within a certain process fluctuation range.

[0100] During the optimization process, the IRO model will iterate repeatedly, and each iteration will adjust the layout according to the current optimization results and preset goals (such as uniformity of critical dimensions, minimization of line edge roughness, etc.) until the predetermined optimization criteria are met. Ultimately, the design layout optimized by the IRO model will have a wider process window, that is, it can maintain high pattern quality and yield under different lithography and manufacturing conditions.

[0101] In these optional embodiments, optimizing the initial design layout through the target IRO model not only improves the design flexibility in semiconductor manufacturing, but also effectively reduces the production risks caused by process fluctuations, which is of great significance for improving product performance, reducing costs and accelerating product time to market.

[0102] In one embodiment, optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout includes:

[0103] According to the target IRO model, the initial design layout is optimized to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout;

[0104] According to the target light source, target mask pattern and target auxiliary pattern placement method, a target process window corresponding to the initial design layout is obtained through simulation calculation.

[0105] In this embodiment, first, the initial design layout is deeply optimized using the built and verified target IRO model. The target IRO model will comprehensively optimize the placement method of the light source, mask pattern, and auxiliary pattern (such as SBAR, sub-resolution auxiliary feature) of the design layout based on the physical properties of the photoresist. The optimization goal is to maximize the process window, that is, to ensure that the design layout can be accurately and high-quality transferred to the silicon wafer within a wide range of process fluctuations.

[0106] Specifically, the target IRO model takes into account the nonlinear behavior of the photoresist during the exposure process, such as the complex shrinkage effect, and reduces the pattern distortion and defects caused by process fluctuations by adjusting the intensity and distribution of the light source, optimizing the shape and size of the mask pattern, and rationally laying out the auxiliary pattern. These optimization measures are designed to improve the uniformity of the pattern, reduce the roughness of the line edges, and expand the boundaries of the process window.

[0107] After the optimization is completed, the optimized target light source, target mask pattern, and target auxiliary pattern placement method are input into the simulation tool. Based on these optimized parameters, the simulation tool simulates the entire lithography process, including light propagation, photoresist exposure, development, and pattern formation. Through simulation calculations, the graphic quality of the design layout under different process conditions (such as exposure energy, focal length change, etc.) can be predicted and evaluated, thereby obtaining the target process window corresponding to the initial design layout.

[0108] In these optional embodiments, since the physical properties of the photoresist and the complex behavior after exposure are fully considered in this process, the simulated process window is more consistent with the performance under actual process conditions, and the prediction results are more accurate. In addition, the optimized auxiliary pattern placement method also provides a valuable reference for subsequent optical proximity correction (OPC), which helps to reduce the workload of OPC and ensure that the OPC-corrected pattern is consistent with the IRO-optimized pattern, thereby further improving manufacturing efficiency and product quality.

[0109] Figure 4 A schematic diagram of the structure of a device for determining a light source mask collaborative optimization IRO model provided in another embodiment of the present application is shown. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0110] Reference Figure 4 , the determination device of the light source mask collaborative optimization IRO model may include:

[0111] A first determination module 401 is used to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout;

[0112] A photolithography module 402 is used to perform photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask, wherein the test mask is determined according to the test pattern;

[0113] A second determination module 403, configured to determine a photoresist model according to the actual FEM data and the actual cross-sectional data;

[0114] The optimization module 404 is used to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

[0115] In one embodiment, the lithography module 402 may include:

[0116] A first framework submodule is used to construct the test mask according to the test pattern;

[0117] A first photolithography submodule, configured to perform photolithography on the test mask based on the initial light source;

[0118] A first collecting submodule, used for collecting the actual FEM data of the test mask during the photolithography process through a scanning electron microscope;

[0119] The second collecting submodule is used to collect actual cross-sectional data of the target photoresist at key positions of the test mask during the photolithography process through a transmission electron microscope.

[0120] In one embodiment, the second determining module 403 may include:

[0121] A first simulation submodule is used to input the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data and the actual cross-section data into a preset simulation tool, and simulate the photolithography process through the preset simulation tool to obtain the physical parameters of the target photoresist;

[0122] The first generating submodule is used to input the physical parameters into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

[0123] In one embodiment, the first simulation submodule may include:

[0124] A first simulation unit is used to input the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into a preset simulation tool, and simulate the process through the preset simulation tool to obtain a first simulation result;

[0125] A first determining unit, configured to determine a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data, respectively;

[0126] an adjusting unit, configured to adjust the preset simulation tool according to the first difference degree to obtain an adjusted simulation tool;

[0127] A second simulation unit is used to input the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into the adjusted simulation tool, and simulate the photolithography process through the adjusted simulation tool to obtain a second simulation result;

[0128] An acquisition unit is used to acquire the physical parameters of the target photoresist from the second simulation result when a second difference degree between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfies a preset convergence condition.

[0129] In one embodiment, the device for determining the light source mask collaborative optimization IRO model may further include:

[0130] The second optimization module is used to optimize the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout.

[0131] In one embodiment, the second optimization module may include:

[0132] An optimization submodule, used to optimize the initial design layout according to the target IRO model to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout;

[0133] The second simulation submodule is used to obtain the target process window corresponding to the initial design layout through simulation calculation according to the target light source, the target mask pattern and the target auxiliary pattern placement method.

[0134] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of the present application, and are devices corresponding to the above-mentioned battery thermal runaway warning method. All implementation methods in the above-mentioned method embodiment are applicable to the embodiments of the device. Its specific functions and technical effects can be found in the method embodiment part, which will not be repeated here.

[0135] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0136] Figure 5 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown.

[0137] The device may include a processor 501 and a memory 502 storing program instructions.

[0138] When the processor 501 executes the program, the steps in any of the above method embodiments are implemented.

[0139] Exemplarily, the program may be divided into one or more modules / units, one or more modules / units are stored in the memory 502, and executed by the processor 501 to complete the present application. One or more modules / units may be a series of program instruction segments capable of completing a specific function, and the instruction segments are used to describe the execution process of the program in the device.

[0140] Specifically, the processor 501 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0141] The memory 502 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 502 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 502 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 502 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 502 is a non-volatile solid-state memory.

[0142] The memory may include read-only memory (ROM), random access memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical or other physical / tangible memory storage devices. Thus, typically, the memory includes one or more tangible (non-transitory) readable storage media (e.g., memory devices) encoded with software including computer executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present disclosure.

[0143] The processor 501 implements any one of the methods in the above embodiments by reading and executing program instructions stored in the memory 502 .

[0144] In one example, the electronic device may further include a communication interface 503 and a bus 510. The processor 501, the memory 502, and the communication interface 503 are connected via the bus 510 and communicate with each other.

[0145] The communication interface 503 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0146] Bus 510 includes hardware, software or both, and the parts of online data flow billing equipment are coupled to each other. For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front-end bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 510 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the present application considers any suitable bus or interconnection.

[0147] In addition, in combination with the method in the above embodiment, the embodiment of the present application can provide a storage medium for implementation. The storage medium stores program instructions; when the program instructions are executed by a processor, any one of the methods in the above embodiment is implemented.

[0148] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0149] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0150] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0151] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0152] The functional modules shown in the above block diagram can be implemented as hardware, software, firmware or their combination. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), suitable firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. Programs or code segments can be stored in machine-readable media, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable media" can include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. Code segments can be downloaded via computer grids such as the Internet, intranets, etc.

[0153] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0154] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0155] The above are only specific implementation methods of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A method for determining a light source mask collaborative optimization IRO model, characterized in that: The method comprises: Inputting a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to the initial design layout, wherein the test pattern includes a key pattern in the initial design layout; According to the initial light source, a test mask is photolithographically processed using a target photoresist to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask, wherein the test mask is determined according to the test pattern; Determining a photoresist model according to the actual FEM data and the actual cross-sectional data; Based on the photoresist model, the initial IRO model is optimized to obtain a target IRO model.

2. The method according to claim 1, characterized in that The method of performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist located at a key position of the test mask comprises: Constructing the test mask according to the test pattern; Based on the initial light source, photolithography is performed on the test mask; Collecting the actual FEM data of the test mask during the photolithography process by scanning electron microscope; Actual cross-sectional data of the target photoresist at key positions of the test mask during the photolithography process are collected by a transmission electron microscope.

3. The method according to claim 1, characterized in that Determining the photoresist model according to the actual FEM data and the actual cross-sectional data includes: Inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data and the actual cross-sectional data into a preset simulation tool, simulating the photolithography process by the preset simulation tool, and obtaining the physical parameters of the target photoresist; The physical parameters are input into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

4. The method according to claim 3, characterized in that: The initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data and the actual cross-sectional data are input into a preset simulation tool, and the photolithography process is simulated by the preset simulation tool to obtain the physical parameters of the target photoresist, including: Inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into a preset simulation tool, simulating the process by the preset simulation tool, and obtaining a first simulation result; determining a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data, respectively; According to the first difference degree, adjusting the preset simulation tool to obtain an adjusted simulation tool; Inputting the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, and the mask information of the test mask into the adjusted simulation tool, and simulating the photolithography process by the adjusted simulation tool to obtain a second simulation result; When a second degree of difference between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfies a preset convergence condition, the physical parameters of the target photoresist are acquired from the second simulation result.

5. The method according to claim 1, characterized in that After optimizing the initial IRO model based on the photoresist model to obtain the target IRO model, the method further includes: The initial design layout is optimized according to the target IRO model to obtain a target process window corresponding to the initial design layout.

6. The method according to claim 1, characterized in that The step of optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout includes: According to the target IRO model, the initial design layout is optimized to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout; According to the target light source, target mask pattern and target auxiliary pattern placement method, a target process window corresponding to the initial design layout is obtained through simulation calculation.

7. A device for determining a light source mask collaborative optimization IRO model, characterized in that: The device comprises: A first determination module is used to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout; A photolithography module, used to perform photolithography on a test mask using a target photoresist according to the initial light source, to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist located at a key position of the test mask, the test mask being determined according to the test pattern; A second determination module, used for determining a photoresist model according to the actual FEM data and the actual cross-sectional data; The optimization module is used to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

8. An electronic device, characterized in that: The device comprises: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for determining the light source mask collaborative optimization IRO model according to any one of claims 1 to 6 is implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for determining a light source mask collaborative optimization IRO model according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for determining a light source mask collaborative optimization IRO model as described in any one of claims 1 to 6.

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