Timestamp generation method and device

Abstract

The embodiment of the invention provides a timestamp generation method and device. The method is executed by a server, a central processing unit of the server comprises a timestamp counter used for recording the number of clock cycles of the central processing unit, and the method comprises the steps that in response to a received timestamp distribution request, a first clock cycle number currently recorded by the timestamp counter is read by executing a target instruction; determining a current first physical clock according to the first clock cycle number and a locally stored first frequency of the central processing unit; a target timestamp is generated that is greater than or equal to the first physical clock.

Description

Technical Field

[0001] The embodiments of this specification relate to the field of computer technology, and specifically, to a method and device for generating a timestamp. Background Art

[0002] In modern distributed systems, transaction timing consistency and globally unique timestamps are crucial. However, the existing GTS (Global Timestamp Service) service relies on physical clocks to generate timestamps, and needs to obtain the actual physical clock when processing each GTS request. This operation usually has additional overhead, affecting the overall throughput of the GTS service.

[0003] There is an urgent need for a reasonable and reliable solution that can reduce the overhead of GTS services in obtaining physical clocks and improve the overall throughput of GTS services. Summary of the invention

[0004] The embodiments of this specification provide a timestamp generation solution, which can reduce the overhead of the GTS service in acquiring the physical clock and improve the overall throughput of the GTS service.

[0005] In a first aspect, an embodiment of the present specification provides a timestamp generation method, which is executed by a server, wherein a central processing unit of the server includes a timestamp counter for recording its clock cycle number, and the method includes: in response to receiving a timestamp allocation request, reading and obtaining a first clock cycle number currently recorded by the timestamp counter by executing a target instruction; determining a current first physical clock based on the first clock cycle number and a first frequency of the central processing unit stored locally; and generating a target timestamp that is greater than or equal to the first physical clock.

[0006] In some embodiments, the first frequency is determined based on an actual second physical clock and an actual third physical clock, and a second clock cycle number of the central processor corresponding to the second physical clock and a third clock cycle number corresponding to the third physical clock; the second physical clock or the third physical clock is set as a reference physical clock; the determination of the current first physical clock includes: determining the current first physical clock based on the first clock cycle number, and the locally stored first frequency, the reference physical clock and the clock cycle number corresponding to the reference physical clock.

[0007] In some embodiments, determining the current first physical clock includes: calculating the target step of the physical clock corresponding to the parameter value of the first physical clock and the first parameter based on the first clock cycle number, the first frequency, and the first parameter for recording the clock cycle number involved in calculating the physical clock when the last timestamp was allocated; in response to the target step being less than a preset first time interval, using the first frequency as the target frequency; in response to the target step being greater than or equal to the first time interval, obtaining the current actual fourth physical clock and the fourth clock cycle number currently recorded by the timestamp counter, calculating the second frequency of the central processing unit based on the fourth physical clock and the fourth clock cycle number, using the second frequency to update the locally stored first frequency, and using the second frequency as the target frequency; calculating the first physical clock based on the first clock cycle number and the target frequency.

[0008] In some embodiments, after determining the current first physical clock, the method further includes: using the first clock cycle number to update the parameter value of the first parameter.

[0009] In some embodiments, the first frequency is determined based on an actual second physical clock and an actual third physical clock, and a second clock cycle number of the central processor corresponding to the second physical clock and a third clock cycle number corresponding to the third physical clock; the second physical clock or the third physical clock is set as a reference physical clock; and calculating the second frequency of the central processor includes: calculating the second frequency based on the fourth physical clock, the fourth clock cycle number, the reference physical clock and the clock cycle number corresponding to the reference physical clock.

[0010] In some embodiments, calculating the first physical clock includes: calculating the first physical clock according to the first clock cycle number, the target frequency, the reference physical clock, and the clock cycle number corresponding to the reference physical clock.

[0011] In some embodiments, the server is provided with a system state, which is divided into a calibration state and a non-calibration state, and the calibration state and the non-calibration state are associated with different calculation algorithms; the calculation of the first physical clock includes: calculating the first physical clock using the calculation algorithm associated with the current system state.

[0012] In some embodiments, the current system state is the calibration state; the calculation algorithm associated with the current system state is used to calculate the first physical clock, including: using the first calculation algorithm associated with the calibration state to calculate the first physical clock according to the first clock cycle number, target frequency and compensation amount; wherein the compensation amount is the product of a preset coefficient and the target frequency.

[0013] In some embodiments, the target frequency is the second frequency; and the determining the current first physical clock further includes: in response to determining that the fourth physical clock is greater than the first physical clock, using the fourth physical clock to update the first physical clock.

[0014] In some embodiments, the current system state is the calibration state; after determining that the fourth physical clock is greater than the first physical clock, it also includes: setting the current system state to the non-calibration state.

[0015] In some embodiments, the target frequency is the second frequency, and the current system state is the non-calibrated state; the method also includes: in response to the fourth physical clock being less than the first physical clock, and the difference between the first physical clock and the fourth physical clock being greater than a preset second time interval, setting the current system state to the calibrated state.

[0016] In some embodiments, the target frequency is the second frequency, and the current system state is the calibration state; the method also includes: in response to the fourth physical clock being equal to the first physical clock, or the fourth physical clock being less than the first physical clock, and the difference between the first physical clock and the fourth physical clock being less than or equal to a preset second time interval, setting the current system state to the non-calibration state.

[0017] In some embodiments, generating a target timestamp includes: determining whether the first physical clock is greater than a parameter value of a second parameter; wherein the second parameter is used to record the sum of a last assigned timestamp and a preset value, and the preset value is a positive number; if the determination result is yes, determining the first physical clock as the target timestamp; if the determination result is no, determining the parameter value of the second parameter as the target timestamp; after generating the target timestamp, it also includes: updating the parameter value of the second parameter using the sum of the target timestamp and the preset value.

[0018] In a second aspect, an embodiment of the present specification provides a timestamp generation device, which is applied to a server, wherein the central processing unit of the server includes a timestamp counter for recording its clock cycle number, and the device includes: an acquisition unit, configured to respond to receiving a timestamp allocation request, read and obtain the first clock cycle number currently recorded by the timestamp counter by executing a target instruction; a determination unit, configured to determine the current first physical clock based on the first clock cycle number and the first frequency of the central processing unit stored locally; and a generation unit, configured to generate a target timestamp that is greater than or equal to the first physical clock.

[0019] In a third aspect, an embodiment of the present specification provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed in a computer, the computer is caused to execute the method described in any implementation manner in the first aspect.

[0020] In a fourth aspect, an embodiment of the present specification provides a computing device, comprising a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method described in any implementation manner in the first aspect is implemented.

[0021] In a fifth aspect, an embodiment of the present specification provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the method described in any implementation manner in the first aspect.

[0022] In the solution provided by the above-mentioned embodiment of the present specification, the CPU (Central Processing Unit) of the server includes a TSC (Time Stamp Counter) for recording its clock cycle number. After receiving the timestamp allocation request, the server can read the first clock cycle number currently recorded by the TSC by executing the target instruction. Among them, the target instruction returns the first clock cycle number by writing the first clock cycle number into the target register of the CPU. Afterwards, the server can determine the current first physical clock according to the first clock cycle number and the first frequency of the CPU stored locally, and then generate a target timestamp, which is greater than or equal to the first physical clock. Since reading the CPU clock cycle number from the register has a lower overhead, using the target instruction to read the CPU clock cycle number from the register and then calculate the physical clock can significantly reduce the overhead of the GTS service to obtain the physical clock compared to the traditional method of reading the actual physical clock, and improve the overall throughput of the GTS service. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the multiple embodiments disclosed in this specification, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only the multiple embodiments disclosed in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 It is a schematic diagram of an application scenario in which the embodiments of this specification can be applied;

[0025] Figure 2 is a flowchart of a method for generating a timestamp in an embodiment of this specification;

[0026] Figure 3 is a flow chart of a physical clock determination process in an embodiment of this specification;

[0027] Figure 4 is another flow chart of the physical clock determination process in an embodiment of this specification;

[0028] Figure 5 It is a structural schematic diagram of a timestamp generating device in an embodiment of this specification. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this specification.

[0030] As mentioned above, the existing GTS service relies on the physical clock to generate timestamps. It is necessary to obtain the actual physical clock when processing each GTS request. This operation usually has additional overhead and affects the overall throughput of the GTS service.

[0031] The embodiments of this specification provide a timestamp generation solution, which can reduce the overhead of GTS service in acquiring physical clock and improve the overall throughput of GTS service.

[0032] Figure 1 1 is a schematic diagram of an application scenario in which the embodiments of this specification can be applied. The application scenario involves a server 101 that provides GTS services, and several clients that can communicate with the server 101 (including but not limited to Figure 1 ).

[0033] The server 101 may be referred to as a GTS server, which may be included in a distributed system. The distributed system may include, but is not limited to, a distributed database. The server 101 includes a central processor 103. The central processor 103 includes a target register (such as Figure 1 ) and a timestamp counter 105 as shown in , and supports a target instruction for reading the timestamp counter 105.

[0034] Register 104 includes but is not limited to EDX:EAX registers. Among them, EAX (Extended Accumulator Register) is often used to store the results of arithmetic operations. EDX (Extended Data Register) is often used to store additional data, especially when used in conjunction with EAX when performing multiplication and division operations. The timestamp counter 105 is specifically used to record the number of clock cycles of the central processing unit 103 since the last reset. The target instruction may include but is not limited to the existing RDTSC (Read Time Stamp Counter) instruction. The RDTSC instruction is an instruction commonly supported by existing CPUs, which can load the number of CPU clock cycles into the EDX:EAX registers for external use.

[0035] In practice, the physical clock t at any moment can be calculated based on the CPU frequency freq and the number of clock cycles c at that moment. For example, the physical clock t can be calculated using the following formula (1):

[0036]

[0037] Since the CPU frequency needs to participate in the calculation of the physical clock, the server 101 can set parameters such as the CPU frequency by executing an initialization process before starting to provide the GTS service.

[0038] Specifically, in one implementation, according to the above formula (1), it can be deduced that In the initialization process, the server 101 can use the formula derived here to calculate the CPU frequency. For example, the server 101 can obtain the actual physical clock t, and obtain the number of clock cycles c of the central processor 103 corresponding to t by using the target instruction, and use the formula derived here to calculate the frequency freq of the central processor 103 according to the physical clock t and the number of clock cycles c.

[0039] Considering that the above formula (1) can be used to calculate the two physical clocks t 1 and t 2 , where t 2 >t 1If there is a physical clock t 1 and t 2 , and the CPU corresponding to t obtained by executing the target instruction 1 The number of clock cycles c 1 , and corresponds to t 2 The number of clock cycles c 2 , then the physical clock t 2 and t 1 The step Δt can be calculated by the following formula (2):

[0040]

[0041] According to the above formula (2), it can be deduced that the CPU frequency freq can be calculated by the following formula (3):

[0042] It can be calculated that:

[0043]

[0044] Therefore, in order to improve the accuracy of the calculated CPU frequency, in another embodiment, the server 101 can use the above formula (3) as the calculation formula of the CPU frequency. In the initialization process, the server 101 can obtain the actual physical clock t 1 and the actual physical clock t 2 , where t 2 >t 1 , and the CPU 103 corresponding to t is obtained by executing the target instruction to read 1 The number of clock cycles c 1 , and corresponds to t 2 The number of clock cycles c 2 , and then use the above formula (3) according to the physical clock t 1 ,t 2 and the number of clock cycles c 1 、c 2 , calculate the frequency freq of the central processor 103, and store the frequency freq locally in the server 101.

[0045] After server 101 completes the initialization process, any of the above-mentioned clients, such as client 102, can request server 101 to assign a globally unique timestamp when it needs to assign a version number to an event or transaction to be submitted, and then use the timestamp as the version number.

[0046] Specifically, if Figure 1As shown, the client 102 can send a timestamp allocation request to the server 101. Afterwards, the server 101 can read the number of clock cycles c currently recorded by the timestamp counter 105 by executing the target instruction. The target instruction returns the number of clock cycles c by writing the number of clock cycles c into the register 104. Then, the server 101 can determine the current physical clock t based on the number of clock cycles c and the frequency freq of the central processor 103 stored locally. Then, the server 101 can generate a timestamp gts based on the physical clock t. The timestamp gts is greater than or equal to the physical clock t. Then, the server 101 can return the timestamp gts to the client 102.

[0047] Next, combine Figure 2 , introduces the specific timestamp generation process. Among them, Figure 2 1 is a flowchart of a method for generating a timestamp in an embodiment of the present specification. The method is executed by the server 101 as described above, and includes steps S201-S205 as shown below.

[0048] like Figure 2 As shown, in step S201, in response to receiving a timestamp allocation request, the number of clock cycles c currently recorded by the timestamp counter 105 is read and obtained by executing a target instruction.

[0049] The target instruction returns the clock cycle number c by writing the clock cycle number c into the register 104. For a detailed explanation of the target instruction, please refer to the relevant description in the previous text, which will not be repeated here.

[0050] Next, in step S203, the current physical clock t is determined according to the number of clock cycles c and the frequency freq of the central processor 103 stored locally.

[0051] Specifically, as an implementation method, the server 101 can use the aforementioned formula (1) to calculate the current physical clock t according to the number of clock cycles c and the frequency freq of the central processor 103 stored locally.

[0052] Considering that if there is a reference physical clock t 0 , and the CPU corresponds to t 0 The number of clock cycles c 0 , then after obtaining the current CPU clock cycle number c by executing the target instruction, the CPU frequency freq stored locally and the reference physical clock t 0 and the number of clock cycles c 0 , determine the current physical clock t. For example, the current physical clock t can be calculated using the following formula (4):

[0053]

[0054] Wherein, Δt in formula (4) represents the physical clock t and the reference physical clock t 0 of stepping.

[0055] Based on this, in order to improve the accuracy of the calculated physical clock, as another implementation method, the server 101 can calculate the physical clock t 1 and t 2 One of the clocks in is used as the reference physical clock t 0 Furthermore, since the current time is far from the reference physical clock t 0 The farther away, the more accurate the calculated physical clock is, so the physical clock t 1 Determined as the reference physical clock t 0 In addition, the number of clock cycles corresponding to this clock needs to be used as the reference physical clock t 0 The corresponding number of clock cycles c 0 , and then the reference physical clock t 0 and the number of clock cycles c 0 The server 101 can store the corresponding data locally on the server 101. In this case, the server 101 can store the corresponding data locally on the server 101 according to the number of clock cycles c, the frequency freq of the CPU 103 stored locally, and the reference physical clock t 0 and the number of clock cycles c 0 , calculate the current physical clock t; for example, use the above formula (4) to calculate the current physical clock t.

[0056] Next, in step S205, a timestamp gts is generated, which is greater than or equal to the physical clock t.

[0057] Specifically, in order to ensure the monotonically increasing and globally unique timestamp, the server 101 may also set a parameter (hereinafter referred to as the second parameter) during the execution of the initialization process as described above, which is used to record the sum of the last assigned timestamp and the preset value. The preset value is a positive number. In one example, the preset value may be 1. In the initialization process, the parameter value of the second parameter may be initialized to 0. After obtaining the current physical clock t by executing step S203, the server 101 may determine whether the physical clock t is greater than the parameter value of the second parameter. If the determination result is yes, the physical clock t may be determined as the timestamp gts. If the determination result is no, the parameter value of the second parameter may be determined as the timestamp gts. In addition, after the timestamp gts is generated, the parameter value of the second parameter is updated using the sum of the timestamp gts and the preset value.

[0058] Take the parameter name of the second parameter as last id, and the above preset value as 1 as an example. In the above initialization process, let last id = 0. After the server 101 obtains the current physical clock t by executing step S203, it can compare the physical clock t with last id. If t>last_id, gts = t, last_id = t+1 can be set; otherwise, gts = last_id, last_id = last_id+1 can be set.

[0059] Figure 2 The scheme provided by the corresponding embodiment enables the server 101 to read the number of clock cycles c currently recorded by the timestamp counter 105 by executing the target instruction after receiving the timestamp allocation request. The target instruction returns the number of clock cycles c by writing the number of clock cycles c into the register 104. Afterwards, the server 101 can determine the current physical clock t based on the number of clock cycles c and the frequency freq of the central processing unit 103 stored locally, and then generate a timestamp gts, which is greater than or equal to the physical clock t. Since reading the number of CPU clock cycles from the register has a lower overhead, using the target instruction to read the number of CPU clock cycles from the register and then calculating the physical clock can significantly reduce the overhead of the GTS service to obtain the physical clock compared to the traditional method of reading the actual physical clock, thereby improving the overall throughput of the GTS service.

[0060] In practice, as the GTS service runs, the calculated physical clock may have an error with the actual physical clock, and at this time, the calculated physical clock needs to be calibrated. In one implementation, a calibration trigger condition can be pre-set, and when the condition is triggered, the CPU frequency is calibrated first, and then the physical clock is calculated based on the calibrated CPU frequency, so that the calculated physical clock can be calibrated.

[0061] The calibration trigger condition can be the current physical clock t and the physical clock t that participated in the last timestamp generation. last The step Δt is greater than or equal to a preset time interval (hereinafter referred to as the first time interval). Taking INTERVAL as an example to represent the first time interval, the calibration trigger condition is Δt≥INTERVAL. It should be noted that INTERVAL is a constant, which can be built-in or customized. As an example, 500ms (milliseconds) ≤ INTERVAL ≤ 1000ms.

[0062] According to the formula (2) as described above, it can be known that the stepping of the two physical clocks can be calculated based on the frequency of the CPU and the number of clock cycles of the CPU corresponding to the two physical clocks. Therefore, the solution provided in the embodiment of this specification, when including a calibration process, can enable the server 101 to set a parameter (hereinafter referred to as the first parameter) during the execution of the initialization process as described above, which is used to record the number of clock cycles involved in calculating the physical clock when the timestamp was last allocated. It should be noted that the parameter value of the first parameter is initialized to 0 in the initialization process.

[0063] Last rdts c Taking the parameter name of the first parameter as an example, the current physical clock t and the physical clock t that participated in the last timestamp generation are last The step Δt can be calculated by the following formula (5):

[0064]

[0065] In the case where the solution provided in the embodiments of this specification includes a calibration process, the server 101 can execute the following steps: Figure 3 The physical clock determination process shown in the figure determines the current physical clock t. Figure 3 It is a flow chart of the physical clock determination process in the embodiment of this specification. The physical clock determination process includes steps S301-S311.

[0066] like Figure 3 As shown, in step S301, based on the number of clock cycles c, the frequency freq of the locally stored central processor 103, and the first parameter used to record the number of clock cycles involved in calculating the physical clock when the timestamp was last allocated, the target step of the physical clock corresponding to the current physical clock t and the parameter value of the first parameter is calculated.

[0067] Last_rdtsc is used to represent the parameter name of the first parameter. last Taking the physical clock corresponding to the parameter value of the first parameter as an example, the above formula (5) can be used to calculate the current physical clock t and the physical clock t according to the clock cycle number c, the frequency freq and the parameter value of the parameter last_rdtsc last Target stepping.

[0068] Next, in step S303, it is determined whether the target step is greater than or equal to a preset first time interval.

[0069] If the target step is less than the first time interval, it means that the calibration trigger condition is not met and the CPU frequency does not need to be calibrated, so steps S305 and S311 can be performed in sequence. If the target step is greater than or equal to the first time interval, it means that the calibration trigger condition is met and the CPU frequency needs to be calibrated, so steps S307, S309, and S311 can be performed in sequence.

[0070] In step S305, in response to the determination result of step S303 being negative, the frequency freq is set as the target frequency.

[0071] In step S307, in response to the determination result of step S303 being yes, the current actual physical clock t 3 and the number of clock cycles currently recorded by the time stamp counter 105 c 3 .

[0072] The number of clock cycles c currently recorded by the time stamp counter 105 can be obtained by executing the target instruction. 3 .

[0073] Next, in step S309, according to the physical clock t 3 and the number of clock cycles c 3 The frequency freq' of the central processor 103 is calculated, freq' is used to update the locally stored freq, and freq' is used as the target frequency.

[0074] Specifically, in one embodiment, In another embodiment, the reference physical clock t as described above is stored locally. 0 and the number of clock cycles c 0 In the case of 3 , number of clock cycles c 3 , reference physical clock t 0 and the number of clock cycles c 0 , calculate the frequency freq' of the central processor 103; for example, the frequency freq' can be calculated using the formula (3) in the previous text. After the frequency freq' is calculated, the locally stored frequency freq is updated to freq', that is, freq = freq'. In addition, the frequency freq' is used as the target frequency to participate in the calculation of the current physical clock.

[0075] Next, in step S311, the current physical clock t is calculated according to the number of clock cycles c and the target frequency.

[0076] Specifically, as an implementation method, the server 101 can use the aforementioned formula (1) to calculate the current physical clock t according to the number of clock cycles c and the target frequency.

[0077] As another implementation, the server 101 may use the aforementioned formula (4) according to the clock cycle number c, the target frequency, and the aforementioned reference physical clock t 0 and the number of clock cycles c 0 , calculate the current physical clock t.

[0078] Figure 3 The corresponding embodiment provides a dynamic calibration mechanism, which adjusts the calculation method of the CPU frequency by periodically comparing the difference between the current physical clock and the physical clock that last participated in calculating the timestamp (such as when processing a received timestamp allocation request), thereby effectively reducing the time error and ensuring the accuracy of the GTS service.

[0079] In one embodiment, when the target frequency is frequency freq′, after calculating the current physical clock t according to the number of clock cycles c and the target frequency, in order to further improve the accuracy of the calculated physical clock and ensure the monotonic increase of the timestamp, a calibration process may be performed on the calculated physical clock. In the case where the solution provided in the embodiment of the present specification includes the calibration process, in the initialization process as described above, the server 101 may set a system state divided according to a calibration state T and a non-calibration state (which may be called a normal state) S, and initialize the current system state to a non-calibration state S. Among them, the calibration state T and the non-calibration state S are associated with different calculation algorithms. In the process of allocating timestamps, the server 101 may calculate the physical clock using the calculation algorithm associated with the current system state.

[0080] It should be pointed out that the calculation algorithms associated with the calibration state T and the non-calibration state S both involve the number of clock cycles and CPU frequency involved in calculating the physical clock. In addition, the calculation algorithm associated with the calibration state T (hereinafter referred to as the first calculation algorithm) also introduces an additional compensation amount to reduce the growth rate of the calculated physical clock. Among them, the compensation amount is an expression, and its value is the product of a preset coefficient and the CPU frequency. Normally, the value of the compensation amount will make the difference between the calculated physical clock and the actual physical clock less than or equal to a preset second time interval. The second time interval is a constant that represents the threshold value of the phase difference time. Taking THRES as an example to represent the second time interval, as an implementation method, 500ms≤THRES≤1000ms, and the preset coefficient is in The compensation amount and the second time interval may be built-in or user-defined, and are not specifically limited herein.

[0081] As an example, the calculation formula of the calculation algorithm associated with the non-calibration state S (hereinafter referred to as the second calculation algorithm) may be the aforementioned formula (1), and the calculation formula of the first calculation algorithm may be the following formula (6):

[0082]

[0083] Wherein, Δfreq represents the compensation amount. Taking w as an example to represent the above preset coefficient, Δfreq=w*freq.

[0084] As another example, the calculation formula of the second calculation algorithm may be the aforementioned formula (4), and the calculation formula of the first calculation algorithm may be the following formula (7):

[0085]

[0086] In the case where the server 101 is provided with the system status as described above, the server 101 can execute the following Figure 4 The physical clock determination process shown in the figure determines the current physical clock t. Figure 4 is another flow chart of the physical clock determination process in the embodiment of this specification. The physical clock determination process includes steps S401-S421.

[0087] like Figure 4 As shown, in step S401, based on the number of clock cycles c, the frequency freq of the locally stored central processor 103, and the first parameter used to record the number of clock cycles involved in calculating the physical clock when the timestamp was last allocated, the target step of the physical clock corresponding to the current physical clock t and the parameter value of the first parameter is calculated.

[0088] In step S403, it is determined whether the target step is greater than or equal to a preset first time interval.

[0089] In step S405, in response to the determination result of step S403 being negative, the frequency freq is set as the target frequency.

[0090] In step S407, in response to the determination result of step S403 being yes, the current actual physical clock t 3 and the number of clock cycles currently recorded by the time stamp counter 105 c 3 .

[0091] In step S409, according to the physical clock t 3 and the number of clock cycles c 3 The frequency freq' of the central processor 103 is calculated, freq' is used to update the locally stored freq, and freq' is used as the target frequency.

[0092] Among them, for the explanation of steps S401-S409, please refer to the relevant explanation of steps S301-S309 in the previous text, which will not be repeated here.

[0093] In step S411, the current physical clock t is calculated according to the number of clock cycles c and the target frequency using a calculation algorithm associated with the current system state.

[0094] Specifically, if the current system state is the non-calibration state S, the second calculation algorithm is used to calculate the current physical clock t according to the number of clock cycles c and the target frequency. If the current system state is the calibration state T, the first calculation algorithm is used to calculate the current physical clock t according to the number of clock cycles c, the target frequency and the compensation amount. The value of the compensation amount is the product of the preset coefficient and the target frequency.

[0095] It should be noted that, when the target frequency is freq′, after the current physical clock t is calculated by executing step S411, a calibration process including steps S413-S421 may be entered.

[0096] Specifically, in step S413, when the target frequency is freq′, the physical clock t 3 Is it greater than the physical clock t?

[0097] When the determination result of step S413 is t 3 >t, it means that the calculated physical clock is not increasing as fast as the actual physical clock, and the actual physical clock is more accurate. Therefore, it is necessary to continue to execute step S415 and use the physical clock t 3 Update the physical clock t, that is, let t = t 3 In addition, since the calculated physical clock growth rate is not as fast as the actual physical clock, there is no need to reduce the calculated physical clock growth rate by using the compensation amount, so when the current system state is the non-calibrated state S, the current system state is made to continue to be in the non-calibrated state S, or when the current system state is the calibrated state T, the current system state is set to the non-calibrated state S by executing step S417. Therefore, when the timestamp is allocated next time, the physical clock is calculated using the second calculation algorithm.

[0098] When the determination result of step S413 is t 3 =t, it indicates that the calculated physical clock and the actual physical clock increase at the same speed, and there is no need to calibrate the calculated physical clock. Therefore, when the current system state is the non-calibrated state S, the current system state continues to be in the non-calibrated state S, or when the current system state is the calibrated state T, the current system state is set to the non-calibrated state S by executing step S417.

[0099] When the determination result of step S413 is t 3 <When t, in order to ensure the monotonically increasing property of the timestamp, the actual physical clock cannot be used to replace the calculated physical clock. It is necessary to then execute step S419 to compare the difference between the calculated physical clock and the actual physical clock with a preset second time interval, and then execute the subsequent processing flow based on the comparison result.

[0100] Specifically, in step S419, determine whether the difference between the physical clock t and t 3 is greater than the preset second time interval.

[0101] According to the description in the previous text, usually the value of the compensation amount will make the difference between the calculated physical clock and the actual physical clock less than or equal to the second time interval. Therefore, in the case where the current system state is the calibration state T, the difference between the physical clock t calculated using the first calculation algorithm and the actual physical clock t 3 is usually less than or equal to the second time interval and will not be greater than the second time interval. In the case where the current system state is the non-calibration state S, the difference between the physical clock t calculated using the second calculation algorithm and the actual physical clock t 3 may be greater than, less than, or equal to the second time interval.

[0102] Therefore, in the case where the current system state is the calibration state T, if the determination result of step S419 is no, it means that the growth rates of the calculated physical clock and the actual physical clock are similar, and there is no need to use the compensation amount to reduce the growth rate of the calculated physical clock. Thus, the current system state can be set to the non-calibration state S by executing step S417 as described above, so that the second calculation algorithm can be used to calculate the physical clock when allocating the timestamp next time.

[0103] In the case where the current system state is the non-calibration state S, if the determination result of step S419 is yes, it means that the growth rate of the calculated physical clock is too fast, and the compensation amount needs to be used to reduce the growth rate of the calculated physical clock in the future. Thus, the current system state needs to be set to the calibration state T by executing step S421, so that the first calculation algorithm can be used to calculate the physical clock when allocating the timestamp next time. Additionally, if the determination result of step S419 is no, it means that the growth rates of the calculated physical clock and the actual physical clock are similar, and there is no need to use the compensation amount to reduce the growth rate of the calculated physical clock. Thus, the current system state continues to be in the non-calibration state S.

[0104] In Figure 4In the corresponding embodiment, by introducing the system state divided according to the calibration state T and the non-calibration state S, and using the compensation amount to adjust the calculation of the physical clock in the calibration state T, the clock error can be flexibly dealt with, ensuring that the GTS service can still maintain high stability and accuracy in the face of clock drift. In addition, by setting the time interval constant, the monotonic increase of the timestamp is ensured, which is the key to ensuring the consistency of the event order in a distributed system.

[0105] Combined with the previous article Figure 3 and Figure 4 , introduces a variety of methods to determine the current physical clock t. Figure 3 or Figure 4 After the method described above determines the current physical clock t, it is necessary to use the clock cycle number c to update the parameter value of the first parameter. For example, last_rdtsc represents the parameter name of the first parameter, and let last_rdtsc=c.

[0106] Figure 5 It is a structural diagram of a timestamp generation device in an embodiment of this specification. The device can be applied to a server, and the central processor of the server includes a timestamp counter for recording its clock cycle number. The device includes: an acquisition unit 501, configured to respond to receiving a timestamp allocation request, and read and obtain the first clock cycle number currently recorded by the timestamp counter by executing a target instruction; a determination unit 502, configured to determine the current first physical clock according to the first clock cycle number and the first frequency of the central processor stored locally; a generation unit 503, configured to generate a target timestamp, which is greater than or equal to the first physical clock.

[0107] In one embodiment, the first frequency is determined based on the actual second physical clock and the actual third physical clock, and the second clock cycle number of the central processor corresponding to the second physical clock and the third clock cycle number corresponding to the third physical clock; the second physical clock or the third physical clock is set as a reference physical clock; the determination unit 502 can be further configured to: determine the current first physical clock based on the first clock cycle number, and the locally stored first frequency, the reference physical clock and the clock cycle number corresponding to the reference physical clock.

[0108] In one embodiment, the determination unit 502 may include: a first calculation module (not shown in the figure), configured to calculate the target step of the physical clock corresponding to the first physical clock and the parameter value of the first parameter based on the first clock cycle number, the first frequency, and the first parameter for recording the clock cycle number involved in calculating the physical clock when the timestamp was last allocated; a first determination module (not shown in the figure), configured to use the first frequency as the target frequency in response to the target step being less than a preset first time interval; a second determination module (not shown in the figure), configured to obtain the current actual fourth physical clock and the fourth clock cycle number currently recorded by the timestamp counter in response to the target step being greater than or equal to the first time interval, calculate the second frequency of the central processing unit based on the fourth physical clock and the fourth clock cycle number, use the second frequency to update the locally stored first frequency, and use the second frequency as the target frequency; a second calculation module (not shown in the figure), configured to calculate the first physical clock based on the first clock cycle number and the target frequency.

[0109] In one implementation, the apparatus may further include: an updating unit (not shown in the figure), configured to update the parameter value of the first parameter using the first clock cycle number after the determining unit 502 determines the current first physical clock.

[0110] In one embodiment, the first frequency is determined based on the actual second physical clock and the actual third physical clock, as well as the second clock cycle number of the central processor corresponding to the second physical clock and the third clock cycle number corresponding to the third physical clock; the second physical clock or the third physical clock is set as a reference physical clock; the above-mentioned second determination module can be further configured to: calculate the second frequency based on the fourth physical clock, the fourth clock cycle number, the reference physical clock and the clock cycle number corresponding to the reference physical clock.

[0111] In one implementation, the second calculation module may be further configured to calculate the first physical clock according to the first clock cycle number, the target frequency, the reference physical clock, and the clock cycle number corresponding to the reference physical clock.

[0112] In one embodiment, a system state is set in the server, which is divided into a calibrated state and a non-calibrated state, and the calibrated state and the non-calibrated state are associated with different calculation algorithms; the above-mentioned second calculation module can be further configured to: calculate the first physical clock using the calculation algorithm associated with the current system state.

[0113] In one embodiment, the current system state is a calibration state; the above-mentioned second calculation module can be further configured to: use the first calculation algorithm associated with the calibration state to calculate the first physical clock according to the first clock cycle number, the target frequency and the compensation amount; wherein the value of the compensation amount is the product of a preset coefficient and the target frequency.

[0114] In one implementation, the target frequency is the second frequency; the second calculation module may also be configured to: in response to determining that the fourth physical clock is greater than the first physical clock, update the first physical clock using the fourth physical clock.

[0115] In one implementation, the current system state is a calibration state; the second calculation module may also be configured to: after determining that the fourth physical clock is greater than the first physical clock, set the current system state to a non-calibration state.

[0116] In one embodiment, the target frequency is the second frequency, and the current system state is a non-calibrated state; the above-mentioned second calculation module can also be configured to: in response to the fourth physical clock being less than the first physical clock, and the difference between the first physical clock and the fourth physical clock being greater than a preset second time interval, set the current system state to a calibrated state.

[0117] In one embodiment, the target frequency is the second frequency, and the current system state is a calibration state; the above-mentioned second calculation module can also be configured to: in response to the fourth physical clock being equal to the first physical clock, or the fourth physical clock being less than the first physical clock, and the difference between the first physical clock and the fourth physical clock being less than or equal to a preset second time interval, set the current system state to a non-calibration state.

[0118] In one embodiment, the generation unit 503 can be further configured to: determine whether the first physical clock is greater than the parameter value of the second parameter; wherein the second parameter is used to record the sum of the last assigned timestamp and a preset value, and the preset value is a positive number; if the determination result is yes, the first physical clock is determined as the target timestamp; if the determination result is no, the parameter value of the second parameter is determined as the target timestamp; and the parameter value of the second parameter is updated using the sum of the target timestamp and the preset value.

[0119] The present specification also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed in a computer, the computer is caused to execute the following Figures 2 to 4 Describe the method.

[0120] The embodiment of the present specification also provides a computing device, including a memory and a processor, wherein the memory stores an executable code, and when the processor executes the executable code, the following is implemented: Figures 2 to 4Describe the method.

[0121] The embodiments of the present specification also provide a computer program product, including a computer program / instruction, which is executed by a processor to implement the following Figures 2 to 4 Describe the steps of the method.

[0122] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the multiple embodiments disclosed in this specification can be implemented by hardware, software, firmware or any combination thereof. When implemented by software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium.

[0123] In some cases, the actions or steps described in the claims may be performed in a different order than in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0124] The specific implementation methods described above further illustrate in detail the purposes, technical solutions and beneficial effects of the multiple embodiments disclosed in this specification. It should be understood that the above description is only the specific implementation methods of the multiple embodiments disclosed in this specification, and is not used to limit the protection scope of the multiple embodiments disclosed in this specification. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the multiple embodiments disclosed in this specification should be included in the protection scope of the multiple embodiments disclosed in this specification.

Claims

1. A timestamp generation method, performed by a server, wherein a central processor of the server includes a timestamp counter for recording the number of its clock cycles, the method comprising: In response to receiving the timestamp allocation request, reading and obtaining the first clock cycle number currently recorded by the timestamp counter by executing the target instruction; Determine a current first physical clock according to the first clock cycle number and a first frequency of the central processing unit stored locally; A target timestamp is generated that is greater than or equal to the first physical clock.

2. The method according to claim 1, wherein: The first frequency is determined according to an actual second physical clock and an actual third physical clock, and a second clock cycle number of the central processor corresponding to the second physical clock and a third clock cycle number corresponding to the third physical clock; The second physical clock or the third physical clock is set as a reference physical clock; The determining of the current first physical clock includes: The current first physical clock is determined according to the first clock cycle number, the locally stored first frequency, the reference physical clock, and the clock cycle number corresponding to the reference physical clock.

3. The method according to claim 1, wherein: The determining of the current first physical clock includes: Calculate a target step of a physical clock corresponding to the first physical clock and a parameter value of the first parameter according to the first clock cycle number, the first frequency, and a first parameter for recording the number of clock cycles involved in calculating the physical clock when a timestamp was last allocated; In response to the target step being less than a preset first time interval, taking the first frequency as a target frequency; In response to the target step being greater than or equal to the first time interval, obtaining a current actual fourth physical clock and a fourth clock cycle number currently recorded by the timestamp counter, calculating a second frequency of the central processor according to the fourth physical clock and the fourth clock cycle number, using the second frequency to update the locally stored first frequency, and using the second frequency as the target frequency; The first physical clock is calculated according to the first clock cycle number and the target frequency.

4. The method according to claim 3, wherein: After determining the current first physical clock, the method further includes: The parameter value of the first parameter is updated using the first number of clock cycles.

5. The method according to claim 3, wherein: The first frequency is determined according to an actual second physical clock and an actual third physical clock, and a second clock cycle number of the central processor corresponding to the second physical clock and a third clock cycle number corresponding to the third physical clock; The second physical clock or the third physical clock is set as a reference physical clock; The calculating the second frequency of the central processing unit includes: The second frequency is calculated according to the fourth physical clock, the fourth clock cycle number, the reference physical clock, and the clock cycle number corresponding to the reference physical clock.

6. The method according to claim 5, wherein: The calculating the first physical clock includes: The first physical clock is calculated according to the first clock cycle number, the target frequency, the reference physical clock, and the clock cycle number corresponding to the reference physical clock.

7. The method according to claim 3, wherein: The server is provided with a system state, which is divided into a calibration state and a non-calibration state, wherein the calibration state and the non-calibration state are associated with different calculation algorithms; The calculating the first physical clock includes: The first physical clock is calculated using a calculation algorithm associated with the current system state.

8. The method according to claim 7, wherein: The current system state is the calibration state; The calculating the first physical clock by using a calculation algorithm associated with the current system state includes: The first physical clock is calculated using a first calculation algorithm associated with the calibration state according to the first clock cycle number, the target frequency and the compensation amount; wherein the compensation amount is a product of a preset coefficient and the target frequency.

9. The method according to claim 7, wherein: The target frequency is the second frequency; The determining of the current first physical clock further includes: In response to determining that the fourth physical clock is greater than the first physical clock, the first physical clock is updated using the fourth physical clock.

10. The method according to claim 9, wherein: The current system state is the calibration state; after determining that the fourth physical clock is greater than the first physical clock, the method further includes: The current system state is set to the non-calibration state.

11. The method according to claim 7, wherein: The target frequency is the second frequency, and the current system state is the non-calibration state; the method further includes: In response to the fourth physical clock being smaller than the first physical clock and the difference between the first physical clock and the fourth physical clock being larger than a preset second time interval, the current system state is set to the calibration state.

12. The method according to claim 7, wherein: The target frequency is the second frequency, and the current system state is the calibration state; the method further includes: In response to the fourth physical clock being equal to the first physical clock, or the fourth physical clock being less than the first physical clock, and the difference between the first physical clock and the fourth physical clock being less than or equal to a preset second time interval, the current system state is set to the non-calibrated state.

13. The method according to any one of claims 1 to 12, wherein: The generating of the target timestamp comprises: Determine whether the first physical clock is greater than a parameter value of a second parameter; wherein the second parameter is used to record the sum of the last allocated timestamp and a preset value, and the preset value is a positive number; If the determination result is yes, determining the first physical clock as the target timestamp; If the determination result is no, determining the parameter value of the second parameter as the target timestamp; After generating the target timestamp, also include: The parameter value of the second parameter is updated using the sum of the target timestamp and the preset value.

14. A timestamp generation device, applied to a server, wherein a central processor of the server includes a timestamp counter for recording the number of its clock cycles, the device comprising: an acquisition unit, configured to, in response to receiving a timestamp allocation request, read and obtain the first clock cycle number currently recorded by the timestamp counter by executing a target instruction; a determining unit configured to determine a current first physical clock according to the first clock cycle number and a first frequency of the central processor stored locally; A generating unit is configured to generate a target timestamp that is greater than or equal to the first physical clock.

15. A computer program product, comprising a computer program / instruction, which, when executed by a processor, implements the steps of the method according to any one of claims 1 to 13.

16. A computing device comprising a memory and a processor, wherein: The memory stores executable codes, and when the processor executes the executable codes, the method according to any one of claims 1 to 13 is implemented.

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