Operation method and device of memory controller and storage medium

Abstract

The embodiment of the invention discloses an operation method of a memory controller, equipment and a storage medium. The controller is coupled to a memory, and the method comprises the following steps: obtaining respective service lives of at least two partitions included in the memory, the service lives of the partitions being related to wear degrees of the partitions; determining a target partition from the at least two partitions according to the respective service lives of the at least two partitions; and selecting a block from the target partition as a temporary block, wherein the temporary block is used for storing fragmented data. According to the method, excessive wear of a certain fixed partition in the memory caused by setting of the temporary block is avoided, and the service life of the memory is further prolonged.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of storage technology, and in particular to an operating method, device and storage medium of a memory controller. Background Art

[0002] The temporary block is a block selected from a plurality of blocks included in the memory and used to temporarily store fragmented data.

[0003] The memory can be divided into at least two partitions, and a block can be selected from a fixed partition of the at least two partitions as a temporary block. When fragmented data needs to be written, the fragmented data will be written to the temporary block first. Later, when the temporary block is full of a certain amount of data, the valid data in the temporary block will be moved to the current block of the memory for storage.

[0004] However, the above method of selecting a temporary block from a certain fixed partition will cause uneven wear of each partition of the memory, thus affecting the service life of the memory. Summary of the invention

[0005] The embodiments of the present application provide a method, device, equipment and storage medium for operating a memory controller. The technical solutions provided by the embodiments of the present application are as follows:

[0006] According to one aspect of an embodiment of the present application, a method for operating a memory controller is provided, wherein the controller is coupled to a memory, and the method includes:

[0007] Acquire the lifespan of each of at least two partitions included in the memory, where the lifespan of the partition is related to the degree of wear of the partition;

[0008] determining a target partition from the at least two partitions according to respective life spans of the at least two partitions;

[0009] A block is selected from the target partition as a temporary block, and the temporary block is used to store fragmented data.

[0010] According to one aspect of an embodiment of the present application, a controller is provided, the controller comprising a memory and a processor coupled to the memory, the processor being used to run firmware to implement the operating method of the above-mentioned memory controller.

[0011] According to one aspect of an embodiment of the present application, a storage device is provided, comprising: a controller and at least one memory coupled to the controller, wherein the controller is used to run firmware to implement the operating method of the above-mentioned memory controller.

[0012] According to one aspect of an embodiment of the present application, an electronic device is provided, which includes a host and a storage device coupled to the host, the storage device includes a controller and at least one memory coupled to the controller, and the controller is used to run firmware to implement the operating method memory of the above-mentioned memory controller.

[0013] According to one aspect of an embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is used to be executed by a storage device to implement the operating method of the above-mentioned memory controller.

[0014] The technical solution provided by the embodiment of the present application can bring the following technical effects:

[0015] By determining a target partition from at least two partitions according to the respective life spans of at least two partitions included in the memory, and then selecting a temporary block for storing fragmented data from the target partition, excessive wear of a fixed partition in the memory caused by setting a temporary block is avoided, thereby increasing the service life of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a block diagram of a system with a storage device provided by an embodiment of the present application;

[0017] Figure 2 is a schematic diagram of a memory card provided by an embodiment of the present application;

[0018] Figure 3 is a schematic diagram of a solid-state drive provided by an embodiment of the present application;

[0019] Figure 4 is a schematic diagram of a partition structure of a memory provided by an embodiment of the present application;

[0020] Figure 5 is a flowchart of an operating method of a memory controller provided by an embodiment of the present application;

[0021] Figure 6 is a schematic diagram of performing temporary block selection provided by an embodiment of the present application;

[0022] Figure 7 is a schematic diagram of two different data accumulation and migration modes provided by an embodiment of the present application;

[0023] Figure 8 is a structural block diagram of a controller provided by an embodiment of the present application;

[0024] Fig. 9 It is a structural block diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0026] Please refer to Figure 1 , which shows a block diagram of a system with a storage device 10 provided by an embodiment of the present application. In some embodiments, the system can be a mobile phone, a desktop computer, a laptop computer, a tablet computer, a car computer, a game console, a printer, a positioning device, a wearable electronic device, a smart sensor, a virtual reality (VR) device, an augmented reality (AR) device, or any other suitable electronic device having a storage device therein. The storage device 10 (e.g., a NAND storage device) may include a controller 20 and one or more semiconductor memories 25. Each semiconductor memory 25 (hereinafter referred to as "memory") may be a Flash memory (e.g., NAND flash memory, NOR flash memory, etc.). The storage device 10 may communicate with the host 15 through the controller 20, wherein the controller 20 may be connected to the one or more memories 25 via one or more memory channels 30. In some embodiments, each memory 25 may be managed by the controller 20 via one or more memory channels 30.

[0027] In some embodiments, the host 15 may include a processor of an electronic device, such as a central processing unit (CPU), or a system on chip (SoC), such as an application processor (AP). The host 15 may send data to be stored in the storage system 10 and / or may retrieve data from the storage device 10.

[0028] In some embodiments, the controller 20 may process I / O (Input / Output) requests received from the host 15, ensure data integrity and efficient storage, and manage the memory 25. To perform these tasks, the controller 20 may run firmware 21, which may be executed by one or more processors 22 (e.g., a microcontroller unit, CPU) of the controller 20. For example, the controller 20 may run firmware 21 to map logical addresses (e.g., addresses used by the host associated with host data) to physical addresses in the memory 25 (e.g., the actual location where the data is stored). The controller 20 also runs firmware 21 to manage defective storage blocks in the memory 25, where the firmware 21 may remap logical addresses to different physical addresses, i.e., move data to different physical addresses. The controller 20 also includes a memory 23 (e.g., DRAM, SRAM, EPROM, etc., Figure 1 In the example, only the memory is SRAM, and the memory 23 can be used to store various metadata used by the firmware 21. In some embodiments, the controller 20 can also perform error recovery through an error correction code (ECC) engine 29. ECC is used to detect and correct raw bit errors that occur in each memory 25.

[0029] In some embodiments, the memory channel 30 may provide data and control communication between the controller 20 and each memory 25 through a data bus. The controller 20 may select a certain memory 25 according to a chip enable signal.

[0030] In some embodiments, the controller 20 and one or more memories 25 can be integrated into various types of storage devices, for example, included in the same package, such as a Universal Flash Storage (UFS) package or an eMMC (embedded Multi Media Card) package. That is, the storage device 10 can be implemented and packaged into different types of terminal electronic products. Figure 2 In one example shown, the controller 20 and the single memory 25 may be integrated into a memory card 26. The memory card 26 may include a PC (PCMCIA, Personal Computer Memory Card International Association) card, a CF (Compact Flash) card, a Smart Media (SM) card, a memory stick, a multimedia card (MMC, RS-MMC, MMCmicro), an SD card (SD, miniSD, microSD, SDHC), UFS, etc. The memory card 26 may also include a computer that connects the memory card 26 to a host (e.g., Figure 1 The host 15) is coupled to the memory card connector 24. Figure 3 In another example shown, the controller 20 and the plurality of memories 25 may be integrated into a solid state drive (SSD) 27. The SSD 27 may also include a computer that connects the SSD 27 to a host (e.g., Figure 1 The SSD connector 28 is coupled to the host 15).

[0031] The above-mentioned storage device 10 can be one or more of a universal flash memory, an embedded multimedia card, a universal flash storage multi-chip package (UFS-based Multichip Package, uMCP) memory, an embedded multimedia card multi-chip package (eMMC-based Multichip Package, eMCP) memory, a solid-state drive, etc., and the present application does not limit this.

[0032] In some embodiments, Figure 4 As shown, the memory 25 in the storage device 10 includes at least a first partition 251 and a second partition 252. In addition, the first partition 251 may include one or more of a single-layer cell SLC (Single-Level Cell, single-level storage cell) storage area, a fast not AND (Fast NAND) memory, a phase change memory (PCM, Phase-Change Memory), and a 3D stacked phase change memory X3D, and the second partition 252 may include one or more of an SLC storage area, an MLC (Multi-Level Cell, multi-level storage cell) storage area, a TLC (Trinary-Level Cell, three-level storage cell) storage area, a QLC (Quad-Level Cell, four-level storage cell) storage area, and a PLC (Penta-Level Cell, five-level storage cell) storage area. Further, the storage device 10 may also include other storage media such as a mechanical hard disk (Hard Disk Drive, HDD) and the like.

[0033] In some embodiments, the storage modes of the first partition 251 and the second partition 252 are different. For example, the first partition 251 is an SLC flash memory, and the second partition 252 is an MLC or TLC flash memory. Figure 4As shown, the first partition 251 may include M blocks, each block includes N pages, and each page includes a certain number of cells. All cells in all pages in all blocks in the first partition 251 are single-layer cells (SLC), so the first partition 251 forms an SLC type storage area. Similarly, the second partition 252 may include L blocks, each block includes N pages (the number here may not be N), and each page includes a certain number of cells. All cells in all pages in all blocks in the second partition 252 are multi-layer cells (MLC) or triple-layer cells (TLC), so the second storage area 1032 forms an MLC / TLC type storage area. Moreover, since the erasing performance of SLC and MLC are similar, and the read performance (including read speed), write performance (including write speed) and storage performance (including storage life) of SLC flash memory are better than those of MLC / TLC flash memory, in the above case, the read and write performance and storage performance of the first partition 251 are better than those of the second partition 252.

[0034] In other embodiments, the storage modes of the first partition 251 and the second partition 252 are the same. For example, they can both be MLC or TLC flash memories. In this case, some blocks in the MLC or TLC flash memories can be converted to SLC mode to improve the read and write performance of the flash memory. The reason is that the difference between MLC / TLC and SLC is how many bits of data are stored in a cell. MLC stores three bits, MLC stores two bits, and SLC stores one bit. Converting MLC to SLC mode means using only one of the two bits, namely the least significant bit (Linux Standards Base, LSB). Similarly, the principle of converting TLC to SLC mode is the same, using only the least significant bit of the three bits. Of course, not using the other one or two bits means that the other half or two-thirds of the capacity is not used. Therefore, after the MLC is converted to SLC mode, the capacity is only half of the original MLC, and after the TLC is converted to SLC mode, the capacity is only one-third of the original TLC.

[0035] Please refer to Figure 5 , which shows a flow chart of an operation method of a memory controller provided by an embodiment of the present application. The execution subject of each step of the method may be the storage device 10 in the above embodiment, and further, the execution subject of each step of the method may be the controller 20 in the storage device 10. The above controller is coupled to the memory, and the method may include at least one of the following steps 510 to 530.

[0036] Step 510: Obtain the lifespan of at least two partitions included in the memory, where the lifespan of a partition is related to the degree of wear of the partition.

[0037] In the embodiment of the present application, the memory may be a Not AND Flash (NAND Flash), a Not OR Flash (NOR Flash), or other semiconductor memories. In the following embodiments, for the convenience of description, the NAND Flash is used as the above memory.

[0038] The memory may include more than two partitions, or may include only two partitions. In some embodiments, the technician may divide the memory into two or more partitions according to the type of stored data, or the performance requirements of the memory (such as the requirements for data read and write performance, the requirements for storage life). Exemplarily, the at least two partitions included in the memory may be the first partition 251 and the second partition 252. Further, the first partition 251 may be an EUDA (Enhanced User Data Area) for storing relatively important data such as system blocks, BBT (Bad-Block Table) and L2P mapping table (logical to physical mapping table), and the second partition 252 may be a UDA (User Data Area).

[0039] In some embodiments, at least two partitions are divided based on the storage mode adopted by each block in the memory. For example, if the storage mode adopted by each block in a partition is all SLC mode, then the partition is an SLC partition; if the storage mode adopted by each block in a partition is all TLC mode, then the partition is a TLC partition; if some blocks in a partition adopt TLC mode and some blocks adopt MLC mode, then the partition is an MLC / TLC partition.

[0040] Exemplarily, EUDA can write data in SLC mode, and UDA can write data in a mixed manner of SLC and other modes. The specific selection of other modes is determined by the storage unit design and may include MLC, TLC, and QLC modes.

[0041] The life of a partition refers to the erase and write life of the partition, which can be represented by the ratio of the number of erases to the maximum number of erases. Generally, the smaller the ratio of the number of erases to the maximum number of erases, the lower the wear of the partition, indicating that the partition is "younger", that is, the shorter the life of the partition.

[0042] In addition, it should be noted that the maximum erase and write times of blocks using different storage modes in each partition are different. For example, the maximum erase and write times of blocks using the SLC mode to write data is about 100,000 times, the maximum erase and write times of blocks using the MLC mode to write data is about 3,000-10,000 times, and the maximum erase and write times of blocks using the TLC mode to write data is about 3,000 times.

[0043] Therefore, in some embodiments, for any of the at least two partitions, the average of the maximum erase times of all blocks in the partition can be determined as the maximum erase times of the partition, and the average of the erase times of all blocks in the partition can also be determined as the erase times of the partition. For example, if a partition contains three blocks, the maximum erase times of the three blocks are 3000, 4000, and 8000 times, respectively, and the erase times of the three blocks are 2000, 1000, and 6000 times, respectively, then the maximum erase times of the partition can be determined to be 5000 times, and the erase times can be determined to be 3000 times.

[0044] Furthermore, in some embodiments, when determining the maximum erasure times or erased times of a partition, the median or mode value of the maximum erasure times or erased times of all blocks in the partition may be determined as the maximum erasure times or erased times of the partition, and when calculating the above mean, median or mode value, the estimated values ​​of each block may be used for calculation, for example, 6400 times may be estimated as 6000 times, and 6600 times may be estimated as 7000 times. This application does not limit how to determine the life of each partition and the corresponding calculation method.

[0045] The number of times each block in the memory has been erased and written and the maximum number of times each block in the memory can be stored in a memory coupled to the controller, or in a memory inside the controller, which is not limited in the present application.

[0046] Step 520: Determine a target partition from the at least two partitions according to the respective lifespans of the at least two partitions.

[0047] The target partition refers to a partition from among at least two partitions for selecting a temporary block.

[0048] In some embodiments, a partition whose lifespan satisfies a condition among at least two partitions is determined as a target partition.

[0049] Exemplarily, a partition whose lifespan satisfies the condition may refer to a partition where the ratio of the number of erased times to the maximum number of erased times is less than a preset value of the ratio; alternatively, a partition whose lifespan satisfies the condition may refer to a partition where the difference between the maximum number of erased times and the number of erased times is the largest; alternatively, a partition whose lifespan satisfies the condition may refer to a partition where the difference between the maximum number of erased times and the number of erased times is greater than a preset value of the difference.

[0050] The above-mentioned ratio preset value and difference preset value can be preset by a technician according to the flash memory type or storage mode. For example, the ratio preset value can be 0.5 and the difference preset value can be 3000. Furthermore, if the ratio preset value is 0.5, one partition can be selected as the target partition from the partitions whose ratio of the number of erased times to the maximum number of erased times is less than the ratio preset value; if the difference preset value is 3000, one partition can be selected as the target partition from the partitions whose difference of the number of erased times to the maximum number of erased times is greater than the difference preset value.

[0051] In some embodiments, the partition with the shortest life span among the at least two partitions is determined as the target partition.

[0052] In some embodiments, the partition with the shortest lifespan among at least two partitions refers to the partition with the smallest ratio of the number of erased times to the maximum number of erased times among at least two partitions, that is, the "youngest" partition. Exemplarily, if the at least two partitions are the first partition and the second partition, the maximum number of erased times of the first partition is 5000 times, and the number of erased times is 3000 times; the maximum number of erased times of the second partition is 1000 times, and the number of erased times is 900 times, although the number of erased times of the first partition is greater than the maximum number of erased times of the second partition, since the ratio of the number of erased times to the maximum number of erased times of the first partition is greater than that of the second partition, it can still be considered that the lifespan of the first partition is less than that of the second partition. Therefore, in the above case, the first partition is determined as the target partition.

[0053] If at least two partitions are UDA and EUDA, UDA is usually used as the target partition. However, UDA partitions often use a mixed method of SLC and other modes to write data, and other modes such as TLC mode have a much greater loss on the partition life than SLC mode. Therefore, using UDA as the target partition will cause excessive wear of UDA. When only EUDA partition is used as the target partition, since EUDA already stores a large amount of firmware system data, and temporary blocks are selected from it to store fragmented data, the life of EUDA is easily excessively consumed, resulting in a waste of UDA life.

[0054] In the embodiment of the present application, the target partition can be flexibly selected according to the life consumption of each partition in the at least two partitions, thereby avoiding excessive wear caused by continuously using a fixed partition as the target partition. Figure 6 As shown, if at least two partitions are a first partition 251 (such as EUDA) and a second partition 252 (such as UDA), then, when the life of the first partition 251 is less than that of the second partition 252, the first partition 251 can be determined as a target partition, and a temporary block can be selected therefrom; and when the life of the second partition 252 is less than that of the first partition 251, the second partition 252 can also be determined as a target partition, and a temporary block can be selected therefrom.

[0055] Step 530: Select a block from the target partition as a temporary block, and the temporary block is used to store fragmented data.

[0056] It should be noted that in NAND flash memory, a block is the smallest unit of erasure, and a page is the smallest addressing unit, that is, the smallest unit of reading and writing. The number of pages in a block varies according to the specifications of different manufacturers, and the size of the page itself is also different. For example, there are 1024 pages in a block, and the size of each page is (16KB+2208B), of which 16KB is the data area for storing data, and 2208B is the metadata area for storing metadata. For example, 16KB is used to store one or more target data in the application, and 2208B is used to store the data type identifier corresponding to one or more target data.

[0057] Fragmented data refers to data that will waste storage space when stored separately. In the above example, for the target data to be stored in the data area, if the size of the target data cannot occupy the entire data area, that is, the target data is less than 16KB, the target data can be regarded as fragmented data. In addition, if the size of the target data is greater than 16KB, for example, when the target data is 18KB, after writing a page of 16KB of target data, the remaining 2KB of target data can also be regarded as fragmented data.

[0058] In addition, it should be noted that due to the storage principle of NAND flash memory, writing data to NAND flash memory can only change data (bit) from 1 to 0; while erasing can only change all data from 0 to 1. Therefore, in NAND flash memory, to modify data or rewrite, it must be written to the free page that has been erased or not written, otherwise the data will be disordered. Then, it is obvious that if each time the fragmented data is written, it is written to a different page and stored for a long time, the storage space in each page except the space occupied by the fragmented data will be wasted, and the free pages will become less and less.

[0059] Furthermore, when new data is to be written or data is to be modified, if there are insufficient free pages, it is necessary to execute the GC (Garbage Collection) process to merge and move the valid data that needs to be saved in one or several blocks of written data to other blocks, and then erase the above one or several blocks before writing the new data or the modified data. It can be seen that when there are insufficient free pages, whenever data is to be written, the data actually written includes both the new data or modified data written, and the data that is merged and moved, resulting in the occurrence of the Write Amplification (WA) phenomenon. Therefore, it is necessary to set up temporary blocks in the memory to store and accumulate fragmented data.

[0060] Write amplification refers to an undesirable phenomenon in flash memory and solid-state drives where the actual amount of physical data written is many times the amount of data written by the user.

[0061] In some embodiments, one block may be selected from among the blocks in the target partition as a temporary block.

[0062] Alternatively, in some other embodiments, step 530 may include at least one of the following two sub-steps:

[0063] 1. Get the lifespan of each block contained in the target partition. The lifespan of a block is related to the degree of wear of the block.

[0064] In some embodiments, the storage modes of the blocks included in the target partition are the same (eg, all blocks adopt the SLC mode), or the maximum number of erasures of the blocks is the same. In this case, the number of erasures of the blocks can be used to directly represent the life of the blocks.

[0065] In other embodiments, the storage modes of the blocks contained in the target partition are different (e.g., the target partition adopts a mixed SLC / TLC mode), or the maximum erase and write times of the blocks are different. In this case, the erase and write times of each block and the maximum erase and write times can be used together to characterize the life of each block. Generally, the smaller the ratio of the erase and write times of a block to the maximum erase and write times, the lower the degree of wear of the block, indicating that the block is "younger", that is, the shorter the life of the block.

[0066] 2. The blocks in the target partition that meet the lifespan requirements are used as temporary blocks.

[0067] In some embodiments, the block with the shortest life span among the blocks included in the target partition is used as a temporary block.

[0068] In other embodiments, any block whose life span is less than a preset value among the blocks included in the target partition is used as a temporary block.

[0069] In some embodiments, the storage modes of the blocks included in the target partition are the same, or the maximum number of erasures of the blocks is the same. In this case, the block that meets the lifespan condition may refer to the block with the smallest number of erasures among the blocks included in the target partition; or, the block that meets the lifespan condition may refer to the block with the smallest number of erasures less than a preset value, which may be preset by a technician according to the flash memory category or storage mode. For example, if the preset value is 1000, one block may be selected from all blocks with less than 1000 erasures as a temporary block. Furthermore, if one or more blocks with particularly few erasures exist among the blocks with less than the preset number of erasures, one block may be selected from the one or more blocks as a temporary block. For example, if the preset value is 1000, there are 5 blocks with less than 1000 erasures, of which 3 blocks have about 900 erasures and two blocks have about 10 erasures, one block may be selected from the two blocks as a temporary block.

[0070] In some embodiments, the storage modes of the blocks included in the target partition are different, or the maximum number of erasures of the blocks are different. At this time, the block that meets the life condition may refer to the block with the smallest ratio of the number of erased times to the maximum number of erased times among the blocks included in the target partition; or, the block that meets the life condition may refer to the block with the ratio of the number of erased times to the maximum number of erased times less than the first preset value; or, the block that meets the life condition may refer to the block with the largest difference between the maximum number of erased times and the number of erased times; or, the block that meets the life condition may refer to the block with the difference between the maximum number of erased times and the number of erased times greater than the second preset value. The above-mentioned first preset value and second preset value can also be preset by the technician according to the flash memory category or storage mode. For example, the first preset value can be 0.5 and the second preset value can be 3000. For the specific selection process of the temporary block, please refer to the above embodiment, which will not be repeated here.

[0071] Through the above method, a temporary block is selected based on the life of each block contained in the target partition, thereby avoiding excessive wear of a fixed block and further improving the service life of the memory.

[0072] In some embodiments, data is written to the temporary block in SLC mode.

[0073] From the above embodiments, it can be seen that after writing data to the temporary block in the SLC mode, one page in the temporary block stores 1 bit of data, and the SLC mode corresponds to a larger maximum erase and write times and better read and write performance. Therefore, the above method can improve the data read and write performance of the temporary block, thereby improving the efficiency of subsequent data migration and reducing partition wear.

[0074] In some embodiments, when the stored data in the temporary block reaches a set amount, the set amount of stored data is written into a current block of at least one memory, and the current block is used to store non-fragmented data.

[0075] The stored data reaching the set amount may refer to the stored data reaching the data amount of non-fragmented data. Non-fragmented data refers to data that does not cause waste of storage space when stored separately. Exemplarily, if the size of the data area of ​​each page in the current block is 16KB, the above-mentioned set amount may be set to 16KB, that is, when the stored data in the temporary block is filled with 16KB, 16KB of the stored data is written into the current block.

[0076] In some embodiments, when the valid data to be saved in the stored data reaches a set amount, the set amount of valid data is written into the current block of at least one memory. Exemplarily, when the set amount is 16KB, if the stored data in the temporary block is stored to 18KB, the stored data just contains 16KB of valid data, then the 16KB of valid data is written into the current block.

[0077] In addition, it should be noted that the above selection of the set amount is only an example. Those skilled in the art may also use the maximum amount of data that can be stored in the current block or the maximum amount of data that can be stored in multiple pages in the current block as the set amount, and this application does not limit this.

[0078] Furthermore, it should be noted that if there is only one memory in the storage device, such as Figure 6 As shown, the current block and the temporary block may be located in the same partition or in different partitions, and this application does not limit this.

[0079] Through the above method, fragmented data is accumulated in temporary blocks, and non-fragmented data is written into the current block, which reduces the waste of storage space, increases the number of free pages, and thus reduces write amplification.

[0080] In some embodiments, Figure 7 As shown, the non-fragmented data can be written into the current block in Cache On mode or Cache Off mode.

[0081] The above two modes are described below by taking the case where the memory in the controller adopts SRAM (Static Random-Access Memory) as an example.

[0082] In Cache Off mode, after the host data is stored in the SRAM in the controller, the SRAM will temporarily store all the data in the temporary block for data accumulation. The non-fragmented data in the current block is only moved from the temporary block. In this mode, the usage burden of the temporary block is relatively large.

[0083] In Cache On mode, after the host data is stored in the SRAM in the controller, on the one hand, the SRAM will still temporarily store part of the data in the temporary block for data accumulation, and on the other hand, the SRAM itself will also accumulate data. Therefore, in this mode, the non-fragmented data in the current block comes from both the temporary block and the SRAM.

[0084] Both of the above two modes use temporary blocks to accumulate fragmented data. Therefore, when applying the above two modes to write data, the operation method of the memory controller provided in the embodiment of the present application can be used to select temporary blocks.

[0085] In some embodiments, the temporary block may be erased after multiple data writes are performed on the current block, or when the stored data in the temporary block reaches the set amount of erasure. In addition, in the embodiment of the present application, when calculating whether the stored data in the temporary block reaches the set amount, the amount of data in the temporary block that has been written into the current block will not be calculated.

[0086] Exemplarily, if the set amount is 16KB and the erase set amount is 64KB, then when the stored data in the temporary block accumulates to 16KB, 32KB, 48KB, and 64KB respectively, the newly accumulated 16KB of data each time can be written to the current block respectively, and when the stored data in the temporary block accumulates to 64KB, if it has been confirmed that the data writing to the current block has been completed, the temporary block can be erased.

[0087] In addition, it should be noted that the above selection of the erase setting amount is only for exemplary purposes. Those skilled in the art may also directly set the erase setting amount to the above setting amount, or set the maximum amount of data that the temporary block can store to the erase setting amount.

[0088] Please refer to Figure 1 In a memory device, there may be multiple memories. At this time, if a temporary block is set for each memory when writing data, it will obviously lead to unnecessary loss of chip life. Therefore, a temporary block can be used to accumulate data for multiple current blocks in multiple memories. Please see the following embodiments for details.

[0089] In some embodiments, the above-mentioned set amount is related to the amount of memory.

[0090] In some embodiments, the number of memories is plural.

[0091] Exemplarily, if the storage device has four memories, and the size of the data area of ​​each page in the current block in each memory is 16 KB, the above-mentioned set amount can be set to 64 KB.

[0092] In some embodiments, a set amount of stored data is evenly divided and then written into current blocks of multiple memories.

[0093] Continuing with the above example, when the set amount is 64KB, the stored data reaching 64KB can be evenly divided into 4 16KB stored data, and written into the current blocks of the above 4 blocks of memory respectively.

[0094] In addition, it should be noted that in the above example, the size of data that can be stored in each page of the current block in multiple memories may also be different. In this case, the set amount can be the sum of the maximum storage data amount corresponding to each page in the above multiple current blocks. For example, if in the above example, the size of the data area of ​​each page in the current block in the four memories is 8KB, 16KB, 32KB, and 64KB respectively, the set amount can be set to 120KB. And, accordingly, when dividing the set amount of stored data, it should also be divided accordingly according to the size of each of the above data areas.

[0095] The above method uses a temporary block to accumulate data for multiple current blocks in multiple memories, which fully utilizes the storage space of multiple memories and avoids unnecessary life loss.

[0096] The technical solution provided by the embodiment of the present application determines a target partition from at least two partitions according to the respective life spans of at least two partitions included in the memory, and selects a temporary block for storing fragmented data from the target partition, thereby avoiding excessive wear of a fixed partition in the memory due to setting a temporary block, thereby increasing the service life of the memory.

[0097] Usually, when a storage device is in use, it will promise the user the TBW (Total Bytes Written) of the storage device. However, in certain user's specific application scenarios, the write amplification is extremely large, resulting in the actual TBW failing to reach the promised TBW. The technical solution provided in the embodiment of the present application fully and evenly utilizes the storage space in the memory and improves the service life of the memory, so it can meet the needs of reducing WAF (Write Amplification Factor) and increasing TBW in actual application scenarios.

[0098] Please refer to Table 1, which shows the actual changes in WAF and TWB of the product after the technical solution provided in the embodiment of the present application is applied to eMMC.

[0099] Table 1

[0100]

[0101] The above-mentioned K model, O model, V model, and S model correspond to different user usage scenarios. Single-chip packaging, dual-chip packaging, and quad-chip packaging respectively represent the different numbers of memories included in products using different packages. For example, dual-chip packaging represents a product that includes two memories. WAF is the ratio of the actual amount of physical data written to the amount of data written by the user. It can be seen that in most usage scenarios, the technical solution provided in the embodiment of the present application can effectively reduce the WAF of the product and improve the TWB of the product.

[0102] Please refer to Figure 8 , which exemplarily shows a structural block diagram of a controller provided by an embodiment of the present application.

[0103] The controller 20 includes a memory 23 and a processor 22 coupled to the memory 23. The processor 22 can be used to run firmware to implement the above-mentioned operation method of the memory controller. The memory 23 can be used to store metadata used by the firmware.

[0104] The memory 23 is also called internal memory and main memory, and is used to temporarily store the operation data of the processor 22 (e.g., microcontroller unit, CPU) and the data exchanged with the external memory (e.g., mechanical hard disk). Optionally, the memory 23 may include: ROM (Read-Only Memory), RAM (Random-Access Memory) and Cache (Cache Memory). Figure 8 In the description, only the memory 23 is SRAM as an example.

[0105] The memory 23 and the processor 22 perform data transmission via the data bus 81, and realize the data exchange with the external device. For example, when performing data storage, the host data ( Figure 8 The host data is temporarily stored in the memory 23 through the data bus 81, and then the processor 22 allocates the host data temporarily stored in the memory 23, and finally stores it in the memory ( Figure 8 It can be seen that in the process of storing the host data into the memory, the controller 20 plays the role of allocation and bridging.

[0106] In some embodiments, a storage device is further provided, and the storage device may include a controller and at least one memory. The controller may be used to run firmware to implement the above-mentioned operation method of the memory controller.

[0107] Please refer to Fig. 9 , which exemplarily shows a structural block diagram of an electronic device provided by an embodiment of the present application.

[0108] Typically, the electronic device 900 includes a storage device 10 and a host 15 .

[0109] The storage device 10 may include a controller 20 and one or more memories 25. The storage device 10 is coupled to a host 15. The controller 20 may run firmware 21, which may be executed by one or more processors 22 (eg, microcontroller unit, CPU) of the controller 20 to implement the above-mentioned operation method of the memory controller.

[0110] For the specific structure of the storage device 10 and the host 15 and the specific introduction of the interaction between them, please refer to the above embodiments, which will not be repeated here.

[0111] In some embodiments, a computer-readable storage medium is further provided, wherein a computer program is stored in the storage medium, and the computer program is loaded and executed by a storage device to implement the operating method of the above-mentioned memory controller.

[0112] Optionally, the computer readable storage medium may include: ROM, RAM, SSD (Solid State Drives) or optical disks, etc. Among them, RAM may include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).

[0113] The term "multiple" as used herein refers to two or more than two. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0114] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for operating a memory controller, characterized in that: The controller is coupled to a memory, and the method includes: Acquire the lifespan of each of at least two partitions included in the memory, where the lifespan of the partition is related to the degree of wear of the partition; determining a target partition from the at least two partitions according to respective life spans of the at least two partitions; A block is selected from the target partition as a temporary block, and the temporary block is used to store fragmented data.

2. The method according to claim 1, characterized in that: The step of determining a target partition from the at least two partitions according to respective life spans of the at least two partitions comprises: The partition with the shortest life span among the at least two partitions is determined as the target partition.

3. The method according to claim 1, characterized in that The selecting a block from the target partition as a temporary block comprises: Acquire the lifespan of each block contained in the target partition, where the lifespan of the block is related to the degree of wear of the block; The blocks whose lifespans meet the conditions among the blocks included in the target partition are used as the temporary blocks.

4. The method according to claim 3, characterized in that: The step of using, as the temporary block, a block whose lifespan satisfies a condition among the blocks included in the target partition, comprises: Using the block with the shortest life span among the blocks included in the target partition as the temporary block; or, Any block whose life span is less than a preset value among the blocks included in the target partition is used as the temporary block.

5. The method according to claim 1, characterized in that The at least two partitions are divided based on storage modes adopted by each block in the memory.

6. The method according to claim 1, characterized in that After selecting a block from the target partition as a temporary block, the method further includes: The data is written into the temporary block in a single-level storage cell (SLC) mode.

7. The method according to any one of claims 1 to 6, characterized in that: After selecting a block from the target partition as a temporary block, the method further includes: When the stored data in the temporary block reaches a set amount, the set amount of stored data is written into a current block of at least one memory, where the current block is used to store non-fragmented data.

8. The method according to claim 7, characterized in that The set amount is related to the quantity of the memory.

9. The method according to claim 7, characterized in that: The number of the memories is multiple; Writing the set amount of stored data into a current block of at least one memory includes: After the set amount of stored data is evenly divided, it is written into multiple current blocks of the memory.

10. A controller, characterized in that: The controller includes a memory and a processor coupled to the memory, wherein the processor is used to run firmware to implement the method according to any one of claims 1 to 9.

11. A storage device, characterized in that: The storage device comprises: a controller and at least one memory coupled to the controller, wherein the controller is used to run firmware to implement the method according to any one of claims 1 to 9.

12. An electronic device, characterized in that: The electronic device includes a host and a storage device coupled to the host, the storage device includes a controller and at least one memory coupled to the controller, and the controller is used to run firmware to implement the method according to any one of claims 1 to 9.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and the computer program is used to be executed by a storage device to implement the method according to any one of claims 1 to 9.

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