Method and device for debugging low-code application

Abstract

The invention provides a method and device for debugging a low-code application. The method comprises the steps that a logic arrangement diagram is obtained, the logic arrangement diagram comprises a plurality of logic nodes and a connection relation among the logic nodes, and each logic node in the logic nodes corresponds to a logic code segment; adding a node mark in the logic code segment corresponding to each logic node; for a target logic node with breakpoint information in the plurality of logic nodes, adding a breakpoint mark in a logic code segment of the target logic node; according to the connection relation, the logic code segments of all the logic nodes are combined, and application codes are obtained; and executing the application code, if the node mark or the breakpoint mark is executed, pausing execution of the subsequent application code, and executing debugging operation.

Description

Technical Field

[0001] This specification relates to the field of computer technology, and in particular, to methods and devices for debugging low-code applications. Background Art

[0002] A low-code development platform is a development platform that can quickly generate applications without coding or with a small amount of code. By providing a graphical user interface, developers of different experience levels can create applications through graphical drag-and-drop functions, which greatly simplifies the development process and makes it more efficient.

[0003] Currently, low-code development platforms do not support real-time debugging. When problems occur in the application code, it is difficult for developers to locate and solve the problems in the code. Summary of the invention

[0004] To overcome the problems existing in the related art, this specification provides a method and device for debugging low-code applications.

[0005] According to a first aspect of an embodiment of this specification, a method for debugging a low-code application is provided, the method comprising: obtaining a logic orchestration diagram, the logic orchestration diagram comprising a plurality of logic nodes and a connection relationship between the plurality of logic nodes, each of the plurality of logic nodes corresponding to a logic code segment; adding a node mark in the logic code segment corresponding to each of the logic nodes; for a target logic node having breakpoint information among the plurality of logic nodes, adding a breakpoint mark in the logic code segment of the target logic node; combining the logic code segments of each logic node according to the connection relationship to obtain an application code; executing the application code, and if the node mark or the breakpoint mark is executed, pausing the execution of subsequent application code, and performing a debugging operation.

[0006] According to a second aspect of an embodiment of this specification, a device for debugging a low-code application is provided, including: an acquisition module, used to acquire a logical orchestration diagram, the logical orchestration diagram including multiple logical nodes and a connection relationship between the multiple logical nodes, each of the multiple logical nodes corresponding to a logical code segment; a node mark adding module, used to add a node mark in the logical code segment corresponding to each logical node; a breakpoint mark adding module, used to add a breakpoint mark in the logical code segment of a target logical node having breakpoint information among the multiple logical nodes; a combination module, used to combine the logical code segments of each logical node according to the connection relationship to obtain an application code; an execution module, used to execute the application code, and if the node mark or the breakpoint mark is executed, the execution of subsequent application code is suspended, and a debugging operation is performed.

[0007] According to a third aspect of an embodiment of this specification, a device for debugging a low-code application is provided, including:

[0008] processor;

[0009] a memory for storing processor-executable instructions;

[0010] The processor is configured to: obtain a logic orchestration diagram, the logic orchestration diagram including a plurality of logic nodes and a connection relationship between the plurality of logic nodes, each of the plurality of logic nodes corresponding to a logic code segment; add a node mark in the logic code segment corresponding to each of the logic nodes; for a target logic node having breakpoint information among the plurality of logic nodes, add a breakpoint mark in the logic code segment of the target logic node; combine the logic code segments of each logic node according to the connection relationship to obtain an application code; execute the application code, and if the node mark or the breakpoint mark is executed, suspend the execution of subsequent application code, and perform a debugging operation.

[0011] The technical solutions provided by the embodiments of this specification may have the following beneficial effects:

[0012] In the embodiments of the present specification, by adding breakpoint information and node marks to the generated logic code segment, and then pausing the execution of subsequent application code and performing debugging operations when the node mark or the breakpoint mark is executed during execution, the function of real-time debugging of the logic code segment is implemented, thereby making it easier for developers to locate and solve problems in the code.

[0013] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the specification and, together with the description, serve to explain the principles of the specification.

[0015] Figure 1 It is a flowchart of a method for debugging a low-code application according to an exemplary embodiment of this specification.

[0016] Figure 2 is a schematic diagram of a logical arrangement diagram shown according to an exemplary embodiment.

[0017] Figure 3A It is a flowchart of another method for debugging a low-code application according to an exemplary embodiment.

[0018] Figure 3Bis a schematic diagram showing another debugging operation according to an exemplary embodiment.

[0019] Figure 4 It is a hardware structure diagram of the computer device where the device for debugging low-code applications in the embodiment of this specification is located.

[0020] Figure 5 It is a block diagram of a device for debugging low-code applications shown in this specification according to an exemplary embodiment. DETAILED DESCRIPTION

[0021] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this specification. Instead, they are merely examples of devices and methods consistent with some aspects of this specification as detailed in the appended claims.

[0022] The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit this specification. The singular forms "a", "the" and "the" used in this specification and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0023] It should be understood that although the terms first, second, third, etc. may be used in this specification to describe various information, this information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this specification, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0024] Next, the embodiments of this specification are described in detail.

[0025] The following is a detailed description of the method for debugging a low-code application provided in the embodiments of this specification. The low-code application may be an application developed based on a low-code development platform. Figure 1 As shown, Figure 1 This is a flowchart of a method for debugging a low-code application according to an exemplary embodiment of this specification. The method for debugging a low-code application provided by the embodiment of this specification may include the following steps.

[0026] In step 110, a logic orchestration diagram is obtained. The logic orchestration diagram includes a plurality of logic nodes and connection relationships between the plurality of logic nodes. Each of the plurality of logic nodes corresponds to a logic code segment.

[0027] According to an embodiment of the present specification, each logic node may correspond to a logic code segment, and the logic code segment may be used to implement a predefined function. A connection relationship may be used to represent the execution logic between multiple logic nodes.

[0028] According to an embodiment of the present specification, a user may, for example, obtain a logic orchestration diagram by arranging logic nodes in a graphical interface of a low-code development platform.

[0029] In step 120, a node tag is added to the logic code segment corresponding to each logic node.

[0030] According to an embodiment of the present specification, a node mark may be used to identify a logical node corresponding to a logical code segment. The node mark may be added at the front of the logical code segment, for example.

[0031] In step 130, for a target logical node having breakpoint information among the multiple logical nodes, a breakpoint mark is added to the logic code segment of the target logical node.

[0032] According to an embodiment of the present specification, when a user edits a logic arrangement diagram, he can add breakpoint information at a logic node where a breakpoint needs to be set, to indicate that a breakpoint needs to be added at the logic node. The breakpoint information may include information such as a breakpoint mark and a breakpoint position. The breakpoint mark may be used to indicate that a breakpoint is included in a logic node. The breakpoint position may include the logic node where the breakpoint is located, and may also include the position of the breakpoint in the logic node, such as the front end of the logic node, the end of the logic node, etc.

[0033] In step 140, the logic code segments of each logic node are combined according to the connection relationship to obtain application code.

[0034] According to an embodiment of the present specification, for example, logical nodes connected to each other may be grouped together in an order indicated by a connection direction according to a connection relationship.

[0035] In step 150, the application code is executed. If a node mark or a breakpoint mark is reached, the execution of subsequent application codes is suspended and a debugging operation is performed.

[0036] According to the embodiments of the present specification, by adding breakpoint information and node marks in the generated logic code segment, and then executing to the node mark or breakpoint mark during execution, the execution of subsequent application code is paused, and debugging operations are performed, thereby realizing the function of real-time debugging of the logic code segment, thereby making it easier for developers to locate and solve problems in the code.

[0037] Optionally, during the execution of the application code, for example, it is possible to detect whether there are node marks and breakpoint marks in each logical code segment in the application code. If there are node marks but no breakpoint marks in the logical code segment, the node marks in the logical code segment are replaced with preset codes, and the preset codes are used to pause the execution of subsequent application codes and wait for debugging instructions. If there are node marks and breakpoint marks in the logical code segment, the node marks in the logical code segment are replaced with preset codes, and the breakpoint marks are added to the preset codes. After the replacement is completed, each logical code segment in the application code can be executed in sequence. When the preset code is executed, the execution of subsequent application codes is paused and the debugging instructions are waited for. If a debugging instruction is received, the debugging operation is performed according to the debugging instruction.

[0038] Optionally, the debugging instruction may include a next step instruction. Based on this, according to the debugging instruction, performing the debugging operation may include: executing the next logic code segment located after the pause position in the application code, sending the node mark and context information corresponding to the next logic code segment of the currently executed logic code to the debugger, and entering a waiting state. In the waiting state, the execution of the subsequent application code is suspended and a debugging instruction is waited.

[0039] Optionally, the debugging instruction may include a next breakpoint instruction; sequentially read each logic code segment located after the pause position in the application code; detect whether the read logic code segment contains a breakpoint mark; if the read logic code segment does not contain a breakpoint mark, execute the read logic code segment; if the read logic code segment contains a breakpoint mark, execute the read logic code segment, send the node mark and context information corresponding to the read logic code segment to the debugger, and enter a waiting state. In the waiting state, the execution of subsequent application code is suspended and waits for a debugging instruction.

[0040] Optionally, the debugging instruction includes a skip all breakpoints instruction; according to the debugging instruction, performing a debugging operation includes: according to the skip all breakpoints instruction, executing the remaining application code after the pause position in the application code, and skipping all preset codes during the execution of the remaining application code.

[0041] It should be noted that, in addition to the next step instruction, the next breakpoint instruction and the skip all breakpoints instruction, the debugging instruction may also include other types of instructions to perform other types of debugging operations, which is not specifically limited in this specification.

[0042] The method for debugging low-code applications according to the embodiments of the present specification can support multiple debugging instructions, thereby improving the debugging efficiency and accuracy of industrial enterprises during the development process.

[0043] Figure 2 is a schematic diagram of a logical arrangement diagram shown according to an exemplary embodiment.

[0044] like Figure 2 As shown, the logic arrangement diagram may include multiple logic nodes and connection relationships between multiple logic nodes. The connection relationship may be represented by arrows. Breakpoint information may be configured for one or more logic nodes in the logic arrangement diagram according to user needs.

[0045] According to an embodiment of the present specification, for example, a plurality of logical nodes in a logic arrangement diagram and the connection relationship between the plurality of logical nodes can be displayed in a graphical interface. When a user needs to configure a breakpoint, a breakpoint configuration operation (for example, including clicking or dragging, etc.) can be performed in the graphical interface to configure the breakpoint. The breakpoint configuration operation generates a breakpoint configuration event. If a breakpoint configuration event for a target logical node among the plurality of logical nodes is detected, breakpoint information is added to the target logical node according to the breakpoint configuration event. The breakpoint information may include information such as a breakpoint mark and a breakpoint position.

[0046] In this embodiment, the graphical interface of the low-code development platform may include a logic orchestration canvas in which users can edit logic nodes, set connection relationships between logic nodes, and add breakpoints.

[0047] like Figure 3A , which is a flowchart of another method for debugging a low-code application according to an exemplary embodiment, and the method may include the following operations:

[0048] 1) Arrange the logic nodes on the logic arrangement canvas to obtain a logic arrangement diagram. In addition, breakpoint information can be configured for one or more logic nodes in the logic arrangement diagram according to user needs;

[0049] 2) Generate application code based on the arranged logic layout diagram. When generating application code, add a node mark before the logic code segment of each logic node. If a logic node with breakpoint information is encountered, add a breakpoint mark to the logic code segment of the logic node;

[0050] 3) The generated application code with node marks and breakpoint information is sent to the logic code segment execution engine, and a unique debugging mark is returned;

[0051] 4) The debugger receives the returned unique tag and sends the next breakpoint instruction;

[0052] 5) The logic code segment execution engine first converts the node mark in the application code into a logic code segment that calls the waiting debugging instruction, that is, the preset code; in the process of converting the node mark in the logic code segment into the preset code, if the logic code segment has a breakpoint mark, the breakpoint mark is also added to the preset code;

[0053] 6) Run the new application code generated in step 5 that contains the preset code.

[0054] During the running process, each logical code segment in the application code can be read and executed in turn.

[0055] In particular, when the first logic code segment is read and the preset code in the logic code segment is identified, the logic of waiting for debugging instructions is executed, including pausing the execution of subsequent codes and entering a waiting state, that is, waiting to receive debugging instructions, and performing corresponding debugging operations when receiving debugging instructions.

[0056] During the running process, if the end logic is encountered, the debugging ends and the result is returned.

[0057] like Figure 3B FIG. 2 is a schematic diagram of another debugging operation according to an exemplary embodiment. The debugging operation may include the following operations 7 to 9.

[0058] 7) If a debugging instruction is received and the debugging instruction is the next step, the next logic code segment after the pause position in the application code is executed. After the logic code segment is executed, the node mark and context information corresponding to the logic code segment are sent to the debugging party, and a waiting state is entered until the next debugging instruction is received;

[0059] 8) If a debugging instruction is received, and the debugging instruction is the next breakpoint, then read the next logic code segment after the pause position, and detect the preset code in the logic code segment to determine whether there is a breakpoint mark in the preset code;

[0060] If there is no breakpoint mark in the preset code of the logic code segment, continue to read the next logic code segment of the logic code segment, and return to the above step of detecting the preset code in the logic code segment;

[0061] If a breakpoint mark exists in the preset code of the logic code segment, the logic code segment is executed, the node mark and context information corresponding to the logic code segment are sent to the debugger, and a waiting state is entered until the next debugging instruction is received;

[0062] 9) If a debugging instruction is received, and the debugging instruction is to skip all breakpoints, the remaining application code after the pause position in the application code is executed, and all preset codes are skipped during the execution of the remaining application code.

[0063] According to the embodiments of this specification, firstly, the connection relationship between the logic nodes and the logic nodes is configured on the logic arrangement canvas, and the breakpoint information is set. When debugging is turned on, the breakpoint information and the logic nodes are converted into application code and sent to the logic execution engine. The logic execution engine runs the application code, and when the breakpoint information is encountered, the current context and the breakpoint information are sent to the debugger. After the debugger receives the breakpoint information, it can send debugging instructions (including but not limited to the next step, the next breakpoint, and skip all breakpoints, etc.) to the logic execution engine, thereby realizing the real-time debugging function of the logic arrangement.

[0064] This solution does not require users to wait for the compiler to compile the logic. Users can configure breakpoints in real time when arranging the logic. They only need to send the debugging logic with breakpoint information to the logic execution engine, and the debugger can control and debug the logic through debugging instructions.

[0065] Corresponding to the embodiments of the aforementioned method, this specification also provides embodiments of an apparatus for debugging low-code applications and a terminal to which it is applied.

[0066] The embodiments of the apparatus for debugging low-code applications in this specification can be applied to computer devices, such as servers or terminal devices. The apparatus embodiments can be implemented through software, hardware, or a combination of software and hardware. Taking software implementation as an example, as a logical device, it is formed by the processor in which it is located reading the corresponding computer program instructions in the non-volatile memory into the memory and running them. From the hardware level, if Figure 4 As shown, it is a hardware structure diagram of the computer device where the device for debugging low-code applications in the embodiment of this specification is located, except Figure 4 In addition to the processor 410, memory 430, network interface 420, and non-volatile memory 440 shown, the server or electronic device where the device 431 is located in the embodiment may also include other hardware according to the actual function of the computer device, which will not be described in detail.

[0067] like Figure 5 As shown, Figure 5 This is a block diagram of a device for debugging a low-code application according to an exemplary embodiment of the present specification, the device comprising:

[0068] An acquisition module 510 is used to acquire a logic orchestration diagram, where the logic orchestration diagram includes a plurality of logic nodes and connection relationships between the plurality of logic nodes, and each of the plurality of logic nodes corresponds to a logic code segment;

[0069] A node mark adding module 520 is used to add a node mark in the logic code segment corresponding to each logic node;

[0070] A breakpoint mark adding module 530 is used to add a breakpoint mark in a logic code segment of a target logical node having breakpoint information among the multiple logical nodes;

[0071] A combining module 540 is used to combine the logic code segments of each logic node according to the connection relationship to obtain application code;

[0072] The execution module 550 is used to execute the application code. If the application code is executed to a node mark or a breakpoint mark, the execution of the subsequent application code is suspended and a debugging operation is performed.

[0073] Optionally, the execution module may include:

[0074] A detection submodule, used to detect whether there are node marks and breakpoint marks in each logical code segment in the application code;

[0075] The first replacement submodule is used to replace the node mark in the logic code segment with a preset code if there is a node mark but no breakpoint mark in the logic code segment, and the preset code is used to suspend the execution of subsequent application code and wait for debugging instructions;

[0076] The second replacement submodule is used for replacing the node mark in the logic code segment with a preset code and adding the breakpoint mark to the preset code if there are node marks and breakpoint marks in the logic code segment;

[0077] The execution submodule is used to execute each logical code segment in the application code in sequence. When the preset code is executed, the execution of the subsequent application code is suspended and the debugging instruction is waited;

[0078] The debugging submodule is used to execute a debugging operation according to the debugging instruction if a debugging instruction is received.

[0079] Optionally, the debugging instruction includes a next step instruction; the debugging submodule may include:

[0080] The first debugging unit is used to execute the next logic code segment after the pause position in the application code according to the next step instruction, send the node mark and context information corresponding to the next logic code segment to the debugging party, and enter a waiting state.

[0081] Optionally, the debugging instruction includes a next breakpoint instruction; the debugging submodule may include:

[0082] The second debugging unit is used to read each logical code segment located after the pause position in the application code in sequence; detect whether the read logical code segment contains a breakpoint mark; if the read logical code segment does not contain a breakpoint mark, execute the read logical code segment; if the read logical code segment contains a breakpoint mark, execute the read logical code segment, send the node mark and context information corresponding to the read logical code segment to the debugging party, and enter a waiting state.

[0083] Optionally, the debugging instruction includes a skip all breakpoint instruction; the debugging submodule may include:

[0084] The third debugging unit is used to execute the remaining application code after the pause position in the application code according to the skip all breakpoints instruction, and skip all preset codes during the execution of the remaining application code.

[0085] In the embodiments of the present specification, by adding breakpoint information and node marks to the generated logic code segment, and then pausing the execution of subsequent application code and performing debugging operations when the node mark or the breakpoint mark is executed during execution, the function of real-time debugging of the logic code segment is implemented, thereby making it easier for developers to locate and solve problems in the code.

[0086] Accordingly, the present specification also provides a device for debugging a low-code application, the device comprising a processor; a memory for storing processor executable instructions; wherein the processor is configured to: obtain a logic orchestration diagram, the logic orchestration diagram comprising multiple logic nodes and a connection relationship between the multiple logic nodes, each of the multiple logic nodes corresponding to a logic code segment; add a node mark in the logic code segment corresponding to each logical node; for a target logic node with breakpoint information in the multiple logic nodes, add a breakpoint mark in the logic code segment of the target logic node; according to the connection relationship, combine the logic code segments of each logic node to obtain application code; execute the application code, if the node mark or breakpoint mark is executed, the execution of subsequent application code is suspended, and a debugging operation is performed.

[0087] The implementation process of the functions and effects of each module in the above-mentioned device is specifically described in the implementation process of the corresponding steps in the above-mentioned method, which will not be repeated here.

[0088] For the device embodiment, since it basically corresponds to the method embodiment, the relevant parts can refer to the partial description of the method embodiment. The device embodiment described above is only schematic, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this specification. A person of ordinary skill in the art can understand and implement it without paying creative labor.

[0089] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0090] Those skilled in the art will readily appreciate other embodiments of the specification after considering the specification and practicing the invention claimed herein. The specification is intended to cover any variations, uses or adaptations of the specification that follow the general principles of the specification and include common knowledge or customary techniques in the art that are not claimed in the specification. The specification and examples are to be considered exemplary only, and the true scope and spirit of the specification are indicated by the following claims.

[0091] It should be understood that the present description is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present description is limited only by the appended claims.

[0092] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A method for debugging a low-code application, characterized in that: The method comprises: Acquire a logic orchestration diagram, wherein the logic orchestration diagram includes a plurality of logic nodes and connection relationships between the plurality of logic nodes, and each of the plurality of logic nodes corresponds to a logic code segment; Adding a node mark to the logic code segment corresponding to each logic node; For a target logical node having breakpoint information among the multiple logical nodes, adding a breakpoint mark in a logical code segment of the target logical node; Combining the logic code segments of each logic node according to the connection relationship to obtain application code; The application code is executed, and if the node mark or the breakpoint mark is reached, the execution of subsequent application codes is suspended, and a debugging operation is performed.

2. The method according to claim 1, characterized in that The executing the application code comprises: Detecting whether there is a node mark and a breakpoint mark in each logical code segment in the application code; If there is a node mark but no breakpoint mark in the logic code segment, the node mark in the logic code segment is replaced with a preset code, where the preset code is used to suspend the execution of subsequent application codes and wait for debugging instructions; If there are node marks and breakpoint marks in the logic code segment, the node marks in the logic code segment are replaced with the preset code, and the breakpoint marks are added to the preset code; Execute each logic code segment in the application code in sequence, and when the preset code is executed, suspend the execution of subsequent application codes and wait for debugging instructions; If a debugging instruction is received, a debugging operation is performed according to the debugging instruction.

3. The method according to claim 2, characterized in that The debugging instruction includes a next step instruction; and performing the debugging operation according to the debugging instruction includes: According to the next step instruction, the next logic code segment after the pause position in the application code is executed, the node mark and context information corresponding to the next logic code segment are sent to the debugger, and the waiting state is entered.

4. The method according to claim 2, characterized in that: The debugging instruction includes a next breakpoint instruction; and performing the debugging operation according to the debugging instruction includes: Reading each logic code segment after the pause position in the application code in sequence; Detect whether the read logic code segment contains a breakpoint mark; If the read logic code segment does not contain a breakpoint mark, executing the read logic code segment; If the read logic code segment contains a breakpoint mark, the read logic code segment is executed, the node mark and context information corresponding to the read logic code segment are sent to the debugger, and a waiting state is entered.

5. The method according to claim 2, characterized in that: The debugging instruction includes a skip all breakpoints instruction; and the performing the debugging operation according to the debugging instruction includes: According to the skip all breakpoints instruction, the remaining application code located after the pause position in the application code is executed, and all preset codes are skipped during the execution of the remaining application code.

6. A device for debugging a low-code application, characterized in that: The device comprises: An acquisition module, configured to acquire a logic orchestration diagram, wherein the logic orchestration diagram includes a plurality of logic nodes and connection relationships between the plurality of logic nodes, wherein each of the plurality of logic nodes corresponds to a logic code segment; A node mark adding module, used for adding a node mark in the logic code segment corresponding to each logic node; A breakpoint mark adding module, configured to add a breakpoint mark in a logic code segment of a target logical node having breakpoint information among the multiple logical nodes; A combining module, used for combining the logic code segments of each logic node according to the connection relationship to obtain application code; The execution module is used to execute the application code, and if the node mark or the breakpoint mark is executed, the execution of subsequent application codes is suspended, and a debugging operation is performed.

7. The device according to claim 6, characterized in that The execution module includes: A detection submodule, used to detect whether there is a node mark and a breakpoint mark in each logical code segment in the application code; A first replacement submodule, configured to replace the node mark in the logic code segment with a preset code if there is a node mark but no breakpoint mark in the logic code segment, wherein the preset code is used to suspend the execution of subsequent application codes and wait for debugging instructions; A second replacement submodule is used for replacing the node mark in the logic code segment with the preset code if there are node marks and breakpoint marks in the logic code segment, and adding the breakpoint mark to the preset code; An execution submodule, used to execute each logic code segment in the application code in sequence, and when executing the preset code, suspend the execution of subsequent application codes and wait for debugging instructions; The debugging submodule is used to execute a debugging operation according to a debugging instruction if a debugging instruction is received.

8. The device according to claim 7, characterized in that The debugging instructions include next step instructions; The debugging submodule includes: The first debugging unit is used to execute the next logic code segment after the pause position in the application code according to the next step instruction, send the node mark and context information corresponding to the next logic code segment to the debugging party, and enter a waiting state.

9. The device according to claim 7, characterized in that The debugging instructions include a next breakpoint instruction; The debugging submodule includes: The second debugging unit is used to read each logical code segment located after the pause position in the application code in sequence; detect whether the read logical code segment contains a breakpoint mark; if the read logical code segment does not contain a breakpoint mark, execute the read logical code segment; if the read logical code segment contains a breakpoint mark, execute the read logical code segment, send the node mark and context information corresponding to the read logical code segment to the debugging party, and enter a waiting state.

10. A low-code application device, characterized in that: The device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following method when executing the program: obtaining a logic arrangement diagram, the logic arrangement diagram including a plurality of logic nodes and connection relationships between the plurality of logic nodes, each of the plurality of logic nodes corresponding to a logic code segment; adding a node mark to the logic code segment corresponding to each of the logic nodes; for a target logic node having breakpoint information among the plurality of logic nodes, adding a breakpoint mark to the logic code segment of the target logic node; combining the logic code segments of each logic node according to the connection relationship to obtain an application code; and executing the application code, and if the node mark or the breakpoint mark is executed, pausing the execution of subsequent application code and performing a debugging operation.

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