Memristive simulator equivalent circuit, control method and electronic equipment

Abstract

The invention discloses a memristor simulator equivalent circuit, a control method and electronic equipment, and belongs to the technical field of circuit element simulators. The memristor simulator equivalent circuit provided by the invention can reproduce the characteristics of the memristor and replace the memristor by using the combination of the multiplier and the operational amplifier, not only supports long-term debugging and use, but also avoids complex hardware circuit design and high device cost use, and solves the problem of performance degradation under non-ideal conditions. By introducing the integrator composed of the second operational amplifier and the integrating capacitor, the dynamic characteristics of the memristor can be accurately simulated, the stability of conductivity in a non-conducting state is ensured, and errors caused by non-ideal characteristics (such as input offset voltage and input bias current) of the operational amplifiers are reduced; by arranging the single-pole double-throw switch, the circuit can be flexibly switched among different working modes, and circuit parameters can be conveniently adjusted according to actual application requirements, so that the performance of the simulator is optimized.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit element simulators, and in particular to a memristor simulator equivalent circuit, a control method and an electronic device. Background Art

[0002] In the rapid development of artificial intelligence, deep learning and artificial neural network technology have occupied a pivotal position. These technologies are deeply inspired by the structure of the human brain. By simplifying and simulating the connection between neurons and synapses in the brain, they have successfully achieved accurate processing of a series of complex tasks such as motion control, logical reasoning, and target recognition. However, there is still a significant gap in performance between current artificial neural networks and the human brain. In order to be closer to the working mechanism of the human brain, spiking neural networks came into being. It specializes in processing discrete pulse signals by finely modeling the neurons and synapses in the brain.

[0003] Compared with traditional artificial neural network algorithms, the training process of pulse neural networks is more complicated, the design of their synaptic circuits is also extremely challenging, and the cost of electronic components is high. These factors together constitute an important obstacle to building large-scale hardware neural networks.

[0004] Memristors, as an innovative electronic component, can change their resistance value as current passes through them, and this change is non-volatile and reversible, and can maintain the memory characteristics of resistance, which is strikingly similar to the dynamic changes in biological synaptic weights. In addition, memristors also have the significant advantages of high density, low power consumption, and high-speed switching, and are perfectly compatible with traditional CMOS processes. Therefore, memristors have shown great potential in building efficient neural network circuits. Compared with the previous complex CMOS synaptic circuits, synaptic circuits built using memristors can achieve significant optimization in terms of device quantity, energy consumption, and efficiency.

[0005] Although feasible preparation methods have been developed in the field of memristor device research, there are still many challenges in directly using these real memristor devices to build neural networks. From nanoscale material synthesis to complex device structure design, the existing memristor preparation methods are quite difficult, and the prepared memristors have strict requirements on the use environment, and their memristive characteristics are not ideal under certain conditions. For commercial memristor solutions, the high cost of use and limited power-on cycle life have become stumbling blocks to their promotion and application. Especially in the application scenarios of pulse neural networks, the memristor needs to be repeatedly powered on, which undoubtedly poses a severe challenge to its long-term debugging and stability of use.

[0006] At present, the industry has proposed to build a memristor simulator through an equivalent circuit to replace the real memristor for the hardware circuit implementation of the pulse neural network, but the structure is usually complex and costly. At the same time, in the actual hardware circuit, the operational amplifier is not completely ideal, and its performance will be affected by the input offset voltage and input bias current. In the application process of the pulse neural network, it is necessary to repeatedly apply DC pulses to the memristor unit to change its conductance, and at the same time, the memristor is required to maintain the basic stability of the conductance in a relatively long non-conducting state. However, under non-ideal conditions, the memristor simulator will have a continuous current in the non-conducting state, which will affect the voltage across the internal capacitor, and thus cause unnecessary changes in the conductance.

[0007] In view of this, how to use common circuit components such as operational amplifiers to design a simple and easy-to-implement memristor simulator and take practical and effective measures to reduce the adverse effects of the non-ideal characteristics of the operational amplifier on conductivity has become a key technical problem that technical personnel in this field urgently need to solve. Summary of the invention

[0008] The purpose of the present invention is to provide a memristor simulator equivalent circuit, a control method and an electronic device, aiming to solve the problem that the design of the memristor simulator equivalent circuit is complex and difficult to use and the conductivity performance degradation under the non-ideal characteristics of the operational amplifier.

[0009] The present invention solves the above technical problems through the following technical solutions: A memristor simulator equivalent circuit includes a first operational amplifier U 1 , the second operational amplifier U 2 , the first multiplier M 1 , the second multiplier M 2 , the first resistor R 1 , the second resistor R 2 , the third resistor R 3 , integrating capacitor C and single-pole double-throw switch SW; The first operational amplifier U 1 The first input terminal u 1x , the second multiplier M 2 The second input terminal n 2 and the second resistor R 2 The first end r 21 Both are electrically connected to the voltage input terminal a of the equivalent circuit, and the voltage output terminal b of the equivalent circuit is grounded; The first resistor R 1 The first end r 11 are electrically connected to the first operational amplifier U 1 The second input terminal u 1y and output u 1z , the first resistor R 1The second end r 12 Electrically connected to the first throw terminal s of the single-pole double-throw switch SW 1 ; The second throw terminal of the single-pole double-throw switch SW 2 Through the third resistor R 3 Ground, common terminal of single-pole double-throw switch SW 0 Electrically connected to the second operational amplifier U 2 The second input terminal u 2y , the second operational amplifier U 2 The first input terminal u 2x Grounding; The second operational amplifier U 2 The second input terminal u 2y The common terminals s of the single-pole double-throw switch SW are electrically connected to the 0 and the first terminal of the integrating capacitor c 1 , the second terminal of the integrating capacitor c 2 Electrically connected to the second operational amplifier U 2 The output terminal u 2z , the first multiplier M 1 The first input terminal m 1 and the second input terminal n 1 ; The first multiplier M 1 The output terminal v 1 Electrically connected to the second multiplier M 2 The first input terminal m 1 , the second multiplier M 2 The output terminal v 2 Electrically connected to the second resistor R 2 The second end r 22 .

[0010] Furthermore, the first operational amplifier U 1 and the second operational amplifier U 2 The model is AD711.

[0011] Furthermore, the first multiplier M 1 and the second multiplier M 2 The model is the four-quadrant analog multiplier AD633.

[0012] Furthermore, the model of the single-pole double-throw switch SW is TMUX1134, and the switching mode of the switch is one of manual control and programmable algorithm control.

[0013] Furthermore, the first multiplier M 1 Output terminal v 1 The voltage U v1 , the first input terminal m 1 Voltage Um1 and the second input terminal n 1 The voltage U n1 The following relationship exists: , where g 1 is the first multiplier M 1 The scale factor of the second multiplier M 2 Output terminal v 2 The voltage U v2 , the first input terminal m 2 Voltage U m2 and the second input terminal n 2 The voltage U n2 The following relationship exists: , where g 2 is the second multiplier M 2 The scale factor of .

[0014] A control method for a memristor simulator equivalent circuit is based on the above memristor simulator equivalent circuit, wherein the first operational amplifier U 1 and the first resistor R 1 The second operational amplifier U 2 And the integrating capacitor C form an integrator; Connect the first throw terminal of the single-pole double-throw switch SW to 1 With public end 0 The voltage follower is connected to the integrator, and the input voltage is adjusted to be greater than 0. At this time, the memristor simulator is in the on mode; Connect the first throw terminal of the single-pole double-throw switch SW to 1 With public end 0 The voltage follower is connected to the integrator, and the input voltage is adjusted to be equal to 0. At this time, the memristor simulator is in reset mode; Connect the second throw terminal of the single-pole double-throw switch SW to 2 With public end 0 connected, the voltage follower and integrator disconnected, the second operational amplifier U 2 The second input terminal u 2y Through the third resistor R 3 Grounded, at this time, the memristor simulator is in power conservation mode.

[0015] Furthermore, when the memristor simulator is in the on-mode, the conductance of the memristor simulator Specifically:

[0016] Among them, g 1 is the first multiplier M 1 The scale factor of g 2 is the second multiplier M 2 The scale factor of is the magnetic flux.

[0017] Furthermore, when the memristor simulator is in reset mode, after the integral capacitor C is charged from 0V to the integrator saturation, the conductance Remain unchanged, the charging time is:

[0018] in, Through the first resistor R 1 The current; is the maximum voltage of the integrating capacitor C.

[0019] Furthermore, when the memristor simulator is in power conservation mode, the maximum voltage change rate of the integral capacitor C in this mode is

[0020] Where Q is the charge of the integrating capacitor C, is the maximum input offset voltage, is the maximum value of input bias current, is the maximum leakage current.

[0021] An electronic device comprises: the above-mentioned memristor simulator equivalent circuit.

[0022] Compared with the prior art, the positive and progressive effects of the present invention are: The memristor simulator equivalent circuit provided by the present invention utilizes a combination of a multiplier and an operational amplifier to reproduce the characteristics of a memristor and replace the memristor for use, which not only supports long-term debugging and use, but also avoids the use of complex hardware circuit design and high device costs, and solves the problem of performance degradation under non-ideal conditions. By introducing an integrator composed of a second operational amplifier and an integral capacitor, the dynamic characteristics of the memristor can be accurately simulated, the stability of the conductance in the non-conducting state can be ensured, and the error caused by the non-ideal characteristics of the operational amplifier (such as input offset voltage and input bias current) can be reduced; by setting a single-pole double-throw switch, the circuit can be flexibly switched between different working modes, which is convenient for adjusting the circuit parameters according to actual application requirements, thereby optimizing the simulator performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings in the specification are used to provide further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0024] Figure 1 This is the equivalent circuit diagram of the memristor simulator; Figure 2 is the equivalent circuit diagram of the conduction mode; Figure 3 The IV hysteresis curves of the equivalent circuit of the memristor simulator at different frequencies; Figure 4 The IV hysteresis curve of the memristor simulator equivalent circuit under different voltage amplitudes; Figure 5 This is the equivalent circuit diagram of the reset mode. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0026] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0028] In the description of the embodiments of the present invention, it should be noted that if the terms "upper", "lower", "horizontal", "inner", etc. indicate an orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the invention is usually placed when in use, it is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0029] In addition, if the term "horizontal" appears, it does not mean that the component is required to be absolutely horizontal, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", which does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0030] In the description of the embodiments of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal connection of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] The present invention is further described in detail below in conjunction with the accompanying drawings, which are intended to explain the present invention rather than to limit it.

[0032] See also Figure 1 , a memristor simulator equivalent circuit, comprising a first operational amplifier U 1 , the second operational amplifier U 2 , the first multiplier M 1 , the second multiplier M 2 , the first resistor R 1 , the second resistor R 2 , the third resistor R 3 , integrating capacitor C and single-pole double-throw switch SW; The first operational amplifier U 1 The first input terminal u 1x , the second multiplier M 2 The second input terminal n 2 and the second resistor R 2 The first end r 21 Both are electrically connected to the voltage input terminal a of the equivalent circuit, and the voltage output terminal b of the equivalent circuit is grounded; The first resistor R 1 The first end r 11 are electrically connected to the first operational amplifier U 1 The second input terminal u 1y and output u 1z , the first resistor R 1 The second end r 12 Electrically connected to the first throw terminal s of the single-pole double-throw switch SW 1 ; The second throw terminal of the single-pole double-throw switch SW 2 Through the third resistor R 3 Ground, common terminal of single-pole double-throw switch SW 0 Electrically connected to the second operational amplifier U 2 The second input terminal u 2y , the second operational amplifier U 2 The first input terminal u 2x Grounding; The second operational amplifier U 2 The second input terminal u 2y The common terminals s of the single-pole double-throw switch SW are electrically connected to the 0 and the first terminal of the integrating capacitor c 1 , the second terminal of the integrating capacitor c 2 Electrically connected to the second operational amplifier U 2 The output terminal u 2z , the first multiplier M 1 The first input terminal m 1 and the second input terminal n 1 ; The first multiplier M 1 The output terminal v 1 Electrically connected to the second multiplier M 2 The first input terminal m 1 , the second multiplier M 2 The output terminal v 2 Electrically connected to the second resistor R 2 The second end r 22 .

[0033] In the embodiment of the present invention, the first operational amplifier U 1 and the second operational amplifier U 2 The model is AD711.

[0034] In the embodiment of the present invention, the first multiplier M 1 and the second multiplier M 2 The model is the four-quadrant analog multiplier AD633.

[0035] In the embodiment of the present invention, the model of the single-pole double-throw switch SW is TMUX1134, and the switching mode of the switch is one of manual control and programmable algorithm control.

[0036] In the embodiment of the present invention, the first multiplier M 1 Output terminal v 1 The voltage U v1 , the first input terminal m 1 Voltage U m1 and the second input terminal n 1 The voltage U n1 The following relationship exists: , where g 1 is the first multiplier M 1 The scale factor of the second multiplier M 2 Output terminal v 2 The voltage U v2 , the first input terminal m 2 Voltage U m2 and the second input terminal n 2 The voltage Un2 The following relationship exists: , where g 2 is the second multiplier M 2 The scale factor of .

[0037] The memristor simulator equivalent circuit provided by the present invention overcomes the high cost requirements and stringent use environment requirements of commercial memristors, and can support long-term debugging and use; avoids complex hardware circuit design and device cost use; solves the problem of conductance change of the memristor simulator under the influence of input offset voltage and input bias current in the non-conducting state; and supports multiple working modes, so that the memristor simulator can work in different working modes according to usage requirements.

[0038] The memristor simulator equivalent circuit provided by the present invention comprises a first operational amplifier U 1 and the first resistor R 1 The second operational amplifier U 2 and the integrating capacitor C form an integrator; it includes three working modes, namely, a conduction mode, a power-saving mode and a reset mode, and the working modes are switched by changing the size of the input voltage and switching the connection of the single-pole double-throw switch SW.

[0039] The specific control methods are as follows: In general, the mathematical model of an ideal memristor with an 8-shaped hysteresis loop is:

[0040] Where: is the current through the device; is the voltage across the device; is the magnetic flux of the device; is the conductance of the device; and The memristor simulator provided by the present invention is constructed according to an ideal memristor model having a similar 8-shaped hysteresis loop.

[0041] Connect the first throw terminal of the single-pole double-throw switch SW to 1 With public end 0 The voltage follower is connected to the integrator, and the input voltage is adjusted to be greater than 0. At this time, the memristor simulator is in the on-mode; the memristor simulator works normally, and the IV characteristic curve is a hysteresis curve. For the equivalent circuit diagram, see Figure 2 , where the input voltage is v(t), the current passing through is i(t), and the magnetic flux is , the conductivity is , the first multiplier M 1 Input voltage

[0042]

[0043] Then the second multiplier M 2 Output voltage for

[0044] Where: g 1 , g 2 The first multiplier M 1 and the second multiplier M 2 The scale factor of .

[0045] Then we can get the current i(t) passing through the voltage input terminal a of the equivalent circuit as

[0046] Conductivity for

[0047] Compared with the mathematical model of an ideal memristor with a similar 8-shaped hysteresis loop, we can get

[0048] The circuit parameters are set as shown in Table 1. The circuit simulation of the memristor simulator structure is performed in the software Multisim. The simulation results are shown in Figure 3 and Figure 4 shown.

[0049] Table 1 Circuit parameters

[0050] exist Figure 3 and Figure 4 In the figure, the external characteristics of the memristor simulator obtained through circuit simulation are similar to the 8-shaped hysteresis loop, which proves that the external characteristics of the circuit structure when the memristor simulator is turned on basically conform to the mathematical model of the ideal memristor, with only the direction of the hysteresis loop being different. Both can be used as memristor units of pulse neural networks.

[0051] Connect the first throw terminal of the single-pole double-throw switch SW to 1 With public end 0 The voltage follower is connected to the integrator, and the input voltage is adjusted to 0. At this time, the memristor simulator is in reset mode, and the memristor simulator does not work. The non-ideal characteristics of the operational amplifier will cause the conductance of the memristor simulator to change. After a period of time, the conductance of the memristor simulator returns to the initial state and then remains constant. The initial state is determined by the circuit parameters and is a constant value.

[0052] Memristor simulator conductance and the second operational amplifier U 2The integrator voltage is directly related to the integrator voltage, that is, it depends on the capacitor voltage of the integrator, so it mainly affects the first operational amplifier M 1 , the second operational amplifier M 2 After analysis, considering the offset voltage and bias current of the operational amplifier, the equivalent circuit diagram of the memristor simulator reset mode can be found in Figure 5 , in the figure is the first operational amplifier M 1 The input offset voltage, I B1+ and I B1- The first operational amplifier M 1 The input bias current of the non-inverting input and the inverting input, I B1+ and I B1- The average value is called the first operational amplifier M 1 The input bias current I B1 ; Similarly, is the first operational amplifier M 2 The input offset voltage, I B2+ and I B2- The first operational amplifier M 2 The input bias current of the non-inverting input and the inverting input, I B2+ and I B2- The average value is called the first operational amplifier M 2 The input bias current I B2 .

[0053] Due to the input offset voltage, the input voltage of the voltage follower formed by the first operational amplifier satisfy

[0054] Similarly, the negative input voltage of the integrator formed by the second operational amplifier satisfy

[0055] Then we can get the current flowing through the first resistor R 1 Current satisfy:

[0056] Considering the influence of the operational amplifier input bias current, it can be concluded that the current flowing through the integrating capacitor C is Size:

[0057] It can be seen that when the memristor simulator is in a non-conducting state and the input voltage is 0, there is still a continuous current flowing through the integral capacitor C to charge it, causing the voltage at both ends to change, thereby causing the conductance to change. It should be noted here that although and It is a subtraction relationship, but it does not mean that the impact of the input offset voltage of the two op amps will cancel or weaken each other. This is because the polarity of the input offset voltage of the op amp is not fixed, it can be positive or negative, and the maximum value marked in the device manual is usually an absolute value. So under extreme conditions, the current The maximum absolute value is

[0058] According to the operational amplifier AD711 used in this embodiment and the circuit structure resistance and capacitance parameters in Table 1, it can be obtained that A This value is relative to the integral capacitor It is already not negligible, even under a more conservative premise. , considering AD711 in The maximum output voltage under power supply is , then is the integrating capacitor The time required to charge until the op amp output is saturated for

[0059] Among them, Q is the charge of the integrating capacitor C, and only The voltage of the integrating capacitor will be charged from 0V to the saturation of the integrator, after which the conductance will return to the initial state and remain unchanged.

[0060] If it is necessary to keep the conductance of the memristor simulator unchanged without applying the memristor input voltage, measures need to be taken to improve the impact of the non-ideal characteristics of the operational amplifier, that is, switch to the power conservation mode, specifically: switch the second throw terminal s of the single-pole double-throw switch SW to 2 With public end 0 connected, the voltage follower and integrator disconnected, the second operational amplifier U 2 The second input terminal u 2y Through the third resistor R 3 Grounded, at this time, the memristor simulator is in power conservation mode.

[0061] When the memristor simulator switches to the power conservation mode, the memristor simulator does not work and keeps the conductance of the memristor simulator approximately constant. 3 When the memristor simulator is turned on, the circuit will not be connected, so the maximum value can be obtained to minimize the charging current. At the same time, considering that there is still a certain leakage current when the switch is turned off When the memristor simulator is not turned on, the maximum charging current of the integral capacitor is

[0062] For analog switch leakage current In order to minimize the charging capacitance of the integral capacitor C in the non-conducting state, and taking into account other switch indicators such as switching speed, power supply mode, etc., the grounding resistance , the maximum charging current is

[0063] Compared with the previous improvement, the charging current has been greatly reduced, without changing the conductivity change rate during power-on (maintaining unchanged), take , , further reducing the voltage change of the integral capacitor C in the non-conducting state. At this time, the maximum voltage change rate of the integral capacitor C is

[0064] Considering that even a real memristor may dissipate and change its conductance when no power is supplied, the conductance change caused by the voltage change of the integral capacitor C is within an acceptable range.

[0065] In summary, the memristor simulator equivalent circuit provided by the present invention utilizes a combination of a multiplier and an operational amplifier, which not only supports long-term debugging and use, but also avoids complex hardware circuit design and device cost use, can effectively enhance the anti-interference ability of the circuit, and can maintain high stability even under non-ideal conditions. By introducing an integrator composed of a second operational amplifier and an integral capacitor, the dynamic characteristics of the memristor can be accurately simulated, the stability of the conductance in the non-conducting state can be ensured, and the error caused by the non-ideal characteristics of the operational amplifier (such as input offset voltage and input bias current) can be reduced; by setting a single-pole double-throw switch, the circuit can be flexibly switched between different working modes, which is convenient for adjusting the circuit parameters according to actual application requirements, thereby optimizing the circuit performance.

[0066] Based on the same inventive concept, an embodiment of the present application provides an electronic device, including: the above-mentioned memristor simulator equivalent circuit. The electronic device can be any of a variety of existing devices.

[0067] Finally, it should be noted that the above-listed embodiments exist only as one or more specific forms of expression of the technical solution of the present invention. Their purpose is to clearly explain the concept, principle and application of the present invention through specific examples, and it is by no means intended to limit the protection scope of the present invention to these specific embodiments. In fact, the real value of the present invention lies in the technical ideas and innovations it proposes, rather than its form of expression or means of implementation.

[0068] For ordinary technicians in the relevant technical field, after in-depth reading and understanding of the technical solution of the present invention, they are fully capable of making various forms of changes, modifications or equivalent substitutions to the specific implementation methods of the invention based on their own professional knowledge and skills. These changes may include but are not limited to: adjusting the value range of technical parameters, optimizing algorithm processes to improve efficiency, replacing some technical components to achieve better compatibility or reduce costs, etc. As long as these changed technical solutions still substantially maintain the technical features claimed for protection by the original invention, that is, they can still achieve the core functions and effects of the present invention, then these changes should be deemed to fall within the scope of protection of the pending claims of the present invention.

[0069] In addition, with the continuous progress and development of technology, new technical means and methods continue to emerge, which also provides broad space for further improvement and perfection of the present invention. Therefore, the protection scope of the present invention should also include those reasonably foreseeable improvements and extensions based on the existing technology. As long as these improvements and extensions do not deviate from the basic principles and core concepts of the present invention, they should be regarded as equivalents of the present invention and are also protected by patent rights.

Claims

1. A memristor simulator equivalent circuit, characterized in that: It includes a first operational amplifier U1, a second operational amplifier U2, a first multiplier M1, a second multiplier M2, a first resistor R1, a second resistor R2, a third resistor R3, an integrating capacitor C and a single-pole double-throw switch SW; The first input terminal u1 of the first operational amplifier 1x , the second input terminal n2 of the second multiplier M2 and the first terminal r2 of the second resistor R2 21 Both are electrically connected to the voltage input terminal a of the equivalent circuit, and the voltage output terminal b of the equivalent circuit is grounded; The first terminal r of the first resistor R1 11 are electrically connected to the second input terminal u1 of the first operational amplifier U1 1y and output u 1z , the second end r of the first resistor R1 12 Electrically connected to a first throw terminal s1 of a single-pole double-throw switch SW; The second throw terminal s2 of the single-pole double-throw switch SW is grounded via the third resistor R3, and the common terminal s0 of the single-pole double-throw switch SW is electrically connected to the second input terminal u1 of the second operational amplifier U2. 2y , the first input terminal u of the second operational amplifier U2 2x Grounding; The second input terminal u of the second operational amplifier U2 2y The common terminal s0 of the single-pole double-throw switch SW and the first terminal c1 of the integrating capacitor are electrically connected respectively, and the second terminal c2 of the integrating capacitor is electrically connected to the output terminal u1 of the second operational amplifier U2. 2z , a first input terminal m1 and a second input terminal n1 of a first multiplier M1; The output terminal v1 of the first multiplier M1 is electrically connected to the first input terminal m1 of the second multiplier M2, and the output terminal v2 of the second multiplier M2 is electrically connected to the second terminal r1 of the second resistor R2. 22 .

2. The memristor simulator equivalent circuit according to claim 1, characterized in that: The first operational amplifier U1 and the second operational amplifier U2 are both AD711.

3. The memristor simulator equivalent circuit according to claim 1, characterized in that: The models of the first multiplier M1 and the second multiplier M2 are four-quadrant analog multipliers AD633.

4. The memristor simulator equivalent circuit according to claim 1, characterized in that: The model of the single-pole double-throw switch SW is TMUX1134, and the switching mode of the switch is one of manual control and programmable algorithm control.

5. The memristor simulator equivalent circuit according to claim 1, characterized in that: The voltage U at the output terminal v1 of the first multiplier M1 v1 , the voltage U at the first input terminal m1 m1 and the voltage U at the second input terminal n1 n1 The following relationship exists: , where g1 is the scale factor of the first multiplier M1; the voltage U at the output end v2 of the second multiplier M2 v2 , the voltage U at the first input terminal m2 m2 and the voltage U at the second input terminal n2 n2 The following relationship exists: , where g2 is the scaling factor of the second multiplier M2.

6. A control method for a memristor simulator equivalent circuit, characterized in that: Based on the memristor simulator equivalent circuit of claim 1, wherein the first operational amplifier U1 and the first resistor R1 constitute a voltage follower, and the second operational amplifier U2 and the integrating capacitor C constitute an integrator; Connect the first throw terminal s1 of the single-pole double-throw switch SW to the common terminal s0, connect the voltage follower to the integrator, and adjust the input voltage to be greater than 0. At this time, the memristor simulator is in the on mode; Connect the first throw terminal s1 of the single-pole double-throw switch SW to the common terminal s0, connect the voltage follower to the integrator, and adjust the input voltage to 0. At this time, the memristor simulator is in reset mode; The second throw terminal s2 of the single-pole double-throw switch SW is connected to the common terminal s0, the voltage follower is disconnected from the integrator, and the second input terminal u 2y It is grounded via the third resistor R3. At this time, the memristor simulator is in power conservation mode.

7. The control method of a memristor simulator equivalent circuit according to claim 6, characterized in that: When the memristor simulator is in conduction mode, the conductance of the memristor simulator Specifically: Wherein, g1 is the scale factor of the first multiplier M1; g2 is the scale factor of the second multiplier M2; is the magnetic flux.

8. The control method of a memristor simulator equivalent circuit according to claim 6, characterized in that: When the memristor simulator is in reset mode, the integral capacitor C is charged from 0V to the integrator saturation, and the conductance Remain unchanged, the specific charging time is: in, is the current passing through the first resistor R1; is the maximum voltage of the integrating capacitor C.

9. The control method of a memristor simulator equivalent circuit according to claim 6, characterized in that: When the memristor simulator is in power conservation mode, the maximum voltage change rate of the integral capacitor C is Where Q is the charge of the integrating capacitor C, is the maximum input offset voltage, is the maximum value of input bias current, is the maximum leakage current.

10. An electronic device, characterized in that: include: The memristor simulator equivalent circuit as claimed in any one of claims 1 to 4.

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