High-precision digital-to-analog converter and electronic equipment

By introducing bridge resistors into digital-to-analog converters, the proportional relationship of the resistor array is optimized, and the problem of area increase in digital-to-analog converters in the prior art is solved, achieving both high precision and small area.

CN119483604AActive Publication Date: 2025-02-18SHENZHEN SINONE CHIP ELECTRONIC CO. LTD.
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Patent Information

Application Number
CN202510067402.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-16
Publication Date
2025-02-18
Estimated Expiration
2045-01-16

AI Technical Summary

Technical Problem

While improving accuracy, existing digital-to-analog converters are difficult to reduce the area of ​​integrated circuits, resulting in increased chip costs and reduced accuracy.

Method used

By introducing a bridge resistor, the first resistor array and the second resistor array are connected together, and the equivalent resistance ratio of the bridge resistor to the first resistor array is 1/(n-1), and each participates in the second resistor array. The resistance ratio of the cascade is (n-1)/n, n>2.

Benefits of technology

While improving the accuracy of the digital-to-analog converter, the area involved in the cascade resistor in the first resistor array is reduced, the error is reduced, the accuracy of the high-precision digital-to-analog converter is maintained, and the area of ​​its overall reduction is reduced.

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Abstract

The invention provides a high-precision digital-to-analog converter and electronic equipment, the high-precision digital-to-analog converter comprises a first resistor array, a second resistor array and a bridging resistor, the first resistor array is configured to convert low control bits of digital input data; the second resistor array is configured to convert a high control bit of the digital input data; the bridging resistor is connected between the first resistor array and the second resistor array, the proportional relation between the bridging resistor and the equivalent resistor of the first resistor array is 1 / (n-1), and the proportional relation between the bridging resistor and each resistor participating in cascade connection in the second resistor array is (n-1) / n, ngt; 2.
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Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a high-precision digital-to-analog converter and an electronic device. Background Art

[0002] At present, DAC (Digital to Analog Converter) is an indispensable bridge for communication between digital circuits and analog circuits, and has many applications in display technology and signal transmission. In order to improve the accuracy of DAC, the conventional method is to improve the accuracy of resistors and reduce the on-resistance of CMOS switches. Improving the accuracy of resistors can be achieved by increasing the area of ​​a single resistor or selecting a higher-precision process. Generally, increasing the area of ​​a single resistor is chosen; while reducing the on-resistance of a CMOS switch can be solved by increasing the size of the MOS switch, replacing it with a low-voltage tube, etc. If the application environment is fixed, it is not possible to replace the low-voltage tube, and the size of the MOS switch can only be increased. Whether increasing the area of ​​a single resistor or increasing the size of the MOS switch, the area of ​​the DAC will be significantly increased, and too large a resistor and MOS switch will increase the time constant, that is, affect the speed of the DAC. Too large an area will cause a gradient error inside the DAC, thereby reducing the accuracy of the DAC; in addition, too large an area will also increase the cost of the chip. Summary of the invention

[0003] The present application provides a high-precision digital-to-analog converter and an electronic device, which are used to reduce the area of ​​an integrated circuit while improving the accuracy of digital-to-analog conversion.

[0004] In a first aspect, an embodiment of the present application provides a high-precision digital-to-analog converter, the high-precision digital-to-analog converter comprising: a first resistor array configured to convert lower control bits of digital input data; a second resistor array configured to convert a high-order control bit of the digital input data; A bridge resistor, wherein the bridge resistor is connected between the first resistor array and the second resistor array, the ratio between the bridge resistor and the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio between the bridge resistor and each resistor involved in the cascade connection in the second resistor array is (n-1) / n, where n>2.

[0005] In some embodiments, the first resistor array includes: a termination resistor, a first control resistor and a ladder resistor; the first end of the termination resistor is connected to the first end of the first first control resistor, and the second end of the termination resistor is connected to the ground terminal; the first end of each first control resistor is also connected to the first end of the next first control resistor through a ladder resistor, the second end of each first control resistor is connected to the ground terminal or a preset reference voltage source through a switch, and the second end of the last first control resistor is connected to the first end of the bridge resistor; the termination resistor and the first control resistor are both in a proportional relationship with the bridge resistor of 2 / (n-1); the ladder resistor and the bridge resistor are in a proportional relationship of 1 / (n-1).

[0006] In some embodiments, the second resistor array includes: a second controlled resistor; the first end of each second controlled resistor is connected to the second end of the bridge resistor, the second end of the bridge resistor is the output end of the high-precision digital-to-analog converter, and the second end of the second controlled resistor is connected to the ground end or a preset reference voltage source through a switch; the ratio between the second controlled resistor and the bridge resistor is n / (n-1).

[0007] In some embodiments, the value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

[0008] In some embodiments, the lower control bit is used to control switches of the first resistor array.

[0009] In some embodiments, the high-order control bit is converted into a thermometer code, and the thermometer code is used to control switches of the second resistor array.

[0010] In a second aspect, an embodiment of the present application provides an electronic device, comprising a high-precision digital-to-analog converter as described in any one of the embodiments of the present application.

[0011] An embodiment of the present application provides a high-precision digital-to-analog converter, which includes: a first resistor array, a second resistor array and a bridge resistor, wherein the first resistor array is configured to convert low-order control bits of digital input data; the second resistor array is configured to convert high-order control bits of digital input data; the bridge resistor is connected between the first resistor array and the second resistor array, the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each resistor participating in the cascade in the second resistor array is (n-1) / n, where n>2. In the above-mentioned high-precision digital-to-analog converter, the voltage of the first resistor array is converted. Since the first resistor array is responsible for converting the low-order control bit and the second resistor array is responsible for converting the high-order control bit, as the accuracy of the high-precision digital-to-analog converter increases, the number of resistors participating in the cascade in the first resistor array will increase, while the number of resistors participating in the cascade in the second resistor array remains basically unchanged. By introducing bridge resistors, a small number of bridge resistors and resistors participating in the cascade in the second resistor array are increased, while a large number of resistors participating in the cascade in the first array are reduced. Therefore, the area of ​​the resistors participating in the cascade in the first resistor array will be reduced to the original 1 / (n-1), and the error of the first resistor array will be scaled to the original 1 / n, which can be basically ignored. The accuracy of the high-precision digital-to-analog converter is maintained, and the area of ​​the high-precision digital-to-analog converter is reduced overall. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0013] Figure 1 A circuit diagram of a ten-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application; Figure 2 A schematic diagram of a Thevenin equivalent circuit of a 10-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application; Figure 3 A circuit diagram of a first improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application; Figure 4 A schematic diagram of a primary Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application; Figure 5 A schematic diagram of a seventh-order Thevenin equivalent circuit of an improved ten-bit high-precision digital-to-analog converter provided in an embodiment of the present application; Figure 6A circuit diagram of a second improved ten-bit high-precision digital-to-analog converter provided in an embodiment of the present application. DETAILED DESCRIPTION

[0014] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0015] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0016] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0017] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0018] Currently, digital-to-analog converters are often designed in the form of resistor ladders.

[0019] See also Figure 1 , Figure 1 FIG. 1 is a circuit diagram of a ten-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application. Figure 1 As shown, the 10-bit high-precision digital-to-analog converter before the improvement is controlled by a 10-bit binary code, wherein the 10-bit binary code is divided into a lower seven-bit control code and an upper three-bit control code, and the upper three-bit control code is converted into a thermometer code and then input into the 10-bit high-precision digital-to-analog converter before the improvement. The 10-bit high-precision digital-to-analog converter before the improvement includes: a low-bit resistor array (b0-b6) and a high-bit resistor array (t0-t6), wherein the low-bit resistor array (b0-b6) is configured to convert the lower seven-bit control code, and the high-bit resistor array (t0-t6) is configured to convert the seven-bit thermometer code.

[0020] See also Figure 2 , Figure 21 is a schematic diagram of a Thevenin equivalent circuit of a 10-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application. Figure 2 As shown, the B area (b0b1b2...b6) of the 10-bit high-precision digital-to-analog converter before the improvement is subjected to the Thevenin equivalent, where B is the decimal form of b0b1b2...b6, the resistance of the B area is finally equivalent to 2R, N is the number of resistors corresponding to the low-bit resistor array (b0-b6) for the Thevenin equivalent, and the equivalent voltage of the B area is V eq0 , V eq0 The specific calculation formula is: ; The error generated by the B area (b0b1b2...b6) is smaller than that of the T area (t0t1t2...t6), but due to the ladder resistance (resistance value is R) and the terminal resistance (resistance value is 2R, and one end is fixed to the ground) of the B area, the area of ​​the B area is much larger than that of the T area. In other words, in order to improve the accuracy, a lot of area in the B area is wasted.

[0021] The embodiment of the present application provides a high-precision digital-to-analog converter, which includes: a first resistor array, a second resistor array, and a bridge resistor. The first resistor array is configured to convert the low-order control bit of the digital input data. The second resistor array is configured to convert the high-order control bit of the digital input data. The bridge resistor is connected between the first resistor array and the second resistor array, and the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each resistor participating in the cascade in the second resistor array is (n-1) / n, n>2.

[0022] For the sake of convenience and improvement of the ten-bit high-precision digital-to-analog converter, the embodiment of the present application uses the improved ten-bit high-precision digital-to-analog converter as a specific embodiment of the high-precision digital-to-analog converter provided in the above-mentioned embodiment of the present application. It should be noted that this embodiment is only used for explanation and is not intended to limit the present application.

[0023] Exemplarily, in order to reduce the area under the same integral nonlinearity (INL) and differential nonlinearity (DNL), taking a 10-bit high-precision digital-to-analog converter as an example, the following adjustment is proposed.

[0024] See also Figure 3 , Figure 3 1 is a circuit diagram of a first improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application. Figure 3 As shown, the resistance of the smallest resistor is R, and in area B, the termination resistor R D The resistance value of the ladder resistor R0 is 2R, the resistance value of the first control resistor (R b0 , R b1 , Rb2 , R b3 , R b4 , R b5 and R b6 ) are all 2*R. The second control resistor (R t0 , R t1 , R t2 , R t3 , R t4 , R t5 and R t6 ) has a resistance value of n*R, and the bridge resistor R connected between the T area and the B area QJ The resistance is (n-1)*R.

[0025] like Figure 3 The components in the B area shown are all linear devices, so the superposition theorem can be used to simplify the analysis. The equivalent model of the B area can be obtained by performing the Thevenin equivalent and superposition of each level in the B area, where each level in each B area is the first control resistor and the corresponding ladder resistor R0.

[0026] First, the first control resistor R of the lowest bit b0 b0 Performing the Thevenin equivalent, assume that the first control resistor (R b1 , R b2 , R b3 , R b4 , R b5 and R b6 ) are grounded.

[0027] See also Figure 4 , Figure 4 1 is a schematic diagram of a primary Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application. Figure 4 As shown in the figure, after the improved 10-bit high-precision digital-to-analog converter performs a Thevenin equivalent, the open-circuit voltage V open and short-circuit current I short The specific calculation formula is: ; ; The specific calculation formulas for the first equivalent voltage and the first equivalent resistance are obtained as follows: ; ; At this time, the other first control resistor (R b1 , R b2 , R b3 , R b4 , R b5 and Rb6) As in the previous case, we can therefore proceed with the Thevenin equivalence.

[0028] See also Figure 5 , Figure 5 1 is a schematic diagram of a seventh-order Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application. Figure 5 As shown, the specific calculation formulas for the seventh equivalent voltage and the seventh equivalent resistance at the output end of area B are: ; ; Among them, since the resistance ratio of the equivalent resistance of area B and the bridge resistance is 1:(n-1), the error of area B will be scaled to 1 / n of the original value and can be basically ignored. QJ Due to the scaling effect, the resistance value of the resistor in area B no longer needs to be modified according to the resistance value of the resistor in area T, thereby eliminating unnecessary resistance.

[0029] like Figure 1 If the accuracy of the 10-bit high-precision digital-to-analog converter before improvement is to be increased, the resistance of the B and T regions needs to be increased simultaneously. Figure 3 As shown, the first improved 10-bit high-precision digital-to-analog converter provided in the embodiment of the present application achieves increasing the resistance of the T region without adjusting the resistance of the B region, thereby improving the accuracy while avoiding a large amount of unnecessary area.

[0030] An embodiment of the present application provides a high-precision digital-to-analog converter, which includes: a first resistor array, a second resistor array and a bridge resistor, wherein the first resistor array is configured to convert low-order control bits of digital input data; the second resistor array is configured to convert high-order control bits of digital input data; the bridge resistor is connected between the first resistor array and the second resistor array, the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each resistor participating in the cascade in the second resistor array is (n-1) / n, where n>2. In the above-mentioned high-precision digital-to-analog converter, the voltage of the first resistor array is converted. Since the first resistor array is responsible for converting the low-order control bit and the second resistor array is responsible for converting the high-order control bit, as the accuracy of the high-precision digital-to-analog converter increases, the number of resistors participating in the cascade in the first resistor array will increase, while the number of resistors participating in the cascade in the second resistor array remains basically unchanged. By introducing bridge resistors, a small number of bridge resistors and resistors participating in the cascade in the second resistor array are increased, while a large number of resistors participating in the cascade in the first array are reduced. Therefore, the area of ​​the resistors participating in the cascade in the first resistor array will be reduced to the original 1 / (n-1), and the error of the first resistor array will be scaled to the original 1 / n, which can be basically ignored. The accuracy of the high-precision digital-to-analog converter is maintained, and the area of ​​the high-precision digital-to-analog converter is reduced overall.

[0031] In order to more clearly introduce the technical solution of the present application, the technical solution of the present application will be introduced through specific embodiments below. It should be noted that the specific embodiments are used to expand the technical solution of the present application, but are not intended to limit the present application.

[0032] In some embodiments, see Figure 6 This is a circuit diagram of a second improved ten-bit high-precision digital-to-analog converter provided in an embodiment of the present application.

[0033] like Figure 6 As shown, the first resistor array (area B) includes: a terminating resistor R D , the first control resistor (R b0 , R b1 , R b2 , R b3 , R b4 , R b5 and R b6 ) and ladder resistance R0. Termination resistance R D The first end of the first control resistor R b0 The first end is connected to the terminating resistor R D The second end of each first control resistor (R b0 , R b1 , R b2, R b3 , R b4 , R b5 and R b6 ) is also connected to the next first control resistor (R b0 , R b1 , R b2 , R b3 , R b4 , R b5 and R b6 ) is connected to the first end of each first control resistor (R b0 , R b1 , R b2 , R b3 , R b4 , R b5 and R b6 ) is connected to the ground terminal GND or the preset reference voltage source V ref Connect the last first control resistor R b6 The second end of the bridge resistor R QJ The first end of the terminal is connected to the D 、The first control resistor (R b0 , R b1 , R b2 , R b3 , R b4 , R b5 and R b6 ) and the bridge resistor R QJ The proportional relationship is 2 / (n-1). The proportional relationship between the ladder resistance and the bridge resistance is 1 / (n-1).

[0034] Therefore, the resistance value of any resistor in the B region is proportional to that before and after the improvement by 1 / (0.5n), thereby reducing the area of ​​the B region.

[0035] In some embodiments, the second resistor array (T region) includes: a second control resistor (R t0 , R t1 , R t2 , R t3 , R t4 , R t5 and R t6 Each second control resistor (R t0 , R t1 , R t2 , R t3 , R t4 , R t5 and R t6 ) are connected to the bridge resistor R QJ The second end is connected to the bridge resistor R QJThe second end is the output end of the high-precision digital-to-analog converter, and the second control resistor (R t0 , R t1 , R t2 , R t3 , R t4 , R t5 and R t6 ) is connected to the ground terminal GND or the preset reference voltage source V ref Connect the second control resistor (R t0 , R t1 , R t2 , R t3 , R t4 , R t5 and R t6 ) and the bridge resistor R QJ The proportional relationship is n / (n-1).

[0036] Therefore, the final equivalent resistance of area B and the bridge resistance R QJ The sum of the resistance values ​​of is equal to the resistance value of any second control resistor.

[0037] In a conventional cascade resistor ladder, the resistors in the B region consist of R and 2R, and the resistors in the T region consist of 2R. In order to improve accuracy, the conventional approach is to increase R while maintaining the original proportional relationship. This approach increases the area by a considerable amount, but the improvement in accuracy is very small. Figure 6 The second improved 10-bit high-precision digital-to-analog converter shown achieves the goal of reducing the resistance of the B region without adjusting the resistance of the T region, thereby improving the accuracy while avoiding a large amount of unnecessary area.

[0038] In some embodiments, the value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

[0039] For example, since the maximum values ​​of INL and DNL are taken in most application environments, in order to control the area, the T region is usually only responsible for converting the upper 3 bits of the binary code. For a DAC with higher resolution, there will be more low-order control bits, that is, the first control resistor R bn The number of corresponding ladder resistors R0 will be greater. Through the high-precision digital-to-analog converter provided in the embodiment of the present application, the area of ​​each resistor in the B region is reduced, and the resistors in the T region and the bridge resistor R QJ The area of ​​zone B remains basically unchanged, which can effectively deal with the problem of exponential growth in area caused by the improvement of resolution in zone B.

[0040] In one embodiment, a schematic diagram of the T region corresponding to the 3-bit high-order control bit is as follows: Figure 6 As shown, when the value of the high-order control bit changes, the second control resistor in the T region also needs to increase or decrease accordingly.

[0041] In some embodiments, the lower control bit is used to control switches of the first resistor array.

[0042] In some embodiments, the high-order control bit is converted into a thermometer code, and the thermometer code is used to control the switches of the second resistor array.

[0043] Exemplarily, the high-precision digital-to-analog converter provided in the present application also includes a switch control unit, which is used to control the switch of the first resistor array according to the low-order control bit, or to convert the high-order control bit into a thermometer code and control the switch of the second resistor array according to the thermometer code.

[0044] An embodiment of the present application further provides an electronic device, comprising a high-precision digital-to-analog converter as described in any one of the embodiments of the present application.

[0045] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A high-precision digital-to-analog converter, characterized in that: The high-precision digital-to-analog converter comprises: a first resistor array configured to convert lower control bits of digital input data; a second resistor array configured to convert a high-order control bit of the digital input data; A bridge resistor, wherein the bridge resistor is connected between the first resistor array and the second resistor array, the ratio between the bridge resistor and the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio between the bridge resistor and each resistor involved in the cascade connection in the second resistor array is (n-1) / n, where n>2.

2. The high-precision digital-to-analog converter according to claim 1, characterized in that: The first resistor array includes: a termination resistor, a first control resistor and a ladder resistor; the first end of the termination resistor is connected to the first end of the first first control resistor, and the second end of the termination resistor is connected to the ground terminal; the first end of each first control resistor is also connected to the first end of the next first control resistor through a ladder resistor, the second end of each first control resistor is connected to the ground terminal or a preset reference voltage source through a switch, and the second end of the last first control resistor is connected to the first end of the bridge resistor; the termination resistor and the first control resistor are both in a proportional relationship with the bridge resistor of 2 / (n-1); the ladder resistor and the bridge resistor are in a proportional relationship of 1 / (n-1).

3. The high-precision digital-to-analog converter according to claim 2, characterized in that: The second resistor array includes: second controlled resistors; the first end of each of the second controlled resistors is connected to the second end of the bridge resistor, the second end of the bridge resistor is the output end of the high-precision digital-to-analog converter, and the second end of the second controlled resistor is connected to the ground end or a preset reference voltage source through a switch; the ratio between the second controlled resistor and the bridge resistor is n / (n-1).

4. The high-precision digital-to-analog converter according to claim 1, characterized in that: The value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

5. The high-precision digital-to-analog converter according to claim 1, characterized in that: The low-order control bit is used to control the switch of the first resistor array.

6. The high-precision digital-to-analog converter according to claim 5, characterized in that: The high-order control bit is converted into a thermometer code, and the thermometer code is used to control switches of the second resistor array.

7. An electronic device, characterized in that: The invention comprises a high-precision digital-to-analog converter as claimed in any one of claims 1 to 6.

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