Optical signal processing circuit and apparatus, optical signal processing method, and storage medium

Abstract

The invention relates to an optical signal processing circuit and device, an optical signal processing method and a storage medium. The optical signal processing circuit includes: a signal input node receiving an initial voltage signal converted from an optical signal; the first transistor and the second transistor are connected in series, the first transistor is switched on when an initial voltage signal is larger than a first threshold voltage and switched off when the initial voltage signal is not larger than the first threshold voltage, and the second transistor is switched on when the initial voltage signal is smaller than a second threshold voltage and switched off when the initial voltage signal is larger than the second threshold voltage; the third transistor and the fourth transistor are connected in series, the third transistor is switched on when the initial voltage signal is larger than the second threshold voltage and switched off when the initial voltage signal is smaller than the third threshold voltage, and the fourth transistor is switched on when the initial voltage signal is smaller than the third threshold voltage and switched off when the initial voltage signal is larger; the first operational amplifier amplifies the initial voltage signal output by the second transistor by a preset multiple and then supplies the amplified initial voltage signal to the analog-to-digital converter; and the second operational amplifier amplifies the initial voltage signal output by the fourth transistor by a small preset multiple and then supplies the amplified initial voltage signal to the analog-to-digital converter.

Description

Technical Field

[0001] The present application relates to an optical signal processing circuit and device, an optical signal processing method and a storage medium. Background Art

[0002] Photoelectric sensors are devices that convert light signals into electrical signals. They can be used for FLICK testing and brightness testing of display screens, etc.

[0003] In the test application of display screens, photoelectric sensors mostly use photodiodes to collect light signals emitted by the display screen under test, convert the collected light signals into amplified analog voltage signals and then transmit them to the analog-to-digital converter ADC. The analog-to-digital converter ADC then converts the amplified analog voltage signals into digital voltage signals, and judges the optical display performance of the display screen based on the analysis of the digital voltage signals.

[0004] In the related art, in the process of converting the light signal into an amplified analog voltage signal, the corresponding amplification factor is fixed. Therefore, as the light intensity changes, the converted analog voltage signal also changes proportionally. If the light intensity is too large, the converted analog voltage signal may exceed the readable range or the optimal reading range of the analog-to-digital converter ADC, resulting in insufficient reading accuracy and large errors, or even inability to read. Summary of the invention

[0005] In view of this, the present application proposes an optical signal processing circuit and device, an optical signal processing method and a storage medium.

[0006] In a first aspect, the present application provides an optical signal processing circuit, comprising:

[0007] A signal input node, used to receive an initial voltage signal converted from the optical signal, wherein the initial voltage signal is an analog signal;

[0008] a first transistor connected to the signal input node and a second transistor connected in series with the first transistor, wherein the first transistor is configured to be turned on when the initial voltage signal is greater than a first threshold voltage and turned off when the initial voltage signal is not greater than the first threshold voltage; the second transistor is configured to be turned on when the initial voltage signal is less than a second threshold voltage and turned off when the initial voltage signal is greater than the second threshold voltage, and the second threshold voltage is greater than the first threshold voltage;

[0009] a third transistor connected to the signal input node and a fourth transistor connected in series with the third transistor, wherein the third transistor is configured to be turned on when the initial voltage signal is greater than the second threshold voltage and turned off when the initial voltage signal is less than the second threshold voltage; the fourth transistor is configured to be turned on when the initial voltage signal is less than a third threshold voltage and turned off when the initial voltage signal is greater than the third threshold voltage, and the third threshold voltage is greater than the second threshold voltage;

[0010] an analog-to-digital converter configured to convert an analog signal supplied to the analog-to-digital converter into a digital signal;

[0011] a first operational amplifier, configured to amplify the initial voltage signal output by the second transistor by a first preset multiple and then supply the amplified voltage signal to the analog-to-digital converter;

[0012] The second operational amplifier is configured to amplify the initial voltage signal output by the fourth transistor by a second preset multiple and then supply the amplified voltage signal to the analog-to-digital converter, wherein the second preset multiple is smaller than the first preset multiple.

[0013] In some possible implementations, the following further includes:

[0014] a fifth transistor connected to the signal input node and a sixth transistor connected in series with the fifth transistor, wherein the fifth transistor is configured to be turned on when the initial voltage signal is greater than the third threshold voltage and turned off when the initial voltage signal is less than the third threshold voltage; the sixth transistor is configured to be turned on when the initial voltage signal is less than a fourth threshold voltage and turned off when the initial voltage signal is greater than the fourth threshold voltage, and the fourth threshold voltage is greater than the third threshold voltage;

[0015] a seventh transistor connected to the signal input node, the seventh transistor being configured to be turned on when the initial voltage signal is greater than the fourth threshold voltage, and turned off when the initial voltage signal is less than the fourth threshold voltage, wherein the first threshold voltage, the second threshold voltage, the third threshold voltage and the fourth threshold voltage increase in sequence;

[0016] a third operational amplifier, configured to amplify the initial voltage signal output by the sixth transistor by a third preset multiple and then supply the amplified voltage signal to the analog-to-digital converter;

[0017] a fourth operational amplifier, configured to amplify the initial voltage signal output by the seventh transistor by a fourth preset multiple and then supply the amplified voltage signal to the analog-to-digital converter;

[0018] Among them, the first preset multiple, the second preset multiple, the third preset multiple and the fourth preset multiple decrease in sequence.

[0019] In some possible implementations, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are N-type transistors, and the circuit further includes:

[0020] A first comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a first reference voltage node providing the first threshold voltage; and an output terminal connected to the gate of the first transistor;

[0021] A second comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a second reference voltage node providing the second threshold voltage; and an output terminal connected to the gate of the third transistor;

[0022] A third comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a third reference voltage node providing the third threshold voltage; and an output terminal connected to the gate of the fifth transistor;

[0023] The fourth comparator has: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a fourth reference voltage node providing the fourth threshold voltage; and an output terminal connected to the gate of the seventh transistor.

[0024] In some possible implementations, the second transistor, the fourth transistor and the sixth transistor are P-type transistors, the gate of the second transistor is connected to a first circuit node between the third transistor and the fourth transistor, the gate of the fourth transistor is connected to a second circuit node between the fifth transistor and the sixth transistor, and the gate of the sixth transistor is connected to the output terminal of the seventh transistor.

[0025] In some possible implementations, the first threshold voltage is zero volt.

[0026] In a second aspect, an optical signal processing device is provided, comprising:

[0027] The circuit as described in the first aspect;

[0028] The optical signal conversion unit includes a photosensitive device and is configured to convert the optical signal into the initial voltage signal by using the photosensitive device and supply the initial voltage signal to the signal input node.

[0029] In some possible implementations, the following further includes:

[0030] The image processor is connected to the output terminal of the analog-to-digital converter and is configured to generate a corresponding digital image signal based on the size of the digital signal output by the analog-to-digital converter.

[0031] In a third aspect, a method for processing an optical signal is proposed, comprising:

[0032] Acquiring an initial voltage signal, wherein the initial voltage signal is an analog signal converted from an optical signal;

[0033] If the initial voltage signal is greater than the first threshold voltage and less than the second threshold voltage, amplifying the initial voltage signal by a first preset multiple to obtain a first analog voltage signal, and inputting the first analog voltage signal into an analog-to-digital converter;

[0034] If the initial voltage signal is greater than the second threshold voltage and less than the third threshold voltage, amplifying the initial voltage signal by a second preset multiple to obtain a second analog voltage signal, and inputting the second analog voltage signal into the analog-to-digital converter, wherein the second preset multiple is less than the first preset multiple;

[0035] If the initial voltage signal is greater than the third threshold voltage and less than the fourth threshold voltage, amplifying the initial voltage signal by a third preset multiple to obtain a third analog voltage signal, and inputting the third analog voltage signal into the analog-to-digital converter, wherein the third preset multiple is less than the second preset multiple;

[0036] If the initial voltage signal is greater than the fourth threshold voltage, amplifying the initial voltage signal by a fourth preset multiple to obtain a fourth analog voltage signal, and inputting the fourth analog voltage signal into the analog-to-digital converter, wherein the fourth preset multiple is less than the third preset multiple;

[0037] The analog-to-digital converter is used to output a digital output signal representing the intensity of the optical signal.

[0038] In some possible implementations, the method is executed by the circuit described in the first aspect or the device described in the second aspect.

[0039] In a fourth aspect, a computer-readable storage medium is proposed, which stores program instructions. When the program instructions are executed by a computer, the method described in the third aspect is implemented.

[0040] According to the optical signal processing circuit proposed in the present application, the corresponding magnification can be selected according to the size of the initial voltage signal converted from the optical signal to amplify it, and then passed to the analog-to-digital converter, so that the size of the analog signal received by the analog-to-digital converter is always within an appropriate range, thereby helping to improve the measurement accuracy of the optical signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present application, rather than limiting the present application.

[0042] Figure 1 It is a circuit block diagram of an optical signal processing device provided in an embodiment of the present application.

[0043] Figure 2 It is a flowchart of the optical signal processing method provided in the embodiment of the present application.

[0044] Description of reference numerals:

[0045] 1000-optical signal processing equipment;

[0046] 100-optical signal conversion unit;

[0047] 200-optical signal processing circuit;

[0048] 300-Image processor;

[0049] 400-storage;

[0050] 10-Signal input node;

[0051] 20-Signal output node;

[0052] T1, T2, T3, T4, T5, T6, T7 - ​​transistors;

[0053] 11, 12, 13, 14 - comparators;

[0054] 21, 22, 23, 24 - operational amplifiers;

[0055] n1, n2 - circuit nodes;

[0056] ADC – analog-to-digital converter;

[0057] Vin-initial voltage signal;

[0058] Vout-digital output signal;

[0059] Vref1-first threshold voltage, Vref2-second threshold voltage, Vref3-third threshold voltage, Vref4-fourth threshold voltage. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme of the embodiment of the present application will be clearly and completely described below in conjunction with the drawings of the embodiment of the present application. Obviously, the described embodiment is a part of the embodiment of the present application, rather than all the embodiments. Based on the described embodiment of the present application, all other embodiments obtained by ordinary technicians in this field without creative work belong to the scope of protection of this application. It can be understood that, in the absence of conflict, some technical means of the various embodiments described herein can be replaced or combined with each other.

[0061] In the description of the specification and claims of this application, if there are terms such as "first", "second", etc., they are only used to distinguish the objects described and do not have any order or technical meaning. Therefore, the objects defined as "first", "second", etc. may explicitly or implicitly include one or more of the objects. In addition, "one" or "an" and similar words do not indicate a quantitative limitation, but indicate the existence of at least one.

[0062] Figure 1 A circuit block diagram of an optical signal processing device 1000 (hereinafter, sometimes referred to as the device 1000) provided in an embodiment of the present application is shown. The device 1000 includes an optical signal conversion unit 100 and an optical signal processing circuit 200, wherein the optical signal conversion unit 100 is used to convert an optical signal into an initial voltage signal Vin which is an analog signal, and the optical signal processing circuit 200 can amplify the initial voltage signal Vin at a corresponding level (multiplier) according to the size of the initial voltage signal Vin, and then convert the amplified analog signal into a digital signal and output it from its signal output node 20.

[0063] The optical signal conversion unit 100 may include a photosensitive device for receiving light irradiation and a coupling circuit electrically coupled to the photosensitive device. When light of different intensities irradiates the photosensitive device, the photosensitive device exhibits different electrical properties (e.g., different resistance values). The coupling circuit generates an initial voltage signal Vin related to the current light intensity by measuring the electrical performance parameters of the photosensitive device in the current state. The initial voltage signal Vin is an analog voltage signal and is positively correlated with the light intensity, that is, the greater the light intensity, the greater the initial voltage signal Vin, and the smaller the light intensity, the smaller the initial voltage signal Vin. However, the value of the initial voltage signal Vin is usually very small, so if it is directly input into an analog-to-digital converter ADC for analog-to-digital conversion, it is difficult to obtain an ideal measurement accuracy for the optical signal.

[0064] The optical signal processing circuit 200 includes a signal input node 10 , transistors T1 , T2 , T3 , T4 , T5 , T6 , T7 , comparators 11 , 12 , 13 , 14 , operational amplifiers 21 , 22 , 23 , 24 , an analog-to-digital converter ADC and a signal output node 20 .

[0065] The signal input node 1010 is connected to the output end of the optical signal conversion unit 100 and is used to receive the initial voltage signal Vin converted from the optical signal.

[0066] Transistors T1, T3, T5, and T7 are N-type transistors, while transistors T2, T4, and T6 are P-type transistors. Transistors T1, T3, T5, and T7 are respectively connected to the signal input node 10, thereby receiving the initial voltage signal Vin from the signal input node 10. Transistor T2 is connected in series with transistor T1, transistor T4 is connected in series with transistor T3, and transistor T6 is connected in series with transistor T5.

[0067] The non-inverting input terminal of the comparator 11 is connected to the signal input node 1010, the inverting input terminal is connected to the first reference voltage node providing the threshold voltage Vref1, and the output terminal is connected to the gate of the transistor T1. In the present embodiment, the first reference voltage node is a ground voltage node, and the threshold voltage Vref1 provided by it is a ground potential, that is, zero volts. Therefore, for the comparator 11, when the voltage of the non-inverting input terminal is greater than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is greater than the threshold voltage Vref1, its output terminal generates a high-level signal supplied to the gate of the transistor T1, the transistor T1 is turned on, and the initial voltage signal Vin is transmitted to the transistor T2 via the transistor T1; and when the voltage of the non-inverting input terminal is not greater than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is not greater than the threshold voltage Vref1, the output terminal generates a low-level signal supplied to the gate of the transistor T1, the transistor T1 is turned off, and the initial voltage signal Vin cannot be transmitted to the transistor T2 and the operational amplifier 21.

[0068] The non-inverting input terminal of the comparator 12 is connected to the signal input node 1010, the inverting input terminal is connected to the second reference voltage node providing the threshold voltage Vref2, and the output terminal is connected to the gate of the transistor T3, and the threshold voltage Vref2 is greater than the threshold voltage Vref1. Therefore, for the comparator 12, when the voltage of the non-inverting input terminal is greater than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is greater than the threshold voltage Vref2, the output terminal generates a high-level signal supplied to the gate of the transistor T3, the transistor T3 is turned on, and the initial voltage signal Vin is transmitted to the transistor T4 via the transistor T3; and when the voltage of the non-inverting input terminal is less than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is less than the threshold voltage Vref2, for example, when the initial voltage is Vref1, the output terminal generates a low-level signal supplied to the gate of the transistor T3, the transistor T3 is turned off, and the initial voltage signal Vin cannot be transmitted to the transistor T4 and the operational amplifier 22.

[0069] The non-inverting input terminal of the comparator 13 is connected to the signal input node 1010, the inverting input terminal is connected to the third reference voltage node providing the threshold voltage Vref3, and the output terminal is connected to the gate of the transistor T5, and the threshold voltage Vref3 is greater than the threshold voltage Vref2. Therefore, for the comparator 13, when the voltage of the non-inverting input terminal is greater than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is greater than the threshold voltage Vref3, its output terminal generates a high-level signal supplied to the gate of the transistor T5, the transistor T5 is turned on, and the initial voltage signal Vin is transmitted to the transistor T6 via the transistor T5; and when the voltage of the non-inverting input terminal is less than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is less than the threshold voltage Vref3, for example, when the initial voltage is Vref1 or Vref2, the output terminal generates a low-level signal supplied to the gate of the transistor T5, the transistor T5 is turned off, and the initial voltage signal Vin cannot be transmitted to the transistor T6 and the operational amplifier 23.

[0070] The non-inverting input terminal of the comparator 14 is connected to the signal input node 1010, the inverting input terminal is connected to the fourth reference voltage node providing the threshold voltage Vref4, and the output terminal is connected to the gate of the transistor T7, and the threshold voltage Vref4 is greater than the threshold voltage Vref3. Therefore, for the comparator 14, when the voltage of the non-inverting input terminal is greater than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is greater than the threshold voltage Vref4, the output terminal generates a high-level signal supplied to the gate of the transistor T7, and the transistor T7 is turned on, and then the transistor T7 is transmitted to the input terminal of the operational amplifier 24; and when the voltage of the non-inverting input terminal is less than the voltage of the inverting input terminal, that is, when the initial voltage signal Vin is less than the threshold voltage Vref3, for example, when the initial voltage is Vref1 or Vref2, the output terminal generates a low-level signal supplied to the gate of the transistor T5, and the transistor T5 is turned off, and the initial voltage signal Vin cannot be transmitted to the transistor T6 and the operational amplifier 24.

[0071] The analog-to-digital converter ADC is configured to convert an analog signal supplied to an input terminal of the analog-to-digital converter ADC into a digital signal.

[0072] One input terminal of the operational amplifier 21 is connected to the transistor T2 , and is configured to amplify the initial voltage signal Vin output by the transistor T2 by a first preset multiple and then supply the amplified signal to the input terminal of the analog-to-digital converter ADC.

[0073] One input terminal of the operational amplifier 22 is connected to the transistor T4 , and is configured to amplify the initial voltage signal Vin output by the transistor T4 by a second preset multiple and then supply the amplified voltage signal to the input terminal of the analog-to-digital converter ADC.

[0074] One input terminal of the operational amplifier 23 is connected to the transistor T6 , and is configured to amplify the initial voltage signal Vin output by the transistor T6 by a third preset multiple and then supply the amplified signal to the input terminal of the analog-to-digital converter ADC.

[0075] One input terminal of the operational amplifier 24 is connected to the transistor T7, and is configured to amplify the initial voltage signal Vin output by the transistor T7 by a fourth preset multiple and then supply it to the input terminal of the analog-to-digital converter ADC, wherein the first preset multiple, the second preset multiple, the third preset multiple and the fourth preset multiple decrease in sequence.

[0076] According to the above description, when the initial voltage signal Vin is greater than the threshold voltage Vref4, the transistors T1, T3, T5, and T7 are all in the on state, so the transistors T2, T4, and T6 will all receive the initial voltage signal Vin. If in this case the transistors T2, T4, and T6 are all in the on state, then the operational amplifiers 21, 22, 23, and 24 will respectively amplify the initial voltage signal Vin at different magnifications, which makes it difficult to determine the input voltage of the analog-to-digital converter ADC, thereby affecting the accurate measurement of the current optical signal size.

[0077] In view of this, please refer to Figure 1, the present embodiment also designs the optical signal circuit in the following way: the gate of transistor T2 is connected to the circuit node n1 between transistor T3 and transistor T4, the gate of transistor T4 is connected to the circuit node n2 between transistor T5 and transistor T6, and the gate of transistor T6 is connected to the output end of transistor T7, i.e., the drain of transistor T7. Through such a design, when the initial voltage signal Vin is greater than the threshold voltage Vref2 but less than the threshold voltage Vref3, the initial voltage signal Vin is also applied to the gate of the P-type transistor T2, so that transistor T2 works in the disconnected state, so that the initial voltage signal Vin cannot be transmitted to the input end of the operational amplifier 21 through the transistor T2, but can only be transmitted to the input end of the operational amplifier 22 through the turned-on transistor T4. The initial voltage signal Vin is amplified by the operational amplifier 22 by a second preset multiple and then supplied to the input end of the analog-to-digital converter ADC, and then converted by the analog-to-digital converter ADC into a digital output signal Vout of corresponding size, and the digital output signal Vout is output through the signal output node 20, and the signal output node 20 can be the output terminal of the analog-to-digital converter ADC. Correspondingly, when the initial voltage signal Vin is greater than the threshold voltage Vref3 but less than the threshold voltage Vref4, the initial voltage signal Vin will be applied to the gates of the P-type transistors T2 and T4, so that the transistors T2 and T4 both work in the off state. In this way, the initial voltage signal Vin can neither be transmitted to the input end of the operational amplifier 21 via the transistor T2, nor be transmitted to the input end of the operational amplifier 22 via the transistor T4, but can only be transmitted to the input end of the operational amplifier 23 via the turned-on transistor T6. The initial voltage signal Vin is amplified by the operational amplifier 23 by a third preset multiple and then supplied to the input end of the analog-to-digital converter ADC, and then converted by the analog-to-digital converter ADC into a digital output signal Vout of corresponding size, and the digital output signal Vout is output via the signal output node 20. In addition, when the initial voltage signal Vin is greater than the threshold voltage Vref4, the initial voltage signal Vin will be applied to the gates of the P-type transistors T2, T4, and T6, so that the transistors T2, T4, and T6 all work in the disconnected state. In this way, the initial voltage signal Vin can neither be transmitted to the input end of the operational amplifier 21 via the transistor T2, nor be transmitted to the input end of the operational amplifier 22 via the transistor T4, nor be transmitted to the input end of the operational amplifier 23 via the transistor T6, but can only be transmitted to the input end of the operational amplifier 24 via the turned-on transistor T7. The initial voltage signal Vin is amplified by the operational amplifier 24 by a fourth preset multiple and then supplied to the input end of the analog-to-digital converter ADC, and then converted by the analog-to-digital converter ADC into a digital output signal Vout of corresponding size, and the digital output signal Vout is output via the signal output node 20.

[0078] It can be understood that by setting the first preset multiple, the second preset multiple, the third preset multiple and the fourth preset multiple to decrease in sequence, when the initial voltage signal Vin is in different voltage intervals defined by the aforementioned four threshold voltages Vref1, Vref2, Vref3 and Vref4, the size of the analog voltage signal received by the analog-to-digital converter ADC can be within an appropriate range, and the digital output signal Vout output by the analog-to-digital converter ADC can be maintained within an appropriate range, thereby preventing the voltage from exceeding the measuring range of the analog-to-digital converter ADC.

[0079] Please review Figure 1 The device 1000 further includes an image processor 300 connected to the signal output node 20, that is, connected to the output end of the analog-to-digital converter ADC, and a storage 400 connected to the image processor 300. The image processor 300 is configured to generate a corresponding digital image signal based on the size of the digital output signal Vout output by the analog-to-digital converter ADC. The storage 400 is used to store the aforementioned digital image signal. The digital image signal is a digital signal in an image format, which can be read and displayed by a display device such as a liquid crystal display.

[0080] Based on the above description, the present application embodiment also provides an optical signal processing method, which can be Figure 1 The optical signal processing device 1000 shown in the figure is particularly implemented by the optical signal processing circuit 200 in the device, see Figure 2 , the method comprising:

[0081] S201, obtaining an initial voltage signal Vin, where the initial voltage signal Vin is an analog signal converted from an optical signal.

[0082] As described above, the optical signal conversion unit 100 can be used to convert the optical signal into the initial voltage signal Vin.

[0083] S202, if the initial voltage signal Vin is greater than the threshold voltage Vref1 and less than the second threshold voltage Vref2, amplify the initial voltage signal Vin by a first preset multiple to obtain a first analog voltage signal, and input the first analog voltage signal into an analog-to-digital converter ADC;

[0084] S203, if the initial voltage signal Vin is greater than the threshold voltage Vref2 and less than the threshold voltage Vref3, amplify the initial voltage signal Vin by a second preset multiple to obtain a second analog voltage signal, and input the second analog voltage signal into an analog-to-digital converter ADC, wherein the second preset multiple is less than the first preset multiple;

[0085] S204, if the initial voltage signal Vin is greater than the threshold voltage Vref3 and less than the threshold voltage Vref4, amplify the initial voltage signal Vin by a third preset multiple to obtain a third analog voltage signal, and input the third analog voltage signal into an analog-to-digital converter ADC, wherein the third preset multiple is less than the second preset multiple;

[0086] S205, if the initial voltage signal Vin is greater than the threshold voltage Vref4, amplify the initial voltage signal Vin by a fourth preset multiple to obtain a fourth analog voltage signal, and input the fourth analog voltage signal into the analog-to-digital converter ADC, wherein the fourth preset multiple is smaller than the third preset multiple.

[0087] S206 , using the analog-to-digital converter ADC to output a digital output signal Vout representing the intensity of the optical signal.

[0088] In some embodiments, the threshold voltage Vref1, the threshold voltage Vref2, the threshold voltage Vref3 and the threshold voltage Vref4 are 0V, 1V, 1.8V and 3.3V respectively, and the first preset multiple, the first preset multiple, the first preset multiple and the first preset multiple are 100 times, 75 times, 50 times and 25 times respectively.

[0089] In addition, an embodiment of the present application further provides a computer-readable storage medium, which stores program instructions. When the program instructions are executed by a computer, the above-mentioned optical signal processing method can be implemented.

[0090] In addition, the embodiment of the present application also provides a display screen detection device, which is used to detect the optical display performance of a display screen such as a liquid crystal display screen, and includes the aforementioned optical signal conversion unit 100 and optical signal processing circuit 200. Among them, the optical signal conversion unit 100 of the display screen detection device can be an optical probe, which generates an initial voltage signal Vin supplied to the signal input node 10 of the optical signal processing circuit 200 by detecting the light emitted by the display screen under a given driving voltage. The optical signal processing circuit 200 selects one of the operational amplifiers 21, 22, 23, and 24 based on the size of the initial voltage signal Vin, amplifies it with a corresponding magnification, and then transmits it to the analog-to-digital converter ADC, which then converts it into a digital output signal Vout of a corresponding size by the analog-to-digital converter ADC, and transmits it to the analysis module of the display screen detection device, and the analysis module analyzes the optical display performance of the display screen under test based on the value of the digital output signal Vout.

Claims

1. An optical signal processing circuit, characterized in that: include: A signal input node, used to receive an initial voltage signal converted from the optical signal, wherein the initial voltage signal is an analog signal; a first transistor connected to the signal input node and a second transistor connected in series with the first transistor, wherein the first transistor is configured to be turned on when the initial voltage signal is greater than a first threshold voltage and turned off when the initial voltage signal is not greater than the first threshold voltage; the second transistor is configured to be turned on when the initial voltage signal is less than a second threshold voltage and turned off when the initial voltage signal is greater than the second threshold voltage, and the second threshold voltage is greater than the first threshold voltage; a third transistor connected to the signal input node and a fourth transistor connected in series with the third transistor, wherein the third transistor is configured to be turned on when the initial voltage signal is greater than the second threshold voltage and turned off when the initial voltage signal is less than the second threshold voltage; the fourth transistor is configured to be turned on when the initial voltage signal is less than a third threshold voltage and turned off when the initial voltage signal is greater than the third threshold voltage, and the third threshold voltage is greater than the second threshold voltage; an analog-to-digital converter configured to convert an analog signal supplied to the analog-to-digital converter into a digital signal; a first operational amplifier, configured to amplify the initial voltage signal output by the second transistor by a first preset multiple and then supply the amplified voltage signal to the analog-to-digital converter; The second operational amplifier is configured to amplify the initial voltage signal output by the fourth transistor by a second preset multiple and then supply the amplified voltage signal to the analog-to-digital converter, wherein the second preset multiple is smaller than the first preset multiple.

2. The circuit according to claim 1, characterized in that Also includes: a fifth transistor connected to the signal input node and a sixth transistor connected in series with the fifth transistor, wherein the fifth transistor is configured to be turned on when the initial voltage signal is greater than the third threshold voltage and turned off when the initial voltage signal is less than the third threshold voltage; the sixth transistor is configured to be turned on when the initial voltage signal is less than a fourth threshold voltage and turned off when the initial voltage signal is greater than the fourth threshold voltage, and the fourth threshold voltage is greater than the third threshold voltage; a seventh transistor connected to the signal input node, the seventh transistor being configured to be turned on when the initial voltage signal is greater than the fourth threshold voltage, and turned off when the initial voltage signal is less than the fourth threshold voltage, wherein the first threshold voltage, the second threshold voltage, the third threshold voltage and the fourth threshold voltage increase in sequence; a third operational amplifier, configured to amplify the initial voltage signal output by the sixth transistor by a third preset multiple and then supply the amplified voltage signal to the analog-to-digital converter; a fourth operational amplifier, configured to amplify the initial voltage signal output by the seventh transistor by a fourth preset multiple and then supply the amplified voltage signal to the analog-to-digital converter; Among them, the first preset multiple, the second preset multiple, the third preset multiple and the fourth preset multiple decrease in sequence.

3. The circuit according to claim 2, characterized in that The first transistor, the third transistor, the fifth transistor and the seventh transistor are N-type transistors, and the circuit further includes: A first comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a first reference voltage node providing the first threshold voltage; and an output terminal connected to the gate of the first transistor; A second comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a second reference voltage node providing the second threshold voltage; and an output terminal connected to the gate of the third transistor; A third comparator having: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a third reference voltage node providing the third threshold voltage; and an output terminal connected to the gate of the fifth transistor; The fourth comparator has: a non-inverting input terminal connected to the signal input node; an inverting input terminal connected to a fourth reference voltage node providing the fourth threshold voltage; and an output terminal connected to the gate of the seventh transistor.

4. The circuit according to claim 3, characterized in that The second transistor, the fourth transistor and the sixth transistor are P-type transistors, the gate of the second transistor is connected to a first circuit node between the third transistor and the fourth transistor, the gate of the fourth transistor is connected to a second circuit node between the fifth transistor and the sixth transistor, and the gate of the sixth transistor is connected to the output terminal of the seventh transistor.

5. The circuit according to claim 4, characterized in that The first threshold voltage is zero volts.

6. An optical signal processing device, characterized in that: include: A circuit as claimed in any one of claims 1 to 5; The optical signal conversion unit includes a photosensitive device and is configured to convert the optical signal into the initial voltage signal by using the photosensitive device and supply the initial voltage signal to the signal input node.

7. The device according to claim 5, characterized in that Also includes: The image processor is connected to the output terminal of the analog-to-digital converter and is configured to generate a corresponding digital image signal based on the size of the digital signal output by the analog-to-digital converter.

8. A method for processing an optical signal, characterized in that: include: Acquiring an initial voltage signal, wherein the initial voltage signal is an analog signal converted from an optical signal; If the initial voltage signal is greater than the first threshold voltage and less than the second threshold voltage, amplifying the initial voltage signal by a first preset multiple to obtain a first analog voltage signal, and inputting the first analog voltage signal into an analog-to-digital converter; If the initial voltage signal is greater than the second threshold voltage and less than the third threshold voltage, amplifying the initial voltage signal by a second preset multiple to obtain a second analog voltage signal, and inputting the second analog voltage signal into the analog-to-digital converter, wherein the second preset multiple is less than the first preset multiple; If the initial voltage signal is greater than the third threshold voltage and less than the fourth threshold voltage, amplifying the initial voltage signal by a third preset multiple to obtain a third analog voltage signal, and inputting the third analog voltage signal into the analog-to-digital converter, wherein the third preset multiple is less than the second preset multiple; If the initial voltage signal is greater than the fourth threshold voltage, amplifying the initial voltage signal by a fourth preset multiple to obtain a fourth analog voltage signal, and inputting the fourth analog voltage signal into the analog-to-digital converter, wherein the fourth preset multiple is less than the third preset multiple; The analog-to-digital converter is used to output a digital output signal representing the intensity of the optical signal.

9. The method according to claim 8, characterized in that The method is performed by the circuit according to any one of claims 1 to 5 or the device according to any one of claims 6 to 7.

10. A computer-readable storage medium storing program instructions, characterized in that: When the program instructions are executed by a computer, the method according to any one of claims 8 to 9 is implemented.

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