Multilayer ceramic electronic component, method for

Abstract

A laminated ceramic electronic component of the present invention includes a ceramic body and an external electrode. The ceramic body has a plurality of internal electrodes stacked in a first axis direction, and an end surface perpendicular to a second axis orthogonal to the first axis, and the plurality of internal electrodes are led out to the end surface. The external electrode includes a base layer covering the end surface and connected to the plurality of internal electrodes. The plurality of internal electrodes and the underlayer are configured from a polycrystal having Cu as the main component. The average crystal grain size of the base layer is 1.2 times or more of the plurality of internal electrodes.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic electronic component having external electrodes, a method for manufacturing the same, and a circuit board. Background Art

[0002] In recent years, the demand for high-frequency laminated ceramic capacitors has increased due to the high-frequency of electronic devices accompanied by faster communications and larger capacity. For high-frequency laminated ceramic capacitors, low ESR (Equivalent Series Resistance) and low loss in the high-frequency region (i.e. high Q value) are required.

[0003] In a high-frequency laminated ceramic capacitor, from the viewpoint of improving the Q value and further from the viewpoint of reducing the manufacturing cost, it is preferred to use Cu, a base metal with low resistivity, as the main component to form both the internal electrode and the external electrode. Patent Document 1 discloses a structure in which Cu is used for both the internal electrode and the external electrode.

[0004] Specifically, in the technology described in Patent Document 1, a Cu baked film is provided as a base layer of an external electrode. In this technology, in order to suppress the occurrence of moisture resistance failure caused by the intrusion of moisture into the Cu baked film, a plating film having a four-layer structure including a precious metal plating film using Au, Pt, Ag or Pd is provided on the Cu baked film.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2004-055679 Summary of the invention

[0008] Technical problem to be solved by the invention

[0009] In the technology described in Patent Document 1, since a noble metal such as Au, Pt, Ag or Pd is used for the external electrode, the manufacturing cost becomes very high. In addition, in this technology, it is not possible to fully prevent the plating solution from invading the Cu baked film when forming the plating film. The invading of the plating solution into the Cu baked film causes defects such as reduced insulation resistance.

[0010] In view of the above circumstances, an object of the present invention is to provide a technology for improving the reliability of a multilayer ceramic electronic component.

[0011] Technical solutions for solving technical problems

[0012] In order to achieve the above object, a multilayer ceramic electronic component according to one embodiment of the present invention includes a ceramic body and external electrodes.

[0013] The ceramic body includes a plurality of internal electrodes stacked in a first axis direction and an end surface perpendicular to a second axis orthogonal to the first axis, and the plurality of internal electrodes are led out to the end surface.

[0014] The external electrode includes a base layer that covers the end surface and is connected to the plurality of internal electrodes.

[0015] The plurality of internal electrodes and the base layer are formed of a polycrystalline material containing Cu as a main component.

[0016] The base layer has an average crystal grain size of 1.2 times or more that of the plurality of internal electrodes.

[0017] In the external electrode of the laminated ceramic electronic component, by forming the base layer with a polycrystalline material having a large crystal grain size, the grain boundaries that become the intrusion path of moisture can be reduced. As a result, in the laminated ceramic electronic component, it becomes difficult for moisture to intrude the base layer of the external electrode, thereby obtaining high reliability by improving moisture resistance.

[0018] The base layer may not contain a glass phase.

[0019] In this structure, the influence of the glass phase with high resistance does not hinder the conductivity of the base layer. In addition, the base layer without a glass phase promotes crystal growth during firing and is likely to become a polycrystalline with a large crystal grain size.

[0020] The external electrode may further include a plating layer covering the base layer.

[0021] The plating layer may include a Cu layer adjacent to the base layer. In this case, the base layer preferably has an average grain size larger than that of the Cu layer.

[0022] In these structures, the intrusion of the plating solution into the base layer can be suppressed in the plating step of forming the plating layer. Therefore, in this structure, the effect of improving the moisture resistance of the plating layer is obtained without being affected by the plating solution.

[0023] Alternatively, the polycrystalline material constituting the ceramic body may be Ca x ZrO 3 (0.90≤x≤1.15) is the main component.

[0024] In this structure, a multilayer ceramic electronic component that can be suitably used in a frequency range of 100 MHz to 2 GHz is obtained.

[0025] The circuit board according to one aspect of the present invention can be used in a frequency range of 100 MHz to 2 GHz.

[0026] The circuit board includes the multilayer ceramic electronic component and a mounting substrate.

[0027] The mounting substrate includes a mounting surface and a pair of connection electrodes provided on the mounting surface, and the pair of connection electrodes are connected to the first external electrode and the second external electrode of the multilayer ceramic electronic component via solder.

[0028] In a method for manufacturing a stacked ceramic electronic component of one embodiment of the present invention, an unfired ceramic body is prepared. The unfired ceramic body is formed by a first conductive paste with Cu powder as a main component, and has a plurality of internal electrodes stacked in a first axial direction, and an end face perpendicular to a second axis orthogonal to the first axis, and the plurality of internal electrodes are led out to the end face.

[0029] The intermediate body is produced by forming a base layer on the end surface of the ceramic body using a second conductive paste containing Cu powder as a main component.

[0030] By firing the intermediate body, the base layer becomes a polycrystalline body having an average crystal grain size of 1.2 times or more the size of the plurality of internal electrodes.

[0031] A plating layer is formed on the base layer of the fired intermediate body.

[0032] It is preferred that the second conductive paste does not contain Si.

[0033] The Cu powder constituting the second conductive paste may have a larger average particle size than the Cu powder constituting the first conductive paste.

[0034] Effects of the Invention

[0035] As described above, according to the present invention, it is possible to provide a technique for improving the reliability of a multilayer ceramic electronic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a perspective view of a multilayer ceramic capacitor according to one embodiment of the present invention.

[0037] Figure 2 It is a cross-sectional view taken along line AA' of the above-mentioned multilayer ceramic capacitor.

[0038] Figure 3 It is a cross-sectional view taken along the line BB' of the above-mentioned multilayer ceramic capacitor.

[0039] Figure 4 The above-mentioned multilayer ceramic capacitor Figure 2 A region R is an enlarged partial cross-sectional view.

[0040] Figure 5 : is a flowchart showing a method for manufacturing the above-mentioned multilayer ceramic capacitor.

[0041] Figure 6 1 is a diagram showing step S01 of the above-mentioned manufacturing method.

[0042] Figure 7 3 is a diagram showing step S02 of the above-mentioned manufacturing method.

[0043] Figure 8 This is a side view of a circuit board including the above-mentioned multilayer ceramic capacitor. DETAILED DESCRIPTION

[0044] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0045] In the drawings, mutually orthogonal X-axis, Y-axis, and Z-axis are appropriately shown. The X-axis, Y-axis, and Z-axis are common to all drawings.

[0046] [Structure of Multilayer Ceramic Capacitor 10]

[0047] Figures 1 to 3 FIG. 1 is a diagram showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. Figure 1 It is a perspective view of the multilayer ceramic capacitor 10 . Figure 2 is along the stacked ceramic capacitor 10 Figure 1 Cross-sectional view along line A-A'. Figure 3 is along the stacked ceramic capacitor 10 Figure 1 Cross-sectional view of line BB'.

[0048] The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The surface of the ceramic body 11 is typically configured as a hexahedron having a pair of end faces E perpendicular to the X axis, a pair of side faces S perpendicular to the Y axis, and a pair of main faces M perpendicular to the Z axis.

[0049] The pair of end faces E, the pair of side faces S and the pair of main faces M of the ceramic body 11 are all configured as flat surfaces. The flat surface of this embodiment can be any surface that is recognized as flat when viewed as a whole, and may not be a strict plane, for example, including a surface with slight concave and convex shapes, a gently curved shape, etc.

[0050] The ceramic body 11 has an edge portion connecting a pair of end faces E, a pair of side faces S, and a pair of main faces M. The edge portion may be rounded by chamfering the ceramic body 11. The chamfering of the ceramic body 11 can be performed by a known method such as barrel polishing.

[0051] The ceramic body 11 is made of dielectric ceramic and has a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13 covered with dielectric ceramic and stacked in the Z-axis direction. The plurality of internal electrodes 12 and 13 are both sheet-shaped extending along the XY plane and are alternately arranged along the Z-axis direction.

[0052] That is, the ceramic body 11 has an opposing region in which the internal electrodes 12 and 13 are opposed to each other in the Z-axis direction via the ceramic layer 16. The first internal electrode 12 is led out from the opposing region to one end surface E and connected to the first external electrode 14. The second internal electrode 13 is led out from the opposing region to the other end surface E and connected to the second external electrode 15.

[0053] According to such a structure, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, a voltage is applied to the plurality of ceramic layers 16 in the opposing regions of the internal electrodes 12 and 13. Thus, in the multilayer ceramic capacitor 10, electric charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are accumulated.

[0054] The multilayer ceramic capacitor 10 is configured to be suitable for use in a high frequency range of 100 MHz to 2 GHz, and can be used as a high frequency dielectric resonator or filter, etc. The multilayer ceramic capacitor 10 is configured to obtain a high Q value (quality factor) in the high frequency range.

[0055] The multilayer ceramic capacitor 10 is required to have a small change in capacitance with temperature so as to exhibit stable performance in a high frequency region. Therefore, a dielectric ceramic having a small change in dielectric constant with temperature is used in the ceramic body 11 to reduce the change in capacitance of each ceramic layer 16 with temperature.

[0056] Therefore, the ceramic body 11 is preferably made of, for example, calcium (Ca) and zirconium (Zr) whose dielectric constants change little with temperature and a general formula ABO. 3 The perovskite structure represented by ("A" represents an A-site element and "B" represents a B-site element) is formed as a polycrystalline phase.

[0057] In the perovskite structure in the polycrystalline main phase, calcium (Ca) is an A-site element and zirconium (Zr) is a B-site element. Specifically, the main phase of the polycrystalline body 11 may be composed of Ca x ZrO 3 The composition represented by (0.90≤x≤1.15).

[0058] In the laminated ceramic capacitor 10, the internal electrodes 12 and 13 are formed as a polycrystal mainly composed of copper (Cu), a base metal with low resistivity. The internal electrodes 12 and 13 and the ceramic layer 16 form a sintered body as a whole as the ceramic body 11. As a result, in the laminated ceramic capacitor 10, the conductivity of the internal electrodes 12 and 13 is increased, and the ESR (equivalent series resistance) is reduced, so that a high Q value is obtained.

[0059] The first external electrode 14 is disposed on the surface of the ceramic body 11 and covers one end surface E. The second external electrode 15 is disposed on the surface of the ceramic body 11 and covers the other end surface E. The external electrodes 14 and 15 face each other in the X-axis direction with the ceramic body 11 interposed therebetween and function as terminals of the multilayer ceramic capacitor 10 .

[0060] The external electrodes 14 and 15 extend from a pair of end faces E of the ceramic body 11 along a pair of main faces M and a pair of side faces S toward the inside in the X-axis direction, and are spaced apart from each other on the pair of main faces M and the pair of side faces S. Thus, the cross sections of the external electrodes 14 and 15 along the XY plane and the XZ plane are both U-shaped.

[0061] The first external electrode 14 includes a first base layer 14a and a first plating layer 14b. The first base layer 14a constitutes an inner layer of the first external electrode 14 and is connected to the first internal electrode 12 at the end surface E. The first plating layer 14b constitutes an outer layer of the first external electrode 14 and covers the first base layer 14a.

[0062] The second external electrode 15 includes a second base layer 15a and a second plating layer 15b. The second base layer 15a constitutes an inner layer of the second external electrode 15 and is connected to the second internal electrode 13 at the end surface E. The second plating layer 15b constitutes an outer layer of the second external electrode 15 and covers the second base layer 15a.

[0063] In each of the external electrodes 14 and 15, the base layers 14a and 15a are formed as polycrystals mainly composed of Cu, a base metal with low resistivity, and become a dense sintered body with few voids by being fired together with the ceramic body 11. As a result, in the multilayer ceramic capacitor 10, the conductivity of the base layers 14a and 15a is increased, and the ESR (equivalent series resistance) is reduced, thereby obtaining a high Q value.

[0064] The plating layers 14b and 15b are formed by wet plating in the external electrodes 14 and 15. The plating layers 14b and 15b may be a single-layer structure or a multi-layer structure, for example, a two-layer structure including a Ni layer and a Sn layer in order from the inside, or a three-layer structure including a Cu layer, a Ni layer, and a Sn layer in order from the inside.

[0065] The external electrodes 14 and 15 are configured to prevent moisture from penetrating the end surface E of the ceramic body 11. Specifically, in the external electrodes 14 and 15, the base layers 14a and 15a are covered with the plating layers 14b and 15b to block moisture, and the base layers 14a and 15a themselves are configured to prevent moisture from penetrating.

[0066] Figure 4 Yes Figure 21 is a partial cross-sectional view of the multilayer ceramic capacitor 10, showing an enlarged view of a region R surrounded by a dashed line. The region R is located at a portion connecting the first internal electrode 12 and the first base layer 14a. The portion connecting the second internal electrode 13 and the second base layer 15a is also configured similarly to the region R.

[0067] In the external electrodes 14 and 15, the base layers 14a and 15a are polycrystalline with large crystal grains, thereby reducing the number of grain boundaries that serve as a path for moisture to penetrate. As a result, in the multilayer ceramic capacitor 10, moisture is less likely to penetrate the base layers 14a and 15a, thereby improving moisture resistance and achieving high reliability.

[0068] On the other hand, for the internal electrodes 12 and 13 composed of polycrystals mainly composed of Cu like the base layers 14a and 15a, it is not preferable to have a large crystal grain size from the viewpoint of ensuring high continuity along the XY plane. Therefore, in the multilayer ceramic capacitor 10, it is necessary to keep the crystal grain size of the internal electrodes 12 and 13 small.

[0069] Therefore, in the multilayer ceramic capacitor 10, the average crystal grain size of the base layers 14a and 15a is 1.2 times or more, preferably 1.35 times or more, the average crystal grain size of the internal electrodes. Thus, in the multilayer ceramic capacitor 10, it is possible to prevent moisture from penetrating the base layers 14a and 15a without damaging the continuity of the internal electrodes 12 and 13.

[0070] In addition, in the external electrodes 14 and 15, it is not preferable that the crystal grain size of the base layers 14a and 15a is too large from the viewpoint of mechanical strength, etc. Therefore, in the multilayer ceramic capacitor 10, the average crystal grain size of the base layers 14a and 15a is preferably 1.75 times or less, and more preferably 1.6 times or less, the average crystal grain size of the internal electrodes 12 and 13.

[0071] The average crystal grain size of the base layers 14a, 15a and the internal electrodes 12, 13 can be obtained from a microstructure image obtained by photographing a cross section. In order to obtain the average crystal grain size, for example, a microstructure image can be used by photographing a cross section of each portion exposed by grinding with a focused ion beam (FIB) scanning using a scanning ion microscope (SIM).

[0072] As an example, in order to obtain the average crystal grain size, a line segment of a specified length is drawn in a microstructure image captured at a specified magnification, and the number of crystal grains passed by the line segment is measured. Thus, the length of the line segment can be divided by the number of crystal grains passed by the line segment and the magnification of the microstructure image as the average crystal grain size. In addition, the length of the line segment is preferably set to a value that the number of crystal grains passed by the line segment is 20 or more.

[0073] In addition, in the external electrodes 14 and 15, it is preferred that the base layers 14a and 15a do not contain a glass phase. Thus, the influence of the glass phase with high resistance does not hinder the conductivity of the base layers 14a and 15a. In addition, in the base layers 14a and 15a that do not contain a glass phase, crystal growth during firing is promoted, and it is easy to become a polycrystalline material with a large crystal grain size.

[0074] In addition, in the external electrodes 14 and 15, when the plating layers 14b and 15b include a Cu layer as the innermost layer adjacent to the base layers 14a and 15a, it is preferable that the average crystal grain size of the Cu layer is smaller than the average crystal grain size of the base layers 14a and 15a. Thus, it is easy to obtain a high bonding strength of the plating layers 14b and 15b relative to the base layers 14a and 15a.

[0075] [Method of Manufacturing Multilayer Ceramic Capacitor 10]

[0076] Figure 5 1 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10 according to the present embodiment. Figure 6 and Figure 7 FIG. 1 is a diagram showing a manufacturing process of the multilayer ceramic capacitor 10. Figure 5 , appropriate reference Figure 6 and Figure 7 A method for manufacturing the multilayer ceramic capacitor 10 will be described.

[0077] (Step S01: Making a ceramic body)

[0078] In step S01, an unfired ceramic body 111 is prepared. The ceramic body 111 corresponds to the state of the ceramic body 11 before firing. The ceramic body 111 is formed by Figure 6 As shown, it is obtained by stacking a first ceramic sheet S1, a second ceramic sheet S2 and a third ceramic sheet S3.

[0079] Ceramic sheets S1, S2, and S3 are all unfired dielectric green sheets mainly composed of dielectric ceramics. Unfired internal electrodes 112 and 113 corresponding to the internal electrodes 12 and 13 are formed on the ceramic sheets S1 and S2, respectively. Unfired internal electrodes 112 and 113 are not formed on the third ceramic sheet S3.

[0080] The internal electrodes 112 and 113 are formed by applying a first conductive paste mainly composed of Cu powder to the ceramic sheets S1 and S2 in a predetermined pattern. The first conductive paste can be applied to the ceramic sheets S1 and S2 using various printing methods such as screen printing.

[0081] In the ceramic body 111, ceramic sheets S1 and S2 are alternately stacked, and a third ceramic sheet S3 is stacked up and down in the Z-axis direction. The ceramic body 111 is integrated by pressing the ceramic sheets S1, S2, and S3. In addition, the number of each ceramic sheet S1, S2, and S3 is not limited to Figure 6 Example shown.

[0082] In addition, the above description describes an example of manufacturing the ceramic body 111 one by one, but it is actually preferable to manufacture a plurality of ceramic bodies 111 at once. That is, a plurality of ceramic bodies 111 can be manufactured at once by cutting a laminated sheet formed by stacking large-sized ceramic sheets S1, S2, and S3 into individual pieces.

[0083] (Step S02: Forming a base layer)

[0084] In step S02, the unfired ceramic body 111 produced in step S01 is formed into unfired base layers 114a and 115a. Figure 7 As shown, an intermediate body 120 is obtained in which both end surfaces E of the unfired ceramic body 111 are covered with the unfired base layers 114a and 115a.

[0085] The unfired base layers 114a and 115a are formed by applying a second conductive paste mainly composed of Cu powder to a predetermined region of the ceramic body 111. The second conductive paste can be applied to the ceramic body 111 by, for example, dipping or screen printing.

[0086] The average particle size of the Cu powder of the second conductive paste constituting the base layers 114a and 115a is preferably larger than the average particle size of the Cu powder of the first conductive paste constituting the internal electrodes 112 and 113. This makes it easier to obtain base layers 14a and 15a having an average crystal grain size larger than that of the internal electrodes 12 and 13 after firing.

[0087] The second conductive paste constituting the base layers 114a and 115a preferably does not contain silicon (Si). Since the base layers 114a and 115a do not contain Si which is likely to be incorporated into other components and form a glass phase during firing, base layers 14a and 15a without a glass phase can be easily obtained after firing.

[0088] (Step S03: Firing)

[0089] In step S03, the intermediate body 120 obtained in step S02 is fired. Thus, the ceramic body 111 and the base layers 14a and 15a constituting the intermediate body 120 are sintered as a whole, so that the ceramic body 111 becomes the ceramic body 11 and the base layers 114a and 115a become the base layers 14a and 15a.

[0090] At this time, the internal electrodes 12, 13 and the base layers 14a, 15a are both polycrystalline with Cu as the main component. The average crystal grain size of the base layers 14a, 15a formed from the second conductive paste is 1.2 times or more the average crystal grain size of the internal electrodes 12, 13 formed from the first conductive paste.

[0091] Here, in a conventional method, the ceramic body 11 is first fired, and the base layers 14a and 15a are formed by baking the second conductive paste on the fired ceramic body 11. In this method, in order to connect the base layers 14a and 15a to the internal electrodes 12 and 13, a glass component such as glass frit needs to be added to the second conductive paste.

[0092] In this regard, in the present embodiment, the ceramic body 11 and the base layers 14a and 15a are fired simultaneously as a whole, so that the connection between the internal electrodes 12 and 13 and the base layers 14a and 15a is maintained during the firing process. Therefore, in the multilayer ceramic capacitor 10, a structure in which the base layers 14a and 15a do not contain a glass phase can be adopted.

[0093] The firing conditions in step S03 can be appropriately determined. For example, the firing temperature is preferably lower than the melting point (1084° C.) of copper (Cu) which is the main component of the internal electrodes 12 and 13 and the base layers 14 a and 15 a , and can be set to, for example, 915° C. The firing time can be, for example, 2.5 hours.

[0094] (Step S04: Forming a Plating Layer)

[0095] In step S04, plating layers 14b, 15b are formed on the base layers 14a, 15a of the fired intermediate body 120. Thus, the plating layers 14b, 15b and the base layers 14a, 15a together form the external electrodes 14, 15, thereby obtaining the ceramic body 11. The plating layers 14b, 15b can be formed by electrolytic plating.

[0096] In step S04, the base layers 14a and 15a are exposed to the plating solution, but in the base layers 14a and 15a having a large average crystal grain size, there are fewer grain boundaries that serve as the intrusion path of the plating solution. Therefore, in the multilayer ceramic capacitor 10, it is possible to prevent a reduction in reliability due to the intrusion of the plating solution into the end surface E of the ceramic body 11.

[0097] [Circuit board 200]

[0098] Figure 8 1 is a side view of a circuit board 200 including a multilayer ceramic capacitor 10 according to the present embodiment. Circuit board 200 according to the present embodiment is typically usable in a frequency range of 100 MHz to 2 GHz. However, circuit board 200 may be configured to be applicable to various frequency ranges.

[0099] The circuit board 200 has a mounting substrate 210 on which the multilayer ceramic capacitor 10 can be mounted. The mounting substrate 210 has a base material 211 and a pair of connection electrodes 212. The base material 211 extends along the XY plane and has a mounting surface G perpendicular to the Z axis. The pair of connection electrodes 212 are provided on the mounting surface G of the base material 211.

[0100] In the wiring board 200 , the external electrodes 14 and 15 of the multilayer ceramic capacitor 10 are connected to a pair of connection electrodes 212 of the mounting substrate 210 via solder H. Thus, in the wiring board 200 , the multilayer ceramic capacitor 10 is fixed to the mounting substrate 210 and electrically connected thereto.

[0101] [Example]

[0102] As Examples 1, 2, and 3 of the above-mentioned embodiment, samples of multilayer ceramic capacitors were produced by the above-mentioned manufacturing method. In Examples 1 and 3, the plating layer of the external electrode was made into a two-layer structure having a Ni layer and a Sn layer in order from the inner side. In Example 2, the plating layer of the external electrode was made into a three-layer structure having a Cu layer, a Ni layer, and a Sn layer in order from the inner side.

[0103] The average grain sizes of the polycrystals of the base layer of the internal electrode and the external electrode constituting the ceramic body were determined for the samples of Examples 1, 2, and 3. The average grain sizes of the internal electrode and the base layer were determined using the same method as described above using microstructure images obtained by photographing the cross section using a scanning ion microscope.

[0104] In addition, the Q value was measured and the accelerated life test was performed as an evaluation of the samples of Examples 1, 2, and 3. The Q value was measured at a frequency of 1 GHz and a voltage of 1.0 V. In the accelerated life test, the temperature was set to 125° C. and the voltage was set to 300 V, and the time until leakage current occurred was measured.

[0105] Furthermore, as a comparative example of the above-mentioned embodiment, a base layer is formed by baking a second conductive paste with Cu powder as the main component on the fired ceramic main body, and a plating layer with a two-layer structure having a Ni layer and a Sn layer in sequence from the inner side is formed on the base layer, to prepare a sample of a stacked ceramic capacitor, and the same evaluation as in Examples 1, 2, and 3 was carried out.

[0106] Table 1 shows the average crystal grain sizes of the internal electrodes and the base layer of the samples of Examples 1, 2, 3 and Comparative Examples. In the samples of Examples 1, 2, and 3, the average crystal grain size of the base layer is 1.2 times or more of the internal electrode. On the other hand, in the samples of Comparative Examples, the average crystal grain size of the base layer is smaller than that of the internal electrode.

[0107] In addition, the measurement results of the Q values ​​of the samples of Examples 1, 2, 3 and Comparative Examples are shown in Table 1. In the samples of Examples 1, 2, and 3, large Q values ​​of 200 or more were obtained. On the other hand, in the sample of Comparative Example, the Q value was less than 200, and it is considered that the Q value was reduced because the resistance of the base layer was high.

[0108] In addition, the results of the accelerated life test of the samples of Examples 1, 2, 3 and the comparative example are shown in Table 1. The samples of Examples 1, 2, and 3 all achieved high durability of more than 100 hours. In contrast, the sample of the comparative example stayed at less than 100 hours, and it is believed that leakage current was generated at an early stage due to moisture intrusion into the base layer.

[0109] Table 1

[0110]

[0111] [Other embodiments]

[0112] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, It is a matter of course that various changes can be made within the range which does not deviate from the summary of this invention.

[0113] For example, in the multilayer ceramic capacitor 10, the plated layers 14b and 15b may not be provided on the external electrodes 14 and 15. In this case, the external electrodes 14 and 15 may be formed by providing other layers such as sputtered films on the base layers 14a and 15a, or may be formed by only the base layers 14a and 15a.

[0114] The laminated ceramic capacitor 10 may not be a high frequency structure as long as the internal electrodes 12 and 13 and the base layers 14a and 15a are made of polycrystalline material mainly composed of Cu. The laminated ceramic capacitor 10 may be a structure that obtains a large capacitance using, for example, a barium titanate-based material.

[0115] Furthermore, the present invention is applicable not only to the laminated ceramic capacitor 10, but also to all laminated ceramic electronic components having internal electrodes and external electrodes. Laminated ceramic electronic components to which the present invention can be applied include, in addition to laminated ceramic capacitors, varistors, thermistors, laminated inductors, and the like.

[0116] Description of Reference Numerals

[0117] 10…Multilayer ceramic capacitors

[0118] 11…Ceramic body

[0119] 12, 13…Internal electrodes

[0120] 14, 15…External electrodes

[0121] 14a, 15a…basal layer

[0122] 14b, 15b…plating layer

[0123] 16…ceramic layer.

Claims

1. A laminated ceramic electronic component, characterized in that: include: a ceramic body having a plurality of internal electrodes stacked in a first axis direction and an end surface perpendicular to a second axis orthogonal to the first axis, the plurality of internal electrodes being led out to the end surface; and an external electrode including a base layer covering the end surface and connected to the plurality of internal electrodes, The plurality of internal electrodes and the base layer are composed of a polycrystalline body having Cu as a main component, The base layer has an average crystal grain size of 1.2 times or more that of the plurality of internal electrodes.

2. The multilayer ceramic electronic component according to claim 1, wherein: The base layer does not contain a glass phase.

3. The multilayer ceramic electronic component according to claim 1 or 2, characterized in that: The external electrode further includes a plating layer covering the base layer.

4. The multilayer ceramic electronic component according to claim 3, wherein: The plating layer comprises a Cu layer adjacent to the base layer, The base layer has an average crystal grain size larger than that of the Cu layer.

5. The multilayer ceramic electronic component according to claim 1 or 2, characterized in that: The polycrystalline material constituting the ceramic body is Ca x ZrO3 is the main component, wherein 0.90≤x≤1.

15.

6. A circuit board, characterized in that: The circuit board can be used in the frequency region of 100 MHz to 2 GHz, and includes: The laminated ceramic electronic component according to claim 1 or 2; The mounting substrate includes a mounting surface and a pair of connection electrodes provided on the mounting surface, wherein the pair of connection electrodes are connected to the first external electrode and the second external electrode of the multilayer ceramic electronic component via solder.

7. A method for manufacturing a laminated ceramic electronic component, characterized in that: An unfired ceramic body is prepared, wherein the unfired ceramic body is formed of a first conductive paste having Cu powder as a main component, and has a plurality of internal electrodes stacked in a first axial direction, and an end surface perpendicular to a second axis orthogonal to the first axis, and the plurality of internal electrodes are led out to the end surface, The intermediate body is produced by forming a base layer on the end surface of the ceramic body using a second conductive paste containing Cu powder as a main component, By firing the intermediate body, the base layer becomes a polycrystalline body having an average crystal grain size of 1.2 times or more the size of the plurality of internal electrodes. A plating layer is formed on the base layer of the fired intermediate body.

8. The method for manufacturing a laminated ceramic electronic component according to claim 7, wherein: The second conductive paste does not contain Si.

9. The method for manufacturing a laminated ceramic electronic component according to claim 7 or 8, characterized in that: The Cu powder constituting the second conductive paste has a larger average particle size than the Cu powder constituting the first conductive paste.

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