Gallium antimonide polished wafer surface defect control process method

Abstract

A gallium antimonide polished wafer surface defect control process method relates to a wafer polishing technology, and comprises the following steps: firstly, optimizing a crystal outer circle rolling process, and controlling a crystal outer circle rolling feed amount and a crystal movement rate to obtain a surface with a compact crystal structure and good smoothness; a crystal chamfering process is designed, and the number of grinding wheel meshes, the number of chamfering turns and the feeding speed of chamfering in different states are optimized; the size of the radius of the main positioning fillet of the wafer is designed, and the original sharp corner of the main edge is changed into a fillet, so that the fillet of the main edge can bear the external force and does not have the problems of falling off, slag falling and the like; a gallium antimonide wafer edge end face polishing technology is designed to obtain a compact and bright edge structure and a beveling-free track, finally, the three polishing processes of the gallium antimonide wafer are optimized, through process control of a system, the structure of the wafer edge is stable, wafer edge falling is greatly reduced, the final polishing dark scratch of the wafer is reduced from 60% to 10%, and the polishing quality of the wafer is improved. And the final one-time polishing passing rate is greatly improved.

Description

Technical Field

[0001] The invention belongs to the technical field of wafer polishing, and in particular relates to a process method for controlling surface defects of a gallium antimonide polished wafer. Background Art

[0002] III-V compound semiconductor materials have attracted extensive attention due to their advantages in the application of optoelectronic devices. Antimonide infrared optoelectronic devices have shown great application prospects in infrared imaging, medical diagnosis, resource exploration, gas detection, optical communication, thermophotovoltaics and other fields with their excellent performance, and have become a current research hotspot. Gallium antimonide (GaSb), as a typical III-V compound semiconductor material, has a bandgap of 0.725 eV and a lattice constant of 6.0959 Å. It matches the lattice of III-V materials and their ternary and quaternary antimony-containing compounds with a lattice constant of 6.1 Å. The wavelength range can cover from near-infrared to far-infrared bands, making it an ideal substrate material for the preparation of antimonide infrared optoelectronic devices. GaSb single crystals have a direct impact on the performance of antimonide infrared optoelectronic devices. The improvement of device performance requires single crystals to have large size, lower defect density and better surface quality. In recent years, antimonide infrared photoelectric technology has developed rapidly, especially the development and application of antimonide type II superlattice infrared focal plane detection technology, which has greatly promoted the development of GaSb materials. More and more institutions and enterprises have also invested in the research and development and production of GaSb single crystals.

[0003] The production of GaSb single crystal wafers mainly achieves high-quality surface preparation through polishing, cleaning and other processing techniques. GaSb materials have high chemical activity and are easily oxidized, which requires high surface preparation technology and is more difficult to process than GaAs, InP and other materials. With the development of device epitaxial technology, the requirements for single crystal surface performance are becoming more and more stringent, and high-quality surface preparation has become the key to the development of GaSb single crystal wafers. In order to meet the needs of epitaxial material growth, the surface of the single crystal wafer is required to have low roughness, low surface residual impurities and defects, and low surface oxide layer thickness.

[0004] The traditional polishing method for GaSb wafers is chemical mechanical polishing. The mechanism of chemical mechanical polishing is: the material removal on the wafer surface is achieved by combining chemical oxidation and mechanical grinding. During the chemical mechanical polishing process, a soft layer with low hardness is generated on the wafer surface due to chemical oxidation, and the softened layer is removed by mechanical grinding. The usual chemical chemical mechanical polishing is achieved by using nano-scale silicon oxide or aluminum oxide polishing slurry and matching different polishing machine equipment processes.

[0005] At present, the main surface defects of large-diameter gallium antimonide chemical mechanical polishing wafers are dark scratches and particles. Dark scratches are relatively small, about a few microns, and can usually be seen under strong light by changing different angles. They can also be observed under a 200x microscope. Dark scratches directly affect the subsequent epitaxy and the yield rate of detector devices.

[0006] The rough polishing and intermediate polishing of GaSb wafers are subject to the influence of polishing cloth and polishing chemicals, which are easy to produce macroscopic scratches and scratches, which are distributed in cross, straight line and arc, about 10 microns or more. The scratches and scratches of the intermediate polishing can be removed by the final fine polishing, but a kind of macroscopic invisible "dark scratch" defect with a size of several microns and different lengths is found in the fine polishing. It appears and occurs from time to time, and the position and length are deteriorated in different places... directly affecting the first-time pass rate of GaSb wafers.

[0007] We analyzed the location and length of "dark scratches" on the surface of a large number of wafers after fine polishing, and found that the location of the dark scratches is changing, and the length is different. We observed the edge morphology of the wafer before chamfering and the edge of the wafer after fine polishing under a microscope of 50-200 times, and found that the edge morphology of the wafer changed again. There are many small micron-nano-level notches on the edge of the wafer after fine polishing, causing the end face to be uneven. We used the elimination method to eliminate the influence of polishing chemicals, liquids, cloths, particles and other factors, and finally focused on the "dark scratches" defects on the crystal surface, which are related to the detached objects on the edge of the wafer. Summary of the invention

[0008] In order to reduce the generation of detached objects at the edge of the wafer and reduce the impact of detached objects on the dark scratches on the wafer surface, the present invention provides a process method for controlling surface defects of gallium antimonide polished wafers. The present invention achieves progress in processing technology through two process innovations and multiple process optimizations, and develops a new process method for controlling surface defects of gallium antimonide wafers, which significantly reduces and alleviates dark scratches.

[0009] The technical solution provided by the present invention is: a process for controlling surface defects of a gallium antimonide polished wafer, comprising the following steps: S1, crystal rolling outer circle; S2. Wafer chamfering: According to the thickness of the wafer, design the angle of the grinding wheel R angle, and determine the depth of the A1 and A2 surface widths; increase the left and right fillet radii of the main and auxiliary positioning edges by more than 3 times on the current basis, so that the left and right fillet radii of the main and auxiliary positioning edges change from sharp corners to rounded corners, thereby improving the ability of the wafer to withstand external force impact during polishing and reducing the risks of edge knocking, edge drop and slag drop at the left and right corners of the main positioning edge of the wafer; for rough chamfering, use a grinding wheel with a mesh number ≥1800 for rough chamfering, control the grinding wheel feed rate at 0.2-0.4mm / min, and the number of chamfering circles is ≥2 circles; for fine chamfering, use a grinding wheel with a mesh number ≥6000 for fine chamfering, control the grinding wheel feed rate at 0.2-0.4mm / min, and the number of chamfering circles is ≥2 circles; after fine chamfering, first check under a fluorescent lamp, and the wafer edge is uniform, without edge collapse and notch, which is qualified; then check the A1, A2 surface width and R angle accuracy under a 20x profilometer microscope, and the error between the design value is within a reasonable range, which is qualified; S3, chemical etching of chip chamfering; S4. Mechanical polishing of chip chamfers: On a domestic 6B single-sided polishing machine, use a grinding liquid with a particle size of ≤100nm, add an oxidant to the grinding liquid to make a polishing liquid with a pH of ≥8, put a black damping polishing cloth with a hardness of ≤40 on the turntable of the polishing machine, and manually fix the chip to stand upright. The upright chip is polished on the polishing cloth. The main disk speed of the polishing machine is ≤5r / min, and the polishing liquid flow rate is 100-200ml / min. The chamfer of the gallium antimonide chip is chemically mechanically polished for 60-120s by manually rotating the chip. After polishing, rinse with high-purity water and dry; observe with the naked eye under a fluorescent lamp, and the edge of the chip is fine, uniform and shiny, which is qualified; S5, wafer polishing: including rough polishing, medium polishing and fine polishing; S6, wafer cleaning; S7, drying the wafers; S8, wafer inspection; S9. Chip storage.

[0010] A further technical solution is: in S1, a grinding wheel with a mesh number ≥ 800 is selected, a grinding wheel feed amount ≤ 0.5 mm / min, and a crystal moving speed ≤ 3 mm / min.

[0011] A further technical solution is: use an inorganic acid solution, a buffer and high-purity water with a resistivity of 18 megohms to prepare a solution with a pH value of 5-6, chemically corrode the edge of the chamfered chip at 18-24°C for 20-30s, then rinse with high-purity water and dry; observe with the naked eye under a fluorescent light, and the chip edge is qualified if there is no obvious adsorbent, particles, or burrs.

[0012] The further technical solution is: In S5, rough polishing is performed; the hardness of the selected polishing cloth is ≤80, the particle size of the selected polishing liquid is ≤150nm and the pH value is 7-12, and the polishing liquid is added with an oxidant to prepare a polishing liquid with a pH value of 8-12. The wafer is fixed on a wax-free pad, and the polishing pressure is ≤200g / cm 2 , main disk speed 40-80r / min, polishing liquid flow ≤400ml / min, two-sided polishing, polishing removal amount controlled at 30-40 microns; after rough polishing, observe under fluorescent light without obvious scratches, saw marks, etc., then enter medium polishing; Medium polishing: the hardness of the polishing cloth is ≤60, the particle size of the polishing liquid is ≤100nm and the pH value is ≥8. After adding oxidant to the polishing liquid, the pH value is 9-10. The wafer is fixed on the wax-free pad, and the polishing pressure is ≤150g / cm 2 , main disk speed 40-60r / min, polishing liquid flow 300-400ml / min, two-sided polishing, polishing removal ≤20 microns; after medium polishing, observe under strong light and enter fine polishing after no obvious scratches, saw marks, etc.; Fine polishing: the hardness of the polishing cloth should be ≤40, the compression elasticity should be 50-90%, and the opening diameter should be ≥200 mesh; the polishing liquid should be mainly oxidant, the pH value of the polishing liquid should be 4-8, the wafer should be fixed on a wax-free pad, and the polishing pressure should be ≤100g / cm 2 The main disk speed is 40-60r / min, the polishing liquid flow rate is 300-400ml / min, and both sides are polished. The polishing removal amount is ≤10 microns. After fine polishing, observe under a strong light that there are no obvious scratches, bright scratches, dark scratches, NG, and chemicals are used for cleaning.

[0013] A further technical solution is: in S6, after the wafer is polished, the lower plate is quickly flushed with water, the water gun pressure on both sides of the main plate is ≥1.5kg, and the megasonic wave-assisted high-purity water gun flushes the surface in different directions for ≤30S. The water flow direction is consistent, and there must be no flushing backflow or other phenomena.

[0014] A further technical solution is to check the wafer surface from different angles for defects such as dark scratches, dirty spots, dark spots, potions, and dirty potions under a 40W strong light and a 20x microscope.

[0015] The further technical solution is: the wafer storage room is a Class 100 environment, the room temperature is controlled at 18-22℃, and the humidity is controlled at ≤60%. Compared with the prior art, the beneficial effects of the present invention are: 1. First, the crystal outer circle rolling process was optimized to obtain a relatively delicate and dense crystal surface. The grinding wheel mesh number selected in the process is ≥800 mesh, and the grinding wheel feed rate is nearly 10 times slower than the previous crystal outer circle rolling speed. The crystal movement rate is 5-8 times slower than before. The obtained crystal surface has no knife marks, no grinding wheel grinding tracks, and is relatively delicate. The stress of the crystal is also effectively released.

[0016] 2. The process of chamfering the edge of gallium antimonide wafers was optimized and designed to obtain a better chamfered end face. First, the grinding wheel structure and mesh size for chamfering soft gallium antimonide wafers were formulated, and the feed speed, moving speed, etc. were adjusted in the process to ensure the smoothness of the wafer edge.

[0017] 3. In the previous process, the left and right fillet radii of the main positioning edge of the wafer were mostly sharp corners, which were easily knocked and chipped when impacted by external force. The present invention innovatively designs the size of the left and right fillet radii of the main positioning edge, and obtains a larger left and right fillet radii, which improves the ability of the wafer to withstand external force impact during polishing and reduces the risks of knocking, chipping and chipping of the left and right corners of the main positioning edge of the wafer.

[0018] 4. The present invention performs chemical etching of inorganic acid or ammonia series on the GaSb edge chamfered wafer to ensure that the wafer edge structure is dense without a loose layer, and that the edge does not slag or fall off, thereby reducing the generation of dark scratches on the fine polishing surface.

[0019] 5. The present invention is designed to perform chemical mechanical polishing on the edge of the chip to obtain a high-end surface with a shallow damage layer and a smooth finish, so as to prevent the chip edge from being affected by external forces and causing slag to fall off, resulting in dark scratches. At the same time, it can control the various substances that are easy to remain on the edge due to the roughness of the edge and easily diffuse back to the positive surface during epitaxy.

[0020] 6. The present invention optimizes the wafer polishing process, selects a suitable polishing pressure, filters the polishing liquid multiple times, balances chemical removal and mechanical removal forces, and adjusts the flow rate and rotation speed of the polishing liquid to effectively control the chip edge from falling off and the problem of "dark scratches" that are easily generated on the wafer surface, thereby effectively improving the wafer's one-time pass rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 The crystal in the present invention is rolled outwardly and the surface is chemically etched.

[0022] Figure 2 It is the chamfered edge of the wafer before the optimization process of the present invention.

[0023] Figure 3 It is the chamfered edge of the wafer after the optimization process of the present invention.

[0024] Figure 4 These are the left and right sharp corners of the main positioning edge before the optimization process of the present invention.

[0025] Figure 5These are the left and right sharp corners of the main positioning edge after the optimization process of the present invention.

[0026] Figure 6 This is the length of the 10*10 "dark scratch" of the microscope before the optimization process of the present invention.

[0027] Figure 7 This is the width of the 10*10 "dark scratch" of the microscope before the optimization process of the present invention.

[0028] Figure 8 After the optimization process of the present invention, the microscope is 10*10 and there is no "dark scratch" on the surface of the chip. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0030] This embodiment discloses a process for controlling surface defects of a GaSb polished wafer, comprising the following steps: 1. The crystal outer circle rolling process has been optimized.

[0031] The material hardness of gallium antimonide is 1.5, which is softer than gallium arsenide and indium phosphide. Therefore, we first optimized the process of crystal rolling. The selected grinding wheel mesh is ≥800 mesh, the grinding wheel feed is about 10 times slower than the previous crystal rolling speed, and the crystal movement rate is 5-8 times slower than before. The surface of the crystal obtained has no knife marks, no grinding wheel grinding tracks, is relatively delicate, and has a dense structure. The stress of the crystal is also effectively released.

[0032] 2. The chip chamfering process has been optimized.

[0033] Usually, the chamfers of semiconductor silicon, gallium arsenide, and indium phosphide wafers are R-shaped or T-shaped, and most of them are R-shaped. The R-shaped radius is considered according to the final thickness of the wafer. According to the thickness of the wafer, the angle of the grinding wheel R angle is designed to determine the depth of the A1 and A2 surface. We choose R-shaped chamfers.

[0034] The chip chamfering process is divided into coarse chamfering and fine chamfering. The number of grinding wheels used is different. I optimized the process and used a grinding wheel with a mesh of ≥1800 for coarse chamfering. During the chamfering process, the feed rate was controlled at 0.2-0.4mm / min, and the number of chamfering circles was ≥2 circles. A grinding wheel with a mesh of ≥6000 was used for fine chamfering, and the feed rate was controlled at 0.2-0.4mm / min, and the number of chamfering circles was ≥2 circles. After the fine chamfering was completed, the edge of the chip was checked under a fluorescent lamp to see if there was no edge collapse or notch, the edge was relatively uniform, and the finish and roughness were relatively good, which was qualified. Then the A1 and A2 surface widths were tested under a 20x profilometer microscope. The error between the R angle accuracy and the design value was qualified within a reasonable range. Because we optimized the process, the coarse chamfering grinding wheel was changed from 800 mesh to ≥1800 mesh, and the fine grinding wheel was changed from 4000 mesh to ≥6000 mesh. The chamfering process slowed down the feed rate and increased the number of chamfering circles, and we have obtained an end face with small edge roughness, better structure, and less prone to falling debris.

[0035] 3. The radius of the left and right corners of the main and auxiliary positioning edges are innovatively designed.

[0036] At present, the left and right fillet radii of the main positioning edges of the chip are set to ≤3mm, and most of their morphologies are sharp corners. Considering that the main and secondary positioning edges are sharp corners, the external impact force they can withstand is relatively small, and the edges are prone to falling off. We designed the left and right fillet radii of the main and secondary positioning edges of the chip to be enlarged by more than 3 times, and the corners have changed from the previous "sharp corners" to "rounded corners", greatly reducing problems such as edge knocking, edge falling and slag falling.

[0037] 4. Optimized chemical etching to remove the loose layer on the edge of the wafer.

[0038] Usually, chemical etching is performed after the chip is chamfered to remove the edge damage layer and loose layer. We have optimized a new process method to use stable acidic and alkaline solutions with relatively slow chemical reaction rates for etching, which can obtain a chip with low edge roughness and a relatively smooth surface.

[0039] Specifically, we use ≥10% inorganic acid solution and buffer, plus 18 megohm high-purity water to make chemical etching solution. The pH value of the chemical etching solution is 5-6. In an environment of 18-24℃, the edge of the chamfered chip is chemically corroded for about 20-30S, and then rinsed with high-purity water and dried. In this way, the residues, particles and metal impurities on the surface and edge of the chip are removed. After drying, observe the surface of the chip with the naked eye under a fluorescent lamp. If the edge is brighter and there is no obvious adsorbent, particles, burrs, etc., it is qualified. The surface finish of the chip edge is finer than before corrosion.

[0040] 5. The chip end surface polishing is optimized to improve the chip smoothness.

[0041] Polishing the edge of the wafer can increase the density of the crystal structure and control the residue and easy falling off of the edge of the wafer. At present, only large-diameter silicon is subjected to edge chemical mechanical polishing, while other materials have not yet started. We use chemical mechanical polishing to polish the edge of gallium antimonide wafers and obtain a polished end face with relatively good finish.

[0042] Specifically, we use a polishing liquid (silica colloidal solution, pH value ≥ 9) with a particle size of ≤ 100nm and an oxidant (hydrogen peroxide, sodium dichloroisocyanurate, sodium bicarbonate, tartaric acid, organic acid, etc.) on a domestic 6B single-sided polishing machine. The pH value is ≥ 8. The domestic polishing cloth used is a black damping cloth with a hardness of ≤ 40. The wafer is placed vertically by manually fixing the end face of the wafer. The main disk speed of the polishing machine is ≤ 5r / min, and the polishing liquid flow rate is 100-200ml / min. The end face of the gallium antimonide wafer is chemically mechanically polished for 60S-120S, rinsed with high-purity water and dried and dehydrated in a single piece. Observe the edge end face under a fluorescent lamp. The end face is relatively uniform, shiny, and delicate, which is qualified. Then observe the end face of the photo under a 20x microscope. It is relatively smooth, bright, and has no chamfering tracks left by the chamfered edge. Chemical mechanical polishing of the edge of the wafer provides the basis for wafer polishing and preventing edge shedding. The edges of large-diameter silicon wafers have been fully polished, while the edge polishing of gallium antimonide wafers has not yet been achieved (the main reason is that gallium antimonide is soft and brittle, making it too difficult to polish, and the polishing method of silicon wafer edges is not suitable for gallium antimonide).

[0043] 6. Optimize the wafer polishing process.

[0044] We optimized the wafer polishing process and used three SEEDFAM-32G single-sided polishing machines of the same model to perform rough, medium and fine chemical mechanical polishing on 2-inch 12 pieces / plate and 3-inch 5 pieces / plate gallium antimonide wafers.

[0045] The polishing cloth used for rough polishing is a colorless white cloth with appropriate hardness, and its hardness is ≤80. The polishing abrasive liquid (silicon solution pH value 7-12, particle size ≤150nm) is added with an oxidant (sodium dichloroisocyanurate, sodium phosphate, sodium pyrophosphate, organic acid...), and its pH value is controlled between 8-12. The wafer is fixed on a wax-free pad, and the polishing upper plate pressure is ≤200g / cm 2 , main disk speed 40-80r / min, flow rate ≤400ml / min, double-sided polishing, polishing removal amount 30-40 microns, observe under fluorescent light without obvious scratches, saw marks, etc., then enter the middle polishing.

[0046] The polishing cloth used for polishing gallium antimonide wafers is a relatively suitable black damping cloth with a hardness of ≤60. The polishing liquid used is a silica colloidal solution with a particle size of ≤100nm and a pH value of ≥8, plus an oxidant (hydrogen peroxide, sodium dichloroisocyanurate, sodium phosphate, sodium pyrophosphate, organic acid, inorganic acid...) to form a polishing liquid with a pH value controlled between 9-10. The wafer is fixed on a wax-free pad, and the polishing liquid is supplied by a peristaltic pump. Two ≤0.5 micron filter elements are connected in series and filtered and diverted to the main plate through a latex tube at 300-400ml / , and the upper plate polishing plate pressure is ≤150g / cm 2 The main disk speed is 40-60r / min, the polishing removal amount is ≤20 microns, and after observing under a strong light without obvious scratches or scratches, it enters the fine polishing.

[0047] The final fine polishing uses black damping cloth with a hardness of ≤40, a compression elasticity of 50-90%, and an opening diameter of ≥200 mesh. The main components of the polishing liquid are oxidants (hydrogen peroxide, potassium hypochlorite, sodium dichloroisocyanurate, organic acid, inorganic acid, sodium hypochlorite, tartaric acid...) composed of polishing medicine, and its pH value is between 4-8. The wafer is fixed on a wax-free pad. The polishing liquid is supplied by a peristaltic pump, and multiple ≤0.3 micron filter elements are connected in series and filtered and diverted to the main disk through a latex tube at 300-400ml / , and the upper polishing disk pressure is ≤100g / cm 2 The main disk speed is 40-60r / min, the polishing removal amount is ≤10 microns, and there are no obvious scratches, bright scratches, dark scratches, NG, chemicals, etc. when observed under a strong light.

[0048] After polishing, the disk is quickly removed and the wafer surface is rinsed with high-purity water with megasonic assistance and a water pressure of ≥1.5KG using two guns, thus achieving a stable process.

[0049] 7. Wafer cleaning.

[0050] After fine polishing, the lower plate of the wafer is quickly flushed with water. The water gun pressure on both sides of the main plate is ≥1.5KG. Megasonic wave-assisted high-purity water guns are used in different directions to fully cover the surface for ≤30S. The water flow direction is consistent and there must be no flushing backflow and other phenomena.

[0051] 8. Wafer inspection.

[0052] Under a 40W strong light and a 20x microscope, check the wafer surface from different angles for defects such as dark scratches, dirty spots, dark spots, potions, and dirty potions.

[0053] 9. Chip storage.

[0054] The wafer storage room is a Class 100 environment, with room temperature controlled at 18-22°C and humidity controlled at ≤60%.

[0055] In summary, the present invention first optimizes the crystal outer circle rolling process, controls the crystal outer circle rolling feed amount and the crystal moving rate, so as to obtain a surface with a dense crystal structure and good finish; designs a crystal chamfering process, optimizes the grinding wheel grit, chamfering circle number and feed speed of chamfering under different conditions; analyzes the influence of the radius of the main and secondary positioning edges of the wafer on the morphology of the main and secondary edge fillets, designs the radius of the main positioning fillet of the wafer, and changes the previous main edge sharp corner into a rounded corner, so as to ensure that the main edge fillet can withstand external force without falling off, slag falling and other problems; analyzes the influence of the radius of the main and secondary positioning edges of the wafer on the main and secondary edge fillets. Polishing the edge of a diameter silicon wafer can reduce the various particles and residues that are easily retained on the edge. The present invention designs a polishing technology for the edge end face of a gallium antimonide wafer to obtain a dense, bright, and chamfer-free edge structure. Finally, the three major processes of polishing a gallium antimonide wafer (rough polishing, medium polishing, and fine polishing) are optimized. Different consumables are selected for different process sections, and different process parameters are set. Through the process control of the system, the structure of the wafer edge is stable, and the chip edge shedding is greatly reduced, achieving the final polishing "dark scratch" of the wafer reduced from 60% to 10%, and the final polishing pass rate is greatly improved.

Claims

1. A process for controlling surface defects of a gallium antimonide polished wafer, characterized in that The following steps are involved: S1, crystal rolling outer circle; S2. Wafer chamfering: According to the thickness of the wafer, design the angle of the grinding wheel R angle, determine the depth of the A1 and A2 surface widths; increase the left and right fillet radii of the main and auxiliary positioning edges by more than 3 times on the current basis, so that the left and right fillet radii of the main and auxiliary positioning edges change from sharp corners to rounded corners; for rough chamfering, use a grinding wheel with a mesh number of ≥1800 for rough chamfering, control the grinding wheel feed at 0.2-0.4mm / min, and the number of chamfering circles is ≥2 circles; Fine chamfering, use a grinding wheel with a mesh number of ≥6000 for fine chamfering, the grinding wheel feed rate is controlled at 0.2-0.4mm / min, and the number of chamfering circles is ≥2 circles; after fine chamfering, first check under a fluorescent lamp, the edge of the wafer is uniform, there is no edge collapse, and the chip is qualified; then check under a 20x profilometer microscope, the A1, A2 surface width and R angle accuracy are qualified if the error between the design value is within a reasonable range; S3, chemical etching of chip chamfering; S4. Mechanical polishing of chip chamfers: On a domestic 6B single-sided polishing machine, use a grinding liquid with a particle size of ≤100nm, add an oxidant to the grinding liquid to make a polishing liquid with a pH of ≥8, put a black damping polishing cloth with a hardness of ≤40 on the turntable of the polishing machine, and manually fix the chip to stand upright. The upright chip is polished on the polishing cloth. The main disk speed of the polishing machine is ≤5r / min, and the polishing liquid flow rate is 100-200ml / min. The chamfer of the gallium antimonide chip is chemically mechanically polished for 60-120s by manually rotating the chip. After polishing, rinse with high-purity water and dry; observe with the naked eye under a fluorescent lamp, and the edge of the chip is fine, uniform and shiny, which is qualified; S5, wafer polishing: including rough polishing, medium polishing and fine polishing; S6, wafer cleaning; S7, drying the wafers; S8, wafer inspection; S9. Chip storage.

2. The method for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: In S1, a grinding wheel with a mesh size of ≥800 is selected, the grinding wheel feed amount is ≤0.5mm / min, and the crystal movement rate is ≤3mm / min.

3. The process for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: A solution with a pH value of 5-6 is prepared using an inorganic acid solution, a buffer and high-purity water with a resistivity of 18 megohms. The edge of the chamfered wafer is chemically corroded for 20-30 seconds at 18-24°C, then rinsed with high-purity water and dried. The wafer is qualified if there is no obvious adsorbed matter, particles or burrs on the edge of the wafer when observed with the naked eye under a fluorescent lamp.

4. The method for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: In S5, rough polishing is performed; the hardness of the selected polishing cloth is ≤80, the particle size of the selected polishing liquid is ≤150nm and the pH value is 7-12, and the polishing liquid is added with an oxidant to prepare a polishing liquid with a pH value of 8-12. The wafer is fixed on a wax-free pad, and the polishing pressure is ≤200g / cm 2 , main disk speed 40-80r / min, polishing liquid flow ≤400ml / min, two-sided polishing, polishing removal amount controlled at 30-40 microns; after rough polishing, observe under fluorescent light without obvious scratches, saw marks, etc., then enter medium polishing; Medium polishing: the hardness of the polishing cloth is ≤60, the particle size of the polishing liquid is ≤100nm and the pH value is ≥8. After adding oxidant to the polishing liquid, the pH value is 9-10. The wafer is fixed on the wax-free pad, and the polishing pressure is ≤150g / cm 2 , main disk speed 40-60r / min, polishing liquid flow 300-400ml / min, two-sided polishing, polishing removal ≤20 microns; after medium polishing, observe under strong light and enter fine polishing after no obvious scratches, saw marks, etc.; Fine polishing: the hardness of the polishing cloth should be ≤40, the compression elasticity should be 50-90%, and the opening diameter should be ≥200 mesh; the polishing liquid should be mainly oxidant, the pH value of the polishing liquid should be 4-8, the wafer should be fixed on a wax-free pad, and the polishing pressure should be ≤100g / cm 2 The main disk speed is 40-60r / min, the polishing liquid flow rate is 300-400ml / min, and both sides are polished. The polishing removal amount is ≤10 microns. After fine polishing, observe under a strong light that there are no obvious scratches, bright scratches, dark scratches, NG, and chemicals are used for cleaning.

5. The method for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: In S6, after the wafer is polished, the lower plate is quickly flushed with water. The water gun pressure on both sides of the main plate is ≥1.5kg. Megasonic-assisted high-purity water guns are used in different directions to fully cover the surface for ≤30S. The water flow direction is consistent, and there must be no flushing backflow or other phenomena.

6. The method for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: In S8, under a 40W strong light and a 20x microscope, the wafer surface is checked from different angles for defects such as dark scratches, dirty spots, dark spots, potion, and potion dirt.

7. The process for controlling surface defects of a gallium antimonide polished wafer according to claim 1, characterized in that: In S9, the wafer storage room is a Class 100 environment, with room temperature controlled at 18-22°C and humidity controlled at ≤60%.

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