Method for reducing bending degree of wafer

By forming a doped silicon oxide layer on the second surface of the wafer and performing ion replacement, the problem of complex and high cost of reducing the curvature of the wafer in the prior art is solved, and a simple and low-cost curvature reduction effect is achieved.

CN119495567APending Publication Date: 2025-02-21SIEN (QINGDAO) INTEGRATED CIRCUITS CO LTD
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Patent Information

Application Number
CN202411570825.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

The method of reducing the wafer bending in the prior art is complex and has high cost, making it difficult to effectively solve the process error problem caused by changes in the wafer bending.

Method used

By forming a first doped silicon oxide layer on the second surface of the wafer and ionically displaced the first doped ions therein, a second doped silicon oxide layer is formed, and the stress is the same as the process stress type on the front surface of the wafer or Instead, to offset the stress on the front of the wafer and reduce the bending degree.

Benefits of technology

It achieves the effect of reducing the curvature of the wafer, has the advantages of simple operation and low cost, and avoids the risk of process errors.

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Abstract

The invention provides a method for reducing the bending degree of a wafer, and the method comprises the steps: providing a wafer, forming a stress thin film layer on a first surface of the wafer, and enabling the wafer to have the bending degree under the stress effect of the stress thin film layer; a first doped silicon oxide layer is formed on the second face of the wafer, the first doped silicon oxide layer contains first doped ions, and the first doped ions are active ions; and ion replacement is carried out on the first doped ions in the first doped silicon oxide layer to form a second doped silicon oxide layer, and the stress type of the second doped silicon oxide layer is the same as that of the stress thin film layer. According to the method for reducing the bending degree of the wafer, the first doped silicon oxide layer is firstly formed, then the first doped ions in the first doped silicon oxide layer are subjected to ion replacement to form the second doped silicon oxide layer, the stress of the wafer front process is counteracted through the stress of the second doped silicon oxide layer, the bending degree of the wafer is reduced, and the method has the advantages of being easy to operate, low in cost and the like. And the cost is low.
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Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors and relates to a method for reducing the curvature of a wafer. Background Art

[0002] During the manufacturing process, the wafer undergoes a series of processes such as cleaning / film deposition / etching / chemical mechanical polishing / heat treatment. The wafer is subjected to the stress generated by multiple processes, resulting in changes in the bow. This greatly increases the probability of process errors in process steps such as lithography / measurement that have strict requirements on the wafer bow.

[0003] At present, the main methods to improve the curvature of the wafer are: 1. Strictly control the stress value of the film layer deposition in each step, so as to control the stress of the wafer after the film layer is stacked, and then control the curvature of the wafer; 2. Deposit a combination of an oxide layer and a polysilicon layer or an oxide layer and a silicon nitride layer on the back of the wafer to improve stress; 3. After depositing a thin film on the back of the wafer, etch grooves or perform chemical mechanical polishing to release stress and improve the curvature of the wafer.

[0004] The existing methods for improving wafer curvature are complex to operate, the film layer deposited on the back of the wafer is thick, and the cost is high. There is an urgent need to find new methods to reduce wafer curvature. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for reducing wafer curvature, so as to solve the problems of complex operation and high cost in reducing wafer curvature in the prior art.

[0006] To achieve the above object and other related objects, the present invention provides a method for reducing wafer curvature, comprising the following steps:

[0007] Providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature;

[0008] forming a first doped silicon oxide layer on the second surface of the wafer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions;

[0009] The first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is the same as the stress type of the stress film layer.

[0010] Optionally, the first doping ions include P ions and / or B ions, and the first doped silicon oxide layer is formed by plasma enhanced chemical vapor deposition, wherein the reactants include PO(C2H5O)3 and / or B(C2H5O)3.

[0011] Optionally, the stress of the stressed film layer is compressive stress, the radius of the second doping ions is greater than the radius of the first doping ions, the second doping ions include Na ions and / or K ions, and the step of forming the second doped silicon oxide layer includes:

[0012] The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

[0013] Optionally, the stress of the stressed film layer is tensile stress, the radius of the second doped ions is smaller than the radius of the first doped ions, the second doped ions include N ions and / or S ions, and the step of forming the second doped silicon oxide layer includes:

[0014] The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

[0015] Optionally, after forming the second doped silicon oxide layer, an annealing step is also included.

[0016] The present invention also provides a method for reducing wafer curvature, comprising the following steps:

[0017] Providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature;

[0018] forming a first doped silicon oxide layer on the stressed film layer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions;

[0019] The first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is opposite to the stress type of the stress film layer.

[0020] Optionally, the first doping ions include P ions and / or B ions, and the first doped silicon oxide layer is formed by plasma enhanced chemical vapor deposition, wherein the reactants include PO(C2H5O)3 and / or B(C2H5O)3.

[0021] Optionally, the stress of the stressed film layer is compressive stress, the radius of the second doped ions is smaller than the radius of the first doped ions, the second doped ions include N ions and / or S ions, and the step of forming the second doped silicon oxide layer includes:

[0022] The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

[0023] Optionally, the stress of the stressed film layer is tensile stress, the radius of the second doping ions is greater than the radius of the first doping ions, the second doping ions include Na ions and / or K ions, and the step of forming the second doped silicon oxide layer includes:

[0024] The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

[0025] Optionally, after forming the second doped silicon oxide layer, an annealing step is also included.

[0026] As described above, in the method for reducing the curvature of a wafer of the present invention, a first doped silicon oxide layer is first formed, and then the first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer. The stress of the second doped silicon oxide layer is used to offset the stress of the wafer front process, thereby reducing the curvature of the wafer. The method has the advantages of simple operation and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Shown is a flow chart of a method for reducing wafer curvature in Embodiment 1 of the present invention.

[0028] Figure 2 Shown is a schematic diagram of providing a wafer in Embodiment 1 of the present invention.

[0029] Figure 3 It is a schematic diagram showing the formation of a first doped silicon oxide layer on the second surface of the wafer in the first embodiment of the present invention.

[0030] Figure 4 It is a schematic diagram showing the formation of a second doped silicon oxide layer on the second surface of the wafer in the first embodiment of the present invention.

[0031] Figure 5 Shown is a schematic diagram of providing a wafer in the second embodiment of the present invention.

[0032] Figure 6It is a schematic diagram showing a first doped silicon oxide layer formed on the second surface of the wafer in the second embodiment of the present invention.

[0033] Figure 7 It is a schematic diagram showing the formation of a second doped silicon oxide layer on the second surface of the wafer in the second embodiment of the present invention.

[0034] Figure 8 Shown is a flow chart of a method for reducing wafer curvature in Embodiment 3 of the present invention.

[0035] Fig. 9 Shown is a schematic diagram of providing a wafer in Embodiment 3 of the present invention.

[0036] Fig.10 It is a schematic diagram showing the formation of a first doped silicon oxide layer on the stress film layer in the third embodiment of the present invention.

[0037] Fig.11 It is a schematic diagram showing a third embodiment of the present invention in which a second doped silicon oxide layer is formed on the stress film layer.

[0038] Component number description

[0039] 1 Wafer

[0040] 2 Stress film layer

[0041] 3. First doped silicon oxide layer

[0042] 4. First doping ion

[0043] 5. Second doped silicon oxide layer

[0044] 6 Second doping ion

[0045] Steps S1 to S3 DETAILED DESCRIPTION

[0046] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0047] See also Figures 1 to 11 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0048] Embodiment 1

[0049] This embodiment provides a method for reducing the curvature of a wafer. Figure 1 , including the following steps:

[0050] S1: providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature;

[0051] S2: forming a first doped silicon oxide layer on the second surface of the wafer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions;

[0052] S3: performing ion replacement on the first doped ions in the first doped silicon oxide layer to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is the same as the stress type of the stress film layer.

[0053] The method for reducing wafer curvature of this embodiment is described in detail below with reference to specific drawings.

[0054] First, see Figure 2 , perform step S1: provide a wafer 1, the wafer 1 has a first surface and a second surface arranged opposite to each other, a stress film layer 2 is formed on the first surface of the wafer 1, and under the stress of the stress film layer 2, the wafer 1 has a curvature.

[0055] As an example, the first side of the wafer 1 is the front side of the wafer, and the second side of the wafer 1 is the back side of the wafer.

[0056] As an example, the stress film layer 2 can be a SiN layer, a USG layer in the wafer front processing process, or a thin film stack formed after a multi-step deposition process; the required functional layer can be formed between the wafer 1 and the stress film layer 2 according to device requirements.

[0057] As an example, in this embodiment, the stress film layer 2 is a compressive stress film layer. Due to the compressive stress of the stress film layer 2, the wafer 1 is curved with the center being higher than the edge.

[0058] Next, see Figure 3 , executing step S2: forming a first doped silicon oxide layer 3 on the second surface of the wafer 1, wherein the first doped silicon oxide layer 3 contains first doping ions 4, and the first doping ions 4 are active ions.

[0059] As an example, the first doped silicon oxide layer 3 is formed by plasma chemical vapor deposition (PECVD), and PECVD is easy to control film stress.

[0060] As an example, the first doping ions 4 include P ions and / or B ions. In the process of forming the first doped silicon oxide layer 3 by PECVD, the reactants include, in addition to precursors for forming silicon oxide such as silane, tetraethoxysilane, etc., precursors for providing the first doping ions 4 such as PO(C2H5O)3, B(C2H5O)3, etc.

[0061] As an example, in other examples, the first doping ions 4 may also be other suitable active ions other than P ions and B ions.

[0062] Next, see Figure 4 , execute step S3: perform ion replacement on the first doped ions 4 in the first doped silicon oxide layer 3 to form a second doped silicon oxide layer 5, wherein the second doped silicon oxide layer 5 contains second doped ions 6, wherein the stress of the second doped silicon oxide layer 5 is the same as the stress type of the stress film layer 2.

[0063] As an example, the first doping ion 4 is replaced by the second doping ion 6, and the radius of the second doping ion 6 is larger than the radius of the first doping ion 4, so that the second doped oxide layer 5 exhibits compressive stress, and the compressive stress of the second doped silicon oxide layer 5 offsets the compressive stress of the stress film layer 2 to reduce the stress on the wafer 1 and control the curvature of the wafer 1 within a certain range.

[0064] Specifically, in this embodiment, the second doping ions include Na ions and / or K ions, and the step of forming the second doped silicon oxide layer 5 includes: placing the structure after the first doped silicon oxide layer 3 is formed in a high concentration solution containing the second doping ions 6, and replacing the first doping ions 4 with the second doping ions 6 by using the concentration difference to form the second doping silicon oxide layer 5. For example, when the second doping ions 6 are Na ions, the ion replacement liquid is a sodium nitrate solution; when the second doping ions 6 are K ions, the ion replacement liquid is a potassium nitrate solution; when the second doping ions 6 are Na ions and K ions, the ion replacement liquid is a mixed solution of sodium nitrate and potassium nitrate; wherein, the concentration of the ion replacement liquid is less than 60%, and there is a sufficient concentration difference to facilitate ion replacement, and the ambient temperature of the ion replacement liquid is 380-450°C to accelerate the reaction speed.

[0065] As an example, pure silicon oxide has stable performance, and ion replacement cannot be completed by utilizing ion concentration difference. In this embodiment, the first doped oxide layer 3 is first formed. Since the first doped ions 4 in the first doped oxide layer 3 are active ions, they are easily replaced. Then, the “large radius ions” are replaced into the oxide layer by utilizing the ion concentration difference to form the second doped silicon oxide layer 5.

[0066] As an example, in other examples, the second doping ions 6 may also be ions of the same family other than Na ions and K ions, which are selected according to actual needs.

[0067] As an example, placing the structure after forming the first doped silicon oxide layer 3 before the ion replacement liquid also includes the step of forming a protective layer on the first side of the wafer 1, and the protective layer is used to prevent the front device functional layer of the wafer 1 from being replaced by ions and affecting the device performance.

[0068] As an example, after completing ion replacement to form the second doped silicon oxide layer 5, a rapid thermal annealing step is also included to ion-correct the second doped ions 6 in the second doped silicon oxide layer 5 so that the stress is further strengthened or released and the ion presence is stabilized without causing pollution.

[0069] As described above, in the method of reducing the curvature of the wafer of this embodiment, a first doped silicon oxide layer is first formed on the second side of the wafer, and then the first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer. The stress of the first side of the wafer is offset by the stress of the second doped silicon oxide layer, thereby reducing the curvature of the wafer. This method has the advantages of simple operation and low cost.

[0070] Embodiment 2

[0071] This embodiment provides a method for reducing wafer curvature, which is mainly different from the first embodiment in that the stress film layer 2 is a tensile stress film layer, and the second doped ions 6 in the second doped silicon oxide layer 5 are small radius ions.

[0072] Specifically, see Figures 5 to 7 , the difference between this embodiment and the first embodiment is described in detail.

[0073] As an example, Figure 5 As shown, the stress film layer 2 is in tensile stress. Due to the tensile stress of the stress film layer 2, the wafer 1 is bent with the center lower than the edge.

[0074] As an example, Figure 6 As shown, the first doped silicon oxide layer 3 is formed on the second surface of the wafer 1. The method for forming the first doped silicon oxide layer 3 can be found in the first embodiment, which will not be described in detail here.

[0075] As an example, Figure 7 As shown, the first doping ion 4 is replaced by the second doping ion 6, and the radius of the second doping ion 6 is smaller than the radius of the first doping ion 4, so that the second doped oxide layer 5 exhibits tensile stress, and the tensile stress of the second doped silicon oxide layer 5 offsets the tensile stress of the stress film layer 2 to reduce the stress on the wafer 1 and control the curvature of the wafer 1 within a certain range.

[0076] Specifically, in this embodiment, the second doping ions include N ions and / or S ions, and the step of forming the second doped silicon oxide layer 5 includes: placing the structure after the first doped silicon oxide layer 3 is formed in a high concentration solution containing the second doping ions 6, and replacing the first doping ions 4 with the second doping ions 6 by using the concentration difference to form the second doping silicon oxide layer 5. For example, when the second doping ions 6 are N ions, the ion replacement liquid is an ammonia solution; when the second doping ions 6 are S ions, the ion replacement liquid is a sulfuric acid solution.

[0077] As an example, the second doped silicon oxide layer 5 is formed by replacing “small radius ions” into the oxide layer through ion replacement, so that the second doped silicon oxide layer 5 is subjected to tensile stress.

[0078] As described above, in the method of reducing the curvature of the wafer of this embodiment, a first doped silicon oxide layer is first formed on the second side of the wafer, and then the first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer. The stress of the first side of the wafer is offset by the stress of the second doped silicon oxide layer, thereby reducing the curvature of the wafer. This method has the advantages of simple operation and low cost.

[0079] Embodiment 3

[0080] This embodiment provides a method for reducing the curvature of a wafer. Figure 8 , including the following steps:

[0081] S1: providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature;

[0082] S2: forming a first doped silicon oxide layer on the stressed film layer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions;

[0083] S3: performing ion replacement on the first doped ions in the first doped silicon oxide layer to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is opposite to the stress type of the stress film layer.

[0084] The method for reducing wafer curvature of this embodiment is described in detail below with reference to specific drawings.

[0085] First, see Fig. 9 , perform step S1: provide a wafer 1, the wafer 1 has a first surface and a second surface arranged opposite to each other, a stress film layer 2 is formed on the first surface of the wafer 1, and under the stress of the stress film layer 2, the wafer 1 has a curvature.

[0086] As an example, in this embodiment, the stress film layer 2 is a compressive stress film layer. Due to the compressive stress of the stress film layer 2, the wafer 1 is curved with the center being higher than the edge.

[0087] Next, see Fig.10 , executing step S2: forming a first doped silicon oxide layer 3 on the stress film layer 2, wherein the first doped silicon oxide layer 3 contains first doping ions 4, and the first doping ions 4 are active ions.

[0088] Specifically, the method for forming the first doped silicon oxide layer 3 can be found in the first embodiment, and will not be described in detail here.

[0089] Next, see Fig.11 , execute step S3: perform ion replacement on the first doped ions 4 in the first doped silicon oxide layer 3 to form a second doped silicon oxide layer 5, wherein the second doped silicon oxide layer 5 contains second doped ions 6, wherein the stress of the second doped silicon oxide layer 5 is opposite to the stress type of the stress film layer 2.

[0090] As an example, the second doped silicon oxide layer 5 has tensile stress, and the tensile stress of the second doped silicon oxide layer 5 offsets the compressive stress of the stress film layer 2 to reduce the stress on the wafer 1 and control the curvature of the wafer 1 within a certain range.

[0091] Specifically, the method for forming the second doped silicon oxide layer 5 with tensile stress can be found in the second embodiment, which will not be described in detail here.

[0092] As described above, in the method of reducing the curvature of the wafer of this embodiment, a first doped silicon oxide layer is first formed on the stress film layer of the wafer, and then the first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer. The stress of the stress film layer is offset by the stress of the second doped silicon oxide layer, thereby reducing the curvature of the wafer. This method has the advantages of simple operation and low cost.

[0093] Embodiment 4

[0094] This embodiment provides a method for reducing the curvature of a wafer, which differs from the third embodiment in that: the stress film layer 2 is tensile stress, and the second doped silicon oxide layer 5 above the stress film layer 2 is compressive stress. The compressive stress of the second doped silicon oxide layer 5 is offset by the tensile stress of the stress film layer 2 to reduce the stress on the wafer 1 and control the curvature of the wafer 1 within a certain range.

[0095] Specifically, the method for forming the second doped silicon oxide layer 5 with compressive stress can be found in the first embodiment, which will not be described in detail here.

[0096] As an example, the thickness of the first doped silicon oxide layer 3 formed by PECVD in the present invention is The stress is -500 to 500 Mpa. The second doped silicon oxide layer 5 is formed by performing ion replacement on the first doped silicon oxide layer 3. The second doped silicon oxide layer 5 with greater stress is formed to offset the stress of the wafer front process and reduce the curvature of the wafer.

[0097] In summary, in the method for reducing the curvature of the wafer of the present invention, a first doped silicon oxide layer is first formed, and then the first doped ions in the first doped silicon oxide layer are ion-replaced to form a second doped silicon oxide layer, and the stress of the second doped silicon oxide layer is used to offset the stress of the wafer front process, thereby reducing the curvature of the wafer, and the method has the advantages of simple operation and low cost. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0098] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for reducing wafer curvature, characterized in that: The following steps are involved: Providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature; forming a first doped silicon oxide layer on the second surface of the wafer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions; The first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is the same as the stress type of the stress film layer.

2. The method for reducing wafer curvature according to claim 1, characterized in that: The first doping ions include P ions and / or B ions, and the first doped silicon oxide layer is formed by plasma enhanced chemical vapor deposition, wherein the reactants include PO(C2H5O)3 and / or B(C2H5O)3.

3. The method for reducing wafer curvature according to claim 1, wherein: The stress of the stressed film layer is compressive stress, the radius of the second doped ions is greater than the radius of the first doped ions, the second doped ions include Na ions and / or K ions, and the step of forming the second doped silicon oxide layer includes: The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

4. The method for reducing wafer curvature according to claim 1, characterized in that: The stress of the stress film layer is tensile stress, the radius of the second doping ions is smaller than the radius of the first doping ions, the second doping ions include N ions and / or S ions, and the step of forming the second doped silicon oxide layer includes: The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

5. The method for reducing wafer curvature according to any one of claims 1 to 4, characterized in that: After forming the second doped silicon oxide layer, a rapid thermal annealing step is also included.

6. A method for reducing wafer curvature, characterized in that: The following steps are involved: Providing a wafer, wherein the wafer has a first surface and a second surface arranged opposite to each other, a stress film layer is formed on the first surface of the wafer, and under the stress of the stress film layer, the wafer has a curvature; forming a first doped silicon oxide layer on the stressed film layer, wherein the first doped silicon oxide layer contains first doping ions, and the first doping ions are active ions; The first doped ions in the first doped silicon oxide layer are ion replaced to form a second doped silicon oxide layer, wherein the second doped silicon oxide layer contains second doped ions, wherein the stress of the second doped silicon oxide layer is opposite to the stress type of the stress film layer.

7. The method for reducing wafer curvature according to claim 6, characterized in that: The first doping ions include P ions and / or B ions, and the first doped silicon oxide layer is formed by plasma enhanced chemical vapor deposition, wherein the reactants include PO(C2H5O)3 and / or B(C2H5O)3.

8. The method for reducing wafer curvature according to claim 6, characterized in that: The stress of the stress film layer is compressive stress, the radius of the second doping ions is smaller than the radius of the first doping ions, the second doping ions include N ions and / or S ions, and the step of forming the second doped silicon oxide layer includes: The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

9. The method for reducing wafer curvature according to claim 6, characterized in that: The stress of the stressed film layer is tensile stress, the radius of the second doped ions is greater than the radius of the first doped ions, the second doped ions include Na ions and / or K ions, and the step of forming the second doped silicon oxide layer includes: The structure after forming the first doped silicon oxide layer is placed in a solution containing the second doping ions, and the first doping ions are replaced by the second doping ions by utilizing the concentration difference to form the second doped silicon oxide layer.

10. The method for reducing wafer curvature according to any one of claims 6 to 9, characterized in that: After forming the second doped silicon oxide layer, a rapid thermal annealing step is also included.