Deep trench isolation structure and process method

By filling silicon oxide and polysilicon in a deep trench isolation structure in segments and optimizing the filling depth of the polysilicon bottom, the problem of insufficient peak electric field in the existing structure is solved, and the breakdown voltage is significantly improved.

CN119495631AActive Publication Date: 2025-02-21SHANGHAI HUAHONG GRACE SEMICON MFG CORP

Patent Information

Application Number
CN202411510045.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-28
Publication Date
2025-02-21
Estimated Expiration
2044-10-28

AI Technical Summary

Technical Problem

In the existing deep trench isolation structure, the peak electric field at the bottom of the polysilicon is insufficient, resulting in limited breakdown voltage increase.

Method used

A deep trench isolation structure is adopted with segmented filling. The lower part of the deep trench is filled with silicon oxide material and the upper part is filled with polysilicon material. The filling depth of the polysilicon bottom is optimized to shorten it to the bottom of the injection layer.

Benefits of technology

A higher peak electric field can be pulled up in the depletion zone, significantly increasing the breakdown voltage of the device. The simulation results show that the breakdown voltage is increased by 20%.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119495631A_ABST
    Figure CN119495631A_ABST
Patent Text Reader

Abstract

The invention discloses a deep trench isolation structure and a manufacturing process method thereof, an injection layer of a second conduction type is arranged on a substrate of a first conduction type, and a deep trap of the second conduction type is arranged on the injection layer; the surface layer of the deep well is provided with a shallow trench isolation structure, and the outer side of the shallow trench isolation structure is provided with a well region of a second conductive type; a deep trench is formed in the shallow trench isolation structure through etching; filling materials which are filled in sections are arranged in the deep grooves; wherein the lower part in the deep trench is filled with a silicon oxide material, and the upper part in the deep trench is filled with a polycrystalline silicon material; filling in the deep trench is divided into two sections of composite filling made of different materials, the portion located on the lower portion of the deep trench is made of silicon oxide, the portion located on the upper middle portion of the deep trench is made of polycrystalline silicon, the structure is further optimized, the bottom of DTI polycrystalline silicon is shortened to the position below an injection layer, the bottom of the DTI polycrystalline silicon can pull up a high peak electric field in a depletion region, and therefore the reliability of the deep trench is improved. And the breakdown voltage of the device is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device design and manufacturing, and in particular to a deep trench isolation structure.

[0002] The invention also relates to a manufacturing process method of the deep trench isolation structure. Background Art

[0003] Deep Trench Isolation (DTI) is an isolation technology used in integrated circuit manufacturing. It uses photolithography and etching techniques to form deep trenches that usually reach the silicon substrate, effectively preventing the device from Deep trench isolation DTI structure such as Figure 1 As shown, its main structure includes a deep trench filled with filler. The DTI trench penetrates the P-type epitaxy 103 and the N-type buried layer 102 and goes deep into the P-type substrate 101. The 104 area on the surface of the substrate is a shallow trench isolation STI, as well as an N-well 107 and an N-type heavily doped area 108 as a lead-out area. The P-type injection area 106 at the bottom of the DTI trench plays a role in preventing the N-type areas on both sides from punching through. The N-type areas on both sides of the DTI are led out through the N-type heavily doped area 108, one end is connected to a high potential, and the other end is connected to a low potential. The filling material in the DTI deep trench of the existing structure is polysilicon, and a peak electric field can be pulled up at the bottom of the polysilicon to increase the breakdown voltage. Fig. 9 As shown, the high potential end depletion region of the structure is located above the bottom of the DTI polysilicon, and cannot pull up an effective peak electric field, so the improvement of the breakdown voltage BV is limited. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a deep trench isolation structure.

[0005] The invention also provides a process method for the deep trench isolation structure.

[0006] In order to solve the above problems, a manufacturing process method of a deep trench isolation structure described in the present invention comprises the following process steps: Providing a semiconductor substrate of the first conductivity type, and performing ion implantation of the second conductivity type on the semiconductor substrate of the first conductivity type to form an implantation layer of the second conductivity type; Growing an epitaxial layer of a first conductivity type, and then implanting ions of a second conductivity type into the epitaxial layer to form a deep well of the second conductivity type in the epitaxial layer of the first conductivity type; Performing a first photolithography and etching to form a shallow trench isolation structure on the surface of the epitaxial layer; Performing high aspect ratio etching in the shallow trench isolation structure to form a deep trench, wherein the area of ​​the deep trench is smaller than that of the shallow trench isolation structure; performing ion implantation in the bottom substrate layer of the deep trench to form a first conductive type trench bottom implantation region; filling the deep trench twice, first filling the deep trench with a silicon oxide layer to form a lower portion of the deep trench; and then performing polysilicon filling to fill the remaining portion of the deep trench; The second photolithography opens an ion implantation window and performs ion implantation to form a well region of the second conductivity type outside the shallow trench isolation structure.

[0007] Furthermore, the semiconductor substrate is a silicon substrate, a silicon germanium substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate.

[0008] Furthermore, the injection layer is heavily doped with the second conductivity type to form a buried layer structure.

[0009] Furthermore, the first photolithography and etching are completed simultaneously using active area photolithography and filling processes; and silicon oxide material is filled in the shallow trench isolation structure.

[0010] Furthermore, the depth of the polysilicon filling in the deep trench needs to exceed the depth of the injection layer, that is, the depth of the polysilicon column filled in the deep trench exceeds the injection layer to reach the substrate.

[0011] Furthermore, it also includes selectively performing source-drain ion implantation to form a heavily doped region of the second conductivity type in the well region as a lead-out region; the source-drain ion implantation is a synchronous shared implantation when performing a source-drain region ion implantation process using the active region.

[0012] A deep trench isolation structure of the present invention comprises an injection layer of a second conductivity type on a substrate of a first conductivity type, and a deep well of the second conductivity type on the injection layer; A shallow trench isolation structure is provided on the surface layer of the deep well, and a well region of a second conductivity type is provided outside the shallow trench isolation structure; The shallow trench isolation structure has a deep trench formed by etching; the deep trench has a filling material filled in sections; the lower part of the deep trench is filled with silicon oxide material, and the upper part of the deep trench is filled with polysilicon material.

[0013] The bottom of the deep trench also has a trench bottom implantation region of the first conductivity type.

[0014] The downward filling depth of the polysilicon located in the upper part of the deep trench needs to exceed the second conductivity type injection layer to the substrate layer, that is, the filling height of the silicon oxide does not exceed the injection layer.

[0015] Furthermore, the first conductivity type mentioned above is P type, and the second conductivity type mentioned above is N type; when manufacturing opposite type devices, the first conductivity type and the second conductivity type can be inverted.

[0016] The deep trench isolation structure described in the present invention divides the filling in the deep trench into two sections of composite filling of different materials. The material located at the lower part of the deep trench is silicon oxide, and the material located at the upper part of the deep trench is polycrystalline silicon. The present invention will further optimize the structure, shorten the bottom of the DTI polycrystalline silicon to below the injection layer, and the bottom of the DTI polycrystalline silicon can pull up a higher peak electric field in the depletion region, thereby improving the breakdown voltage of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a cross-sectional schematic diagram of an existing DTI structure.

[0018] Figures 2 to 7 It is a schematic diagram of the process steps of the present invention.

[0019] Figure 8 It is a schematic diagram of the structure of the present invention.

[0020] Fig. 9 It is a breakdown voltage simulation curve diagram of the present invention and the existing structure.

[0021] Fig.10 It is a process flow chart of the present invention.

[0022] 101—P-type substrate, 102—N-type buried layer, 103—N-type deep well on P-type epitaxy, 104—shallow trench isolation, 105—deep trench isolation (polysilicon filling), 105-2—deep trench isolation (silicon dioxide filling), 106—P-type implantation, 107—N-well, 108—N-type heavily doped region. DETAILED DESCRIPTION

[0023] The following is a specific implementation of the present invention in conjunction with the accompanying drawings, and the technical solutions in the present invention are clearly and completely described, but the present invention is not limited to the following implementations. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. According to the following description and claims, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, which are only used to conveniently and clearly assist in explaining the embodiments of the present invention. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0024] The present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, for clarity, the size and relative size of the layers and zones may be exaggerated, and the same reference numerals represent the same elements from beginning to end. In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0025] The deep trench isolation structure described in the present invention has a structure as follows Figure 8 As shown, an N-type implantation layer 102 is provided on a P-type substrate 101, and the N-type implantation layer 102 is used as a buried layer. A P-type epitaxial layer is deposited on the buried layer 102, and N-type ion implantation is performed to form an N-type deep well 103.

[0026] A shallow trench isolation structure 104 is provided on the surface of the deep well 103 , and an N-type well region 107 is provided outside the shallow trench isolation structure. The N-type well region 107 has a heavily doped N-type region 108 as a lead-out region.

[0027] In the shallow trench isolation structure, a deep trench is formed by etching; the deep trench has a filling material filled in sections; wherein the lower part of the deep trench is filled with silicon oxide material 105 - 2, and the upper part of the deep trench is filled with polysilicon material 105.

[0028] The bottom of the deep trench also has a P-type trench bottom implantation region 106. The P-type trench bottom implantation region 106 can prevent the N-type regions on both sides of the deep trench from penetrating.

[0029] In the deep trench, the filling material, the downward filling depth of the upper polysilicon 105 must exceed the N-type buried layer 102 to the substrate layer 101, that is, the upward filling height of the silicon oxide 105 - 2 does not exceed the buried layer 102.

[0030] The well region 107 also has a heavily doped N-type region as a lead-out region 108 .

[0031] The above-mentioned manufacturing process method of the deep trench isolation structure includes the following process steps: First, a P-type semiconductor substrate 101 is provided. The substrate material is not limited, including but not limited to a silicon substrate, a silicon germanium substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate. N-type impurity ions are implanted on the P-type semiconductor substrate, such as phosphorus or arsenic ions, to form an N-type implantation layer as a buried layer 102. Figure 2 shown.

[0032] A P-type epitaxial layer is grown on the buried layer 102, and then high-energy N-type ions are implanted in the P-type epitaxial layer to form an N-type deep well 103 in the P-type epitaxial layer. Figure 3 shown.

[0033] Perform the first photolithography and etching to form a shallow trench isolation structure 104 on the surface of the epitaxial layer. Figure 4 As shown in Figure 1, the shallow trench is filled with silicon oxide material. This step is performed simultaneously with the active area lithography, that is, it shares the same steps, including the filling process.

[0034] A high aspect ratio etching is performed in the shallow trench isolation structure to form a deep trench. The area of ​​the deep trench is smaller than that of the shallow trench isolation structure, and the depth of the deep trench is to penetrate the buried layer directly into the substrate layer and penetrate a certain distance. Then, ion implantation is performed in the bottom substrate layer of the deep trench to form a P-type trench bottom implantation region 106, and the P-type trench bottom implantation region 106 can prevent the N-type regions on both sides of the deep trench from penetrating. After the trench bottom implantation region 106 is completed, the deep trench is filled.

[0035] The deep trench is filled twice. First, the silicon oxide layer 105-2 is filled in the deep trench to form the lower part of the deep trench. Then, the polysilicon 105 is filled to fill the remaining part of the upper part of the deep trench. It should be noted that the filling height of the silicon oxide 105-2 in the deep trench does not exceed the bottom surface of the buried layer 102, that is, the silicon oxide 105-2 is located in the substrate layer and does not reach the filling height of the buried layer. The polysilicon 105 penetrates the buried layer 102 to start filling, and fills the deep trench from the substrate layer 101 upwards. Figure 5 shown.

[0036] The second photolithography opens the ion implantation window and performs ion implantation to form an N-type well region 107 outside the shallow trench isolation structure. Figure 6 shown.

[0037] Selectively perform source and drain ion implantation to form an N-type heavily doped region in the well region 107 as the lead-out region 108; the source and drain ion implantation is a synchronous shared implantation when performing the source and drain ion implantation process in the active region. One side of the lead-out region 108 is a high voltage end, and the other side is a low voltage end, so as to achieve isolation. Figure 7and Figure 8 shown.

[0038] When it is desired to produce a device of the opposite type, the doping types of the above components can be reversed.

[0039] The deep trench isolation structure described in the present invention divides the filling in the deep trench into two sections of composite filling of different materials. The material located at the bottom of the deep trench is silicon oxide, and the material located at the upper middle of the deep trench is polysilicon. The present invention will further optimize the structure and shorten the bottom of the DTI polysilicon to below the N-type buried layer. The bottom of the DTI polysilicon can pull up a higher peak electric field in the depletion region, thereby increasing the breakdown voltage of the device. Fig. 9 As shown in the figure, after simulation, the electric field strength at the boundary of the longitudinal electric field depletion region is significantly improved, and the breakdown voltage of the new structure is increased by 20%.

[0040] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A manufacturing process method for a deep trench isolation structure, characterized in that: The process steps include: Providing a semiconductor substrate of the first conductivity type, and performing ion implantation of the second conductivity type on the semiconductor substrate of the first conductivity type to form an implantation layer of the second conductivity type; Growing an epitaxial layer of a first conductivity type, and then implanting ions of a second conductivity type into the epitaxial layer to form a deep well of the second conductivity type in the epitaxial layer of the first conductivity type; Performing a first photolithography and etching to form a shallow trench isolation structure on the surface of the epitaxial layer; Performing high aspect ratio etching in the shallow trench isolation structure to form a deep trench, wherein the area of ​​the deep trench is smaller than that of the shallow trench isolation structure; performing ion implantation in the bottom substrate layer of the deep trench to form a first conductive type trench bottom implantation region; filling the deep trench twice, first filling the deep trench with a silicon oxide layer to form a lower portion of the deep trench; and then performing polysilicon filling to fill the remaining portion of the deep trench; The second photolithography opens an ion implantation window and performs ion implantation to form a well region of the second conductivity type outside the shallow trench isolation structure.

2. The method for manufacturing a deep trench isolation structure according to claim 1, wherein: The semiconductor substrate is a silicon substrate, a silicon germanium substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate.

3. The method for manufacturing a deep trench isolation structure according to claim 1, wherein: The injection layer is heavily doped with the second conductivity type to form a buried layer structure.

4. The method for manufacturing a deep trench isolation structure according to claim 1, wherein: The first photolithography and etching are completed simultaneously by using active area photolithography and filling processes; the shallow trench isolation structure is filled with silicon oxide material.

5. The method for manufacturing a deep trench isolation structure according to claim 1, wherein: The depth of the polysilicon filling in the deep trench needs to exceed the depth of the injection layer, that is, the depth of the polysilicon column filled in the deep trench exceeds the injection layer and reaches the substrate.

6. The method for manufacturing a deep trench isolation structure according to claim 1, wherein: It also includes selectively performing source-drain ion implantation to form a heavily doped region of the second conductivity type in the well region as a lead-out region; the source-drain ion implantation is a synchronous shared implantation when performing a source-drain region ion implantation process using the active region.

7. The method for manufacturing a deep trench isolation structure according to any one of claims 1 to 6, characterized in that: The first conductivity type is P type, and the second conductivity type is N type; when manufacturing a device of opposite type, the first conductivity type and the second conductivity type can be inverted.

8. A deep trench isolation structure, characterized in that: An injection layer of a second conductivity type is provided on a substrate of a first conductivity type, and a deep well of the second conductivity type is provided on the injection layer; A shallow trench isolation structure is provided on the surface layer of the deep well, and a well region of a second conductivity type is provided outside the shallow trench isolation structure; The shallow trench isolation structure has a deep trench formed by etching; the deep trench has a filling material filled in sections; The lower part of the deep trench is filled with silicon oxide material, and the upper part of the deep trench is filled with polysilicon material.

9. The deep trench isolation structure according to claim 8, wherein: The semiconductor substrate includes a silicon substrate, a silicon germanium substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate.

10. The deep trench isolation structure according to claim 8, wherein: The bottom of the deep trench also has a trench bottom implantation region of the first conductivity type to prevent the second conductivity type regions on both sides of the deep trench from penetrating.

11. The deep trench isolation structure according to claim 8, wherein: The well region also has a heavily doped region as a lead-out region formed by synchronous injection of source and drain injection into the active region.

12. The deep trench isolation structure according to claim 8, wherein: The downward filling depth of the polysilicon located in the upper part of the deep trench needs to exceed the second conductivity type injection layer to the substrate layer, that is, the filling height of the silicon oxide does not exceed the injection layer.

13. The deep trench isolation structure according to any one of claims 8 to 12, characterized in that: The first conductivity type is P type, and the second conductivity type is N type; when manufacturing a device of opposite type, the first conductivity type and the second conductivity type can be inverted.

Citation Information

Patent Citations

  • Full-isolation N-type LDMOS device and preparation method thereof

    CN114883391A

  • Metal oxide field effect power transistor and process based on BCD integration

    CN118471979A

  • Deep trench isolation structures and methods of formation thereof

    US20060267134A1

  • Semiconductor device and fabrication method thereof

    US20240047460A1

  • Process for filling deep trenches with polysilicon and oxide

    US6054365A

Cited By

  • Bidirectional silicon controlled rectifier with composite groove terminal structure and preparation method of bidirectional silicon controlled rectifier

    CN121985547A

  • A bidirectional thyristor with a composite trench terminal structure and its fabrication method

    CN121985547B