Low-side switch circuit and control method thereof, low-side switch chip and electronic equipment

By introducing the first and second pull-down branches into the low-side switching circuit, and outputting pull-down currents in response to different enable signals, the problem of easy damage to the electronic devices of the low-side switching chip in the prior art is solved, and the misleading operation is achieved and the effect of risk of overvoltage damage.

CN119496496APending Publication Date: 2025-02-21HALO MICROELECTRONICS (BEIJING) LTD
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Patent Information

Application Number
CN202411426128.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-12
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

The electronic devices in the existing low-side switching chips are easily damaged, mainly because there is a parasitic capacitance connected to the control end of the first switch tube and the negative end of the load, resulting in an abnormal situation of misdirection.

Method used

A low-side switching circuit is designed, including a first switching tube, a first pull-down branch and a second pull-down branch. The risk of misdirection is reduced by configuring the first pull-down branch and the second pull-down branch to respond to different enable signals and output pull-down current when it is running.

Benefits of technology

By controlling the operation of the second pull-down branch in advance to reduce the total current, the risk of low-side switching circuits being damaged by overvoltage is reduced and the reliability of electronic devices is improved.

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Abstract

The invention discloses a low-side switch circuit and a control method thereof, a low-side switch chip and electronic equipment. The low-side switch circuit comprises a first switch tube, a first pull-down branch and a second pull-down branch, and the first pull-down branch is configured to operate or stop operating in response to a first enable signal and output a first pull-down current to discharge the control end of the first switch tube during operation. The second pull-down branch is configured to operate or stop operating in response to a second enable signal, and outputs a second pull-down current to discharge the control end of the first switching tube during operation of the second pull-down branch. The moment that the first pull-down branch starts to operate in response to the first enable signal is earlier than the moment that the second pull-down branch starts to operate in response to the second enable signal, or the moment that the first pull-down branch stops operating in response to the first enable signal is later than the moment that the second pull-down branch stops operating in response to the second enable signal. In this way, the risk that the electronic device is damaged can be reduced.
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Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of electronic circuits, and in particular to a low-side switch circuit and a control method thereof, a low-side switch chip, and an electronic device. Background Art

[0002] As a key component of the Electronic Control Unit (ECU), the switch chip is widely used in vehicle applications to control various loads, such as lights, heaters, motors, etc. Among them, the low-side switch chip includes a first switch tube, which is used to establish or disconnect the connection between the negative terminal of the load and the ground wire to achieve switch control of the load.

[0003] However, the probability of electronic devices in the current low-side switch chip being damaged is still relatively high. For example, due to the presence of parasitic capacitance between the control end of the first switch tube and the end connected to the negative end of the first switch tube and the load, the first switch tube may be mis-conducted abnormally, which may cause the electronic devices in the low-side switch chip to be damaged. Summary of the invention

[0004] The embodiments of the present application provide a low-side switch circuit and a control method thereof, a low-side switch chip and an electronic device, which can reduce the risk of damage to electronic devices.

[0005] In a first aspect, an embodiment of the present application provides a low-side switch circuit, wherein the low-side switch circuit is connected between a load and a ground, and the load is also connected to an input voltage bus, and the low-side switch circuit includes:

[0006] A first switch tube, wherein two ends of the non-control end of the first switch tube are connected between an output end and a ground, wherein the output end is an end of the low-side switch circuit connected to the load;

[0007] A first pull-down branch is connected between the control terminal of the first switch tube and ground, and is configured to operate or stop operating in response to a first enable signal, and output a first pull-down current to discharge the control terminal of the first switch tube when operating;

[0008] A second pull-down branch is connected between the control terminal of the first switch tube and ground, and is configured to operate or stop operating in response to a second enable signal, and output a second pull-down current to discharge the control terminal of the first switch tube when operating;

[0009] The time when the first pull-down branch starts to operate in response to the first enable signal is earlier than the time when the second pull-down branch starts to operate in response to the second enable signal, or the time when the first pull-down branch stops operating in response to the first enable signal is later than the time when the second pull-down branch stops operating in response to the second enable signal.

[0010] In one or more embodiments, the first enable signal and the system enable signal of the low-side switch circuit are complementary signals, and the second enable signal is a signal obtained by delaying the first enable signal for a first preset time period.

[0011] In one or more embodiments, the low-side switch circuit further includes:

[0012] The clamping branch is connected between the output end and the control end of the first switch tube, and is configured to clamp the voltage between the output end and the control end of the first switch tube to not exceed a first preset clamping voltage.

[0013] In one or more embodiments, the clamping branch includes at least one first diode and / or at least one first zener diode;

[0014] The anode of the first diode is connected to the output end, and the cathode of the first diode is connected to the control end of the first switch tube;

[0015] The anode of the first voltage stabilizing diode is connected to the control end of the first switch tube, and the cathode of the first voltage stabilizing diode is connected to the output end.

[0016] In one or more embodiments, the first pull-down branch includes a first controllable switch and a first current source;

[0017] The first controllable switch and the first current source are connected in series between the control end of the first switch tube and the ground. The first controllable switch is controlled by the first enable signal to be turned on or off.

[0018] In one or more embodiments, the second pull-down branch includes a second switch tube;

[0019] The control end of the second switch tube inputs the second enable signal, and two ends of the non-control end of the second switch tube are connected between the output end and the ground.

[0020] In one or more embodiments, the low-side switch circuit further includes:

[0021] an overvoltage protection branch, connected between the output terminal and ground and connected to the second pull-down branch, and configured to generate a first indication signal and output a second enable signal based on the voltage of the output terminal;

[0022] The second pull-down branch is also configured to run or stop running in response to the second enable signal when the voltage at the output terminal is less than a first preset voltage threshold, and is configured to remain stopped in response to the first indication signal when the voltage at the output terminal is greater than or equal to the first preset voltage threshold.

[0023] In one or more embodiments, when the voltage at the output end is greater than the first preset voltage threshold, the first indication signal is at a low level, and when the voltage at the output end is not greater than the first preset voltage threshold, the first indication signal is at a high level.

[0024] In one or more embodiments, the low-side switch circuit further includes:

[0025] an overcurrent protection branch, connected to the output end, the first pull-down branch and the second pull-down branch respectively, configured to generate a first detection signal representing a current flowing through the first switch tube when the first switch tube is turned on, and output the first enable signal based on the first detection signal, and when the first switch tube is in the on state, the second enable signal is the same signal as the first enable signal;

[0026] The first pull-down branch is further configured to operate in response to the first enable signal when the first detection signal is greater than a first preset threshold;

[0027] The second pull-down branch is further configured to operate in response to the second enable signal when the first detection signal is greater than the first preset threshold.

[0028] In one or more embodiments, the overcurrent protection branch includes a third switch tube, a first resistor and a first comparator;

[0029] The control end of the third switch tube is connected to the control end of the first switch tube, the two ends of the non-control end of the third switch tube are respectively connected to the output end and the non-inverting input end of the first comparator, the first resistor is connected between the non-inverting input end of the first comparator and the ground, the inverting input end of the first comparator inputs the second preset voltage threshold, and the output end of the first comparator outputs the first enable signal.

[0030] In one or more embodiments, the first comparator is a hysteresis comparator, and when the input voltage at the non-inverting input terminal of the first comparator rises to be greater than the second preset voltage threshold, the first enable signal is flipped from a low level to a high level, and when the input voltage at the non-inverting input terminal of the first comparator drops to be less than a third preset voltage threshold, the first enable signal is flipped from a high level to a low level, wherein the third preset voltage threshold is lower than the second preset voltage threshold.

[0031] In one or more embodiments, the low-side switch circuit further includes:

[0032] an overvoltage protection branch, connected between the output terminal and ground and connected to the second pull-down branch, and configured to generate a first indication signal based on the voltage of the output terminal and output a second enable signal, wherein when the voltage of the output terminal is greater than or equal to a first preset voltage threshold, the second enable signal and the first indication signal are the same signal;

[0033] The second pull-down branch is further configured to stop operating in response to the first indication signal when the voltage at the output terminal is greater than or equal to the first preset voltage threshold.

[0034] In one or more embodiments, the overvoltage protection branch includes a clamping unit, a switch unit and an AND gate;

[0035] The clamping unit is connected between the output end and the switch unit, and the switch unit is also connected to the first input end of the AND gate to output the first indication signal to the first input end of the AND gate, the output end of the AND gate is connected to the second pull-down branch, and the second input end of the AND gate inputs the signal after the first enable signal is delayed by a first preset time length or the first enable signal;

[0036] The clamping unit is configured to be turned off when the voltage at the output end is less than the first preset voltage threshold, and to be turned on when the voltage at the output end is greater than or equal to the first preset voltage threshold;

[0037] The switch unit is configured to configure the first indication signal to a high level when the clamp unit is turned off, and to configure the first indication signal to a low level when the clamp unit is turned on.

[0038] In one or more embodiments, the clamping unit includes at least one second diode and / or at least one second Zener diode;

[0039] An anode of the second diode is connected to the output end, and a cathode of the second diode is connected to the switch unit;

[0040] An anode of the second voltage stabilizing diode is connected to the switch unit, and a cathode of the second voltage stabilizing diode is connected to the output end.

[0041] In one or more embodiments, the switch unit includes a second resistor, a third resistor, a fourth resistor and a fourth switch tube;

[0042] The second resistor and the third resistor are connected in series between the clamping unit and the ground, the connection point between the second resistor and the third resistor is connected to the control end of the fourth switch tube, both ends of the non-control end of the fourth switch tube are connected between the first input end of the AND gate and the ground, and the fourth resistor is connected between the first power supply and the first input end of the AND gate.

[0043] In a second aspect, an embodiment of the present application provides a control method for a low-side switch circuit, wherein the low-side switch circuit includes a first switch tube, a first pull-down branch, and a second pull-down branch, wherein both ends of a non-control end of the first switch tube are connected between an output end and a ground, the output end is connected to an input voltage bus through a load, and the first pull-down branch and the second pull-down branch are both connected between a control end of the first switch tube and a ground, and the control method includes:

[0044] Controlling the first pull-down branch to operate so as to output a first pull-down current to discharge the control end of the first switch tube;

[0045] After a first preset time period has passed since the first pull-down branch starts to operate, the second pull-down branch is controlled to operate so as to output a second pull-down current to discharge the control end of the first switch tube.

[0046] In a third aspect, an embodiment of the present application provides a control method for a low-side switch circuit, wherein the low-side switch circuit includes a first switch tube, a first pull-down branch, and a second pull-down branch, wherein both ends of a non-control end of the first switch tube are connected between an output end and a ground, the output end is connected to an input voltage bus through a load, and the first pull-down branch and the second pull-down branch are both connected between a control end of the first switch tube and a ground, and the control method includes:

[0047] When the first switch tube is in an on state, obtaining a first current flowing through the first switch tube and a voltage at an output end;

[0048] When the first current is greater than a first preset current threshold, controlling the first pull-down branch and the second pull-down branch to operate, so as to output the first pull-down current and the second pull-down current to discharge the control end of the first switch tube;

[0049] Afterwards, when the voltage at the output end is greater than a second preset voltage threshold, the second pull-down branch is controlled to stop operating.

[0050] In one or more embodiments, the method further comprises:

[0051] When the voltage at the output end is less than or equal to a second preset voltage threshold, and the first current rises to be greater than the first preset current threshold, controlling the first pull-down branch and the second pull-down branch to operate;

[0052] Afterwards, when the voltage at the output end is greater than the second preset voltage threshold, controlling the second pull-down branch to stop operating;

[0053] When the first current decreases to be less than a second preset current threshold, the first pull-down branch and the second pull-down branch are controlled to stop running, wherein the second preset current threshold is less than the first preset current threshold.

[0054] In a fourth aspect, an embodiment of the present application provides a low-side switch chip, comprising the low-side switch circuit as described above.

[0055] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising a load and the low-side switch chip as described above.

[0056] The beneficial effect of the present application is that the low-side switch circuit of the embodiment of the present application includes a first switch tube, a first pull-down branch and a second pull-down branch. The two ends of the non-control end of the first switch tube are connected between the output end and the ground, wherein the output end is one end of the low-side switch circuit connected to the load. The first pull-down branch is connected between the control end of the first switch tube and the ground, and the first pull-down branch is configured to operate or stop operating in response to the first enable signal, and output a first pull-down current to discharge the control end of the first switch tube when it is operating. The second pull-down branch is connected between the control end of the first switch tube and the ground, and is configured to operate or stop operating in response to the second enable signal, and output a second pull-down current to discharge the control end of the first switch tube when it is operating. Among them, the time when the first pull-down branch starts to operate in response to the first enable signal is earlier than the time when the second pull-down branch starts to operate in response to the second enable signal, thereby reducing the risk of the first switch tube being mis-conducted, so as to reduce the risk of damage to the electronic device. Alternatively, the time when the first pull-down branch stops operating in response to the first enable signal is later than the time when the second pull-down branch stops operating in response to the second enable signal. Thus, when the total current provided by the first pull-down branch and the second pull-down branch is too large, the risk of damage to the low-side switch circuit due to overvoltage can be reduced by controlling the operation of the second pull-down branch in advance to reduce the total current. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] One or more embodiments are exemplarily described by the figures in the corresponding drawings, and these exemplary descriptions are not intended to limit the embodiments. Elements with the same reference numerals in the drawings represent similar elements.

[0058] Figure 1 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 1 ;

[0059] Figure 2The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 2 ;

[0060] Figure 3 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 3 ;

[0061] Figure 4 is with Figure 3 A schematic diagram of a circuit structure corresponding to the structure shown;

[0062] Figure 5 Schematic diagrams of three circuit structures of clamping branches provided in embodiments of the present application;

[0063] Figure 6 yes Figure 4 A schematic diagram of each signal in the circuit structure shown;

[0064] Figure 7 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 4 ;

[0065] Figure 8 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 5 ;

[0066] Fig. 9 is with Figure 8 A schematic diagram of a circuit structure corresponding to the structure shown;

[0067] Fig.10 Schematic diagrams of three circuit structures of the clamping unit provided in the embodiments of the present application;

[0068] Fig.11 yes Fig. 9 A schematic diagram of each signal in the circuit structure shown;

[0069] Fig.12 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 6 ;

[0070] Fig.13 is with Fig.12 The circuit structure corresponding to the structure shown is shown in FIG. Figure 1 ;

[0071] Fig.14 is with Fig.12 The circuit structure corresponding to the structure shown is shown in FIG. Figure 2 ;

[0072] Fig.15 yes Fig.14 A schematic diagram of each signal in the circuit structure shown;

[0073] Fig.16 The structure of the low-side switch circuit provided in the embodiment of the present application is shown in FIG. Figure 7 ;

[0074] Fig.17 is with Fig.16 A schematic diagram of a circuit structure corresponding to the structure shown;

[0075] Fig.18 yes Fig.17 A schematic diagram of each signal in the circuit structure shown;

[0076] Fig.19 The process of the control method of the low-side switch circuit provided by the embodiment of the present application is Figure 1 ;

[0077] Fig. 20 The process of the control method of the low-side switch circuit provided by the embodiment of the present application is Figure 2 . DETAILED DESCRIPTION

[0078] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and in detail in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0079] It should be noted that, when an element is described as being “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.

[0080] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.

[0081] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the low-side switch circuit provided in the embodiment of the present application. Figure 1 As shown, the low-side switch circuit 100 is connected between a load 200 and a ground GND, and the load 200 is also connected to an input voltage bus VIN. The low-side switch circuit 100 includes a first switch tube Q1 , a first pull-down branch 10 , and a second pull-down branch 20 .

[0082] Wherein, both ends of the non-control end of the first switch tube Q1 are connected between the output end VOUT and the ground GND, wherein the output end VOUT is one end of the low-side switch circuit 100 connected to the load 200. In some embodiments, the first switch tube Q1 is an NMOS tube, the control end of the first switch tube Q1 is the gate of the NMOS tube, the first end of the non-control end of the first switch tube Q1 is the source of the NMOS tube, and the second end of the non-control end of the first switch tube Q1 is the drain of the NMOS tube. The first pull-down branch 10 is connected between the control end of the first switch tube Q1 and the ground GND. The second pull-down branch 20 is connected between the control end of the first switch tube Q1 and the ground GND.

[0083] The various embodiments of the present application are described by taking the first switch tube Q1 as an NMOS tube as an example. Of course, in other embodiments, the first switch tube Q1 can also be other controllable switches, such as a PMOS tube, etc. The specific implementation process is similar to that of the NMOS tube.

[0084] Specifically, the first pull-down branch 10 is configured to operate or stop operating in response to the first enable signal EN1. The first pull-down branch 10 is also configured to output a first pull-down current IA1 to discharge the control end of the first switch tube Q1 when the first pull-down branch 10 is operating. The second pull-down branch 20 is configured to operate or stop operating in response to the second enable signal EN2. The second pull-down branch 20 is also configured to output a second pull-down current IA2 to discharge the control end of the first switch tube Q1 when the second pull-down branch 20 is operating. Among them, by discharging the control end of the first switch tube Q1, the first switch tube Q1 can be turned off.

[0085] In some embodiments, the first pull-down branch 10 starts to operate in response to the first enable signal EN1 earlier than the second pull-down branch 20 starts to operate in response to the second enable signal EN2. The control end of the first switch tube Q1 is first discharged by the first pull-down current IA1, and then the control end of the first switch tube Q1 is discharged or maintained to be pulled down by the second pull-down current IA2.

[0086] By discharging the control end of the first switch tube Q1, the first switch tube Q1 can be turned off, and as the first switch tube Q1 is turned off, the voltage of the output terminal VOUT gradually increases. For the low-side switch circuit 100, there are often specific requirements for the rising slope of the voltage at the output terminal VOUT (i.e., the drain of the first switch tube Q1). Based on the above reasons, the current discharged to the gate of the first switch tube Q1 needs to be kept stable and should not be too large, but this will result in insufficient strength to pull down the gate of the first switch tube Q1, which may cause mis-conduction of the first switch tube Q1 in some applications. For example, when the low-side switch circuit 100 is used as the lower tube of the bridge drive circuit, the voltage at the output terminal VOUT may have a large voltage step (dv / dt), such as when the load 200 is a switch tube and is configured to be turned on, the voltage at the output terminal VOUT may have a large voltage step. The step signal applied to the drain of the first switch tube Q1 is coupled to the gate of the first switch tube 10 through the parasitic capacitance Cgd between the drain and the gate of the first switch tube 10, and causes the gate voltage of the first switch tube 10 to rise. Since the low-side switch circuit 100 is configured to first discharge the control terminal of the first switch tube Q1 through the first pull-down current IA1, when the first pull-down current IA1 is less than the pull-up current induced by the step signal on the parasitic capacitance Cgd, the first switch tube Q1 will be turned on (i.e., an abnormal mis-turn-on condition occurs). At this time, since the load 200 is a switch tube and has been configured to be turned on, the input voltage bus VIN will be short-circuited to the ground, and even the load 200 or the components in the low-side switch circuit 100 may be damaged. Based on this, the embodiment of the present application is further configured to discharge the control end of the first switch tube Q1 through the second pull-down current IA2. Thus, after the first pull-down current IA1 discharges the control end of the first switch tube Q1 and turns off the first switch tube Q1, the pull-down capacity is increased by the second pull-down current IA2, which can prevent the switch tube Q1 from being turned on again due to the transient change of its drain voltage, which is beneficial to preventing the first switch tube Q1 from being mis-turned on, thereby reducing the risk of damage to electronic devices.

[0087] In other embodiments, the first pull-down branch 10 stops operating in response to the first enable signal EN1 later than the second pull-down branch 20 stops operating in response to the second enable signal EN2. When both the first pull-down branch 10 and the second pull-down branch 20 are operating, the second pull-down branch 20 is first controlled to stop operating to stop outputting the second pull-down current IA2; then, the first pull-down branch 10 is controlled to stop operating to stop outputting the first pull-down current IA1. Thus, when the total current provided by the first pull-down branch IA1 and the second pull-down branch IA2 is too large, the probability of electronic devices being damaged can be reduced by controlling the second pull-down branch IA2 to operate in advance to reduce the total current. It can be understood that in this embodiment, the first pull-down branch 10 starts operating in response to the first enable signal EN1 no later than the second pull-down branch 20 starts operating in response to the second enable signal EN2.

[0088] In some embodiments, Figure 2 As shown, the first enable signal EN1 and the system enable signal EN_IN of the low-side switch circuit 100 are complementary signals, and the second enable signal EN2 is a signal after the first enable signal EN1 is delayed by a first preset time length, that is, the time interval between the moment when the first pull-down branch 10 starts to operate in response to the first enable signal EN1 and the moment when the second pull-down branch 20 starts to operate in response to the second enable signal EN2 is the first preset time length. The first preset time length can be set based on the actual application scenario, and the embodiment of the present application does not impose specific restrictions on this.

[0089] Among them, the system enable signal EN_IN of the low-side switch circuit 100 is used to control the enablement of the chip including the low-side switch circuit 100. For example, in some embodiments, the chip including the low-side switch circuit 100 is provided with peripheral circuits such as an internal power supply circuit and an oscillation circuit, and the system enable signal EN_IN is used to control the enablement of these peripheral circuits. Of course, the system enable signal EN_IN is also used to control the enablement of the first switch tube Q1, that is, to control the first switch tube Q1 to be turned on or off. For example, in some embodiments, when the system enable signal EN_IN is at a high level, the first switch tube Q1 is turned on.

[0090] In some implementations, such as Figure 3 As shown, the low-side switch circuit 100 further includes a clamping branch 30. The clamping branch 30 is connected between the output terminal VOUT and the control terminal of the first switch tube Q1.

[0091] Specifically, the clamping branch 30 is configured to clamp the voltage between the output terminal VOUT and the control terminal of the first switch tube Q1 to not exceed the first preset clamping voltage. That is, limited by the clamping branch 30, the voltage between the output terminal VOUT and the control terminal of the first switch tube Q1 is less than or equal to the first preset clamping voltage. When the voltage between the output terminal VOUT and the control terminal of the first switch tube Q1 increases to be greater than the first preset clamping voltage, the clamping branch 30 can clamp the voltage between the output terminal VOUT and the control terminal of the first switch tube Q1 to the first preset clamping voltage. Among them, the first preset clamping voltage is determined by the characteristics of the clamping branch 30, and can be specifically set based on the actual application scenario.

[0092] Please refer to Figure 4 , Figure 4 For Figure 3 The circuit structure diagram corresponding to the structure shown in FIG. Figure 4 As shown, the clamping branch 30 includes a voltage regulator diode Z1, wherein an anode of the voltage regulator diode Z1 is connected to the control end of the first switch tube Q1, and a cathode of the voltage regulator diode Z1 is connected to the output end VOUT.

[0093] In this embodiment, the first pull-down branch 10 includes a first controllable switch K1 and a first current source I1 .

[0094] The first controllable switch K1 and the first current source I1 are connected in series between the control terminal of the first switch tube Q1 and the ground GND, and the first controllable switch K1 is turned on or off by the first enable signal EN1. The current provided by the first current source I1 is the first pull-down current IA1.

[0095] In this embodiment, the second pull-down branch 20 includes a second switch tube Q2.

[0096] The control end of the second switch tube Q2 is input with the second enable signal EN2, and two ends of the non-control end of the second switch tube Q2 are connected between the output end VOUT and the ground GND.

[0097] Each embodiment of the present application is described by taking the second switch tube Q2 as an NMOS tube as an example, the control end of the second switch tube Q2 is the gate of the NMOS tube, the first end of the non-control end of the second switch tube Q2 is the source of the NMOS tube, and the second end of the non-control end of the second switch tube Q2 is the drain of the NMOS tube. Of course, in other embodiments, the second switch tube Q2 can also be other controllable switches, such as a PMOS tube, etc., and the specific implementation process is similar to that of the NMOS tube.

[0098] exist Figure 4In the embodiment, when the low-side switch circuit 100 needs to control the first switch tube Q1 to turn off, the first enable signal EN1 changes from a low level to a high level, and the first controllable switch K1 is controlled to be turned on, so that the first pull-down current IA1 discharges the gate of the first switch tube Q1 to turn off the first switch tube Q1. After a first preset time period (including after the first switch tube Q1 is turned off) when the first enable signal EN1 changes from a low level to a high level, the second enable signal EN2 changes from a low level to a high level, and the second switch tube Q2 is turned on to provide a second pull-down current IA2, thereby increasing the pull-down capability and preventing the first switch tube Q1 from turning on again due to a transient change in its drain voltage after being turned off. In summary, by selectively adding the second pull-down branch 20 on the basis of the operation of the first pull-down branch 10, the protection of the low-side switch circuit 100 can be enhanced in the scenario where voltage dynamics appear at the output terminal VOUT. The Zener diode Z1 is used to clamp the voltage difference between the drain and the gate of the first switch tube Q1. When the voltage difference between the drain and the gate of the first switch tube Q1 increases to the point where the Zener diode Z1 breaks down, the voltage difference between the drain and the gate of the first switch tube Q1 is clamped to a first preset clamping voltage.

[0099] Please refer to Figure 5 , Figure 5 Three other implementations of the clamping branch 30 provided in the embodiment of the present application are shown in FIG. Figure 5 As shown in part a of FIG. 3 , the clamping branch 30 includes at least one first diode, and the at least one first diode includes a first first diode DA1, a second first diode DA2, ..., and an mth first diode DAm, where m is an integer greater than or equal to 1. The anode of the first first diode DA1, the anode of the second first diode DA2, ..., and the anode of the mth first diode DAm are all indirectly or directly connected to the output terminal VOUT; the cathode of the first first diode DA1, the cathode of the second first diode DA2, ..., and the cathode of the mth first diode DAm are all indirectly or directly connected to the control terminal of the first switch tube Q1.

[0100] like Figure 5 As shown in part b of the figure, the clamping branch 30 includes at least one first Zener diode, and the at least one first Zener diode includes a first first Zener diode ZA1, a second first Zener diode ZA2, ..., and a kth first Zener diode ZAk, where k is an integer greater than or equal to 1. The anode of the first first Zener diode ZA1, the anode of the second first Zener diode ZA2, ..., and the anode of the kth first Zener diode ZAk are all indirectly or directly connected to the control end of the first switch tube Q1; the cathode of the first first Zener diode ZA1, the cathode of the second first Zener diode ZA2, ..., and the cathode of the kth first Zener diode ZAk are all indirectly or directly connected to the output end VOUT.

[0101] like Figure 5 As shown in part c of FIG. 1 , the clamping branch 30 includes at least one first diode and at least one first voltage-stabilizing diode. At this time, the clamping branch 30 includes Figure 5 For details on the contents of parts a and b in the Figure 5 The description of parts a and b in the description will not be repeated here.

[0102] Please refer to Figure 6 , Figure 6 An example is shown Figure 4 Schematic diagram of each signal in the circuit structure shown. Figure 6 In the figure, the horizontal axis is time; the vertical axis curves from top to bottom are respectively the system enable signal EN_IN of the low-side switch circuit 100, the first enable signal EN1, the second enable signal EN2, the current IQ1 flowing through the first switch tube Q1, and the voltage VO1 of the output terminal VOUT; the dotted lines parallel to the horizontal axis are respectively the peak value IQ1_pk of the current IQ1, the reference of the current IQ1 being 0, the clamping voltage Vclamp, and the voltage of the input voltage bus VCC from top to bottom. In addition, this embodiment takes the load 200 as an inductive load, and the first enable signal EN1 and the system enable signal EN_IN of the low-side switch circuit 100 as complementary signals as an example.

[0103] like Figure 6As shown, at time t10, the first switch tube Q1 is in the off state, and the voltage VO1 of the output terminal VOUT is the voltage of the input voltage bus VCC. At time t11, the system enable signal EN_IN turns to a high level, and the first switch tube Q1 is controlled to be turned on. Correspondingly, the first enable signal EN1 turns to a low level, and the first controllable switch K1 is turned off. The voltage VO1 of the output terminal VOUT drops rapidly, and the current IQ1 flowing through the first switch tube Q1 increases linearly, and the slope of the increase of the current IQ1 is VCC / Lout, where Lout is the inductance value of the inductive load. At time t12, the system enable signal EN_IN turns to a low level, the first enable signal EN1 turns to a high level, the first switch tube Q1 is controlled to start turning off, and the first pull-down branch 10 outputs the first pull-down current IA1 for gate discharge of the first switch tube Q1. Until time t13, the first switch tube Q1 is completely turned off, and the current IQ1 reaches its peak value IQ1_pk. As the first switch tube Q1 is turned off, the current stored in the inductive load begins to push the voltage VO1 of the output terminal VOUT up to the clamping voltage Vclamp of the Zener diode Z1. At this time, the Zener diode Z1 is reversely broken down, and the first pull-down branch 10 discharges the inductive load, and the current IQ1 begins to decrease. At time t14, after a delay of the first preset time length td, with the arrival of the rising edge of the second enable signal EN2, the second pull-down branch 20 is enabled, that is, the second switch tube Q2 is turned on. In this way, the second pull-down current IA2 flowing through the second pull-down branch 20 is superimposed on the first pull-down current IA1 flowing through the first pull-down branch 10, so that the current flowing through the Zener diode Z1 is significantly increased. Since the clamping voltage of the Zener diode Z1 after the breakdown increases with the increase of the current flowing through the Zener diode Z1, the voltage VO of the output terminal VOUT will also quickly raise the voltage ΔV with the operation of the second pull-down branch 20. This also makes the first switch tube Q1 need to withstand a voltage higher than the clamping voltage Vclamp of the voltage zener diode Z1, causing an overvoltage risk. At time t15, as the discharge of the inductive load is completed, the current IQ1 drops to 0, and the voltage VO1 of the output terminal VOUT drops rapidly, returning to the voltage of the input voltage bus VCC after several oscillations.

[0104] Based on the above Figure 6 The description is available, Figure 4 The circuit structure shown may cause the first switch tube Q1 to be damaged due to overvoltage. Based on this, the embodiment of the present application further sets an overvoltage protection branch to reduce the risk of damage to the first switch tube Q1 due to overvoltage. Specifically, in some embodiments, such as Figure 7 As shown, the low-side switch circuit 100 further includes an overvoltage protection branch 40 . The overvoltage protection branch 40 is connected between the output terminal VOUT and the ground GND, and is connected to the second pull-down branch 20 .

[0105] Specifically, the overvoltage protection branch 40 is configured to generate a first indication signal S1 based on the voltage of the output terminal VOUT and output a second enable signal EN2 to the second pull-down branch 20. The second pull-down branch 20 is also configured to operate or stop operating in response to the second enable signal EN2 when the voltage of the output terminal VOUT is less than the first preset voltage threshold, and is configured to remain stopped in response to the first indication signal S1 (at this time, the second enable signal EN2 and the first indication signal S1 are the same signal) when the voltage of the output terminal VOUT is greater than or equal to the first preset voltage threshold. In this embodiment, by setting the overvoltage protection circuit 40 to detect the voltage of the output terminal VOUT in real time, it is actually also to detect the drain-source voltage difference (the voltage difference between the drain and the source) of the first switch tube Q1 in real time, thereby enabling the second pull-down branch 20 only when the drain-source voltage difference of the first switch tube Q1 is less than the first preset voltage threshold, so that the second pull-down branch 20 operates. Thus, the overvoltage risk of the first switch tube Q1 caused by enabling the second pull-down branch 20 during the period when the drain-source voltage difference reaches the clamping voltage Vclamp can be avoided. The first preset voltage threshold can be set according to the actual application scenario, and this application does not impose specific restrictions on this, but it is required to satisfy that the first preset voltage threshold is less than or equal to the clamping voltage Vclamp.

[0106] In some embodiments, when the voltage of the output terminal VOUT is greater than the first preset voltage threshold, the first indication signal S1 is at a low level, and when the voltage of the output terminal VOUT is not greater than the first preset voltage threshold, the first indication signal S1 is at a high level.

[0107] In some embodiments, Figure 8 As shown, the overvoltage protection branch 40 includes a clamp unit 41, a switch unit 42 and an AND gate AND1. The clamp unit 41 is connected between the output terminal VOUT and the switch unit 42, and the switch unit 42 is also connected to the first input terminal of the AND gate AND1 to output the first indication signal S1 to the first input terminal of the AND gate AND1, the output terminal of the AND gate AND1 is connected to the second pull-down branch 20, and the second input terminal of the AND gate AND1 inputs the signal EN1_DL after the first enable signal EN1 is delayed by the first preset time length.

[0108] Specifically, the clamp unit 41 is configured to be turned off when the voltage of the output terminal VOUT is less than the first preset voltage threshold, and to be turned on when the voltage of the output terminal VOUT is greater than or equal to the first preset voltage threshold. The switch unit 42 is configured to configure the first indication signal S1 to a high level when the clamp unit 41 is turned off, so that the second enable signal EN2 is a signal EN1_DL after the first enable signal EN1 is delayed by a first preset time length. The second switch tube Q2 can be turned on or off in response to the second enable signal EN2 (i.e., the signal EN1_DL) (i.e., the corresponding second pull-down branch 20 can operate or stop operating in response to the second enable signal EN2); the switch unit 42 is also configured to configure the first indication signal S1 to a low level when the clamp unit 41 is turned on, and the second enable signal EN2 is also kept at a low level, so that the second switch tube Q2 remains turned off in response to the first indication signal S1 (i.e., the corresponding second pull-down branch 20 remains stopped in response to the first indication signal S1).

[0109] Please refer to Fig. 9 , Fig. 9 For Figure 8 A circuit structure corresponding to the structure shown in FIG. 1 . The first pull-down branch 10, the second pull-down branch 20 and the clamping branch 30 are connected to the Figure 4 This embodiment also exemplarily shows a circuit structure when the load 200 is an inductive load, that is, the load 200 includes an inductor LL and a resistor RL connected in series between the input voltage bus VIN and the output terminal VOUT.

[0110] like Fig. 9 As shown, the clamping unit 41 includes a voltage stabilizing diode Z2, wherein an anode of the voltage stabilizing diode Z2 is connected to the switch unit 42, and a cathode of the voltage stabilizing diode Z2 is connected to the output terminal VOUT.

[0111] In this embodiment, the switch unit 42 includes a second resistor R2, a third resistor R3, a fourth resistor R4 and a fourth switch tube Q4. The second resistor R2 and the third resistor R3 are connected in series between the clamp unit 41 and the ground GND, the connection point between the second resistor R2 and the third resistor R3 is connected to the control end of the fourth switch tube Q4, the two ends of the non-control end of the fourth switch tube Q4 are connected between the first input end of the AND gate AND1 and the ground GND, and the fourth resistor R4 is connected between the first power supply VDD and the first input end of the AND gate AND1, wherein the first power supply VDD is the internal power supply of the low-side switch chip.

[0112] Each embodiment of the present application is described by taking the fourth switch tube Q4 as an NMOS tube as an example, the control end of the fourth switch tube Q4 is the gate of the NMOS tube, the first end of the non-control end of the fourth switch tube Q4 is the source of the NMOS tube, and the second end of the non-control end of the fourth switch tube Q4 is the drain of the NMOS tube. Of course, in other embodiments, the fourth switch tube Q4 can also be other controllable switches, such as a PMOS tube, etc., and the specific implementation process is similar to the implementation process of the NMOS tube.

[0113] exist Fig. 9 In the embodiment, the voltage regulator diode Z2 can be used to detect the drain-source voltage difference of the first switch tube Q1, and is turned on when the drain-source voltage difference of the first switch tube Q1 exceeds the first preset voltage threshold. Then, the current flowing through the voltage regulator diode Z2 generates a voltage on the third resistor R3 to turn on the fourth switch tube Q4, so as to pull down the first indication signal S1. Then, the second pull-down branch 20 can be disabled, that is, the second pull-down branch 20 remains stopped (corresponding to the second switch tube Q2 remaining turned off), thereby performing overvoltage protection on the first switch tube Q1. When the drain-source voltage difference of the first switch tube Q1 is less than or equal to the first preset voltage threshold, the voltage regulator diode Z2 is turned off, the fourth switch tube Q4 is turned off, the first indication signal S1 remains at a high level, and the second switch tube Q2 can be turned on or off in response to the signal EN1_DL after the first enable signal EN1 is delayed by the first preset time length.

[0114] Please refer to Fig.10 , Fig.10 Three other implementations of the clamping unit 41 provided in the embodiments of the present application are shown in FIG. Fig.10 As shown in part d in FIG. 1 , the clamping unit 41 includes at least one second diode, and the at least one second diode includes a first second diode DB1, a second second diode DB2, ..., and a j-th second diode DBj, where j is an integer greater than or equal to 1. The anode of the first second diode DB1, the anode of the second second diode DB2, ..., and the anode of the j-th second diode DBj are all indirectly or directly connected to the output terminal VOUT; the cathode of the first second diode DB1, the cathode of the second second diode DB2, ..., and the cathode of the j-th second diode DBj are all indirectly or directly connected to the switch unit 41.

[0115] like Fig.10As shown in part e of the figure, the clamping unit 41 includes at least one second Zener diode, and the at least one second Zener diode includes a first second Zener diode ZB1, a second second Zener diode ZB2, ..., and a pth second Zener diode ZBp, where p is an integer greater than or equal to 1. The anode of the first second Zener diode ZB1, the anode of the second second Zener diode ZB2, ..., and the anode of the pth second Zener diode ZBp are all indirectly or directly connected to the switch unit 41; the cathode of the first second Zener diode ZB1, the cathode of the second second Zener diode ZB2, ..., and the cathode of the pth second Zener diode ZBp are all indirectly or directly connected to the output terminal VOUT.

[0116] like Fig.10 As shown in part f of FIG. 1 , the clamping unit 41 includes at least one second diode and at least one second voltage stabilizing diode. At this time, the clamping unit 41 includes Fig.10 For details on the implementation of parts d and e in Fig.10 The descriptions of parts d and e in the description will not be repeated here.

[0117] Please refer to Fig.11 , Fig.11 An example is shown Fig. 9 Schematic diagram of each signal in the circuit structure shown. Fig.11 In the figure, the horizontal axis is time; the vertical axis curves from top to bottom are respectively the system enable signal EN_IN of the low-side switch circuit 100, the first enable signal EN1, the signal EN1_DL after the first enable signal EN1 is delayed for a first preset time, the first indication signal S1, the second enable signal EN2, the current IQ1 flowing through the first switch tube Q1 and the voltage VO1 of the output terminal VOUT; the dotted lines parallel to the horizontal axis are respectively the peak value IQ1_pk of the current IQ1, the reference of the current IQ1 being 0, the clamping voltage Vclamp, the first preset voltage threshold Vlim and the voltage of the input voltage bus VCC from top to bottom. In addition, this embodiment takes the load 200 as an inductive load, and the first enable signal EN1 and the system enable signal EN_IN of the low-side switch circuit 100 as complementary signals as an example.

[0118] like Fig.11As shown, before time t23, the first indication signal S1 maintains a high level, and the second enable signal EN2 output by the AND gate AND1 is the same as the signal EN1_DL after the first enable signal EN1 is delayed by the first preset time length. At time t23, the voltage VO1 of the output terminal VOUT rises to the first preset voltage threshold Vlim. At this time, the voltage zener diode Z2 is turned on and drives the fourth switch tube Q4 to be turned on, and the first indication signal S1 becomes a low level, thereby disabling the second pull-down branch 20, so that the second pull-down branch 20 remains stopped. In this embodiment, since the overvoltage protection branch 40 is added, at time t24, when the signal EN1_DL after the first enable signal EN1 is delayed by the first preset time length becomes a high level, since the voltage VO1 of the output terminal VOUT is still higher than the first preset voltage threshold Vlim, the first indication signal S1 is still a low level, and the control signal of the second pull-down branch 20 (i.e., the second enable signal EN2) is always a low level, and the second pull-down branch 20 will not be enabled, thus avoiding Figure 6 The situation that the voltage VO1 of the output terminal VOUT exceeds the clamping voltage Vclamp occurs. The disabled state of the second pull-down branch 20 is maintained until time t25, at which time, the voltage VO1 of the output terminal VOUT drops below the first preset voltage threshold Vlim, the voltage zener diode Z2 is turned off, the fourth switch tube Q4 is turned off, the first indication signal S1 becomes a high level, the second enable signal EN2 output by the AND gate AND1 becomes a high level, and the second pull-down branch 20 is enabled. At this time, even if the voltage VO1 of the output terminal VOUT suddenly changes, the first switch tube Q1 cannot be turned on.

[0119] It is understandable that in the embodiment of the present application, by providing the first pull-down branch 10 and the second pull-down branch 20, it is also possible to increase the rate of turning off the first switch tube Q1 in some fault conditions, thereby improving the reliability of the low-side switch circuit 100. For example, when the load 200 is short-circuited, the first pull-down branch 10 and the second pull-down branch 20 can be enabled simultaneously to accelerate the turning off of the first switch tube Q1.

[0120] In some embodiments, Fig.12 As shown, the low-side switch circuit 100 further includes an overcurrent protection branch 50. Figure 3 Taking the structure shown in the figure as an example, an overcurrent protection circuit 50 is added, wherein the overcurrent protection branch 50 is connected to the output terminal VOUT, the first pull-down branch 10 and the second pull-down branch 20 respectively.

[0121] Specifically, the overcurrent protection branch 50 is configured to generate a first detection signal (denoted as VSNS) representing the current flowing through the first switch tube Q1 when the first switch tube Q1 is turned on, and output a first enable signal EN1 based on the first detection signal VSNS, and when the first switch tube Q1 is in the on state, the second enable signal EN2 is the same signal as the first enable signal EN1. The first pull-down branch 10 is also configured to operate in response to the first enable signal EN1 when the first detection signal is greater than the first preset threshold. The second pull-down branch 20 is also configured to operate in response to the second enable signal EN2 when the first detection signal is greater than the first preset threshold. Among them, the first detection signal is greater than the first preset threshold corresponding to the current flowing through the first switch tube Q1 when the first switch tube Q1 is turned on is greater than the first preset current threshold. In this embodiment, by enabling the first pull-down branch 10 and the second pull-down branch 20 at the same time, the shutdown of the first switch tube Q1 can be accelerated, so that the first switch tube Q1 can be quickly shut down when an overcurrent occurs (that is, the current flowing through the first switch tube Q1 is greater than the first preset current threshold), thereby protecting the first switch tube Q1.

[0122] Please refer to Fig.13 , Fig.13 For Fig.12 A circuit structure corresponding to the structure shown. Among them, the first pull-down branch 10, the second pull-down branch 20 and the clamping branch 30 are the same as those in the above embodiment, and are not described here in detail. This embodiment also exemplarily shows the circuit structure when the load 200 is an inductive load, that is, the load 200 includes an inductor LL and a resistor RL connected in series between the input voltage bus VIN and the output terminal VOUT.

[0123] like Fig.13 As shown, the over-current protection branch 50 includes a third switch tube Q3, a first resistor R1 and a first comparator U1.

[0124] Among them, the control end of the third switch tube Q3 is connected to the control end of the first switch tube Q1, the two ends of the non-control end of the third switch tube Q3 are respectively connected to the output end VOUT and the non-inverting input end of the first comparator U1, the first resistor R1 is connected between the non-inverting input end of the first comparator U1 and the ground GND, the inverting input end of the first comparator U1 inputs the second preset voltage threshold VREFH, and the output end VOUT of the first comparator U1 outputs the first enable signal EN1.

[0125] Each embodiment of the present application is described by taking the third switch tube Q3 as an NMOS tube as an example, the control end of the third switch tube Q3 is the gate of the NMOS tube, the first end of the non-control end of the third switch tube Q3 is the source of the NMOS tube, and the second end of the non-control end of the third switch tube Q3 is the drain of the NMOS tube. Of course, in other embodiments, the third switch tube Q3 can also be other controllable switches, such as a PMOS tube, etc., and the specific implementation process is similar to that of the NMOS tube.

[0126] exist Fig.13 In the embodiment, the third switch tube Q3 forms a common gate and common drain structure with the first switch tube Q1. Assume that the width-to-length ratio of the first switch tube Q1 is M times that of the third switch tube Q3, and M is much greater than 1. The third switch tube Q3 mirrors the current IQ1 flowing through the first switch tube Q1 and forms a voltage representing the current IQ1 flowing through the first switch tube Q1 on the first resistor R1 (this embodiment takes the first detection signal as a voltage as an example) and inputs it into the non-inverting input terminal of the first comparator U1. The inverting input terminal of the first comparator U1 is connected to the second preset voltage threshold VREFH representing the overcurrent protection threshold voltage.

[0127] When the first switch tube Q1 is turned on, if the load 200 is short-circuited, the voltage of the input voltage bus VIN and the voltage of the output terminal VOUT are short-circuited, and the current IQ1 flowing through the first switch tube Q1 increases rapidly, and the current flowing through the third switch tube Q3 also increases rapidly with the increase of the current IQ1, until the voltage drop VSNS on the first resistor R1 exceeds the second preset threshold voltage VREFH, and the output of the first comparator U1 (i.e., the first enable signal EN1 and the second enable signal EN2) turns to a high level to drive the first pull-down branch 10 and the second pull-down branch 20 to drive the first switch tube Q1 to turn off, thereby realizing overcurrent protection of the low-side switch circuit 100.

[0128] In some embodiments, Fig.14 As shown, the first comparator U1 can be a hysteresis comparator. When the input voltage of the non-inverting input terminal of the first comparator U1 rises to be greater than the second preset voltage threshold VREFH, the first enable signal EN1 flips from a low level to a high level, and when the input voltage of the non-inverting input terminal of the first comparator U1 drops to be less than the third preset voltage threshold VREFL, the first enable signal EN1 flips from a high level to a low level, wherein the third preset voltage threshold is lower than the second preset voltage threshold.

[0129] Please refer to Fig.15 , Fig.15 An example is shown Fig.14 Schematic diagram of each signal in the circuit structure shown. Fig.15In the figure, the horizontal axis is time; the vertical axis from top to bottom is respectively the sum of the currents of the first enable signal EN1 / the second enable signal EN2, the first pull-down current IA1 and the second pull-down current IA2, i.e., the current IC1, the voltage of the non-inverting input terminal of the first comparator U1, i.e., the first detection signal VSNS and the voltage VO1 of the output terminal VOUT; the dotted lines parallel to the horizontal axis are respectively the first pull-down current IA1, the second preset voltage threshold VREFH, the third preset voltage threshold VREFL, the reference of the first detection signal VSNS being 0, the clamping voltage Vclamp and the voltage of the input voltage bus VCC from top to bottom. Moreover, this embodiment takes the load 200 as an inductive load as an example.

[0130] Specifically, the selection of the clamping voltage Vclamp is often close to the limit value of the safe operating area (SOA) of the first switch tube Q1, so as to minimize the impact on the normal operation of the low-side switch circuit 100. For this reason, any scenario in which the voltage across the clamping branch 30 exceeds the clamping voltage Vclamp has the risk of causing overvoltage of the first switch tube Q1. For example, when the load 200 is short-circuited, the waveform of the first switch tube Q1 during the shutdown process is as follows: Fig.15As shown. At time t30, the first switch tube Q1 is in the on state, and the voltage VO1 of the output terminal VOUT of the low-side switch circuit 100 is 0. At time t31, the load 200 is short-circuited. Due to the effect of the parasitic inductance on the path connecting the load, the current IQ1 flowing through the first switch tube Q1 increases linearly, and the slope of the current increase is VCC / Lout, where Lout is the inductance value of the parasitic inductance on the path connecting the load 200. At time t32, the first detection signal (i.e., voltage VSNS) representing the current IQ1 flowing through the first switch tube Q1 reaches the second preset voltage threshold VREFH representing the current limit value, and the first enable signal EN1 / the second enable signal EN2 is triggered to convert to a high level, enabling the first pull-down branch 10 and the second pull-down branch 20 to start discharging the gate of the first switch tube Q1 together, and the current flowing through the first pull-down branch 10 (i.e., the first pull-down current IA1) and the current flowing through the second pull-down branch 20 (i.e., the second pull-down current IA2) are superimposed, and the result is shown as the current IC1. The first switch tube Q1 is controlled to start turning off, until time t33, the first switch tube Q1 is completely turned off, and the current IQ1 reaches its peak value. As the first switch tube Q1 is completely turned off, the current stored in the parasitic inductance LL begins to push the voltage of the output terminal VOUT higher than the clamping voltage Vclamp of the clamping circuit 40. At this time, the clamp circuit 40 is turned on, and the first pull-down branch 10 and the second pull-down branch 20 discharge the inductor LL. The discharge current is also the current IC1, and the current IQ1 begins to decrease. Since the clamp voltage Vclamp of the clamp circuit 40 is determined by the voltage drop when the first pull-down current IA1 flows through the clamp circuit 40, when the current IC1 flows through the clamp circuit 40, the voltage VO1 of the output terminal VOUT will also reach Vclamp+ΔV. This also makes the first switch tube Q1 need to withstand a voltage higher than the clamp voltage Vclamp of the clamp circuit 40, causing an overvoltage risk. At time t35, as the discharge of the parasitic inductance LL is completed, the voltage VSNS reaches the third preset voltage threshold VREFL, the first enable signal EN1 / the second enable signal EN2 is converted to a low level, and then the first pull-down branch 10 and the second pull-down branch 20 stop running. The voltage VO1 of the output terminal VOUT also begins to fall rapidly at time t35, and returns to the voltage of the input voltage bus VCC after several oscillations.

[0131] In some embodiments, Fig.16 As shown, the same can be Fig.12 An overvoltage protection branch 40 is added on the basis of the above. The overvoltage protection branch 40 is connected between the output terminal VOUT and the ground GND, and is connected to the second pull-down branch 20 and the overcurrent protection branch 50.

[0132] Specifically, the overvoltage protection branch 40 is configured to generate a first indication signal S1 and output a second enable signal EN2 based on the voltage VO1 of the output terminal VOUT. Specifically, the overvoltage protection branch 40 is also configured to output a second enable signal EN2 according to the first indication signal S1 and the first enable signal EN1 output by the overcurrent protection branch 50, wherein when the voltage VO1 of the output terminal VOUT is greater than or equal to the first preset voltage threshold, the second enable signal EN2 is the same signal as the first indication signal S1. The second pull-down branch 20 is also configured to stop operating in response to the first indication signal S1 when the voltage of the output terminal VOUT is greater than or equal to the first preset voltage threshold.

[0133] Understandable, Fig.17 The specific circuit structure of the overvoltage protection branch 40 shown in FIG. Fig. 9 The specific circuit structure of the overvoltage protection branch 40 shown is the same, and both realize generating a first indication signal S1 based on the voltage of the output terminal VOUT and outputting a second enable signal EN2, wherein when the voltage of the output terminal VOUT is greater than or equal to the first preset voltage threshold, the second enable signal is the same as the first indication signal; the second pull-down branch 20 is also configured to stop operating in response to the first indication signal S1 when the voltage of the output terminal VOUT is greater than or equal to the first preset voltage threshold. Thus, in Fig.14 The circuit structure of adding an overvoltage protection branch 40 to the circuit structure shown in FIG. Fig.18 shown.

[0134] Please refer to Fig.18 , Fig.18 An example is shown Fig.17 Schematic diagram of each signal in the circuit structure shown. Fig.18 In the figure, the horizontal axis is time; the vertical axis curves from top to bottom are respectively the first enable signal EN1, the first indication signal S1, the second enable signal EN2 output by the AND gate AND1, the current IC1, the voltage VSNS at the in-phase input terminal of the first comparator U1, and the voltage VO1 at the output terminal VOUT; the dotted lines parallel to the horizontal axis are respectively the first pull-down current IA1, the second preset voltage threshold VREFH, the third preset voltage threshold VREFL, the reference of the first detection signal VSNS being 0, the clamping voltage Vclamp, the first preset voltage threshold Vlim, and the voltage of the input voltage bus VCC. Moreover, this embodiment takes the load 200 as an inductive load as an example.

[0135] Specifically, before time t43, the first indication signal S1 maintains a high level, and the second enable signal EN2 output by the AND gate AND1 is the same as the first enable signal EN1. At time t43, the voltage VO1 of the output terminal VOUT rises to the first preset voltage threshold Vlim. At this time, the voltage zener diode Z2 is turned on and drives the fourth switch tube Q4 to turn on. The first indication signal S1 becomes a low level, thereby disabling the second pull-down branch 20, so that the second pull-down branch 20 remains stopped. It can be seen that at time t43, the total pull-down current IC1 is significantly reduced due to the disabling of the second pull-down branch 20. Due to the addition of the voltage zener diode Z2, after the first switch tube Q1 is turned off (after time t43), since the voltage VO1 of the output terminal VOUT is increased to higher than the first preset voltage threshold Vlim, the first indication signal S1 is a low level, and the control signal of the second pull-down branch 20 (i.e., the second enable signal EN2) is a low level, which is dynamically disabled, thus avoiding Fig.15 The situation that the voltage VO1 of the output terminal VOUT exceeds the clamping voltage Vclamp occurs. At time t44, the voltage VSNS representing the current IQ1 flowing through the first switch tube Q1 drops to the third preset voltage threshold VREFL, and represents that the discharge of the parasitic inductance LL is nearly completed, the first enable signal EN1 flips to a low level, and the first pull-down branch 10 and the second pull-down branch 20 stop operating. Subsequently, the voltage VO1 of the output terminal VOUT begins to drop until time t46, when the voltage VO1 of the output terminal VOUT drops below the first preset voltage threshold Vlim, the voltage zener diode Z2 is turned off, the fourth switch tube Q4 is turned off, and the first indication signal S1 becomes a high level.

[0136] from Fig.18 and Fig.17 It can be seen in the illustrated embodiment that, in the case where the load 200 is short-circuited, by configuring the first pull-down branch 10 to stop operating in response to the first enable signal EN1 later than the second pull-down branch 20 to stop operating in response to the second enable signal EN2 (that is, the second pull-down branch 20 stops operating in response to the second enable signal EN2 earlier than the first pull-down branch 10 stops operating in response to the first enable signal EN1), the risk of damage to the first switch tube Q1 in the low-side switch circuit 100 due to overvoltage can be effectively reduced.

[0137] Please refer to Fig.19 , Fig.19A first flow chart of a control method for a low-side switch circuit provided in an embodiment of the present application. The low-side switch circuit includes a first switch tube, a first pull-down branch, and a second pull-down branch. The two ends of the non-control end of the first switch tube are connected between the output end and the ground. The output end is connected to the input voltage bus through a load. The first pull-down branch and the second pull-down branch are both connected between the control end of the first switch tube and the ground. In some embodiments, the low-side switch circuit here can be controlled by Figure 1-Figure 5 , Figure 7-Figure 9 , Figure 12-14 , Figure 16-Figure 17 The structure shown in the figure is implemented, and the specific implementation process has been described in detail in the above embodiment, which will not be repeated here. Fig.19 As shown, the control method includes the following method steps:

[0138] Step 1901: Control the first pull-down branch to operate so as to output a first pull-down current to discharge the control terminal of the first switch tube.

[0139] Step 1902: After a first preset time has passed since the first pull-down branch starts to operate, the second pull-down branch is controlled to operate so as to output a second pull-down current to discharge the control terminal of the first switch tube.

[0140] It should be understood that the specific control of the low-side switch circuit in the method embodiment and the beneficial effects produced can refer to the corresponding description in the above-mentioned embodiment of the low-side switch circuit, and for the sake of brevity, it will not be repeated here.

[0141] Please refer to Fig. 20 , Fig. 20 A second flow chart of a control method for a low-side switch circuit provided in an embodiment of the present application. The low-side switch circuit includes a first switch tube, a first pull-down branch, and a second pull-down branch. The two ends of the non-control end of the first switch tube are connected between the output end and the ground. The output end is connected to the input voltage bus through a load. The first pull-down branch and the second pull-down branch are both connected between the control end of the first switch tube and the ground. In some embodiments, the low-side switch circuit here can be Figure 1-Figure 5 , Figure 7-Figure 9 , Figure 12-14 , Figure 16-Figure 17 The structure shown in the figure is implemented, and the specific implementation process has been described in detail in the above embodiment, which will not be repeated here. Fig. 20 As shown, the control method includes the following method steps:

[0142] Step 2001: when the first switch tube is in the on state, obtaining a first current flowing through the first switch tube and a voltage at the output end.

[0143] Step 2002: When the first current is greater than a first preset current threshold, the first pull-down branch and the second pull-down branch are controlled to operate so as to output the first pull-down current and the second pull-down current to discharge the control terminal of the first switch tube.

[0144] Step 2003: When the voltage at the output end is greater than a second preset voltage threshold, the second pull-down branch is controlled to stop operating.

[0145] In some embodiments, the control method also includes the following method steps: when the voltage at the output end is less than or equal to a second preset voltage threshold and the first current rises to greater than the first preset current threshold, the first pull-down branch and the second pull-down branch are controlled to operate; thereafter, when the voltage at the output end is greater than the second preset voltage threshold, the second pull-down branch is controlled to stop operating; when the first current decreases to less than the second preset current threshold, the first pull-down branch and the second pull-down branch are controlled to stop operating, wherein the second preset current threshold is less than the first preset current threshold.

[0146] It should be understood that the specific control of the low-side switch circuit in the method embodiment and the beneficial effects produced can refer to the corresponding description in the above-mentioned embodiment of the low-side switch circuit, and for the sake of brevity, it will not be repeated here.

[0147] An embodiment of the present application further provides a low-side switch chip, and the low-side switch chip includes the low-side switch circuit 100 in any embodiment of the present application.

[0148] An embodiment of the present application further provides an electronic device, which includes a load and the low-side switch chip in any embodiment of the present application.

[0149] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

[0150] The above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them. Under the idea of ​​the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. It should be understood by ordinary technicians in this field that they can still modify the technical solutions recorded in the above embodiments, or replace some of the technical features by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A low-side switch circuit, characterized in that: The low-side switch circuit is connected between a load and a ground, and the load is also connected to an input voltage bus. The low-side switch circuit includes: A first switch tube, wherein two ends of the non-control end of the first switch tube are connected between an output end and a ground, wherein the output end is an end of the low-side switch circuit connected to the load; A first pull-down branch is connected between the control terminal of the first switch tube and ground, and is configured to operate or stop operating in response to a first enable signal, and output a first pull-down current to discharge the control terminal of the first switch tube when operating; A second pull-down branch is connected between the control terminal of the first switch tube and ground, and is configured to operate or stop operating in response to a second enable signal, and output a second pull-down current to discharge the control terminal of the first switch tube when operating; The time when the first pull-down branch starts to operate in response to the first enable signal is earlier than the time when the second pull-down branch starts to operate in response to the second enable signal, or the time when the first pull-down branch stops operating in response to the first enable signal is later than the time when the second pull-down branch stops operating in response to the second enable signal.

2. The low side switch circuit according to claim 1, characterized in that: The first enable signal and the system enable signal of the low-side switch circuit are complementary signals, and the second enable signal is a signal obtained by delaying the first enable signal by a first preset time period.

3. The low side switch circuit according to claim 1, characterized in that: The low side switch circuit further comprises: The clamping branch is connected between the output end and the control end of the first switch tube, and is configured to clamp the voltage between the output end and the control end of the first switch tube to not exceed a first preset clamping voltage.

4. The low side switch circuit according to claim 3, characterized in that: The clamping branch includes at least one first diode and / or at least one first voltage stabilizing diode; The anode of the first diode is connected to the output end, and the cathode of the first diode is connected to the control end of the first switch tube; The anode of the first voltage stabilizing diode is connected to the control end of the first switch tube, and the cathode of the first voltage stabilizing diode is connected to the output end.

5. The low side switch circuit according to claim 1, characterized in that: The first pull-down branch includes a first controllable switch and a first current source; The first controllable switch and the first current source are connected in series between the control end of the first switch tube and the ground. The first controllable switch is controlled by the first enable signal to be turned on or off.

6. The low side switch circuit according to claim 1, characterized in that: The second pull-down branch includes a second switch tube; The control end of the second switch tube inputs the second enable signal, and two ends of the non-control end of the second switch tube are connected between the output end and the ground.

7. The low side switch circuit according to any one of claims 1 to 6, characterized in that: The low side switch circuit further comprises: an overvoltage protection branch, connected between the output terminal and ground and connected to the second pull-down branch, and configured to generate a first indication signal based on the voltage of the output terminal and output the second enable signal; The second pull-down branch is also configured to run or stop running in response to the second enable signal when the voltage at the output terminal is less than a first preset voltage threshold, and is configured to remain stopped in response to the first indication signal when the voltage at the output terminal is greater than or equal to the first preset voltage threshold.

8. The low side switch circuit according to claim 7, characterized in that: When the voltage of the output terminal is greater than the first preset voltage threshold, the first indication signal is at a low level, and when the voltage of the output terminal is not greater than the first preset voltage threshold, the first indication signal is at a high level.

9. The low side switch circuit according to any one of claims 1, 3 to 6, characterized in that: The low side switch circuit further comprises: an overcurrent protection branch, connected to the output end, the first pull-down branch and the second pull-down branch respectively, configured to generate a first detection signal representing a current flowing through the first switch tube when the first switch tube is turned on, and output the first enable signal based on the first detection signal, and when the first switch tube is in the on state, the second enable signal is the same signal as the first enable signal; The first pull-down branch is further configured to operate in response to the first enable signal when the first detection signal is greater than a first preset threshold; The second pull-down branch is further configured to operate in response to the second enable signal when the first detection signal is greater than the first preset threshold.

10. The low side switch circuit according to claim 9, characterized in that: The overcurrent protection branch includes a third switch tube, a first resistor and a first comparator; The control end of the third switch tube is connected to the control end of the first switch tube, the two ends of the non-control end of the third switch tube are respectively connected to the output end and the non-inverting input end of the first comparator, the first resistor is connected between the non-inverting input end of the first comparator and the ground, the inverting input end of the first comparator inputs the second preset voltage threshold, and the output end of the first comparator outputs the first enable signal.

11. The low side switch circuit according to claim 10, characterized in that: The first comparator is a hysteresis comparator. When the input voltage at the non-inverting input terminal of the first comparator rises to be greater than the second preset voltage threshold, the first enable signal is flipped from a low level to a high level. When the input voltage at the non-inverting input terminal of the first comparator drops to be less than a third preset voltage threshold, the first enable signal is flipped from a high level to a low level, wherein the third preset voltage threshold is lower than the second preset voltage threshold.

12. The low side switch circuit according to claim 9, characterized in that: The low side switch circuit further comprises: an overvoltage protection branch, connected between the output terminal and ground and connected to the second pull-down branch, and configured to generate a first indication signal based on the voltage of the output terminal and output the second enable signal, wherein when the voltage of the output terminal is greater than or equal to a first preset voltage threshold, the second enable signal and the first indication signal are the same signal; The second pull-down branch is further configured to stop operating in response to the first indication signal when the voltage at the output terminal is greater than or equal to the first preset voltage threshold.

13. The low side switch circuit according to claim 7 or 12, characterized in that: The overvoltage protection branch includes a clamping unit, a switch unit and an AND gate; The clamping unit is connected between the output end and the switch unit, and the switch unit is also connected to the first input end of the AND gate to output the first indication signal to the first input end of the AND gate, the output end of the AND gate is connected to the second pull-down branch, and the second input end of the AND gate inputs the signal after the first enable signal is delayed by a first preset time length or the first enable signal; The clamping unit is configured to be turned off when the voltage at the output end is less than the first preset voltage threshold, and to be turned on when the voltage at the output end is greater than or equal to the first preset voltage threshold; The switch unit is configured to configure the first indication signal to a high level when the clamp unit is turned off, and to configure the first indication signal to a low level when the clamp unit is turned on.

14. The low side switch circuit according to claim 13, characterized in that: The clamping unit includes at least one second diode and / or at least one second voltage stabilizing diode; An anode of the second diode is connected to the output end, and a cathode of the second diode is connected to the switch unit; An anode of the second voltage stabilizing diode is connected to the switch unit, and a cathode of the second voltage stabilizing diode is connected to the output end.

15. The low side switch circuit according to claim 13, characterized in that: The switch unit includes a second resistor, a third resistor, a fourth resistor and a fourth switch tube; The second resistor and the third resistor are connected in series between the clamping unit and the ground, the connection point between the second resistor and the third resistor is connected to the control end of the fourth switch tube, both ends of the non-control end of the fourth switch tube are connected between the first input end of the AND gate and the ground, and the fourth resistor is connected between the first power supply and the first input end of the AND gate.

16. A control method for a low-side switch circuit, the low-side switch circuit comprising a first switch tube, a first pull-down branch and a second pull-down branch, the two ends of the non-control end of the first switch tube are connected between an output end and a ground, the output end is connected to an input voltage bus through a load, the first pull-down branch and the second pull-down branch are both connected between a control end of the first switch tube and a ground, characterized in that: The control method comprises: Controlling the first pull-down branch to operate so as to output a first pull-down current to discharge the control end of the first switch tube; After a first preset time period has passed since the first pull-down branch starts to operate, the second pull-down branch is controlled to operate so as to output a second pull-down current to discharge the control end of the first switch tube.

17. A control method for a low-side switch circuit, the low-side switch circuit comprising a first switch tube, a first pull-down branch and a second pull-down branch, the two ends of the non-control end of the first switch tube are connected between an output end and a ground, the output end is connected to an input voltage bus through a load, the first pull-down branch and the second pull-down branch are both connected between a control end of the first switch tube and a ground, characterized in that: The control method comprises: When the first switch tube is in an on state, obtaining a first current flowing through the first switch tube and a voltage at an output end; When the first current is greater than a first preset current threshold, controlling the first pull-down branch and the second pull-down branch to operate, so as to output the first pull-down current and the second pull-down current to discharge the control end of the first switch tube; Afterwards, when the voltage at the output end is greater than a second preset voltage threshold, the second pull-down branch is controlled to stop operating.

18. The control method according to claim 17, characterized in that: The method further comprises: When the voltage at the output end is less than or equal to a second preset voltage threshold, and the first current rises to be greater than the first preset current threshold, controlling the first pull-down branch and the second pull-down branch to operate; Afterwards, when the voltage at the output end is greater than the second preset voltage threshold, controlling the second pull-down branch to stop operating; When the first current decreases to be less than a second preset current threshold, the first pull-down branch and the second pull-down branch are controlled to stop running, wherein the second preset current threshold is less than the first preset current threshold.

19. A low-side switch chip, characterized in that: Comprising a low-side switch circuit as described in any one of claims 1-15.

20. An electronic device, characterized in that: The invention comprises a load and the low-side switch chip as claimed in claim 19.