Forming method of magnetic random storage unit

Abstract

A forming method of a magnetic random storage unit comprises the following steps: providing a substrate; a free layer structure is formed on a substrate, the free layer structure comprises one or more layers of stacked structures, each stacked structure comprises a first free layer and a plurality of second free layers which are located in the first free layer and are separated from each other, and the first free layers and the second free layers are made of different materials. The multiple layers of stacked structures are stacked in the direction perpendicular to the surface of the substrate; forming a tunnel layer on the free layer structure; a fixing layer is formed on the tunnel layer. The magnetic random storage unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have relatively low power consumption, relatively low working voltage and high-temperature reliability.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for forming a magnetic random access memory unit. Background Art

[0002] Artificial intelligence has the potential to enable the next technological revolution. Advanced models of artificial intelligence require a lot of computing to implement. Considering scalability, energy efficiency, speed and temperature stability, a new structure is needed to surpass traditional CMOS logic devices and memories. Summary of the invention

[0003] The technical problem solved by the present invention is to provide a method for forming a magnetic random storage unit to meet the requirements of advanced technology.

[0004] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a magnetic random memory unit, comprising: providing a substrate; forming a free layer structure on the substrate, the free layer structure comprising one or more stacked structures, the stacked structure comprising: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate; forming a tunnel layer on the free layer structure; and forming a fixed layer on the tunnel layer.

[0005] Optionally, before forming a free layer structure on the substrate, it also includes: forming a first electrode structure on the substrate, the first electrode structure including a first electrode layer and a second electrode layer located on the first electrode layer, the projection of the second electrode layer on the substrate is located within the projection range of the first electrode layer on the substrate, and the free layer structure is located between the second electrode layer and the tunnel layer.

[0006] Optionally, the method for forming the first electrode structure includes: forming a first electrode layer on a substrate; forming an isolation layer on the first electrode layer, the isolation layer exposing a portion of the surface of the first electrode layer; forming an electrode material layer on the first electrode layer exposed by the isolation layer and on the isolation layer; flattening the electrode material layer until the surface of the isolation layer is exposed, and forming a second electrode layer on the first electrode layer.

[0007] Optionally, the method for forming the stacked structure of the first layer includes: forming a plurality of discrete second free layers on the second electrode layer; forming a free material layer on the isolation layer, the second electrode layer, and the top surface and side wall surface of the second free layer; flattening the free material layer until the top surface of the second free layer is exposed to form an initial first free layer; removing the initial first free layer on the isolation layer, and forming a first free layer and a plurality of discrete second free layers located in the first free layer on the second electrode layer.

[0008] Optionally, part of the first free layer is also located on the isolation layer.

[0009] Optionally, the method for forming a multi-layer stacking structure includes: forming a second free layer of an upper stacking structure on the second free layer of an underlying stacking structure, with the second free layers of two adjacent stacking structures in contact; forming a free material layer on the initial first free layer of the underlying stacking structure and on the top surface and side wall surface of the second free layer of the upper stacking structure; flattening the free material layer until the top surface of the second free layer of the upper stacking structure is exposed to form the initial first free layer of the upper stacking structure; removing the initial first free layer of the upper stacking structure and the initial first free layer of the underlying stacking structure on the isolation layer until the surface of the isolation layer is exposed to form a free layer structure with a multi-layer stacking structure.

[0010] Optionally, after forming the free layer structure, the method further includes: forming a conductive layer surrounding the free layer structure on the isolation layer, wherein the conductive layer is electrically connected to the first free layer.

[0011] Optionally, after forming the fixed layer on the tunnel layer, the method further includes: forming a third electrode layer on the fixed layer, wherein the fixed layer is located between the third electrode layer and the tunnel layer.

[0012] Optionally, the method for forming the tunnel layer, the fixed layer and the third electrode layer includes: forming a tunnel material layer on the free layer structure, the conductive layer and the isolation layer; forming a fixed material layer on the tunnel material layer; forming an electrode material layer on the fixed material layer; removing the tunnel material layer, the fixed material layer and the electrode material layer on the conductive layer and the isolation layer, and forming a tunnel layer on the free layer structure, a fixed layer located on the tunnel layer, and a third electrode layer located on the fixed layer.

[0013] Optionally, it also includes: forming a dielectric layer on the isolation layer, the conductive layer and the free layer structure, wherein the free layer structure is located in the dielectric layer; forming a first connection layer, a second connection layer and a third connection layer in the dielectric layer, wherein the first connection layer is electrically connected to the first electrode layer, the second connection layer is electrically connected to the conductive layer, and the third connection layer is electrically connected to the third electrode layer.

[0014] Optionally, the second free layer includes a nanocolumn structure, and a plurality of the nanocolumn structures are distributed in the first free layer along a direction parallel to the substrate surface; the first free layer is located on the side wall surface of the nanocolumn structure; and two adjacent layers of the stacked nanocolumn structures are in contact.

[0015] Optionally, the projection shape of the nanocolumn structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

[0016] Optionally, the second free layer includes nanoparticles, and the first free layer surrounds the surfaces of the nanoparticles.

[0017] Optionally, a projection shape of the first free layer on the substrate includes a circle or an ellipse.

[0018] Optionally, a material of the second free layer is the same as a material of the fixed layer.

[0019] Optionally, the material of the second free layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0020] Optionally, the material of the first free layer includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

[0021] Optionally, the material of the second free layer includes superparamagnetic material.

[0022] Optionally, the superparamagnetic material includes a ferromagnetic material that exhibits superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0023] Optionally, the material of the fixed layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt-iron-boron, a mixture of cobalt-iron and cobalt-iron-boron, or iron-platinum.

[0024] Optionally, the material of the tunnel layer includes an insulating material, and the insulating material includes: magnesium oxide, magnesium aluminum oxide or aluminum oxide.

[0025] Optionally, the number of the second free layers is greater than or equal to ten.

[0026] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0027] The technical solution of the present invention provides a method for forming a novel magnetic random access memory unit, wherein the free layer structure includes one or more stacked structures, the stacked structure includes a first free layer and a plurality of second free layers separated from each other and located in the first free layer, and the magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0028] Furthermore, since the materials of the first free layer and the second free layer are different, the material of the second free layer includes a ferromagnetic material, the material of the first free layer includes a ferroelectric material, the second free layer is located in the first free layer, and the ferroelectric material surrounds the ferromagnetic material, by applying voltage to the ferroelectric first free layer, a stress-induced elastic interaction can be generated between the ferroelectric first free layer and the ferromagnetic second free layer, so that the ferromagnetic second free layer is deformed and a magnetostrictive effect is generated, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0029] Furthermore, the number of the second free layers is greater than or equal to 10, and the multiple second free layers increase the contact interface between the first free layer and the second free layer. When a voltage is applied to the first free layer, the control effect on the second free layer is better. At the same time, the multiple second free layers provide multiple current channels, so that the resistance in the low resistance state is smaller, and the multiple second free layers can also contribute to the resistance in the high resistance state, so that the resistance in the high resistance state is larger, and the ratio of high magnetic resistance to low magnetic resistance is higher, thereby reducing the operating voltage, improving the magnetic resistance on / off ratio, and making the stability of the magnetic random storage unit better.

[0030] Furthermore, the material of the second free layer includes a superparamagnetic material. The superparamagnetic second free layer has a higher magnetization response speed, so that the reading and writing speed of the magnetic random access memory unit is faster.

[0031] Furthermore, the nano-pillar structures of two adjacent stacked structures are in contact with each other, and the stacking of the multi-layer stacked structures can add more first free layers and second free layers, and can provide more contact interfaces between the first free layers and the second free layers. The more second free layers there are, the greater the resistance value of the high resistance state can be. At the same time, the nano-pillar structures of two adjacent stacked structures are in contact with each other, so that the current channel is increased to a limited extent, thereby limiting the increase in the low resistance value, and further making the ratio of high magnetic resistance to low magnetic resistance higher, thereby improving the magnetic resistance on / off ratio, and making the stability of the magnetic random storage unit better.

[0032] Furthermore, the second free layer includes nanoparticles, and the first free layer surrounds the surface of the nanoparticles. The size of the nanoparticles is smaller, and the first free layer surrounds the surface of the nanoparticles, so the contact interface between the first free layer and the second free layer is larger, and when a voltage is applied to the first free layer, the control effect on the second free layer is better, thereby reducing the operating voltage, improving the magnetoresistance on / off ratio, and making the stability of the magnetic random access memory unit better. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figures 1 to 11 is a schematic diagram of a formation process of a magnetic random access memory cell in one embodiment of the present invention;

[0034] Figures 12 to 16 is a schematic diagram of a formation process of a magnetic random access memory cell in another embodiment of the present invention;

[0035] Fig.17 and Fig.18 It is a schematic diagram of a formation process of a magnetic random access memory cell in another embodiment of the present invention. DETAILED DESCRIPTION

[0036] As described in the background art, a new structure of logic devices and memories that surpass traditional CMOS is needed.

[0037] Specifically, conventional CMOS logic devices and memories include static random access memory (SRAM), dynamic access memory (DRAM), NAND flash memory, and NOR flash memory.

[0038] Traditional CMOS logic devices and memories have certain defects in speed, power consumption, and area. Among them, static random access memory is fast, but volatile and large in area; dynamic access memory is smaller in area, but slower than static random access memory and highly volatile; NAND flash and NOR flash provide smaller area and non-volatility, but lower speed and worse durability.

[0039] Spin-transfer torque magnetic random access memory (STT-MRAM) is a new type of non-volatile magnetic random access memory that realizes information writing through spin current. It is a highly competitive alternative to dynamic access memory, NAND flash memory and NOR flash memory, but spin-transfer torque magnetic random access memory has high current density switching magnetization.

[0040] Therefore, new structured memory technologies are needed to meet the needs of artificial intelligence technology.

[0041] In order to solve the above problems, the technical solution of the present invention provides a method for forming a magnetic random access memory unit, wherein the free layer structure includes one or more stacked structures, the stacked structure includes a first free layer and a plurality of second free layers separated from each other and located in the first free layer, and the magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0042] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0043] Figures 1 to 11 Schematic diagram of a formation process of a magnetic random access memory cell in one embodiment of the present invention.

[0044] Please refer to Figure 1, providing a substrate 100 ; forming a protective layer 101 on the substrate 100 .

[0045] In this embodiment, the substrate 100 is made of silicon.

[0046] In other embodiments, the substrate material includes silicon carbide, silicon germanium, a multinary semiconductor material composed of group III-V elements, silicon on insulator (SOI) or germanium on insulator (GOI). Among them, the multinary semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP.

[0047] In this embodiment, the material of the protection layer 101 includes silicon oxide. The protection layer 101 is used to protect the surface of the substrate 100.

[0048] Next, a first electrode structure is formed on the substrate 100, wherein the first electrode structure includes a first electrode layer and a second electrode layer located on the first electrode layer, wherein the projection of the second electrode layer on the substrate 100 is located within the projection range of the first electrode layer on the substrate 100. For the formation process of the first electrode structure, please refer to Figure 1 and Figure 2 .

[0049] Please continue to refer to Figure 1 , a first electrode layer 102 is formed on the protective layer 101 ; and an initial isolation layer 103 is formed on the first electrode layer 102 .

[0050] In this embodiment, the material of the first electrode layer 102 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0051] The process of forming the first electrode layer 102 includes: an evaporation process or a deposition process.

[0052] The material of the initial isolation layer 103 includes a dielectric material, and the dielectric material includes a combination of one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon nitride carbonitride, and silicon oxycarbonitride. The process of forming the initial isolation layer 103 includes a deposition process.

[0053] Please refer to Figure 2, remove part of the initial isolation layer 103, form an isolation layer 104 on the first electrode layer 102, the isolation layer 104 exposes part of the surface of the first electrode layer 102; form an electrode material layer (not shown) on the first electrode layer 102 exposed by the isolation layer 104 and on the isolation layer 104; flatten the electrode material layer until the surface of the isolation layer 104 is exposed, and form a second electrode layer 105 on the first electrode layer 102.

[0054] In this embodiment, the projection of the second electrode layer 105 on the substrate 100 is located within the projection range of the first electrode layer 102 on the substrate 100 .

[0055] In this embodiment, the material of the second electrode layer 105 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0056] The process of forming the electrode material layer includes: an evaporation process or a deposition process.

[0057] In this embodiment, the materials of the first electrode layer 102 and the second electrode layer 105 are the same. In other embodiments, the materials of the first electrode layer and the second electrode layer may be different.

[0058] Next, a free layer structure is formed on the second electrode layer 105 and the isolation layer 104. The free layer structure includes one or more stacked structures. The stacked structure includes: a first free layer and a plurality of second free layers separated from each other in the first free layer. The first free layer and the second free layer are made of different materials. The plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate 100. For the formation process of the free layer structure, please refer to Figures 3 to 5 .

[0059] In this embodiment, the free layer structure includes a single-layer stacking structure.

[0060] Please refer to Figure 3 , a plurality of discrete second free layers 106 are formed on the second electrode layer 105 .

[0061] In this embodiment, the second free layer 106 includes a nano-pillar structure.

[0062] The projection shape of the nano-column structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

[0063] In this embodiment, the projection shape of the nano-column structure on the substrate includes a cylindrical shape. The cylindrical nano-column structure has a larger surface area and is easier to realize in terms of process. At the same time, the stress distribution of the cylindrical nano-column structure is more uniform.

[0064] The method for forming the second free layer 106 includes: forming a free material layer (not shown) on the second electrode layer 105 and the isolation layer 104 ; and etching the free material layer to form a plurality of discrete second free layers 106 on the second electrode layer 105 .

[0065] The material of the second free layer 106 includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite; the process of forming the free material layer includes an evaporation process or a deposition process.

[0066] In this embodiment, the material of the second free layer 106 includes cobalt ferrite.

[0067] In another embodiment, the material of the second free layer includes a superparamagnetic material. The superparamagnetic second free layer has a higher magnetization response speed, so that the read and write speed of the magnetic random access memory unit is faster, and the logic device and memory composed of the magnetic random access memory unit are faster.

[0068] The superparamagnetic material includes a ferromagnetic material that exhibits superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite. The ferromagnetic material has superparamagnetism when its diameter is less than a certain range. For example, when the second free layer material includes cobalt ferrite and the diameter range of the second free layer is less than 10 nanometers, the material of the second free layer has superparamagnetism.

[0069] In this embodiment, the number of the second free layers 106 is greater than or equal to 10. The plurality of second free layers 106 increases the contact interface between the first free layer 108 and the second free layer 106, and when a voltage is applied to the first free layer 108, the control effect on the second free layer 106 is better. At the same time, the plurality of second free layers 106 provide a plurality of current channels, so that the resistance in the low resistance state is small, and in the high resistance state, the plurality of second free layers 106 can also contribute to the resistance value, so that the resistance in the high resistance state is large, so that the ratio of high magnetic resistance to low magnetic resistance is high, thereby reducing the operating voltage, improving the magnetic resistance on / off ratio, and making the stability of the magnetic random access memory unit better.

[0070] Please refer to Figure 4 A free material layer (not shown) is formed on the isolation layer 104 , the second electrode layer 105 , and the top surface and side wall surface of the second free layer 106 ; the free material layer is planarized until the top surface of the second free layer 106 is exposed to form an initial first free layer 107 .

[0071] The process of forming the free material layer includes an evaporation process or a deposition process.

[0072] Please refer to Figure 5, remove the initial first free layer 107 on the isolation layer 104, form a first free layer 108 on the second electrode layer 105, and a plurality of second free layers 106 are distributed in the first free layer 108 along a direction parallel to the surface of the substrate 100, and the first free layer 108 is located on the side wall surface of the nanocolumn structure.

[0073] The material of the first free layer 108 includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

[0074] In this embodiment, the material of the first free layer 108 includes titanium barium.

[0075] In this embodiment, part of the first free layer 108 is also located on the isolation layer 104. In other embodiments, the first free layer may not be located on the isolation layer.

[0076] In this embodiment, the projection shape of the first free layer 108 on the substrate includes a circle or an ellipse.

[0077] Next, a conductive layer surrounding the free layer structure is formed on the isolation layer 104, and the conductive layer is electrically connected to the first free layer 108. The formation process of the conductive layer can be found in Figures 6 to 8 .

[0078] Please refer to Figure 6 , a conductive material layer 109 is formed on the isolation layer 104 and the free layer structure.

[0079] The conductive material layer 109 includes metal, and the metal includes one or more combinations of copper, aluminum, tungsten, cobalt, nickel and tantalum.

[0080] The process of forming the conductive material layer 109 includes an evaporation process or a deposition process.

[0081] Please refer to Figure 7 and Figure 8 , Figure 7 for Figure 8 Schematic diagram of the cross-section structure along the section line AA1. Figure 8 for Figure 7 The top view only includes the free layer structure and the conductive layer 110, the conductive material layer 109 is flattened until the top surface of the free layer structure is exposed, and an initial conductive layer (not shown) is formed on the isolation layer 104; a portion of the initial conductive layer on the isolation layer 104 is removed, and a conductive layer 110 surrounding the free layer structure is formed on the isolation layer 104, and the conductive layer 110 is in contact with the first free layer 108.

[0082] The conductive layer 110 is subsequently used to connect the first free layer 108 to an external circuit. The isolation layer 104 is used to electrically isolate the conductive layer 110 from the first electrode layer 102 .

[0083] Next, a tunnel layer is formed on the free layer structure; and a fixed layer is formed on the tunnel layer.

[0084] In this embodiment, a third electrode layer is formed on the fixed layer, and the fixed layer is located between the third electrode layer and the tunnel layer. The formation process of the tunnel layer, the fixed layer and the third electrode layer can be found in Fig. 9 and Fig.10 .

[0085] Please refer to Fig. 9 , a tunnel material layer 111 is formed on the free layer structure, the conductive layer 110 and the isolation layer 104 ; a fixed material layer 112 is formed on the tunnel material layer 111 ; and an electrode material layer 113 is formed on the fixed material layer 112 .

[0086] The material of the tunnel material layer 111 includes an insulating material, and the insulating material includes magnesium oxide, magnesium aluminum oxide or aluminum oxide. The process of forming the tunnel material layer 111 includes a deposition process.

[0087] The material of the fixed material layer 112 includes a ferromagnetic material, and the ferromagnetic material includes cobalt iron boron, a mixture of cobalt iron and cobalt iron boron, or iron platinum.

[0088] The process of forming the fixing material layer 112 includes an evaporation process or a deposition process.

[0089] Please refer to Fig.10 , remove the tunnel material layer 111, the fixed material layer 112 and the electrode material layer 113 on the conductive layer 110 and the isolation layer 104, and form a tunnel layer 114, a fixed layer 115 located on the tunnel layer 114, and a third electrode layer 116 located on the fixed layer 115 on the free layer structure, wherein the free layer structure is located between the second electrode layer 105 and the tunnel layer 114.

[0090] In this embodiment, the material of the second free layer 106 is different from the material of the fixed layer 115. The material of the fixed layer 115 needs to have perpendicular magnetic anisotropy and low attenuation, and the material of the second free layer 106 needs to have a large magnetoelectric coefficient for interaction with the first free layer 108. The material of the second free layer 106 and the material of the fixed layer 115 are selected based on different characteristics.

[0091] In other embodiments, the material of the second free layer can be the same as the material of the fixed layer.

[0092] The material of the third electrode layer 116 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0093] Please refer to Fig.11 A dielectric layer 117 is formed on the isolation layer 104, the conductive layer 110 and the free layer structure, and the free layer structure is located in the dielectric layer 117; a first connection layer 118, a second connection layer 119 and a third connection layer 120 are formed in the dielectric layer 117, the first connection layer 118 is electrically connected to the first electrode layer 102, the second connection layer 119 is electrically connected to the conductive layer 110, and the third connection layer 120 is electrically connected to the third electrode layer 116.

[0094] The magnetic random access memory unit formed by the method comprises a stacked structure comprising a first free layer 108 and a plurality of second free layers 106 separated from each other and located in the first free layer 108. The magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0095] Furthermore, since the materials of the first free layer 108 and the second free layer 106 are different, the material of the second free layer 106 includes a ferromagnetic material, the material of the first free layer 108 includes a ferroelectric material, the second free layer 106 is located in the first free layer 108, and the ferroelectric material surrounds the ferromagnetic material. By applying voltage to the ferroelectric first free layer 108, a stress-induced elastic interaction can be generated between the ferroelectric first free layer and the ferromagnetic second free layer 106, so that the ferromagnetic second free layer 106 is deformed and a magnetostrictive effect is generated, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0096] Figures 12 to 16 It is a schematic diagram of a formation process of a magnetic random access memory cell in another embodiment of the present invention.

[0097] Please refer to Fig.12 , Fig.12 For Figure 4 Based on the schematic diagram, the second free layer 206 of the upper stacking structure is formed on the second free layer 106 of the bottom stacking structure, and the second free layers of two adjacent stacking structures are in contact with each other, that is, the second free layer 106 of the bottom stacking structure is in contact with the second free layer 206 of the upper stacking structure.

[0098] For the formation process of the second free layer 206 of the upper stack structure, please refer to Figure 3The formation process of the second free layer 106 is not described in detail here.

[0099] Please refer to Fig.13 A free material layer (not shown) is formed on the initial first free layer 107 of the bottom stack structure and the top surface and side wall surface of the second free layer 206 of the upper stack structure; the free material layer is flattened until the top surface of the second free layer 206 of the upper stack structure is exposed to form the initial first free layer 207 of the upper stack structure.

[0100] Please refer to Fig.14 and Fig.15 , Fig.14 for Fig.15 Schematic diagram of the cross-section structure along the section line AA1. Fig.15 for Fig.14 The free layer structure only includes a top view, and the initial first free layer 207 of the upper stacking structure and the initial first free layer 107 of the bottom stacking structure on the isolation layer 104 are removed until the surface of the isolation layer 104 is exposed to form a free layer structure with a multi-layer stacking structure.

[0101] In this embodiment, the free layer structure includes a multi-layer stacking structure. The figure schematically shows a stacking structure in which two layers are stacked in a direction perpendicular to the surface of the substrate 100 .

[0102] The material of the first free layer includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

[0103] The material of the second free layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0104] In this embodiment, the material of the second free layer of the multi-layer stacked structure is the same, and the material of the first free layer of the multi-layer stacked structure is the same. On the one hand, when forming the multi-layer second free layer 206 and the multi-layer first free layer 208, since the materials are the same, the same target material can be reused, the process cost is low, and the production capacity utilization rate is improved; on the other hand, the multi-layer second free layer 206 is in contact with each other, and the multi-layer first free layer 208 is in contact with each other, and the materials between the layers are the same, so no dislocation will be generated when in contact, which can reduce defects.

[0105] In other embodiments, the material of the second free layer of the multi-layer stacked structure may be different, and the material of the first free layer of the multi-layer stacked structure may be different.

[0106] In this embodiment, the nano-pillar structures of two adjacent stacked structures are in contact. The stacking of multiple stacked structures can add more first free layers and second free layers, and can provide more contact interfaces between the first free layers and the second free layers. The more the number of second free layers is, the higher the resistance value of the high resistance state can be. At the same time, the contact between the nano-pillar structures of two adjacent stacked structures makes the increase of the current channel limited, so that the increase of the low resistance value is limited, and then the ratio of high magnetic resistance to low magnetic resistance is higher, which improves the magnetic resistance on / off ratio and makes the stability of the magnetic random access memory unit better.

[0107] Please refer to Fig.16 , a conductive layer 210 surrounding the free layer structure is formed on the isolation layer 104, and the conductive layer 210 is electrically connected to the first free layer of the free layer structure.

[0108] For the material and formation process of the conductive layer 210, please refer to Figures 6 to 9 , I will not go into details here.

[0109] Fig.17 and Fig.18 It is a schematic diagram of a formation process of a magnetic random access memory cell in another embodiment of the present invention.

[0110] Please refer to Fig.17 , Fig.17 For Figure 2 Based on the schematic diagram, several layers of alternately stacked second free layers 306 and initial first free layers 307 are formed on the second electrode layer 105, and the several second free layers 306 are separated from each other. The first layer of the second free layer 306 is distributed on the second electrode layer 105 along a direction parallel to the surface of the substrate 100, and the second layer and subsequent multiple layers of the second free layer 306 are distributed on the surface of the initial first free layer 307 above the second electrode layer 105. The initial first free layer 307 is located on the isolation layer 104, the second electrode layer 105, and the top surface and side wall surface of the second free layer 306, and the initial first free layer 307 surrounds the surface of the second free layer 306.

[0111] In this embodiment, the second free layer 306 includes nanoparticles, and the initial first free layer 307 surrounds the surface of the nanoparticles.

[0112] Please refer to Fig.18, remove several layers of initial first free layer 307 on the isolation layer 104, and form several stacked structures on the second electrode layer 105, the stacked structures include a first free layer 308 and several discrete second free layers 306 located on the first free layer 308, the first free layer 308 surrounds the surface of the second free layer 306; form a conductive layer 310 surrounding the free layer structure on the isolation layer 104, the conductive layer 310 is electrically connected to the first free layer 308; form a tunnel layer 314 on the free layer structure; form a fixed layer 315 on the tunnel layer 314; and form a third electrode layer 316 on the fixed layer 315.

[0113] The materials, formation processes and methods of the first free layer 308, the conductive layer 310, the tunnel layer 314, the fixed layer 315 and the third electrode layer 316 are shown in FIG. Figures 5 to 10 The text and illustrations described in the specification will not be repeated here.

[0114] The second free layer 306 includes nanoparticles, and the first free layer 308 surrounds the surface of the nanoparticles. The size of the nanoparticles is smaller, and the first free layer 308 surrounds the surface of the nanoparticles, so the contact interface between the first free layer 308 and the second free layer 306 is larger, and when a voltage is applied to the first free layer 308, the control effect on the second free layer 306 is better, thereby reducing the operating voltage, improving the magnetoresistance on / off ratio, and making the stability of the magnetic random access memory unit better.

[0115] In another embodiment, the material of the second free layer includes a superparamagnetic material. The superparamagnetic second free layer has a higher magnetization response speed, so that the read and write speed of the magnetic random access memory unit is faster, and the logic device and memory composed of the magnetic random access memory unit are faster.

[0116] The superparamagnetic material includes a ferromagnetic material that exhibits superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite. The ferromagnetic material has superparamagnetism when its diameter is less than a certain range. For example, when the second free layer material includes cobalt ferrite and the diameter range of the second free layer is less than 10 nanometers, the material of the second free layer has superparamagnetism.

[0117] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a magnetic random access memory cell, characterized in that: include: providing a substrate; A free layer structure is formed on a substrate, wherein the free layer structure includes one or more stacked structures, wherein the stacked structure includes: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, wherein the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to a surface of the substrate; forming a tunnel layer on the free layer structure; A pinning layer is formed on the tunneling layer.

2. The method for forming a magnetic random access memory cell according to claim 1, wherein: Before forming a free layer structure on the substrate, it also includes: forming a first electrode structure on the substrate, the first electrode structure includes a first electrode layer and a second electrode layer located on the first electrode layer, the projection of the second electrode layer on the substrate is located within the projection range of the first electrode layer on the substrate, and the free layer structure is located between the second electrode layer and the tunnel layer.

3. The method for forming a magnetic random access memory cell according to claim 2, wherein: The method for forming the first electrode structure includes: forming a first electrode layer on a substrate; forming an isolation layer on the first electrode layer, the isolation layer exposing a portion of the surface of the first electrode layer; forming an electrode material layer on the first electrode layer exposed by the isolation layer and on the isolation layer; flattening the electrode material layer until the surface of the isolation layer is exposed, and forming a second electrode layer on the first electrode layer.

4. The method for forming a magnetic random access memory cell according to claim 3, wherein: The method for forming the stacked structure of the first layer includes: forming a plurality of discrete second free layers on the second electrode layer; forming a free material layer on the isolation layer, the second electrode layer, and the top surface and side wall surface of the second free layer; flattening the free material layer until the top surface of the second free layer is exposed to form an initial first free layer; removing the initial first free layer on the isolation layer, and forming a first free layer and a plurality of discrete second free layers located in the first free layer on the second electrode layer.

5. The method for forming a magnetic random access memory cell according to claim 4, wherein: A portion of the first free layer is also located on the isolation layer.

6. The method for forming a magnetic random access memory cell according to claim 4, wherein: The method for forming the multi-layer stacking structure includes: forming a second free layer of an upper stacking structure on the second free layer of a bottom stacking structure, with the second free layers of two adjacent stacking structures in contact; forming a free material layer on the initial first free layer of the bottom stacking structure and the top surface and side wall surface of the second free layer of the upper stacking structure; flattening the free material layer until the top surface of the second free layer of the upper stacking structure is exposed to form the initial first free layer of the upper stacking structure; removing the initial first free layer of the upper stacking structure and the initial first free layer of the bottom stacking structure on the isolation layer until the surface of the isolation layer is exposed to form a free layer structure with a multi-layer stacking structure.

7. The method for forming a magnetic random access memory cell according to claim 3, wherein: After forming the free layer structure, the method further includes: forming a conductive layer surrounding the free layer structure on the isolation layer, wherein the conductive layer is electrically connected to the first free layer.

8. The method for forming a magnetic random access memory cell according to claim 7, wherein: After forming the fixed layer on the tunnel layer, the method further includes: forming a third electrode layer on the fixed layer, wherein the fixed layer is located between the third electrode layer and the tunnel layer.

9. The method for forming a magnetic random access memory cell according to claim 8, wherein: The method for forming the tunnel layer, the fixed layer and the third electrode layer includes: forming a tunnel material layer on the free layer structure, the conductive layer and the isolation layer; forming a fixed material layer on the tunnel material layer; forming an electrode material layer on the fixed material layer; removing the tunnel material layer, the fixed material layer and the electrode material layer on the conductive layer and the isolation layer, and forming a tunnel layer on the free layer structure, a fixed layer located on the tunnel layer and a third electrode layer located on the fixed layer.

10. The method for forming a magnetic random access memory cell according to claim 8, wherein: Also includes: forming a dielectric layer on the isolation layer, the conductive layer and the free layer structure, wherein the free layer structure is located in the dielectric layer; A first connection layer, a second connection layer and a third connection layer are formed in the dielectric layer, the first connection layer is electrically connected to the first electrode layer, the second connection layer is electrically connected to the conductive layer, and the third connection layer is electrically connected to the third electrode layer.

11. The method for forming a magnetic random access memory cell according to claim 1, wherein: The second free layer includes a nanocolumn structure, and a plurality of the nanocolumn structures are distributed in the first free layer along a direction parallel to the substrate surface; the first free layer is located on the sidewall surface of the nanocolumn structure; and two adjacent stacked nanocolumn structures are in contact.

12. The method for forming a magnetic random access memory cell according to claim 11, wherein: The projection shape of the nano-column structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

13. The method for forming a magnetic random access memory cell according to claim 1, wherein: The second free layer includes nanoparticles, and the first free layer surrounds surfaces of the nanoparticles.

14. The method for forming a magnetic random access memory cell according to claim 1, wherein: The projection shape of the first free layer on the substrate includes a circle or an ellipse.

15. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the second free layer is different from that of the fixed layer.

16. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the second free layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

17. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the first free layer includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

18. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the second free layer includes superparamagnetic material.

19. The method for forming a magnetic random access memory cell according to claim 18, wherein: The superparamagnetic material includes a ferromagnetic material exhibiting superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

20. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the fixed layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt iron boron, a mixture of cobalt iron and cobalt iron boron, or iron platinum.

21. The method for forming a magnetic random access memory cell according to claim 1, wherein: The material of the tunnel layer includes an insulating material, and the insulating material includes magnesium oxide, magnesium aluminum oxide or aluminum oxide.

22. The method for forming a magnetic random access memory cell according to claim 1, wherein: The number of the second free layers is greater than or equal to ten.

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