Nitride semiconductor transistor epitaxial structure
By designing the epitaxial structure of nitride semiconductor transistors, including a voltage-withstanding buffer layer and a polarized doped back barrier layer, the PN junction space charge region is formed, and the current collapse effect and voltage withstand of gallium nitride power semiconductor devices is solved, and the current collapse effect and voltage withstanding of gallium nitride power semiconductor devices is achieved. Higher device reliability and voltage withstand.
Patent Information
- Application Number
- CN202411596343.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-11
- Publication Date
- 2025-02-21
AI Technical Summary
GaN power semiconductor devices are prone to current collapse during operation, which affects the reliability of the device. At the same time, there is a strong polarization electric field inside the epitaxial layer of the nitride semiconductor, which affects the device's withstand voltage.
Design an epitaxial structure of a nitride semiconductor transistor, including a substrate, a nucleation layer, a voltage-resistant buffer layer, a back barrier layer, a channel layer, a barrier layer and an n-type doping layer, by setting a voltage-resistant buffer layer and a pole The back barrier layer is doped to form a pn junction space charge region, which increases the back barrier height, prevents electrons from entering the buffer layer, and reduces the current collapse effect.
By increasing the withstand voltage and back barrier height of the epitaxial layer, the current collapse effect is significantly reduced, and the reliability and voltage resistance of the device are improved.
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Figure CN119497411A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductor technology, and in particular relates to a nitride semiconductor transistor epitaxial structure. Background Art
[0002] Compared with traditional silicon devices, GaN power semiconductor devices have many excellent properties and broad application prospects. However, large-scale commercialization still needs to overcome some technical difficulties, one of which is the current collapse effect. During the operation of GaN power devices, when the device is turned off, the ionized electrons generated by the high electric field in the channel layer will enter the buffer layer under the action of the electric field and be captured by the deep energy level recombination center in the buffer layer. The formed electric field hinders the flow of electrons in the channel layer, causing the resistance of the device to gradually increase when the device is working, affecting the reliability of the device.
[0003] On the other hand, there is a strong polarization electric field inside the nitride semiconductor epitaxial layer. As the Al component in the AlGaN layer increases, the polarization intensity also increases accordingly. A high concentration of two-dimensional electron gas is formed at the interface between AlGaN and GaN due to the sudden change of the polarization electric field; using an AlGaN epitaxial layer with a gradient Al component, due to the change in polarization intensity, a high concentration of p-type or n-type polarization doping with a three-dimensional distribution can be achieved without adding impurity atoms, and the electron or hole concentration is not affected by the high impurity ionization energy. The Amano research group at Nagoya University in Japan reported the use of the gradient of the Al component in the AlGaN layer to achieve high concentration p-type and n-type polarization doping of the high Al component AlGaN layer, overcoming the problem of low doping impurity activation ratio caused by the high bandgap width of the high aluminum component AlGaN material, and successfully fabricated a high Al component PN junction AlGaN diode.
[0004] The invention patent numbered CN105047708A discloses an AlGaN / GaN high electron mobility transistor structure. Two polarization-doped modulated AlGaN layers are designed between the substrate and the GaN channel layer to raise the back barrier height of the buffer layer relative to the channel layer, reduce the probability of electrons in the channel layer entering the buffer layer and being captured by deep energy levels, and suppress current collapse. At the same time, compared with the use of GaN buffer layer or low aluminum component Al 0.05 Ga 0.95The N buffer layer has a higher critical breakdown electric field. The epitaxial structure of the document scheme is mainly used in radio frequency devices. The two layers of polarization-doped modulated AlGaN layers simultaneously bear the role of withstand voltage and form a back barrier to limit the electrons in the channel layer. No additional high-voltage buffer layer is designed to separate the two functions of withstand voltage and back barrier. The lower polarization-doped modulated AlGaN layer is limited to a thickness of 0.95-2.8μm because it takes into account the withstand voltage of the epitaxial material and the height of the back barrier as much as possible. Considering the difficulty of growing AlGaN with a high Al component, the maximum value of the Al component is limited to 0.18-0.30 and the thickness is 0.95-2.8μm. The maximum value of the aluminum component of the upper polarization-doped AlGaN layer is 0.08-0.18, the minimum value is 0.02-0.08, and the thickness is 0.05-0.2μm. Due to the higher gradient of the change of the Al component in the upper layer, it has a higher polarization charge density, which effectively increases the height of the back barrier layer at the interface with the channel layer. However, this also results in a higher built-in electric field at the pn junction formed between the semiconductor and the channel layer. In high-voltage applications of power electronic devices, the superposition of an external electric field makes it easier to cause breakdown, affecting the voltage resistance of the device.
[0005] Patent document "CN115172440A" discloses a method of inserting a p-type doped nitride layer under an unintentionally doped channel layer to reduce the number of electrons in the channel layer entering the high carbon doped buffer layer below and reduce the current collapse effect. In this scheme, p-type doping adopts the traditional impurity doping method. Due to the high activation energy of p-type impurity doping, impurity doping requires a higher Mg doping concentration (usually ~10 19 / cm 3 ), and a higher Mg doping concentration will reduce the crystal quality and withstand voltage of the material, and will also introduce a certain concentration of Mg impurities into the subsequently grown channel layer due to the memory effect of Mg doping. Summary of the invention
[0006] The present invention provides a nitride semiconductor transistor epitaxial structure, comprising: a substrate, a nucleation layer above the substrate, characterized in that a withstand voltage buffer layer is arranged above the nucleation layer, a back barrier layer is arranged above the buffer layer, a channel layer is arranged above the back barrier layer, a barrier layer is arranged above the channel layer, and an n-type doping layer is arranged between the back barrier layer and the channel layer. The withstand voltage of the epitaxial layer is improved by arranging the withstand voltage buffer layer, and a polarized p-type doping effect is formed in the back barrier layer by the back barrier layer whose components gradually change along the epitaxial growth direction on the buffer layer, and a pn junction space charge region is formed at the interface between the back barrier layer and the upper n-type doping layer, so as to further increase the back barrier height, prevent electrons in the channel from entering the buffer layer, and reduce the current collapse effect.
[0007] In the epitaxial structure of a nitride semiconductor transistor, the back barrier layer is composed of an alloy of any proportion of BAlGaInN, wherein at least the Al component gradually decreases along the growth direction, or at least the In component gradually increases along the growth direction, the back barrier layer is a single layer or multiple layers, and when the barrier layer is a single layer, the component changes continuously and slowly along the growth direction; when the barrier layer is a multilayer, the component of at least one layer changes according to the above trend to form a p-type polarized doped layer. The back barrier layer is unintentionally doped, and part or all of the region is p-doped with Mg atoms.
[0008] In the epitaxial structure of the nitride semiconductor transistor, the n-type doped layer is a GaN layer, or other BAlGaInN alloy layer in any proportion.
[0009] As a preferred solution of the present invention, the bandgap width of the selected BAlGaInN material is wider than that of GaN, which further improves the withstand voltage of the epitaxial layer. The n-type doped layer is doped with Si, O or other n-type impurities, and the free electron concentration is not less than 5×10 16 / cm 3 ; or n-type polarized doping formed by an alloy of any proportion of BAlGaInN, the variation trend of its alloy components is opposite to the variation trend of the components of the polarized doping of the back barrier layer. Considering that the high-doping concentration p-type polarized doped back barrier layer and its upper n-type or low-doped p-type region will produce a higher internal electric field strength at the interface pn junction, the layer is more likely to be broken down when an external electric field is superimposed. The BAlGaInN alloy layer with a higher bandgap width has a higher breakdown electric field than GaN. Replacing GaN at the interface with the strongest internal electric field can improve the withstand voltage of the epitaxial layer. The alloy layer can be a single layer or a multi-layer stack of different components. Compared with the back barrier height formed only by component gradient, the built-in potential of the pn junction space charge region formed at the interface between the superimposed back barrier layer and the upper n-type doped layer can further increase the overall back barrier height, prevent electrons in the channel from entering the buffer layer, and reduce the current collapse effect.
[0010] As a preferred embodiment of the present invention, a p-type BAlGaInN alloy layer of any proportion with a lower doping concentration than the p-type polarization doped back barrier layer, or an n-type doped BAlGaInN alloy layer of any proportion with a lower doping electron concentration than the GaN channel layer can be inserted between the barrier layer and the n-type layer. In this case, the n-type layer can be the above-mentioned n-type impurity doped layer or polarization doped layer, or it can be omitted and replaced by an unintentionally doped n-type channel layer. The p-type polarization doped layer, the BAlGaInN alloy layer with a low doping concentration and the n-type layer can form a structure similar to a pin diode, and part of the withstand voltage of the pn junction is shared by the i-layer BAlGaInN alloy layer, which can further improve the withstand voltage of the epitaxial layer.
[0011] The substrate may be: a silicon substrate, a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate formed with the above substrate as the surface and other materials.
[0012] In the epitaxial structure of a nitride semiconductor transistor, the nucleation layer may be AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials; or a layer of 3C-SiC or SiN material is first grown on the surface of a silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials are continued to be grown.
[0013] In the epitaxial structure of a nitride semiconductor transistor, the buffer layer may be a structure of AlN, AlGaN, GaN single layer or multilayer stack, AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. As a preferred solution, an AlGaN / GaN superlattice structure with a higher average Al component than other structures is used as the buffer layer, and a high concentration of carbon atoms (~2×10 19 / cm 3 ), which can not only improve the critical breakdown electric field of the material, but also effectively control the internal stress of the epitaxial layer and grow a thicker epitaxial layer. Therefore, compared with a single-layer AlGaN polarization doped layer, the withstand voltage of the epitaxial layer can be significantly improved.
[0014] In the nitride semiconductor transistor epitaxial structure, the barrier layer may be an AlGaN layer, an AlN layer, an AlInN layer, an AlGaInN layer, or a plurality of superpositions of the above material layers.
[0015] In the epitaxial structure of a nitride semiconductor transistor, the channel layer is GaN, or any other alloy of AlGaInN in any proportion, or a plurality of superpositions of the above material layers.
[0016] Compared with the prior art, the present invention provides a nitride semiconductor transistor epitaxial structure having the following features:
[0017] Beneficial effects:
[0018] Compared with the AlGaN / GaN high electron mobility transistor structure disclosed in the invention patent with patent number "CN105047708A", an n-type doped layer is arranged on the p-type polarization doped back barrier to form a pn structure to further increase the barrier height, and at the interface between the p-type polarization doping and the channel layer with higher electric field strength, a BAlGaInN alloy layer with a higher breakdown electric field is used to replace the GaN layer to improve the withstand voltage of the epitaxial material. In addition, the withstand voltage of the epitaxial layer in this scheme is enhanced by a separately designed buffer layer, and it is not necessary to design the thickness of the polarization doped AlGaN layer to be very thick because of the withstand voltage. If the buffer layer adopts a carbon-doped AlGaN / AlN superlattice structure, compared with the lower AlGaN polarization doped layer in "CN105047708A", it can not only significantly enhance the withstand voltage capability, but also because of its high average Al component and the introduction of compressive stress in the epitaxial wafer during the growth process, it can better grow a higher Al component AlGaN polarization doped structure on it.
[0019] Compared with the solution disclosed in the invention patent with patent number "CN115172440A" in which p-type doping is carried out by traditional impurity doping, the present solution adopts polarization doping which does not require the introduction of impurity atoms, and for the strong electric field region of the pn junction at the interface between the back barrier layer and the channel layer, a BAlGaInN alloy layer is used, and preferably an alloy layer with a bandgap width wider than GaN, such as AlGaN, is used instead of the GaN layer, thereby improving the withstand voltage of the epitaxial layer in the vertical direction. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 This is a schematic diagram of the transistor epitaxial structure of Example 1 of the present invention.
[0021] Figure 2 This is a schematic diagram of the transistor epitaxial structure of Example 2 of the present invention.
[0022] Figure 3 This is a schematic diagram of the transistor epitaxial structure of Example 3 of the present invention.
[0023] Description of the drawings: 10-substrate; 11-nucleation layer; 12-buffer layer; 13-back barrier layer; 14-AlGaInN alloy layer; 15-channel layer; 16-barrier layer; 171-source, 172-gate electrode; 173-drain; 20-substrate; 21-nucleation layer; 22-buffer layer; 231-lower layer of back barrier layer; 232-upper layer of back barrier layer; 24-AlGaIn alloy layer; 25-channel layer; 26-barrier layer; 271-source, 272-electrode; 273-drain; 30-substrate; 31-nucleation layer; 32-buffer layer; 33-back barrier layer; 34-alloy layer; 35-n-type AlGaN layer; 36-channel layer; 37-barrier layer; 381-source, 382-gate electrode; 383-drain. DETAILED DESCRIPTION
[0024] The present disclosure will now be described more fully below with reference to the accompanying drawings, however, the present disclosure can be implemented in many different ways and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments herein will make the present disclosure more detailed and complete, and fully convey the scope of the present disclosure to those skilled in the art. The same reference numerals throughout the text represent the same objects.
[0025] Example 1
[0026] In the first exemplary embodiment, referring to Figure 1 The epitaxial growth of this embodiment adopts metal organic chemical vapor deposition (MOCVD). The provided nitride transistor structure includes a substrate 10, which adopts a conductive silicon substrate in this embodiment. In an optional embodiment, the substrate includes a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate formed with the above substrate as the surface and other materials.
[0027] The nucleation layer 11 formed on the substrate 10 is an AlN layer with a thickness of 100 nm. However, the embodiments of the present disclosure are not limited thereto, and the nucleation layer 11 may also be GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials; or a layer of 3C-SiC or SiN material may be first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials may be continued to grow.
[0028] The buffer layer 12 includes an AlN / AlGaN / superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, AlGaN can be a single layer or a multilayer with different components, and in this embodiment, it is a 100nm AlGaN single layer structure with an Al component of 50%. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / GaN superlattice structure is used, and each period includes AlN 4nm, AlGaN 20nm, Al component is 20%, the total thickness is about 3 microns, and the carbon doping concentration is about 1×10 19 / cm 3 .
[0029] A back barrier layer 13 is grown on the buffer layer. In this embodiment, unintentionally doped AlGaN 300nm is used, and the Al component gradually decreases from 30% to 10% along the growth direction.
[0030] An AlGaInN alloy layer 14 is grown on the back barrier layer 13 . In this embodiment, 200 nm of unintentionally doped AlGaN is used, and the Al component is 10%.
[0031] The channel layer 15 is unintentionally doped GaN 800nm, with a background electron concentration of about 4×10 16 / cm 3 .
[0032] The barrier layer 16 is a 20 nm AlGaN layer having an Al composition of 25%.
[0033] Electrodes are fabricated on the barrier layer 16 , including a source electrode 171 and a drain electrode 173 , and a gate electrode 172 is fabricated on the gate dielectric.
[0034] Example 2
[0035] In the second exemplary embodiment, referring to Figure 2 The nitride transistor structure of embodiment 2 includes a substrate 20, which is a conductive silicon substrate. In an optional embodiment, the substrate includes a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate formed with the above substrate as a surface and other materials.
[0036] The nucleation layer 21 formed on the substrate 20 is an AlN layer with a thickness of 100 nm. However, the embodiments of the present disclosure are not limited thereto, and the nucleation layer 21 may also be GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials; or a layer of 3C-SiC or SiN material may be first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials may be continued to grow.
[0037] The buffer layer 22 formed on the nucleation layer 21 includes an AlN / AlGaN / superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, and AlGaN can be a single layer or a multilayer with different components. In this embodiment, it is a 50nm AlGaN single layer structure with an Al component of 50%. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / AlGaN superlattice structure is used, and each period includes AlN 4nm, AlGaN 20nm, Al component is 25%, the total thickness is about 1.2 microns, and the carbon doping concentration is about 1×10 19 / cm 3 .
[0038] A back barrier layer 23 is grown on the buffer layer. This embodiment adopts a two-layer AlGaN composite structure. The lower layer 231 of the back barrier layer is a 100nm non-intentionally doped AlGaN layer with a component of 30%. The upper layer 232 of the back barrier layer is an AlGaN layer with an Al component gradually decreasing along the growth direction. The thickness is 300nm, and the component gradually decreases from 30% to 10%. An AlGaInN alloy layer 24 continues to grow on the back barrier layer 23. This embodiment adopts weak p-type polarization doped AlGaN 200nm, and the Al component gradually decreases from 10% to 9.5%.
[0039] The channel layer 25 is unintentionally doped GaN 800nm, with a background electron concentration of about 4×10 16 / cm 3 .
[0040] The barrier layer 26 is a 20 nm thick AlGaN layer having an Al composition of 25%.
[0041] Electrodes, including a source electrode 271 and a drain electrode 273 , are formed on the barrier layer 26 , and a gate electrode 272 is formed on the gate dielectric.
[0042] Example 3
[0043] In the third exemplary embodiment, referring to Figure 3 The nitride transistor structure of embodiment 3 includes a substrate 30, which is a conductive silicon substrate. In an optional embodiment, the substrate includes a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate formed with the above substrate as a surface and other materials.
[0044] The nucleation layer 31 formed on the substrate 30 is an AlN layer with a thickness of 100 nm. However, the embodiments of the present disclosure are not limited thereto, and the nucleation layer 11 may also be GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials; or a layer of 3C-SiC or SiN material may be first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacking structure of the above materials may be continued to grow.
[0045] The buffer layer 32 includes an AlN / AlGaN / superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, AlGaN can be a single layer or a multilayer with different components, and in this embodiment, it is a 50nm AlGaN single layer structure with an Al component of 50%. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / AlGaN superlattice structure is used, and each period includes AlN 4nm, AlGaN 20nm, Al component is 25%, the total thickness is about 1.2 microns, and the carbon doping concentration is about 1×10 19 / cm 3 .
[0046] An AlGaN back barrier layer 33 is grown on the buffer layer. In this embodiment, an AlGaN layer with an Al component gradually decreasing along the growth direction is used. The thickness is 300nm, and the component gradually decreases from 30% to 10%. An AlGaInN alloy layer 34 is grown on the barrier layer 33. In this embodiment, a 200nm AlGaN layer is used, and the Al component is 10%. An n-type AlGaN layer 35 is continued to grow on the alloy layer 34, and the thickness is 100nm. The Al component gradually increases from 10% to 15% along the growth direction.
[0047] The channel layer 36 is unintentionally doped GaN 800nm, with a background electron concentration of about 4×10 16 / cm 3 .
[0048] The barrier layer 37 is formed of a 20 nm thick AlGaN layer having an Al composition of 25%.
[0049] Electrodes are fabricated on the barrier layer 37 , including a source electrode 381 and a drain electrode 383 , and a gate electrode 382 is fabricated on the gate dielectric.
[0050] The above is only a specific implementation of the embodiment of the present invention, but the protection scope of the embodiment of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the embodiment of the present invention, which should be included in the protection scope of the embodiment of the present invention. Therefore, the protection scope of the embodiment of the present invention should be based on the protection scope of the claims.
Claims
1. A nitride semiconductor transistor epitaxial structure, comprising: A substrate and a nucleation layer above the substrate, characterized in that a voltage-resistant buffer layer is arranged above the nucleation layer, a back barrier layer is arranged above the voltage-resistant buffer layer, a channel layer is arranged above the back barrier layer, a barrier layer is arranged above the channel layer, and an n-type doping layer is arranged between the back barrier layer and the channel layer.
2. A nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The back barrier layer is composed of an alloy of BAlGaInN in any proportion, wherein at least the Al component gradually decreases along the growth direction, or at least the In component gradually increases along the growth direction. The back barrier layer is a single layer or a multilayer. When the barrier layer is a single layer, the component changes continuously and slowly along the growth direction; when the barrier layer is a multilayer, the component of at least one of the layers changes according to the above trend to form a p-type polarized doped layer. The back barrier layer is unintentionally doped, and part or all of the region is p-type doped with Mg atoms.
3. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The n-type doping layer is a BAlGaInN alloy layer of any proportion, and the alloy layer can be a single layer or a multilayer stack of different components.
4. The nitride semiconductor transistor epitaxial structure according to claim 3, characterized in that: The n-type doping layer is doped with Si, O or other n-type impurities, and the free electron concentration is not less than 5×10 16 / cm 3 ; or n-type polarization doping formed by an alloy of any proportion of BAlGaInN, the variation trend of the alloy composition is opposite to the variation trend of the composition of the polarization doping of the back barrier layer.
5. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: A p-type BAlGaInN layer with a lower doping concentration than the p-type polarization doped back barrier layer, or an n-type doped BAlGaInN layer with a lower doping electron concentration than the GaN channel layer, may be inserted between the barrier layer and the n-type layer.
6. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The substrate is a silicon substrate, a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate having the above substrate as the surface.
7. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The nucleation layer is AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials; or a layer of 3C-SiC or SiN material is first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials are continued to grow.
8. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The buffer layer is a structure of AlN, AlGaN, GaN single layer or multilayer stack, AlN / GaN, AlN / AlGaN, AlGaN / GaN super lattice structure, or a combination of the above structures.
9. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The barrier layer is an AlGaN layer, an AlN layer, an AlInN layer, an AlGaInN layer, or a plurality of superpositions of the above material layers.
10. The nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The channel layer is GaN, or other alloys of AlGaInN in any proportion, or a composite stack of the above material layers.
Citation Information
Patent Citations
AlGaN / GaN high-electron mobility field effect transistor structure
CN105047708A
Epitaxial structure of nitride semiconductor high electron mobility transistor
CN115172440A