Circuit board warping simulation method and device, simulation equipment and storage medium

Abstract

The invention discloses a circuit board warping simulation method and device, simulation equipment and a storage medium, and the method comprises the steps: determining a first position of each single board according to the layout of the single boards on a whole board, carrying out the rasterization of the single boards, obtaining a plurality of structural sheets, determining the second positions of the structural sheets, obtaining the performance parameters of the structural sheets, inputting the performance parameters into the warping simulation network to obtain first warping simulation data of the structural sheet, determining second warping simulation data of the single boards according to the first warping simulation data of the structural sheet and the second positions, and mapping the second warping simulation data of the single boards into the whole board according to the first positions of all the single boards, compared with direct warping simulation of the whole board, the neural network is adopted for structural sheet simulation, simulation calculation is simple, the calculation amount is small, the requirement for simulation equipment hardware is low, warping simulation of the whole board can be conducted on most equipment, structural sheet simulation is divided, the simulation granularity is finer, and the simulation efficiency is improved. And the accuracy of warping simulation is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit board manufacturing, and in particular to a circuit board warping simulation method, device, simulation equipment and storage medium. Background Art

[0002] With the development of integrated circuit design and manufacturing, the number of layers of PCB (Printed Circuit Board) is increasing. The spatial distribution of resin and wiring in each layer of PCB is asymmetric and uneven, and the significant differences in the mechanical, thermal and chemical properties of the materials lead to different degrees of warping and deformation of PCB during the pressing process.

[0003] Warpage simulation in PCB package substrates is becoming more and more important and popular. Figure 1 As shown, for a substrate factory or a packaging factory, in order to improve production efficiency and facilitate shipment, a plurality of single boards 2 (piece part) are usually arranged on a larger whole board 1 (Panel) according to a preset arrangement rule, and processes such as ball planting and chip welding are performed on the plurality of single boards 2 on the whole board. Finally, a single board 2 is cut out from the whole board 1, and the single board 2 is a product.

[0004] In order to ensure the quality of processes such as ball implantation and chip welding of single board 2, the warping of the whole board 1 is also crucial. At present, the warping of the whole board 1 is mainly simulated and calculated through finite element simulation. When the size of the whole board 1 is large and the wiring of the single board 2 is complex, the finite element simulation is complex and requires huge computing power, and has high requirements on the hardware of the simulation equipment. Summary of the invention

[0005] The present invention provides a circuit board warping simulation method, device, simulation equipment and storage medium to solve the problem that warping simulation of the entire board requires huge computing power and has high hardware requirements for the simulation equipment.

[0006] In a first aspect, the present invention provides a circuit board warpage simulation method for performing warpage simulation on a whole board, wherein the whole board includes a plurality of single boards, including:

[0007] Determine a first position of each single board on the whole board to be simulated according to the layout of the single boards on the whole board;

[0008] rasterizing each single board to obtain a plurality of structural pieces of the single board, and determining a second position of each structural piece in the single board;

[0009] Obtaining performance parameters of each structural piece;

[0010] Inputting the performance parameters into a warpage simulation network to obtain first warpage simulation data for each structural piece;

[0011] Determining second warping simulation data of the single board according to the first warping simulation data of each of the structural pieces and the second position;

[0012] The second warping simulation data of the single board is mapped to the whole board according to the first positions of all the single boards to obtain the third warping simulation data of the whole board.

[0013] In a second aspect, the present invention provides a circuit board warping simulation device for performing warping simulation on a whole board, wherein the whole board includes a plurality of single boards, including:

[0014] A single board position determination module, used to determine a first position of each single board on the whole board to be simulated according to the layout of the single boards on the whole board;

[0015] A structure slice division module, used for rasterizing each single board to obtain a plurality of structure slices of the single board, and determining a second position of each structure slice in the single board;

[0016] A performance parameter acquisition module is used to obtain the performance parameters of each structural slice;

[0017] A simulation module, used for inputting the performance parameters into a warping simulation network to obtain first warping simulation data of each structural piece;

[0018] A single board warping simulation data determining module, configured to determine second warping simulation data of the single board according to the first warping simulation data of each of the structural pieces and the second position;

[0019] The whole board warping simulation data determination module is used to map the second warping simulation data of the single board to the whole board according to the first positions of all single boards to obtain the third warping simulation data of the whole board.

[0020] In a third aspect, the present invention provides a circuit board warping simulation device, the circuit board warping simulation device comprising:

[0021] at least one processor; and

[0022] a memory communicatively connected to the at least one processor; wherein,

[0023] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the circuit board warpage simulation method described in any one of the first aspects of the present invention.

[0024] In a fourth aspect, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the circuit board warping simulation method described in any one of the first aspects of the present invention when executed.

[0025] The embodiment of the present invention rasterizes each single board on the whole board to obtain multiple structural sheets, inputs the performance parameters of the structural sheets of the single board into the warping simulation network to obtain the first warping simulation data of each structural sheet, determines the second warping simulation data of the single board according to the second position of the structural sheet in the single board, and further maps the second warping simulation data of the single board to the whole board through the second position of the single board in the whole board to obtain the third warping simulation data of the whole board, thereby realizing the prediction of the warping simulation data of the structural sheets of each single board through the neural network, and further mapping the warping simulation data of the structural sheets to the single board first, and then mapping from the single board to the whole board. Compared with directly using a finite element simulation program to perform warping simulation on the whole board, using a neural network to simulate the structural sheets has a simple simulation calculation, a small amount of calculation, and low requirements on the hardware of the simulation equipment. The warping simulation of the whole board can be performed on most equipment and divided into structural sheet simulation. The simulation granularity is finer, thereby improving the accuracy of the warping simulation.

[0026] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0028] Figure 1 It is a schematic diagram of the relationship between the whole board, array area and single board;

[0029] Figure 2 is a flow chart of a circuit board warping simulation method provided by Embodiment 1 of the present invention;

[0030] Figure 3 is a flow chart of a circuit board warping simulation method provided by Embodiment 2 of the present invention;

[0031] Figure 4 It is a schematic diagram of rasterizing and layering a single plate to obtain multiple structural pieces;

[0032] Figure 5 is a schematic diagram of the input and output of the warping simulation network;

[0033] Figure 6 It is a structural schematic diagram of a circuit board warping simulation device provided by Embodiment 3 of the present invention;

[0034] Figure 7 It is a structural schematic diagram of a circuit board warping simulation device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0035] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0036] like Figure 1 As shown, in production, a plurality of single boards 2 (piece parts) are usually arranged on a large whole board 1 (Panel). Figure 1 In the present invention, the whole board 1 is first divided into four array areas (Array1, Array2, Array3 Array4), and multiple single boards 2 are arranged in each array area. Single board 2 is the smallest shipping unit, that is, single board 2 is a product unit, and single board 2 has relatively complex circuit wiring. During production, before the whole board 1 enters processes such as ball planting and chip welding, it is necessary to simulate and analyze the warping of the whole board 1 to determine the warping amount and then adjust the process parameters of the processes such as ball planting and chip welding. The whole board 1 is large in size, and the circuits of each single board 2 are complex. If the finite element analysis software is directly used to simulate the warping of the whole board 1, the simulation process is extremely complex and requires a lot of computing power, resulting in high hardware requirements for the simulation equipment. In order to solve this technical problem, an embodiment of the present invention provides a circuit board warping simulation method to simplify the simulation process, reduce computing power requirements, and reduce hardware requirements for simulation equipment.

[0037] Embodiment 1

[0038] Figure 2 This is a flow chart of a circuit board warpage simulation method provided in the first embodiment of the present invention. This embodiment is applicable to the case of performing warpage simulation on a whole circuit board. The method can be performed by a circuit board warpage simulation device. The circuit board warpage simulation device can be implemented in the form of hardware and / or software and can be configured in a circuit board warpage simulation device. Figure 2 As shown, the circuit board warpage simulation method includes:

[0039] S201 . Determine a first position of each single board on the entire board according to the layout of the single boards on the entire board to be simulated.

[0040] In this embodiment, the entire panel (Panel) can be first divided into an array area (Array), and multiple single boards (piece part) are arranged in an array in the array area (Array). The first position of the single board in the entire panel may include the array area (Array) where the single board is located and the position in the array area (Array), such as the row and column in the array area (Array).

[0041] Of course, when the single boards in the whole board are arranged relatively regularly, such as when the single boards are arrayed in rows and columns, the first position of the single board can also be the row and column of the single board in the whole board. This embodiment does not limit the method of representing the first position of the single board in the whole board.

[0042] S202: rasterize each single board to obtain a plurality of structural pieces of the single board, and determine a second position of each structural piece in the single board.

[0043] In this embodiment, gridding may refer to dividing a single board into multiple grids arranged in rows and columns to obtain multiple structural pieces, each structural piece has a unique position in the single board, and the position may be a row and column of the structural piece. For each grid, it may be further divided into several layers according to the stacking structure of the single board to obtain more structural pieces, and the position of the structural piece also includes the layer where the structural piece is located.

[0044] It should be noted that the rasterization referred to in this embodiment is not the rasterization of the single board in the physical sense, but the virtualization rasterization of the single board during the simulation process, and the obtained structure slices are also virtual structure slices rather than physical structure slices.

[0045] S203: Obtain performance parameters of each structural slice.

[0046] In one embodiment, the user may input performance parameters of each structural piece in the simulation interface. The performance parameters are physical, chemical, mechanical and other parameters required for the single board simulation. The performance parameters of each structural piece may be determined in response to the user's input operation. Exemplarily, the performance parameters include at least one of the following parameters:

[0047] The first expansion coefficient when the temperature is less than the glass transition temperature, the second expansion coefficient when the temperature is greater than the glass transition temperature, the glass transition temperature, the storage modulus at different temperatures, Poisson's ratio, density, specific heat capacity and thermal conductivity.

[0048] Among them, different temperatures may include the working temperatures of the processes that the entire board undergoes during the production process, such as the temperature during ball implantation, the temperature during chip welding, and so on.

[0049] S204 , inputting the performance parameters into the warping simulation network to obtain first warping simulation data for each structural piece.

[0050] In this embodiment, a warping simulation network can be pre-trained, and the warping simulation network can be various neural networks, such as CNN, RNN, DNN and other neural networks. After training, the warping simulation network has the ability to predict the warping simulation data of each structural sheet at different temperatures through performance parameters. After obtaining the performance parameters of each structural sheet of the single board, the performance parameters of all the structural sheets can be input into the warping simulation network to predict the first warping simulation data of each structural sheet in the warping simulation network.

[0051] S205 , determining second warping simulation data of the single board according to the first warping simulation data and the second position of each structural piece.

[0052] Specifically, the single board includes a side for welding the chip. The target structure piece belonging to the side of the welding chip can be determined first, and the second position of the target structure piece can be used to map the first warping simulation data of the target structure piece to the corresponding position of the single board, so as to obtain the second warping simulation data of the single board.

[0053] S206 , mapping the second warping simulation data of the single board to the entire board according to the first positions of all the single boards, to obtain third warping simulation data of the entire board.

[0054] Similarly, after obtaining the second warping simulation data of the single board, since the position of the single board in the whole board is fixed, the second warping simulation data of the single board can be mapped to the corresponding position in the whole board according to the first position of the single board in the whole board, that is, the third warping simulation data of the whole board can be obtained.

[0055] The embodiment of the present invention rasterizes each single board on the whole board to obtain multiple structural sheets, inputs the performance parameters of the structural sheets of the single board into the warping simulation network to obtain the first warping simulation data of each structural sheet, determines the second warping simulation data of the single board according to the second position of the structural sheet in the single board, and further maps the second warping simulation data of the single board to the whole board through the second position of the single board in the whole board to obtain the third warping simulation data of the whole board, thereby realizing the prediction of the warping simulation data of the structural sheets of each single board through the neural network, and further the warping simulation data of the structural sheets is first mapped to the single board, and then mapped from the single board to the whole board. Compared with directly using finite element simulation data to perform warping simulation on the whole board, using neural network to simulate the structural sheets has simple simulation calculation, small amount of calculation, low hardware requirements for simulation equipment, and can perform warping simulation of the whole board on most equipment, and divided into structural sheet simulation, the simulation granularity is finer, and the accuracy of warping simulation is improved.

[0056] Embodiment 2

[0057] Figure 3 This is a flow chart of a circuit board warpage simulation method provided in the second embodiment of the present invention. The embodiment of the present invention is optimized on the basis of the above-mentioned first embodiment. Figure 3 As shown, the circuit board warpage simulation method includes:

[0058] S301 . Determine a first position of each single board on the entire board according to the layout of the single boards on the entire board to be simulated.

[0059] like Figure 1 As shown, in this embodiment, the first position of the single board in the whole board may include the array area (Array) where the single board is located and the coordinates (rows and columns) of the single board in the array area (Array). For example, Figure 1 The whole board 1 is divided into four array areas (Array). The first position of the single board in the upper right corner can be expressed as (1, 1), that is, the first single board in the first array area (Array), or it can be expressed as (1, 1, 4), that is, the single board in the first row and fourth column of the first array area (Array). This embodiment does not limit the representation method of the first position of the single board in the whole board.

[0060] S302: gridding the single board to obtain a plurality of grids based on the size of the single board.

[0061] The embodiment of the present invention can grid the single board according to the length and width of the single board. For example, when the length and width of the single board are large, it can be gridded into more grids. For example, one tenth of the length or width is taken as the size of each grid. Assuming that the size of the single board is 5cm×5cm, the size of the grid can be 0.5cm×0.5cm. Of course, the grid sizes of single boards of different sizes can also be different. Those skilled in the art can set the grid size based on the size of the single board, the complexity of the wiring, etc. Figure 4 It is a schematic diagram after rasterizing a single board into 10×10, that is, 100 grids are obtained after rasterizing the single board.

[0062] S303 , layering each grid according to the stacked structure of the single board to obtain a plurality of structural sheets.

[0063] In an optional implementation, for a multilayer board, each grid can also be layered so that each grid is divided into multiple layers to obtain multiple structural sheets. For example, each grid can be layered according to the stacking structure of the single board (the number of core board layers, the number of copper layers, etc.) to obtain multiple structural sheets, such as Figure 4 As shown, after each grid is divided into 3 layers, a total of 10×10×3=300 structure slices can be obtained.

[0064] S304: Determine the layer and grid where each structural piece is located as the second position of the structural piece in the single board.

[0065] Specifically, the second position of each structure piece is represented by (i, j, k), where i represents the position of the structure piece in Figure 4 The row of the grid after rasterization, j represents the column, and k represents the layer. For example, the structure piece A(2, 8, 2) represents Figure 4 The second layer structure piece in the second row and eighth column.

[0066] S305: Obtain performance parameters of each structural slice.

[0067] In one embodiment, the user can input the performance parameters of each structural piece in the simulation interface. The performance parameters are the physical, chemical, mechanical and other parameters required for the single board simulation. The performance parameters of each structural piece can be determined in response to the user's input operation. By way of example, the performance parameters in this embodiment may include the first expansion coefficient CTE1 when the temperature is less than the glass transition temperature, the second expansion coefficient CTE2 when the temperature is greater than the glass transition temperature, the glass transition temperature Tg, the storage modulus (M1-Mn) at different temperatures (T1-Tn), and of course, Poisson's ratio, density, specific heat capacity and thermal conductivity.

[0068] S306 , inputting the performance parameters of all the structural pieces of the single board into the warping simulation network to obtain the z-axis coordinates of each structural piece when warping occurs at different temperatures.

[0069] In one embodiment, the warping simulation network can be trained by:

[0070] S1. Acquire training data, where the training data includes a first expansion coefficient when the temperature of a plurality of structural piece samples of a single board is less than a glass transition temperature, a second expansion coefficient when the temperature is greater than the glass transition temperature, a glass transition temperature, storage modulus at different temperatures, and z-axis labeled coordinates of each structural piece at different temperatures;

[0071] S2, randomly extracting the first expansion coefficient, the second expansion coefficient, the glass transition temperature and the storage modulus at different temperatures of a structural piece sample and inputting them into the warping simulation network to obtain the predicted z-axis coordinates of the structural piece at different temperatures;

[0072] S3. Calculate the loss rate using the z-axis labeled coordinates and the z-axis predicted coordinates, such as calculating the mean square error loss or the cross entropy loss;

[0073] S4, determine whether the loss rate is less than a threshold or whether the number of training times reaches a preset number, if so, execute S5, if not, execute S6;

[0074] S5, determining that the warping simulation network has completed training;

[0075] S6. Adjust the model parameters through the loss rate. For example, perform gradient descent on the network parameters of the warping simulation network through the loss rate, and return to S2.

[0076] like Figure 5 As shown, after the warpage simulation network is trained, during the whole board simulation, the first expansion coefficient Pijk (CTE1), the second expansion coefficient Pijk (CTE2), the glass transition temperature Pijk (Tg), and the storage modulus Pijk (Mn, Tn) at different temperatures of all the structural pieces of the single board are input into the input layer of the warpage simulation network, and the z-axis coordinate Aijk (Tn) of each structural piece at different temperatures is outputted in the output layer of the warpage simulation network.

[0077] S307: Determine the mounting layer of the single board, and determine the target structure piece belonging to the mounting layer.

[0078] The mounting layer of a single board may refer to the structural layer on which the surface of the single board on which the chip is mounted is located. For example, the single board is divided into the first layer, the second layer and the third layer from top to bottom. If the chip is mounted on the upper surface, the first layer is the mounting layer, and the structural sheet including the first layer is the target structural sheet.

[0079] S308 , generating second warping simulation data of the single board by using the z-axis coordinate of the target structure piece where warping occurs at the target temperature and the second position of the target structure piece.

[0080] The target temperature may be the temperature at which the whole board is assumed to warp in the whole board simulation, and the target temperature may be one or more, for example, the target temperature may be the temperature of a certain process in the whole board production process. The z-axis coordinate of the target structure piece warping at the target temperature may be determined first, and then the z-axis coordinate of the target structure piece warping at the target temperature may be mapped to the single board according to the second position of the target structure piece in the single board, to obtain the z-axis coordinates of multiple points of the single board when the single board warps at the target temperature, and the z-axis coordinates of a preset number of target points are selected from the z-axis coordinates of the multiple points as the second warping simulation data of the single board when the single board warps at the target temperature.

[0081] In one example, if Figure 4 As shown, one grid is one point, and each point has a z-axis coordinate after warping. The z-axis coordinates of 20 points can be selected from multiple points as the second warping simulation data when the single board warps at the target temperature. For example, the z-axis coordinates of the 3rd and 8th columns are selected for each row with uniform distribution.

[0082] In another example, the chip attach area ( Figure 4 The z-axis coordinate of the target point in the middle dotted line area) is used as the second warping simulation data when the single board warps at the target temperature, so that the warping simulation data can more accurately reflect the warping of the mounting area.

[0083] S309, simulating the single board using finite element simulation software to obtain fourth warping simulation data when the single board warps at the target temperature.

[0084] Specifically, after obtaining the second warping simulation data of the single board, the existing finite element simulation software can be used to simulate the single board to obtain the fourth warping simulation data when the single board warps at the target temperature. The fourth warping simulation data can be the z-axis coordinate of the same target point in the second warping simulation data.

[0085] In another embodiment, the warpage of the single board may be measured to obtain the z-axis coordinates of each point on the single board and obtain fourth warpage simulation data.

[0086] S310, calculating an error using the fourth warping simulation data and the second warping simulation data of the single board.

[0087] Exemplarily, the absolute value of the difference between the z-axis coordinates of the same target point in the fourth warping simulation data and the second warping simulation data can be calculated, and the average value of the absolute value can be calculated as the error. Of course, the mean square error of the z-axis coordinates of the same target point in the fourth warping simulation data and the second warping simulation data can also be calculated as the error. The error represents the error between the z-axis coordinate of the warping simulated by the warping simulation network and the z-axis coordinate during actual warping. The smaller the error, the more reasonable and accurate the input performance parameters are.

[0088] S311. Determine whether the error is less than an error threshold.

[0089] If the error is less than the error threshold, it means that the input performance parameters are within a reasonable range and the second warping simulation data is close to the real data, and S312 can be executed. If the error is greater than or equal to the error threshold, it means that the input performance parameters are unreasonable, and return to S305 to adjust the performance parameters of each structural piece.

[0090] S312: Map the second warping simulation data of the single board to the whole board according to the first position of the single board to obtain third warping simulation data of the whole board.

[0091] Specifically, after determining the second warpage simulation data of the single board, the first position of the single board in the whole board is determined, and the second warpage simulation data of the single board can be mapped to the whole board according to the first position of the single board to obtain the third warpage simulation data of the whole board, such as Figure 1As shown, after determining the warping simulation data of single board 2, the second warping simulation data of single board 2 can be mapped to the corresponding position in the whole board 1 according to the array area (Array) where single board 2 is located and the position of single board 2 in the array area (Array), as the warping simulation data of the whole board 1 at this position, thereby obtaining the warping simulation data of each position of the whole board 1 at each target temperature.

[0092] It should be noted that when there is only one single board 2 in the whole board 1, that is, the single boards 2 in the whole board 1 are the same, the second warping simulation data of one single board 2 can be obtained through S302-S311. If there are multiple single boards 2 in the whole board 1, that is, there are different single boards 2 in the whole board 1, it is necessary to obtain the second warping simulation data of various different single boards 2 through S302-S311, and then map the second warping simulation data to the whole board according to the positions of different single boards 2 in the whole board 1 to obtain the third warping simulation data of the whole board.

[0093] In this embodiment, based on the size of the single board on the whole board, the single board is gridded and then layered to obtain multiple structural pieces of the single board, the performance parameters of each structural piece are obtained and input into the warping simulation network to obtain the z-axis coordinates of each structural piece when warping occurs at different temperatures, the target structural piece belonging to the mounting layer is determined, and the z-axis coordinates of the target structural piece when warping occurs at the target temperature and the second position of the target structural piece are used to generate second warping simulation data of the single board, and the single board is simulated using finite element simulation software to obtain fourth warping simulation data of the single board when warping occurs at the target temperature, and the error is calculated by the fourth warping simulation data of the single board and the second warping simulation data, and when the error is less than When the error threshold is reached, the second warping simulation data of the single board is mapped to the whole board according to the first position of all single boards to obtain the third warping simulation data of the whole board, so that the warping simulation data of the structural sheet of each single board is predicted by the neural network. Further, the warping simulation data of the structural sheet is first mapped to the single board, and then mapped from the single board to the whole board. Compared with directly using finite element simulation data to perform warping simulation on the whole board, using neural network to simulate the structural sheet has simple simulation calculation, small amount of calculation, and low requirements on the hardware of the simulation equipment. The warping simulation of the whole board can be performed on most equipment and divided into structural sheet simulation. The simulation granularity is more detailed, which improves the accuracy of the warping simulation.

[0094] Furthermore, this embodiment divides the single board into multiple structural sheets according to the stacked structure, and inputs the performance parameters of all the structural sheets of a single board into the warping simulation network to obtain the z-axis coordinates of each structural sheet that warps at different temperatures. On the one hand, the division into structural sheets makes the simulation granularity more detailed. On the other hand, by performing layered simulation according to the stacked structure, the structural relationship between each layer can be simulated, and the simulation results are more accurate.

[0095] Furthermore, by inputting the storage modulus at different temperatures, the warpage at different temperatures can be simulated, so that the warpage amount at different temperatures can be obtained in one simulation, providing the warpage amount for the processes at different temperatures in the whole board production process.

[0096] Embodiment 3

[0097] Figure 6 This is a schematic diagram of the structure of a circuit board warping simulation device provided by Embodiment 3 of the present invention. Figure 6 As shown, the circuit board warping simulation device is used to perform warping simulation on a whole board, wherein the whole board includes a plurality of single boards, including:

[0098] A single board position determination module 601 is used to determine a first position of each single board on the whole board to be simulated according to the layout of the single boards on the whole board;

[0099] A structure slice division module 602 is used to grid each single board to obtain a plurality of structure slices of the single board, and determine a second position of each structure slice in the single board;

[0100] The performance parameter acquisition module 603 is used to acquire the performance parameters of each structural slice;

[0101] A simulation module 604 is used to input the performance parameters into a warpage simulation network to obtain first warpage simulation data for each structural piece;

[0102] A single board warping simulation data determining module 605, configured to determine second warping simulation data of the single board according to the first warping simulation data of each of the structural pieces and the second position;

[0103] The whole board warping simulation data determination module 606 is used to map the second warping simulation data of the single board to the whole board according to the first positions of all single boards to obtain the third warping simulation data of the whole board.

[0104] Optionally, the structure slice division module 602 includes:

[0105] A gridding unit, used for gridding the single board to obtain a plurality of grids based on the size of the single board;

[0106] A layering unit, used to layer each grid according to the stacking structure of the single board to obtain a plurality of structural sheets;

[0107] The position determination unit is used to determine the layer and grid where each structural piece is located as the second position of the structural piece in the single board.

[0108] Optionally, the performance parameter acquisition module 603 includes:

[0109] The performance parameter input response unit is used to respond to the user's input operation and determine the performance parameter of each structure slice, wherein the performance parameter includes at least one of the following:

[0110] The first expansion coefficient when the temperature is less than the glass transition temperature, the second expansion coefficient when the temperature is greater than the glass transition temperature, the glass transition temperature, the storage modulus at different temperatures, Poisson's ratio, density, specific heat capacity and thermal conductivity.

[0111] Optionally, the simulation module 604 includes:

[0112] The warping simulation network prediction unit is used to input the performance parameters of all the structural pieces of the single board into the warping simulation network to obtain the z-axis coordinates of each structural piece when warping occurs at different temperatures.

[0113] Optionally, the single board warping simulation data determination module 605 includes:

[0114] A target structure piece determination unit, used to determine a mounting layer of the single board, and determine a target structure piece belonging to the mounting layer;

[0115] The second warping simulation data generating unit is used to generate the second warping simulation data of the single board by using the z-axis coordinate of the target structure sheet where the warping occurs at the target temperature and the second position of the target structure sheet.

[0116] Optionally, the second warping simulation data generating unit includes:

[0117] A mapping subunit, configured to map the z-axis coordinates of the target structure sheet warping at the target temperature to the single board according to the second position, so as to obtain the z-axis coordinates of multiple points of the single board when the single board warps at the target temperature;

[0118] The second warping simulation data determining unit is used to select z-axis coordinates of a preset number of target points from the z-axis coordinates of the plurality of points as second warping simulation data when the single board warps at a target temperature.

[0119] Optionally, also include:

[0120] A finite element simulation module, used to simulate the single board using finite element simulation software to obtain fourth warping simulation data when the single board warps at a target temperature;

[0121] An error calculation module, used for calculating the error through the fourth warping simulation data and the second warping simulation data of the single board;

[0122] The error judgment module is used to judge whether the error is less than the error threshold. If so, the whole board warpage simulation data determination module 606 is executed; if not, the performance parameter acquisition module 603 is executed.

[0123] The circuit board warping simulation device provided in the embodiment of the present invention can execute the circuit board warping simulation method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0124] Embodiment 4

[0125] Figure 7 A schematic diagram of a circuit board warpage simulation device 40 that can be used to implement an embodiment of the present invention is shown. The circuit board warpage simulation device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The circuit board warpage simulation device can also represent various forms of mobile devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0126] like Figure 7 As shown, the circuit board warpage simulation device 40 includes at least one processor 41, and a memory connected to the at least one processor 41, such as a read-only memory (ROM) 42, a random access memory (RAM) 43, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 41 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 42 or the computer program loaded from the storage unit 48 to the random access memory (RAM) 43. In the RAM 43, various programs and data required for the operation of the circuit board warpage simulation device 40 can also be stored. The processor 41, the ROM 42, and the RAM 43 are connected to each other through a bus 44. An input / output (I / O) interface 45 is also connected to the bus 44.

[0127] A number of components in the circuit board warpage simulation device 40 are connected to the I / O interface 45, including: an input unit 46, such as a keyboard, a mouse, etc.; an output unit 47, such as various types of displays, speakers, etc.; a storage unit 48, such as a disk, an optical disk, etc.; and a communication unit 49, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 49 allows the circuit board warpage simulation device 40 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0128] The processor 41 may be a variety of general and / or dedicated processing components with processing and computing capabilities. Some examples of the processor 41 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 41 executes the various methods and processes described above, such as a circuit board warpage simulation method.

[0129] In some embodiments, the circuit board warpage simulation method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 48. In some embodiments, part or all of the computer program may be loaded and / or installed on the circuit board warpage simulation device 40 via the ROM 42 and / or the communication unit 49. When the computer program is loaded into the RAM 43 and executed by the processor 41, one or more steps of the circuit board warpage simulation method described above may be performed. Alternatively, in other embodiments, the processor 41 may be configured to execute the circuit board warpage simulation method in any other appropriate manner (e.g., by means of firmware).

[0130] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0131] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0132] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0133] To provide interaction with a user, the systems and techniques described herein may be implemented on a circuit board warpage simulation device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the circuit board warpage simulation device. Other types of devices may also be used to provide interaction with a user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0134] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0135] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0136] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0137] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A circuit board warping simulation method, characterized in that: Used to perform warpage simulation on a whole board, the whole board includes multiple single boards, including: Determine a first position of each single board on the whole board to be simulated according to the layout of the single boards on the whole board; rasterizing each single board to obtain a plurality of structural pieces of the single board, and determining a second position of each structural piece in the single board; Obtaining performance parameters of each structural piece; Inputting the performance parameters into a warpage simulation network to obtain first warpage simulation data for each structural piece; Determining second warping simulation data of the single board according to the first warping simulation data of each of the structural pieces and the second position; The second warping simulation data of the single board is mapped to the whole board according to the first positions of all the single boards to obtain the third warping simulation data of the whole board.

2. The circuit board warping simulation method according to claim 1, characterized in that: Rasterizing each single board to obtain a plurality of structural pieces of the single board, and determining a second position of each structural piece in the single board, comprising: Gridding the single board to obtain a plurality of grids based on the size of the single board; Layering each grid according to the stacked structure of the single board to obtain a plurality of structural sheets; The layer and grid where each structural piece is located are determined as the second position of the structural piece in the single board.

3. The circuit board warping simulation method according to claim 1, characterized in that: Get the performance parameters of each structural piece, including: In response to the user's input operation, a performance parameter of each structural slice is determined, where the performance parameter includes at least one of the following: The first expansion coefficient when the temperature is less than the glass transition temperature, the second expansion coefficient when the temperature is greater than the glass transition temperature, the glass transition temperature, the storage modulus at different temperatures, Poisson's ratio, density, specific heat capacity and thermal conductivity.

4. The circuit board warping simulation method according to any one of claims 1 to 3, characterized in that: Inputting the performance parameters into the warpage simulation network to obtain first warpage simulation data of each structural piece includes: The performance parameters of all the structural sheets of the single board are input into the warping simulation network to obtain the z-axis coordinates of each structural sheet when warping occurs at different temperatures.

5. The circuit board warping simulation method according to claim 4, characterized in that: Determining second warping simulation data of the single board according to the first warping simulation data of each of the structural sheets and the second position includes: Determining a mounting layer of the single board, and determining a target structure piece belonging to the mounting layer; The second warping simulation data of the single board is generated by using the z-axis coordinate of the target structure sheet at which warping occurs at the target temperature and the second position of the target structure sheet.

6. The circuit board warpage simulation method according to claim 5, characterized in that: Generating second warping simulation data of the single board using the z-axis coordinate of the target structure piece and the second position of the target structure piece, comprising: Mapping the z-axis coordinates of the target structure sheet warping at the target temperature to the single board according to the second position to obtain the z-axis coordinates of multiple points of the single board when the single board warps at the target temperature; The z-axis coordinates of a preset number of target points are selected from the z-axis coordinates of the plurality of points as second warping simulation data when the single board warps at the target temperature.

7. The circuit board warping simulation method according to claim 6, characterized in that: Before mapping the second warping simulation data of the single board to the whole board according to the first positions of all the single boards to obtain the third warping simulation data of the whole board, the method further includes: Simulating the single board using finite element simulation software to obtain fourth warping simulation data when the single board warps at a target temperature; Calculating an error using fourth warping simulation data and second warping simulation data of the single board; Determining whether the error is less than an error threshold; If so, performing a step of mapping the second warping simulation data of the single board to the whole board according to the first position of the single board to obtain third warping simulation data of the whole board; If not, return to the step of obtaining the performance parameters of each structural slice.

8. A circuit board warping simulation device, characterized in that: Used to perform warpage simulation on a whole board, the whole board includes multiple single boards, including: A single board position determination module, used to determine a first position of each single board on the whole board to be simulated according to the layout of the single boards on the whole board; A structure slice division module, used for rasterizing each single board to obtain a plurality of structure slices of the single board, and determining a second position of each structure slice in the single board; A performance parameter acquisition module is used to obtain the performance parameters of each structural slice; A simulation module, used for inputting the performance parameters into a warping simulation network to obtain first warping simulation data of each structural piece; A single board warping simulation data determining module, configured to determine second warping simulation data of the single board according to the first warping simulation data of each of the structural pieces and the second position; The whole board warping simulation data determination module is used to map the second warping simulation data of the single board to the whole board according to the first positions of all single boards to obtain the third warping simulation data of the whole board.

9. A circuit board warping simulation device, characterized in that: The circuit board warping simulation device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the circuit board warpage simulation method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the circuit board warpage simulation method according to any one of claims 1 to 7 is implemented.

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