Novel integrated transformer structure

Abstract

The novel integrated transformer structure comprises a dielectric layer and a substrate layer which are sequentially arranged, a first primary coil and a second primary coil which are located at the same height of the dielectric layer are arranged on the dielectric layer, and a first secondary coil and a second secondary coil which are located at the same height of the substrate layer are arranged on the substrate layer; a first bonding pad and a second bonding pad are arranged on the first primary coil; a third bonding pad and a fourth bonding pad are arranged on the second primary coil; a gap is formed between the first primary coil and the second primary coil in the direction perpendicular to the height of the dielectric layer. The equivalent isolation distance between the source side and the secondary side is doubled, so that the voltage endurance capability is improved by 100%; and the equivalent parasitic capacitance between the source side and the secondary side is reduced by 50%, so that the common-mode noise current is reduced by 50%, and the common-mode rejection ratio is improved by 100%.

Description

Technical Field

[0001] The invention relates to the technical field of electronic circuits, and in particular to a novel integrated transformer capable of improving isolation voltage and common-mode transient suppression ratio, which is a novel integrated transformer structure. Background Art

[0002] Integrated transformers are important components in magnetic isolation devices. Isolation voltage and common-mode transient suppression ratio are two important indicators for measuring magnetic isolation devices, and both are directly related to the thickness of the dielectric layer of the integrated transformer. The thicker the dielectric layer, the higher the withstand voltage of the integrated transformer; at the same time, the parasitic capacitance between the source and secondary sides of the integrated transformer is also smaller, which can effectively reduce common-mode transient noise and improve the common-mode transient suppression ratio. However, the thicker the dielectric layer, the more complex the required processing technology and the higher the cost. Summary of the invention

[0003] The purpose of the present invention is to overcome the defects in the prior art and provide a new integrated transformer structure, which can achieve a 100% increase in withstand voltage, a 50% reduction in common-mode noise current, and a 100% increase in common-mode rejection ratio without changing the process flow or increasing the process difficulty.

[0004] To achieve the above-mentioned purpose, the technical solution of the present invention is to design a new integrated transformer structure, including a dielectric layer and a substrate layer arranged in sequence, a first primary coil and a second primary coil located at the same height of the dielectric layer are arranged on the dielectric layer, and a first secondary coil and a second secondary coil located at the same height of the substrate layer are arranged on the substrate layer; a first pad and a second pad are arranged on the first primary coil; a third pad and a fourth pad are arranged on the second primary coil; and a spacing is arranged between the first primary coil and the second primary coil in a direction perpendicular to the height of the dielectric layer. The two coils (referring to the first primary coil and the second primary coil) are not connected to each other, and due to the large spacing, there is no magnetic coupling between the two coils.

[0005] A further technical solution is that the first secondary coil and the second secondary coil are connected in series or in parallel through a metal wire; the first primary coil and the first secondary coil are arranged opposite to each other; and the second primary coil and the second secondary coil are arranged opposite to each other.

[0006] A further technical solution is that after the input signal is input from the first primary coil or the second primary coil, the first primary coil or the second primary coil generates a first magnetic field, part of the magnetic flux lines of the first magnetic field pass through the first secondary coil or the second secondary coil, inducing an induced current in the first secondary coil or the second secondary coil, and the induced current flows through the second secondary coil or the first secondary coil to generate a second magnetic field, and part of the magnetic flux lines of the second magnetic field pass through the second primary coil or the first primary coil to induce an output voltage.

[0007] A further technical solution is that when there is a DC high voltage HV or AC high voltage HV between the first primary coil and the second primary coil, the voltage is distributed on the parasitic capacitance between the first primary coil and the first secondary coil and the parasitic capacitance between the second primary coil and the second secondary coil. Since the two parasitic capacitors are in series, when the two are equal, the voltage on them is only 0.5HV, so the withstand voltage is doubled.

[0008] A further technical solution is that when there is a common-mode transient change with a slope of dv / dt between the first primary coil and the second primary coil, the parasitic capacitance between the first primary coil and the first secondary coil is equal to the parasitic capacitance between the second primary coil and the second secondary coil, the common-mode noise current Icm generated is halved.

[0009] The advantages and beneficial effects of the present invention are:

[0010] 1. The equivalent isolation distance between the source side and the secondary side is doubled, which increases the withstand voltage by 100%;

[0011] 2. The equivalent parasitic capacitance between the source side and the secondary side is reduced by 50%, which reduces the common-mode noise current by 50% and improves the common-mode rejection ratio by 100%;

[0012] 3. While achieving the above advantages, the process flow has not been changed, which increases the process difficulty. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a cross-sectional schematic diagram of a novel integrated transformer structure of the present invention;

[0014] Figure 2 yes Figure 1 A top view of the middle coil 1 and coil 2;

[0015] Figure 3 yes Figure 1 A top view of the middle coil 3a and coil 3b;

[0016] Figure 4 It is a circuit model of a novel integrated transformer structure of the present invention;

[0017] Figure 5 It is a signal transmission principle diagram of a novel integrated transformer structure of the present invention;

[0018] Figure 6 This is a schematic diagram of the voltage resistance improvement of a novel integrated transformer structure of the present invention;

[0019] Figure 7 The present invention discloses a novel integrated transformer structure for improving the common-mode transient suppression ratio. DETAILED DESCRIPTION

[0020] The specific implementation of the present invention is further described below in conjunction with the accompanying drawings and embodiments. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present invention.

[0021] like Figures 1 to 7 As shown, the present invention is a new integrated transformer structure. Figure 1 The figure shows a cross-sectional view of the integrated transformer. The integrated transformer mainly includes coil 1, coil 2, coil 3a, coil 3b, a dielectric layer and a substrate. Coil 1 also includes two metal PADs (pads), PAD1 and PAD2; coil 2 also includes two metal PADs, PAD3 and PAD4.

[0022] like Figure 1 As shown, coil 1 is opposite to coil 3a, with a longitudinal distance D; coil 2 is opposite to coil 3b, with a longitudinal distance D. Coil 1 and coil 2 are located in the same horizontal plane, with a horizontal distance H; coil 3a and coil 3b are located in the same horizontal plane.

[0023] Figure 2 The top view of coil 1 and coil 2 is shown. The two coils are not connected to each other, and because H is large, there is no magnetic coupling between the two coils.

[0024] Figure 3 The figure shows a top view of coil 3a and coil 3b. The two coils are connected by a metal wire and can be connected in parallel or in series.

[0025] Figure 4 is the circuit model of the integrated transformer. Wherein, L1 is the inductance of coil 1, L2 is the inductance of coil 2, L3a is the inductance of coil 3a, and L3b is the inductance of coil 3b. C13 is the parasitic capacitance between coil 1 and coil 3a, and C23 is the parasitic capacitance between coil 2 and coil 3b. k1 is the coupling coefficient between coil 1 and coil 3a, and k2 is the coupling coefficient between coil 2 and coil 3b.

[0026] like Figure 5 As shown, when the signal VIN is input to L1, L1 generates magnetic field 1; part of the magnetic flux lines of magnetic field 1 pass through L3a, inducing current Isense in L3a; Isense flows through L3b, generating magnetic field 2; magnetic field 2 passes through L2, inducing output voltage VOUT; VIN can also be input from L2, and L1 generates output voltage VOUT.

[0027] like Figure 6 As shown, when there is a DC or AC high voltage HV between coil 1 and coil 2, the voltage will be distributed on C13 and C23. Since C13 and C23 are in series, when C13 = C23, the voltage on them is only 0.5HV, so the withstand voltage capacity is doubled.

[0028] like Figure 7 As shown, since C13 and C23 are in series relationship, when there is a common-mode transient change with a slope of dv / dt between coil 1 and coil 2, the common-mode noise current Icm generated is halved, so the common-mode rejection ratio can be doubled.

[0029] Compared with the traditional sandwich structure integrated transformer, the advantages of the present invention include:

[0030] 1. The equivalent isolation distance between the source side and the secondary side is doubled, which increases the withstand voltage by 100%;

[0031] 2. The equivalent parasitic capacitance between the source side and the secondary side is reduced by 50%, which reduces the common-mode noise current by 50% and improves the common-mode rejection ratio by 100%;

[0032] 3. While achieving the above advantages, the process flow has not been changed, which increases the process difficulty.

[0033] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A novel integrated transformer structure, characterized in that: It includes a dielectric layer and a substrate layer arranged in sequence, wherein a first primary coil and a second primary coil located at the same height of the dielectric layer are arranged on the dielectric layer, and a first secondary coil and a second secondary coil located at the same height of the substrate layer are arranged on the substrate layer; a first welding pad and a second welding pad are arranged on the first primary coil; a third welding pad and a fourth welding pad are arranged on the second primary coil; and a spacing is arranged between the first primary coil and the second primary coil in a direction perpendicular to the height of the dielectric layer.

2. A novel integrated transformer structure according to claim 1, characterized in that: The first secondary coil and the second secondary coil are connected in series or in parallel through a metal wire; the first primary coil and the first secondary coil are arranged opposite to each other; and the second primary coil and the second secondary coil are arranged opposite to each other.

3. A novel integrated transformer structure according to claim 2, characterized in that: After the input signal is input from the first primary coil or the second primary coil, the first primary coil or the second primary coil generates a first magnetic field, part of the magnetic flux lines of the first magnetic field pass through the first secondary coil or the second secondary coil, inducing an induced current in the first secondary coil or the second secondary coil, and the induced current flows through the second secondary coil or the first secondary coil to generate a second magnetic field, and part of the magnetic flux lines of the second magnetic field pass through the second primary coil or the first primary coil to induce an output voltage.

4. A novel integrated transformer structure according to claim 3, characterized in that: When there is a DC high voltage HV or an AC high voltage HV between the first primary coil and the second primary coil, the voltage is distributed on the parasitic capacitance between the first primary coil and the first secondary coil and the parasitic capacitance between the second primary coil and the second secondary coil.

5. A novel integrated transformer structure according to claim 4, characterized in that: When there is a common mode transient change with a slope of dv / dt between the first primary coil and the second primary coil, when the parasitic capacitance between the first primary coil and the first secondary coil is equal to the parasitic capacitance between the second primary coil and the second secondary coil, the generated common mode noise current Icm is halved.

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