Dual-switching power supply device

Abstract

The invention relates to a dual-switching power supply device. An electronic device (100) includes a package structure (108), conductive leads (109, 114, 116), a first semiconductor die (121) and a second semiconductor die (122), and a metal clip (133). The package structure (108) has opposite longitudinal ends (103, 104), opposite lateral sides (105, 106), an intermediate portion (M) intermediate the longitudinal ends (103, 104), a first portion (P1) extending between the intermediate portion (M) and one longitudinal end (104), and a second portion (P2) extending between the intermediate portion (M) and the other longitudinal end (103). The metal clip (133) extends in the package structure (108) from the first portion (P1) through the intermediate portion (M) to the second portion (P1) and electrically couples a first electronic component (Q1) of the first semiconductor die (121) to a second electronic component (Q2) of the second semiconductor die (122).

Description

Technical Field

[0001] The present disclosure relates to a dual switching power supply device. Background Art

[0002] Power systems are used in a variety of applications, such as automotive components, industrial systems, computing devices, smartphones, etc. As advanced systems become smaller, power converter designs require smaller footprints, ease of use, and lower costs. All in one power module is desirable for miniaturization, but considering the cost and flexibility of design, in some cases, it may be better to design power circuits with discrete products, and component product offerings must provide design flexibility and device capabilities to accommodate different design approaches. Many AC-DC or DC-AC circuits require at least two switching power devices, driver circuit systems, and passive components in a half-bridge circuit. Summary of the invention

[0003] In one aspect, an electronic device includes a package structure having opposite longitudinal ends and opposite lateral sides, a conductive lead partially exposed outside the lateral sides of the package structure, a first semiconductor die and a second semiconductor die, and a metal clip. The package structure has a middle portion located in the middle of the longitudinal ends, a first portion extending between the middle portion and one longitudinal end, and a second portion extending between the middle portion and the other longitudinal end. The metal clip extends from the first portion through the middle portion to the second portion in the package structure, and electrically couples a first electronic component of the first semiconductor die to a second electronic component of the second semiconductor die.

[0004] On the other hand, an electronic device includes: a packaging structure having relative longitudinal ends spaced apart from each other along a first direction, and relative lateral sides spaced apart from each other along a second direction orthogonal to the first direction; a conductive lead partially exposed outside the corresponding lateral side of the packaging structure; a semiconductor die having an electronic component; and a metal clip electrically coupled to the electronic component and exposed outside a first of the longitudinal ends.

[0005] In another aspect, a system includes a circuit board and an electronic device attached to the circuit board. The electronic device includes a package structure having opposite longitudinal ends and opposite lateral sides, a conductive lead partially exposed outside the lateral sides of the package structure and soldered to a conductive feature of the circuit board, a first semiconductor die and a second semiconductor die, and a metal clip. The package structure has a middle portion located in the middle of the longitudinal ends, a first portion extending between the middle portion and one longitudinal end, and a second portion extending between the middle portion and the other longitudinal end. The metal clip extends from the first portion through the middle portion to the second portion in the package structure, and electrically couples a first electronic component of the first semiconductor die to a second electronic component of the second semiconductor die.

[0006] On the other hand, a method for manufacturing an electronic device includes: attaching a first semiconductor die to a first die attach pad in a first row of a column of a lead frame panel array; attaching a second semiconductor die to a second die attach pad in an adjacent second row of the column of the lead frame panel array; attaching a metal clip to the first semiconductor die and the second semiconductor die, wherein the metal clip extends in the first row and the second row; forming a packaging structure, the packaging structure extending along the column and enclosing the first semiconductor die and the second semiconductor die and the metal clip; trimming conductive leads along the longitudinal sides of the column of the lead frame panel array; and separating the electronic device from the lead frame panel array. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a top perspective view of an electronic device including a half-bridge circuit having high-side and low-side transistors in respective sections and a switching node clip extending through a middle section.

[0008] Figure 1A yes Figure 1 A top plan view of an electronic device.

[0009] Figure 1B yes Figure 1 and 1A A top perspective view of an electronic device.

[0010] Figure 1C yes Figure 1-1B A bottom perspective view of an electronic device.

[0011] Figure 1D Among them Figure 1-1C A top plan view of a power conversion system with an electronic device attached to a circuit board.

[0012] Figure 1E yes Figure 1DSimplified schematic diagram of the power conversion system.

[0013] Figure 2 is a flow chart of a method of manufacturing an electronic device.

[0014] Figure 3-14 is a lead frame panel array column and adjacent first and second rows undergoing manufacturing processing Figure 1-1C A partial top view of an electronic device.

[0015] Fig.14A is a partial top plan view of two adjacent single transistor electronic devices fabricated in another column of a lead frame panel array.

[0016] Fig. 14B is a partial top perspective view of two adjacent columns of a lead frame panel array after column direction lead trimming and before row direction package separation.

[0017] Fig. 14C is a partial top perspective view of portions of two adjacent columns of a lead frame panel array after selective row direction package separation.

[0018] Fig.14D is a partial top plan view of two additional adjacent electronic devices in another column of the lead frame panel array after selective row direction package separation by cutting through a portion of the column molded package structure and clip. DETAILED DESCRIPTION

[0019] In the drawings, the same reference numerals refer to the same elements throughout the text, and various features are not necessarily drawn to scale. In addition, the term "coupling (couple)" or "coupling (couples)" includes indirect or direct electrical connection or mechanical connection or its combination. For example, if the first device is coupled to the second device or coupled with the second device, the connection can be directly electrically connected, or by an indirect electrical connection via one or more intervening devices and connections. The following describes one or more operating characteristics of various circuits, systems and / or components in the context of function, which are generated by the configuration and / or interconnection of various structures when the circuit system is powered on and operated in some cases. Unless otherwise stated, the "about", "approximately" or "substantially" in front of the value means + / -10% of the stated value. The following describes one or more operating characteristics of various circuits, systems and / or components in the context of function, which are generated by the configuration and / or interconnection of various structures when the circuit system is powered on and operated in some cases. For the convenience of description in conjunction with specific figures, one or more structures, features, aspects, components, etc. may be referred to as first, second, third, etc. in this document, such as a first terminal and a second terminal, a first well, a second well, and a third well, etc., which should not be construed as limitations on the claims.

[0020] First reference Figure 1-1C , Figure 1 An electronic device 100 is shown including a half-bridge circuit having a high-side transistor and a low-side transistor in respective portions, and a switch node clip extending through a middle portion in a transistor outline (TO) leadless package arrangement (TOLL). Figure 1A A top view of the electronic device 100 is shown. Figure 1B Show a top-down perspective view, and Figure 1C A bottom perspective view is shown. The electronic device 100 provides a modular power stage functionality with two drivers and transistor cells connected by a metal switching node clip to implement a half-bridge module that can be used in a power supply system.

[0021] Figure 1-1C The electronic device 100 is shown in an example position in a three-dimensional space having a first direction X, a perpendicular (orthogonal) second direction Y ( Figure 1A ) and a third direction Z perpendicular (orthogonal) to the corresponding first direction X and second direction Y. The structures or features along any two of these directions are orthogonal to each other. Figure 1 , 1B As shown in 1C and 1C, the electronic device 100 has opposing first and second sides 101 (e.g., bottom sides) and 102 (e.g., top sides), respectively, which are spaced apart from each other along a third direction Z in the illustrated orientation. The electronic device 100 has opposing third and fourth sides 103 and 104, also referred to herein as longitudinal ends 103 and 104, which are spaced apart from each other along the first direction X and extend along the second direction Y. The electronic device 100 also includes respective fifth and sixth sides 105 and 106, also referred to as opposing lateral sides 105 and 106, which are spaced apart from each other along the second direction Y in the illustrated position.

[0022] The electronic device 100 has a molded package structure 108 that forms part of the device side 101-106. The package structure 108 has a notch 107 extending into the longitudinal ends 103 and 104. In the illustrated example, the respective sides 101-106 are generally planar, the bottom side 101 and the top side 102 extend in respective XY planes, and the longitudinal ends 103 and 104 extend in respective YZ planes of the second direction Y and the third direction Z. In one example, the sides 101-106 have a substantially flat outer surface. In other examples, one or more of the sides 101-106 have a curve, an inclined feature, or other non-planar surface feature. The package structure 108 has a middle portion M that is located approximately in the middle of the longitudinal ends 103 and 104 along a centerline C. The encapsulation structure 108 also has a first portion P1 extending between the middle portion M and one of the longitudinal ends 104 , and a second portion P2 extending between the middle portion M and the other of the longitudinal ends 103 .

[0023] The electronic device 100 also includes a conductive lead 109 along the lateral fifth side 105, a first conductive metal die attach pad 111 in the first portion P1, a second conductive metal die attach pad 112 in the second portion P2, a first transistor drain lead frame portion 113 having a conductive lead 114 along the lateral sixth side 106 in the first portion P1, and a second transistor drain lead frame portion 115 having a conductive lead 116 along the sixth side 106 in the second portion P2. In one example, the leads 109, 114, and 116, the die attach pads 111 and 112, and the lead frame portions 113 and 115 are or include copper or other suitable conductive metals. The conductive lead 109 is partially exposed outside the lateral side 105, and the conductive leads 114 and 116 are partially exposed outside the lateral side 106 of the package structure 108. As shown in FIG. Figure 1C As further shown in FIG. 1 , in addition, the bottoms of the conductive leads 109 , 114 , and 116 , the bottom sides of the conductive metal die attach pads 111 and 112 , and the bottom sides of the lead frame portions 113 and 115 are exposed outside the package structure 108 along the first side or bottom side 101 of the electronic device 100 .

[0024] When used in a host system (for example, Figure 1D), the bottoms of the conductive leads 109, 114, and 116 can be soldered to corresponding conductive metal features (e.g., pads) of a host circuit board to provide electrical connection to the circuit system of the electronic device 100, and the bottom sides of the conductive metal die attach pads 111 and 112 and one or more of the bottom sides of the lead frame portions 113 and 115 can also be soldered to the host circuit board. In addition, the sides of one or more of the conductive leads 109, 114, and / or 116 can be adapted to adhere to solder, for example, to promote solder wetting and proper solder connection during attaching the electronic device 100 to the host circuit board.

[0025] like Figure 1-1B As shown in , the example package structure 108 has an opening 119 extending into the middle portion M along the third direction Z. In the illustrated example, portions of the first die attach pad 111 and the second die attach pad 112 are exposed in the opening 119 of the package structure 108 .

[0026] like Figure 1 and 1A As best shown in FIG. 1 , the electronic device 100 includes a solder 120 ( Figure 1 ) is attached to the first semiconductor die 121 of the first conductive metal die attach pad 111 in the first portion P1, and the first semiconductor die 121 is attached to ... Figure 1 ) is attached to the second semiconductor die 122 of the second conductive metal die attach pad 112 in the second portion P2. In this example, Figure 1 and 1A The first semiconductor die 121 and the second semiconductor die 122 have corresponding first transistor electronic components and second transistor electronic components (eg, Figure 1E Field effect transistors Q1 and Q2 are schematically illustrated in FIG. Figure 1E The transistor Q1 in Figure 1 and 1A The transistor of the first semiconductor die 121 in the embodiment of the present invention is configured as a high-side transistor of a half-bridge circuit, wherein the half-bridge circuit includes a Figure 1 The schematically connected first drain electrode D1 and first source electrode S1, and the first gate electrode G1 ( Figure 1E ). In this example, the second transistor Q2 is configured as a low-side transistor of the half-bridge circuit, and the low-side transistor has a second drain D2, a second source S1, and a second gate G2. The first semiconductor die 121 and the second semiconductor die 122 can be any suitable semiconductor material, such as silicon, gallium nitride, etc.

[0027] like Figure 1 and 1AAs further shown in FIG. 1 , the electronic device 100 also includes conductive metal clips 131-133, which may be or include copper or other suitable conductive metal materials. The illustrated example includes a first metal clip 131 affixed by solder 130 to form a mechanical and electrical connection between the first transistor drain leadframe portion 113 and a conductive drain terminal on the top side of the first semiconductor die 121, thereby providing a first drain connection D1 to the conductive lead 114 along the lateral sixth side 106 of the electronic device 100. In this example, a second metal clip 132 affixed by solder 130 to form a mechanical and electrical connection between the first pair of conductive leads 109 of the second portion P2 and a conductive source terminal on the top side of the second semiconductor die 122, thereby providing a second source connection S2 along the lateral fifth side 105 of the electronic device 100. In another embodiment, a wire bond connection (not shown) may be used to provide electrical interconnection of the first drain D1 and the second source S2 , and the associated first metal clip 131 and / or second metal clip 132 may be omitted.

[0028] The electronic device 100 also includes a third metal clip 133 enclosed by the package structure 108. The package structure 108 also encloses the semiconductor dies 121 and 122 and the inner portions of the conductive leads 109, 114, 116 and the die attach pads 111 and 112. The metal clip 133 and any included clips 131 and / or 132 can be any suitable conductive metal material, such as copper or a material including copper or other conductive metal. The third metal clip 133 extends from the first portion P1 through the middle portion M to the second portion P1 in the package structure 108, and electrically couples the first electronic component Q1 of the first semiconductor die 121 to the second electronic component Q2 of the second semiconductor die 122.

[0029] The metal clip 133 extends from the first portion P1 through the middle portion M to the second portion P1 in the package structure 108 and electrically couples the first electronic component Q1 of the first semiconductor die 121 to the second electronic component Q2 of the second semiconductor die 122. Figure 1 and 1A As shown in the illustrated example, the metal clip 133 provides a switching node SW that is connected to the first source S1 of the first semiconductor die 121 in the first portion P1 and to the second drain D2 of the second semiconductor die 122 in the second portion P2. In this example, the metal clip 133 also provides a mechanical and electrical connection of the first source S1 in the first portion P1 to the two conductive leads 109 along the fifth side 105, and a mechanical and electrical connection of the second drain D2 in the second portion P2 to the second transistor drain lead frame portion 115 and the conductive lead 116 along the sixth side 106.

[0030] The illustrated metal clip 133 surrounds the opening 119 and has two branch portions that extend separately through the middle portion M around two opposite sides of the opening 119. In another example, the metal clip 133 need not laterally surround the opening 119 and may have one or more portions extending through the middle portion M on only one side of the opening 119. In another example, the metal clip 133 may have more than one portion extending through the middle portion M on either or both lateral sides of the opening 119. In another example, the opening 119 of the package structure 108 may be omitted.

[0031] Figure 1-1C The electronic device 100 in the embodiment of the present invention provides an integrated half-bridge transistor circuit that can be used as a module in building a variety of different power converter architectures, thereby providing a compact module that can be integrated with other external components, such as on a host printed circuit board, as described below in conjunction with Figure 1D and 1E It should also be noted that the illustrated structure can be modified by cutting along the center line C to provide individual single transistor modules that can be used as components in, for example, power converters or other transistor circuits, as described below in conjunction with Fig.14D Further explanation and description.

[0032] In the illustrated example, the electronic device 100 also includes onboard driver circuitry, with a first driver die 141 attached to a portion of the top side of the metal clip 133 in the first portion P1 by an adhesive 140 (e.g., epoxy), and a second driver die 142 attached to a portion of the top side of the second metal clip 132 by the adhesive 140. The electronic device 100 also includes bonding wires 144 that form circuit connections between the respective driver dies 141 and 142 and the transistor electronic components of the semiconductor dies 121 and 122, as well as connections to respective ones of the conductive leads 109, for example, to enable connection of transistor switching control signals from other components or systems of a host printed circuit board.

[0033] The metal clip 133 in the electronic device 100 advantageously provides interconnection of high-side circuitry and low-side circuitry in the respective first and second portions P1 and P2 through conductive metal switching node structures that can carry high currents associated with the power conversion circuitry. In this regard, the metal clip 133 can be constructed of copper or other suitable metal having a thickness greater than the thickness of the structures 109 and 111-116 of the starting lead frame to advantageously utilize an existing lead frame structure (e.g., having a thickness of approximately 0.5 mm), possibly utilizing multiple leads 109, 114, and / or 116 for high current circuit nodes, while using the higher current carrying capacity of the metal clip 133 to accommodate switching node currents in the power converter. The electronic device 100 and its variations also facilitate sharing tools and machines with other power conversion system components and modules when constructing full-bridge power conversion systems and half-bridges in other circuit topologies.

[0034] In addition, the illustrated examples provide a modular half-bridge module that uses a transistor outline no-lead (TOLL) structure to enable compact system design while providing high switching node current capability compared to standard printed circuit board copper traces to interconnect the switching node with an inductor or other power converter components. The TOLL package of the illustrated examples facilitates use in high current applications such as automotive systems, industrial systems, computers, smartphones, battery chargers, etc., and can facilitate high power applications with good efficiency, low electromagnetic interference (EMI) performance, and / or good thermal performance in compact high circuit density applications.

[0035] Additionally, the high current capabilities of the metal clip 133 and various circuit nodes of the electronic device 100 advantageously promote low parasitic inductance, low impedance, and improved thermal performance in power conversion and other system applications, and the modular construction of the electronic device 100 can help reduce component count, cost, and circuit area in surface mount technology (SMT) implementations of a host printed circuit board, and provide ease of manufacturing and low cost to the end user.

[0036] Also refer to Figure 1D and 1E , Figure 1D A top view of a power conversion system 150 is shown in which the electronic device 100 is attached to a circuit board 151, and Figure 1E A simplified schematic diagram of a power conversion system 150 is shown. In this example, the conductive leads 109, 114, and 116 of the electronic device 100 are soldered to corresponding conductive pads on the top side of the circuit board 151 and other components on the top side of the circuit board 151 using conventional surface mount technology processes.

[0037] Figure 1EThe example power conversion circuit in the embodiment includes: a gate drive power regulator 152, such as a gate drive power regulator 152, Figure 1D A low voltage dropout (LDO) circuit formed by various components on the circuit board 151; and a controller chip 154, which is implemented by soldering to Figure 1D Another electronic device of the circuit board 151 shown in . The circuit board 151 also includes: various passive components, such as input capacitor CI and output capacitor CO; a switching inductor L connected between the output node and the switching node SW; and various terminals, which allow power signals and control signals to be connected to the circuit board 151.

[0038] In this example, electronic device 100 includes onboard driver circuit dies 141 and 142 that may implement Figure 1E , a gate driver circuit, a bootstrap diode, isolation and level shifting circuitry, etc. of the buck converter circuit shown in . As described above, providing separate driver dies 141 and 142 in the respective first and second portions P1, P2 of the electronic device 100 facilitates selective cutting along the center line C so as to selectively provide individual single transistor modules that can (but need not) be interconnected, as well as a half-bridge circuit. In another embodiment, a single driver die (not shown) may be provided in the first portion P1 or the second portion P2 in the half-bridge electronic device 100, or such a single driver die may extend at least partially in the middle portion M or in any two or more of the illustrated portions P1, P2, M.

[0039] Reference now Figure 2-14 , Figure 2 A method 200 of manufacturing an electronic device is shown, and Figure 3-14 The electronic device 100 is shown undergoing a manufacturing process in a first column and adjacent first and second rows of a lead frame panel array, as well as other electronic devices undergoing a simultaneous manufacturing process in a lead frame panel array.

[0040] The method 200 begins by forming a starting lead frame panel array in rows R and columns C having conductive metal features (eg, copper, aluminum, etc.). Figure 3 A portion of an example lead frame panel array 302 is shown having a single composite cell area 304 that includes two adjacent (e.g., first and second) rows RN-1 and RN in a first column CN in an array configuration and adjacent rows RN-2 and RN+1 and portions of columns CN-1 and CN+1. In this example, the example first row RN-1 of column CN corresponds to the first portion P1 of the intended electronic device 100 described above, and the second row RN of column CN corresponds to the second portion P2 of the intended electronic device 100 described above.

[0041] Figure 2 The method 200 in the embodiment includes a die attach process at 202, including attaching of a first (e.g., power) semiconductor die 121 and a second (e.g., power) semiconductor die 122. The die attach process at 202 and other processing steps of the method 200 are shown in the figure with respect to the illustrated unit area 304, and these processing steps may include similar processing in other unit areas of the lead frame panel array 302 that are not shown in the figure.

[0042] Figure 3 An example is shown in which a die attach process 300 is performed to attach a first semiconductor die 121 to a first die attach pad 111 in a first row RN-1 of a column CN of a lead frame panel array 302. The die attach process 300 also attaches a second semiconductor die 122 to a second die attach pad 112 in an adjacent second row RN of a column CN of the lead frame panel array 302. The die bonding process 300 may also include bonding other semiconductor dies in other unit areas (not shown) of the lead frame panel array, for example by dispensing, printing, or otherwise providing solder and other electronic devices or conductive or non-conductive adhesives in selected portions of the top side of a particular lead frame feature, and placing the semiconductor die and corresponding positions on the solder paste or adhesive (for example, using automated pick-and-place equipment, not shown), and subsequent solder reflow and / or curing processing (for example, thermal reflow, thermal adhesive curing, UV adhesive curing, etc.) for adhering the semiconductor die to the corresponding positions of the lead frame panel array.

[0043] Method 200 Figure 2 Continuing at 204 , solder paste is formed on selected portions of the tops of semiconductor dies 121 and 122 and on selected portions of other leadframe structures and the top side of leadframe panel array 302 . Figure 4 An example is shown in which a solder paste forming process 400 (e.g., dispensing, screen printing, printing, etc.) is performed that forms solder paste 130 on selected portions of the top sides of semiconductor dies 121 and 122 and on portions of other lead frame features to facilitate subsequent electrical connection and mechanical attachment of metal clips in the illustrated cell area 304 of the lead frame panel array 302.

[0044] exist Figure 2 At 206 in the method 200, the method 200 optionally includes attaching the first metal clip and the second metal clip described above for electrical interconnection of the high-side drain connection and the low-side source connection of the half-bridge circuit. In another example, such connections may alternatively be formed by wire bonding (not shown). Figure 5An example is shown in which a clip bonding process 500 is performed that bonds a first metal clip 131 to a corresponding portion of the solder 130 to form a mechanical and electrical connection between a first transistor drain lead frame portion 113 and a conductive drain terminal on a top side of a first semiconductor die 121, thereby providing a first drain connection D1 to a conductive lead 114 along a lateral sixth side 106 of an intended electronic device 100 fabricated in the illustrated cell region 304.

[0045] In this example, the clip bonding process 500 also bonds the second metal clip 132 through the corresponding portion of the solder 130 to mechanically and electrically connect the first pair of conductive leads 109 of the second portion P2 to the conductive source terminals on the top side of the second semiconductor die 122 to provide a second source connection S2 along the lateral fifth side 105 of the intended electronic device 100, as described above.

[0046] In this example, the clip fit process also includes Figure 2 The switching node (eg, third) conductive metal clip 133 is selectively attached at 208 in the expected half-bridge electronic device unit area 304 as illustrated, wherein the metal clip 133 extends in the first row RN- 1 and the second row RN of the lead frame panel array 302 . Figure 6 An example is shown in which a clip attaching process 600 is performed, which may be a separate attaching process and / or a continuation of any included process 500 used in attaching any included first metal clip 131 and / or second metal clip 132. In the illustrated example, the attaching process 600 attaches the metal clip 133 within the first portion P1 and the second portion P2 and extending therebetween through the intended intermediate portion M (e.g., upper Figure 1 and 1A ), wherein two separate branch portions extending through the middle portion M2 surround a see-through opening in a subsequently formed molded package structure 108.

[0047] The metal clip 133 is attached through the corresponding portion of the solder 130 to electrically and mechanically connect or otherwise couple the first transistor electronic component Q1 of the first semiconductor die 121 to the second transistor electronic component Q2 of the second semiconductor die 122, thereby forming a half-bridge circuit switching node SW, which is connected to the first source S1 of the first semiconductor die 121 in the first portion P1 (row RN-1) and to the second drain D2 of the second semiconductor die 122 in the second portion P2 (row N). In this example, the metal clip 133 is also attached to the corresponding portion of the solder 130 to mechanically and electrically connect the first source S1 to the two conductive leads 109 along the fifth side 105 in the first portion P1 (row RN-1), and to mechanically and electrically connect the second drain D2 to the second transistor drain lead frame portion 115 and the conductive lead 116 along the sixth side 106 in the second portion P2 (row N).

[0048] In certain embodiments, such clips 133 may be Figure 2 The 208 in FIG. 20 is attached to other intended half-bridge electronic device unit regions of the lead frame panel array 302 and / or two adjacent intended single-transistor electronic device unit regions of the lead frame panel array 302 (e.g., along the illustrated column CN and / or two different adjacent rows of another column of the lead frame panel array 302, as described below in conjunction with Fig.14D as described and illustrated).

[0049] Method 200 Figure 2 Continuing at 210 , heat treatment is performed to reflow the solder paste 130 . Figure 7 An example is shown in which a heat reflow process 700 is performed to reflow the solder paste 130 to form solder connections of the clips 131-133 through the corresponding solder 130, as described above in conjunction with Figure 1-1C described.

[0050] exist Figure 2 At 212 , in the illustrated example, the method 200 includes forming a die attach film or adhesive on selected portions of the top sides of the second clip 132 and the third clip 133 . Figure 8 An example is shown in which a film forming process 800 (e.g., dispensing, screen printing, printing, etc.) is performed that forms epoxy or other suitable adhesive 140 on corresponding portions of clips 132 and 133. In another limitation, no driver die or a single driver die is used in the intended electronic device 100, and in the former case, the Figure 2 The film formation at 212 and the subsequent driver die bonding at 214.

[0051] The illustrated example method 200 is Figure 2The process continues with driver die attachment at 214 . Fig. 9 An example is shown in which another die attach process 900 is performed (eg, using automated pick and place equipment, not shown) that attaches the first driver die 141 and the second driver die 142 to the top sides of respective clips 133 and 132 .

[0052] In the illustrated example, method 200 Figure 2 The process continues at 216 with film solidification. Fig.10 An example is shown in which a curing process 1000 is performed that cures the adhesive 140 to fix the driver dies 141 and 142 to the respective clips 133 and 132 , for example, by a thermal curing process 1000 , a UV curing process 1000 , or the like.

[0053] exist Figure 2 At 218 , in the illustrated example, method 200 includes wire bonding. Fig.11 An example is shown in which a wire bonding process 1100 is performed that produces bond wires 144 for circuit connections of driver dies 141 and 142, as discussed above. In another embodiment, additional and / or different bond wires (not shown) may be produced at 218, e.g., to provide connections between one or more transistor die terminals and corresponding leads in the cell region 304, e.g., in place of or in addition to the electrical connections provided by the illustrated first clip 131 and / or second clip 132.

[0054] Method 200 Figure 2 The process continues with a molding process at 220 to form a molded package structure 108 along columns C of the lead frame panel array 302 . Fig.12 An example is shown in which the molding process 1200 is performed using a mold having downwardly extending features between adjacent columns and pillars to form the package structure openings 119 and / or recesses 107 described above.

[0055] In the illustrated example, the downwardly extending pillars engage portions of the first and second die attach pads 111 and 112 in the illustrated cell region 304 and other die attach pad structures in other rows and columns of the lead frame panel array 302, for example, to allow the molding compound 108 to flow properly during a mold filling operation so that the bottoms of the illustrated die attach pads 111 and 112 are not covered by the molding material and will eventually be exposed to the exterior of the bottom side 101 (e.g., the top) of the finished electronic device 100. Figure 1C ). Fig.12The depicted portion of the lead frame panel array 302 is illustrated after removal of the upper mold structure, wherein the molding process 1200 creates openings 119 that expose portions of the conductive metal die attach pads 111 and 112 .

[0056] Furthermore, in the illustrated example, the mold features do not engage the switch node clips 133, and the column length molded package structure 108 encloses the clips 133 in the illustrated cell region 304, but this is not a strict requirement for all possible implementations. The illustrated example forms the package structure 108 as a continuous molded structure that extends along the column CN and encloses the respective first and second semiconductor dies 121, 122 and the metal clips 133.

[0057] exist Figure 2 At 222 in the method 200, the column direction lead trimming continues. In the illustrated example, it is contemplated that the electronic device 100 is a leadless structure, wherein the bottom of the conductive leads 109, 114, and 116 are suitable for soldering to a host printed circuit board. In another example, other forms of leads and corresponding lead frame structures may be used, for example, to form gull-wing leads, J-shaped leads, etc., and the processing at 222 may include both lead trimming and formation. Fig.13 An example is shown in which desired leads of the lead frame panel array 302 are trimmed by process 1300 (e.g., cutting), such as using sawing, laser cutting, chemical etching, or other suitable cutting or trimming processes, to separate the structure of the illustrated column CN from adjacent or neighboring columns CN-1 and CN+1 along line 1302. In the illustrated example, process 1300 trims conductive leads 109, 114, and 116 along respective longitudinal sides of columns CN of the lead frame panel array 302.

[0058] Method 200 continues at 224 with selective row-wise package separation. Figure 14-14D , Fig.14 One example of a suitable singulation process is shown in which a selective row-wise cutting or singulation process 1400 (e.g., sawing, laser cutting, chemical etching, etc.) is performed that cuts through the molded package structure 108 in certain selected portions along lines 1402. Fig.14 As shown in , process 1400 separates the packaged electronic device 100 from the lead frame panel array and does not cut through the molded packaging structure 108 between the illustrated first row RN-1 and the second row RN, but this example shows cutting through the molded packaging structure between these rows RN-1 and RN in other columns of the lead frame panel array (for example, the illustrated adjacent columns CN-1 and CN+1).

[0059] The separation process 1400 may be performed by an automated and / or reconfigurable blade cutting device (not shown) that may selectively cut or not cut between designated adjacent row pairs in one or more columns of a lead frame panel array. Fig.14D As discussed, for example, inserting a corresponding cutting blade between rows RN-1 and RN may allow separation of two substantially equivalent single transistor electronic devices 1420, including cutting through a middle portion of the corresponding third clip 133. This selectivity allows cost-effective alternative manufacturing of single transistor devices and / or composite half-bridge electronic devices 100 for a given lead frame panel array processing sequence with little or no added cost or complexity.

[0060] Fig.14A An implementation is shown in which the package separation at 224 includes selectively cutting the package structure 108 of another column CJ along line 1402 between the corresponding first row RN-1 and the second row RN. This separation process example provides two adjacent single-transistor electronic devices 1410 manufactured in column CJ of the lead frame panel array. In this example, the individual electronic devices 1410 do not include any metal clips, and instead of bonding wires 144, are used to form all interconnections between the corresponding semiconductor die and the lead frame features. In this example, the row-wise cutting process produces notches 107 along the lateral ends of the finished packaged electronic devices 1410, without remaining package structure openings.

[0061] Fig. 14B Shown after column-direction lead trimming (e.g., Figure 2 222 in ) and before row-wise encapsulation separation (e.g., in Figure 2 At this point in the process, the column-length molded package structure 108 of the lead frame panel array 302 has notches at its longitudinal ends and one or more openings (e.g., three in this example) between the ends of the array configuration and between adjacent rows.

[0062] Fig. 14C After selective row-wise package separation (e.g., Figure 2 224 in the figure) and the adjacent rows in one column provide a single example of the half-bridge package electronic device or module 100 described above, and the corresponding adjacent rows in the next column provide the combined electronic device or module 100 described above. Fig.14A Two examples of single transistor packaged electronic devices 1410 are described.

[0063] Fig.14DTwo additional adjacent electronic devices in another column of the lead frame panel array are shown after selective row-wise package separation that cuts through a portion of the column molded package structure and the example of the switch node clip 133 described above. In this example, Figure 2 The package separation at 224 in method 200 may include selectively cutting 224 metal clip 133 and package structure 108 between the first row RN-1 and the second row RN in the illustrated column CN, for example, to provide Fig.14D A pair of electronic devices 1420 are shown in FIG.

[0064] In each of the illustrated electronic devices 1420, the respective package structure 108 has opposite longitudinal ends 103 and 104 spaced apart from each other along a first direction X and opposite lateral sides 105 and 106 spaced apart from each other along a second direction Y, and conductive leads 109 and 114 or 116 partially exposed outside the respective lateral sides 105 and 106 of the package structure 108. In this example, the first instance 1420 of the electronic device has an instance of a first semiconductor die 121, the second instance 1420 of the electronic device has an instance of a second semiconductor die 122, and these device instances have respective driver die instances 141 and 142. After row-wise package separation (e.g., in Figure 2 224 in the figure), the individual electronic devices 1420 each have a metal clip 133 electrically coupled to an electronic component (e.g., transistor Q1 or transistor Q2), and the metal clip 133 is exposed to the outside of the first of the longitudinal ends 103 and 104 at a cut portion 1422 between the lead frame panel array rows RN-1 and RN.

[0065] In the illustrated example, the metal clip 133 has a first cut portion 1422 exposed outside the first of the longitudinal ends 103 and 104, and a second cut portion 1422 exposed outside the first of the longitudinal ends 103 and 104. Furthermore, in this example, the individual package structures 108 of the respective devices 1420 each include a notch 107 extending into the first of the longitudinal ends 103 and 104, wherein the first and second cut portions 1422 of the metal clip 133 are spaced apart from the notch 107 and exposed outside the first of the longitudinal ends 103 and 104 on opposite sides of the notch 107.

[0066] Modifications may be made in the described examples and other implementations are possible within the scope of the claims.

Claims

1. An electronic device, comprising: a package structure having opposite longitudinal ends spaced apart from each other along a first direction, opposite lateral sides spaced apart from each other along a second direction orthogonal to the first direction, a middle portion intermediate the longitudinal ends, a first portion extending between the middle portion and one of the longitudinal ends, and a second portion extending between the middle portion and the other of the longitudinal ends; Conductive leads partially exposed outside respective lateral sides of the package structure; a first semiconductor die and a second semiconductor die having respective first and second electronic components; as well as A metal clip extends in the package structure from the first portion through the middle portion to the second portion and electrically couples the first electronic component of the first semiconductor die to the second electronic component of the second semiconductor die. 2 . The electronic device of claim 1 , wherein the packaging structure encloses the metal clip, the first and second semiconductor dies, and portions of the conductive leads. 3 . The electronic device according to claim 1 , wherein the packaging structure has an opening extending into the middle portion along a third direction orthogonal to the first direction and the second direction. The electronic device of claim 3 , wherein the metal clip extends through the middle portion around two opposite sides of the opening.

5. The electronic device according to claim 3, wherein: The first semiconductor die is attached to a first die attach pad in the first portion; the second semiconductor die is attached to a second die attach pad in the second portion; and Portions of the first die attach pad and the second die attach pad are exposed in the opening of the package structure.

6. The electronic device according to claim 1, wherein: The first electronic component of the first semiconductor die is a first transistor; The second electronic component of the second semiconductor die is a second transistor; and The metal clip electrically couples the source of the first transistor to the drain of the second transistor to form a switching node of a half-bridge circuit.

7. An electronic device, comprising: a package structure having opposite longitudinal ends spaced apart from one another along a first direction, and opposite lateral sides spaced apart from one another along a second direction orthogonal to the first direction; Conductive leads partially exposed outside respective lateral sides of the package structure; A semiconductor die having electronic components; as well as A metal clip is electrically coupled to the electronic component and is exposed outside a first one of the longitudinal ends. 8 . The electronic device according to claim 7 , wherein the metal clip has a first portion exposed outside the first one of the longitudinal ends, and a second portion exposed outside the first one of the longitudinal ends.

9. The electronic device according to claim 8, wherein: The encapsulation structure includes a notch in the first one extending into the longitudinal end; and The first portion and the second portion of the metal clip are spaced apart from the notch and are exposed outside the first one of the longitudinal ends on opposite sides of the notch. 10 . The electronic device of claim 7 , wherein the electronic component is a transistor, and the metal clip is electrically coupled to a source or a drain of the transistor.

11. The electronic device according to claim 7, wherein: The encapsulation structure includes a notch in the first one extending into the longitudinal end; and The metal clip is spaced apart from the notch.

12. A system comprising: Circuit boards; as well as An electronic device attached to the circuit board and comprising: a package structure having opposite longitudinal ends spaced apart from each other along a first direction, opposite lateral sides spaced apart from each other along a second direction orthogonal to the first direction, a middle portion intermediate the longitudinal ends, a first portion extending between the middle portion and one of the longitudinal ends, and a second portion extending between the middle portion and the other of the longitudinal ends; conductive leads partially exposed external to respective lateral sides of the package structure and soldered to conductive features of the circuit board; a first semiconductor die and a second semiconductor die having respective first and second electronic components; and A metal clip extends in the package structure from the first portion through the middle portion to the second portion and electrically couples the first electronic component of the first semiconductor die to the second electronic component of the second semiconductor die. 13 . The system of claim 12 , wherein the package structure has an opening extending into the middle portion along a third direction orthogonal to the first direction and the second direction.

14. The system of claim 13, wherein the metal clip extends through the middle portion around two opposing sides of the opening.

15. The system of claim 13, wherein: The first semiconductor die is attached to a first die attach pad in the first portion; the second semiconductor die is attached to a second die attach pad in the second portion; and Portions of the first die attach pad and the second die attach pad are exposed in the opening of the package structure.

16. The system of claim 12, wherein: The first electronic component of the first semiconductor die is a first transistor; The second electronic component of the second semiconductor die is a second transistor; and The metal clip electrically couples the source of the first transistor to the drain of the second transistor to form a switching node of a half-bridge circuit.

17. A method of manufacturing an electronic device, the method comprising: attaching a first semiconductor die to a first die attach pad in a first row of a column of the lead frame panel array; attaching a second semiconductor die to a second die attach pad in an adjacent second row of the column of the lead frame panel array; attaching a metal clip to the first semiconductor die and the second semiconductor die, wherein the metal clip extends in the first row and the second row; forming a packaging structure extending along the column and enclosing the first and second semiconductor dies and the metal clip; trimming conductive leads along longitudinal sides of the columns of the lead frame panel array; as well as The electronic device is separated from the lead frame panel array.

18. The method of claim 17, wherein separating the electronic device from the lead frame panel array comprises selectively cutting the package structure along lateral ends of the respective first and second rows in the column.

19. The method of claim 18, wherein separating the electronic devices from the lead frame panel array further comprises selectively cutting another column of package structures between the respective first and second rows.

20. The method of claim 17, wherein separating the electronic device from the lead frame panel array comprises selectively cutting the metal clip and the package structure between the first row and the second row in the column.

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