Memory multi-stage screening equipment and method

By designing multi-level memory screening equipment, multi-frequency testing and automated processing of memory chips are realized, and the existing Handlers can only complete tests at one frequency at a time is solved, which improves testing efficiency and accuracy.

CN119525171APending Publication Date: 2025-02-28KINGTIGER TESTING TECH (SZ) LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510037277.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-09
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

The existing Handler can only complete the test process at one frequency at a time. The operator needs to manually process the memory chips with different results output by the Handler, which leads to the operator's work being complicated and prone to misoperation.

Method used

A memory multi-level screening device is designed, including a feeding area, a test area, a buffer area and a discharge area. It can conduct multiple rounds of tests on the device under test, and temporarily cache the tested devices that have completed one round of tests in the buffer area. After reaching the preset number, it will be transported to the test area for the next round of tests.

Benefits of technology

The equipment can automatically complete the removal, placement and group cache work during repeated tests, reducing the investment of operators and other equipment, reducing the workload of operators, improving the efficiency of repeated tests, and avoiding losses caused by operators' mistakes.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119525171A_ABST
    Figure CN119525171A_ABST
Patent Text Reader

Abstract

The invention belongs to the technical field of memory testing, and discloses memory multi-stage screening equipment and method.The equipment comprises a feeding area, a testing area, a cache area and a discharging area; the feeding area is used for providing a feeding station for the tested device and carrying the tested device to the cache area; the test area is used for carrying the tested device in the cache area to the test area, carrying out multiple rounds of tests on the tested device carried to the test area, and adjusting test parameters of the tested device in each round of test; after each round of test, the tested device after the round of test is carried to a cache region for temporary cache; the cache region is used for providing a temporary cache station for a tested device needing to be tested for multiple rounds of tests; and the blanking area is used for providing a blanking station for the tested device of which the test needs to be finished. According to the invention, the workload of operators can be reduced, and the efficiency of repeated testing is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention belongs to the technical field of memory testing, and in particular relates to a memory multi-level screening device and method. Background Art

[0002] In the field of memory testing, a Handler is an automatic sorting device whose main function is to pick up and place the memory chip or memory stick under test (hereinafter referred to as DUT, Device under test) on the memory tester, and place the DUT in the corresponding unloading area according to the test results output by the tester. During the memory test, the basic status of the DUT can be obtained within a short time after the test starts. This status can be used to quickly screen out bad DUTs and provide a basis for parameter setting in subsequent test processes.

[0003] The operation process of the existing Handler is: the operator places a batch of DUTs on the Handler loading station; the Handler moves a certain number of DUTs from the loading station to the tester for testing according to the maximum number of DUTs that can be tested simultaneously on the tester; after the test is completed, the Handler moves the memory chips to the corresponding unloading stations (such as unloading stations for passed tests and unloading stations for failed tests) according to the test results output by the tester; the Handler then moves a certain number of DUTs from the loading station to the idle tester, and the cycle continues until all the DUTs at the loading station are tested. In addition, some Handlers will perform appearance inspections on the DUTs before placing them on the tester, and place unqualified DUTs in the corresponding unloading stations in advance.

[0004] Generally, multiple DUTs will be tested simultaneously on the tester. According to the number of DUTs tested simultaneously by the tester, the Handler matched with the tester will place or remove the corresponding number of DUTs on the tester at one time, and it is impossible to place or remove a certain DUT from the tester alone. This feature causes that when an Open-Short Failure occurs on a certain DUT, although the DUT cannot continue to be tested, the DUT still needs to wait until the tests of other DUTs in the same batch are completed before it can be removed from the tester by the Handler. This will cause a waste of tester efficiency, especially when the test time is long.

[0005] In addition, according to the existing Handler workflow, the existing Handler can only perform one round of testing on the input DUT, or perform multiple rounds of testing on a small number of abnormal DUTs. When multiple rounds of testing are required on the DUT, the operator can only take out the DUT that has completed the previous round of testing from the Handler unloading position, manually group them, and then input them into the Handler for the next round of testing.

[0006] The existing Handler can only complete the test process at one frequency at a time. The operator needs to manually process the memory chips with different results output by the Handler differently. When there are many memory frequency levels to be sorted, the operator's work is more complicated and prone to misoperation. Summary of the invention

[0007] The purpose of the present invention is to provide a memory multi-level screening device and method to solve the problem that the existing Handler can only complete the test process at one frequency at a time, and the operator needs to manually perform different processing on the memory chips with different results output by the Handler. When there are many memory frequency levels to be sorted, the operator's work is more complicated and prone to misoperation.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a memory multi-stage screening device, the device comprising: a loading area, a testing area, a buffer area and a unloading area; The loading area is used to: provide a loading station for the device under test, and transport the device under test to the buffer area; The test area is used to: move the devices under test in the buffer area to the test area, and perform multiple rounds of tests on the devices under test moved to the test area, and adjust the test parameters of the devices under test in each round of tests; after each round of tests, move the devices under test that have completed the round of tests to the buffer area for temporary buffering; after the number of devices under test that are temporarily buffered in the buffer area and belong to the same round of tests reaches a preset number, move the devices under test that are temporarily buffered in the buffer area and belong to the same round of tests to the test area again to perform the next round of tests on the devices under test; The buffer area is used to: provide a temporary buffering station for a device under test that needs to perform multiple rounds of testing; The unloading area is used to provide an unloading station for the device under test that needs to finish testing.

[0009] Preferably, the buffer area comprises: a plurality of buffer stations, the plurality of buffer stations being used to temporarily buffer devices under test that need to perform multiple rounds of testing and to store devices under test that are transported from a loading area to the buffer area.

[0010] Preferably, the loading area comprises: a loading station and a loading conveying module, wherein the loading conveying module is arranged above the loading station, and the loading conveying module is used to transport the device under test in the loading station to the corresponding buffer station.

[0011] Preferably, the test area includes: a test station, a test conveying module and an interval conveying module, the loading conveying module is also used to carry the device under test from the loading station in the buffer station to the interval conveying module, and the interval conveying module is used to transport the device under test to the bottom of the test conveying module; The test conveying module is deployed above the test station. The test conveying module is used to transport the device under test on the interval conveying module to the test station, or to transport the device under test that has completed a round of testing at the test station to the interval conveying module. The interval conveying module is also used to transport the device under test that has completed a round of testing to the corresponding cache station.

[0012] Preferably, the unloading area includes: an unloading station and an unloading conveying module, wherein the unloading conveying module is used to sort the devices under test that have completed the test on the interval conveying module, transport the devices under test that need to perform multiple rounds of tests to the cache station, and transport the devices under test that need to end the test to the unloading station.

[0013] Preferably, the device under test is: a memory module and / or a memory chip.

[0014] In a second aspect, the present invention provides a memory multi-level screening method, the method is implemented based on the above-mentioned memory multi-level screening device, and the method comprises: In the test area, a basic test is performed on the device under test that is first transported to the test area to obtain a basic test result, wherein the basic test result includes: the device under test is qualified or the device under test is unqualified; When the basic test result shows that the device under test is qualified, multiple rounds of screening tests are performed on the qualified device under test to obtain multiple rounds of test results; Based on the results of multiple rounds of testing, the grade of the device under test is determined.

[0015] Preferably, the basic test is a basic frequency test, and the screening test is an overclocking test. In multiple rounds of screening tests, the frequency of the overclocking test in the previous round is less than the frequency of the overclocking test in the next round.

[0016] Preferably, multiple rounds of screening tests are performed on qualified devices under test to obtain multiple rounds of test results, including: In the first round of screening test, determine whether the device under test passes the first round of screening test. If so, perform the second round of screening test on the device under test; if not, mark the device under test as a qualified product; In the second round of screening test, determine whether the device under test has passed the second round of screening test. If so, perform the third round of screening test on the device under test; if not, move the device under test to the first cache station in the cache area for cache; count the number of devices under test in the first cache station, and when the number of devices under test in the first cache station reaches a preset number, use all devices under test in the first cache station as devices under test for repeated testing, and move the devices under test for repeated testing to the test station again to perform the first round of screening test on the devices under test for repeated testing again, and determine whether all the devices under test for repeated testing have passed the first round of screening test. If so, mark all the devices under test for repeated testing as first-level products; if not, screen out the devices under test that have not passed the first round of screening test from the devices under test for repeated testing, and mark them as compliant products; screen out the devices under test that have passed the first round of screening test from the devices under test for repeated testing, and move them back to the first cache station in the cache area for cache; In the mth round of screening test, determine whether the device under test has passed the mth round of screening test. If so, perform the m+1th round of screening test on the device under test; if not, transport the device under test to the m-1th cache station in the cache area for cache, count the number of devices under test in the m-1th cache station in the cache area, and when the number of devices under test after the second test in the m-1th cache station reaches a preset number, use the device under test in the m-1th cache station as a new device under test for repeated testing, and transport the new device under test for repeated testing to the test station again to perform the m+1th round of screening test on the new device under test for repeated testing. m-1 round screening test, determine whether all the new repeated tested devices have passed the m-1 round screening test, if so, mark all the new repeated tested devices as m-1 level products; if not, screen out the tested devices that have not passed the m-1 round screening test from the new repeated tested devices, and re-transfer them to the m-2th buffer station in the buffer area for buffering; screen out the tested devices that have passed the m-1 round screening test from the new repeated tested devices, and re-transfer them to the m-1th buffer station in the buffer area for buffering; wherein, m=3,4,…,n, and n is the total number of screening test rounds; The mark of the device under test obtained in each round of screening test is used as the test result of each round of screening test. After the nth round of screening test is performed, multiple rounds of test results are obtained.

[0017] Preferably, determining the grade of the device under test based on multiple rounds of test results includes: obtaining a mark of the device under test obtained in each round of screening test, and determining the grade of the device under test according to the mark of the device under test obtained in each round of screening test.

[0018] Beneficial effects: The memory multi-level screening device of the present invention can replace manual or other external devices to complete the work of taking out and putting in, grouping and caching during repeated testing, etc. It can reduce the input of operators or other equipment, reduce the workload of operators, improve the efficiency of repeated testing, and avoid losses caused by operator errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following specific implementations, they are used to explain the embodiments of the present invention, but do not constitute a limitation on the embodiments of the present invention. In the accompanying drawings: Figure 1 is a block diagram of the layout of a memory multi-stage screening device provided by one embodiment of the present invention; Figure 2 is a flow chart of a memory multi-level screening method provided by one embodiment of the present invention; Figure 3 It is a flowchart of multiple rounds of testing provided by one embodiment of the present invention.

[0020] Description of reference numerals: 1. Buffer station; 3. Loading station; 4. Loading conveying module; 5. Testing station; 6. Testing conveying module; 7. Interval conveying module; 8. Unloading station; 9. Unloading conveying module. DETAILED DESCRIPTION

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in combination with the drawings and the description of the embodiments or the prior art. Obviously, the following description of the structure of the drawings is only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention.

[0022] Embodiment 1 Figure 1 FIG. 1 is a block diagram of a layout of a memory multi-level screening device provided by an embodiment of the present invention. Figure 1 As shown, this embodiment provides a memory multi-level screening device, the device includes: a loading area, a test area, a buffer area and a unloading area. In this embodiment, the loading area, the test area, the buffer area and the unloading area are arranged as follows: the loading area and the unloading area are arranged on the same side, and the buffer area is arranged between the loading area and the test area and between the unloading area and the test area respectively; the layout of the loading area, the test area, the buffer area and the unloading area can also adopt other layouts; in this embodiment, the device also includes a workbench, on which the loading area, the test area, the buffer area and the unloading area are divided; The loading area is used to: provide a loading station for the device under test, and to transport the device under test to the buffer area; wherein the device under test is a memory module and / or a memory chip; The test area is used to: move the devices under test in the buffer area to the test area, and perform multiple rounds of tests on the devices under test moved to the test area, and adjust the test parameters of the devices under test in each round of tests; after each round of tests, move the devices under test that have completed the round of tests to the buffer area for temporary caching; after the number of devices under test that are temporarily cached in the buffer area and belong to the same round of tests reaches a preset number, move the devices under test that are temporarily cached in the buffer area and belong to the same round of tests to the test area again to perform the next round of tests on the devices under test; wherein, the multiple rounds of tests include: performing one round of basic tests and performing several rounds of screening tests, and the detailed steps of the multiple rounds of tests are specifically described in Example 2; The buffer area is used to: provide a temporary buffering station for a device under test that needs to perform multiple rounds of testing; The unloading area is used to provide an unloading station for the device under test that needs to finish testing.

[0023] As a further optimization of this embodiment, the cache area includes: multiple cache stations 1, which are used to temporarily cache the devices under test that need to perform multiple rounds of testing and store the devices under test that are transported from the loading area to the cache area.

[0024] In this embodiment, when the memory multi-stage screening device adopts Figure 1 In the layout shown, multiple cache stations 1 are divided into two areas, one is located at the rear side of the loading area, and the other is located at the rear side of the unloading area. The cache station 1 at the rear side of the unloading area is greater than or equal to the number of test rounds, ensuring that the devices under test after each round of testing are placed on the same cache station.

[0025] The loading area includes a loading station 3 and a loading conveying module 4. The loading conveying module 4 is arranged above the loading station 3. The loading conveying module 4 is used to transport the device to be tested in the loading station 3 to the cache station 1 on the left.

[0026] In this embodiment, there are multiple loading stations 3 in the loading area, and at least one tray is placed on each loading station 3 in the loading area. The tray is used to place multiple devices to be tested. The loading and conveying module is a three-axis linear module or a six-axis robotic arm. The three-axis linear module can move in the X-axis, Y-axis and Z-axis directions. The three-axis linear module or the six-axis robotic arm are commonly used transportation devices in this field, and their specific structures are not described one by one in this embodiment.

[0027] As a further optimization of this embodiment, the test area includes: a test station 5, a test conveying module 6 and an interval conveying module 7, the interval conveying module 7 is deployed between the buffer station 1 on the left and the buffer station 1 on the right, the loading conveying module 4 is also used to carry the device under test in the buffer station 1 on the left to the interval conveying module 7, and the interval conveying module 7 is used to transport the device under test to the bottom of the test conveying module 6; The test conveying module 6 is deployed above the test station 5. The test conveying module 6 is used to transport the device under test on the interval conveying module 7 to the test station 5, or to transport the device under test that has completed the test at the test station 5 to the interval conveying module 7. The interval conveying module 7 is also used to transport the device under test that has completed the test to the cache station 1 on the right.

[0028] The test conveying module 6 may also be a three-axis linear module or a six-axis robotic arm; a tester is deployed on each test station 5, and the tester is used to perform test operations on the device under test.

[0029] In this embodiment, the interval conveying module 7 can be a linear slide, and multiple trays are deployed on the linear slide for placing the devices under test. The cache station 1 on the left and the cache station 1 on the right are respectively arranged on both sides of the linear slide, and the testers are also deployed on both sides of the linear slide. Such a layout setting can realize the rapid conveyance of the devices under test between the test area and the cache area, reduce the motion range required by other motion modules, and improve the stability and efficiency of the equipment.

[0030] As a further optimization of this embodiment, the unloading area includes: an unloading station 8 and an unloading conveying module 9, wherein the unloading conveying module 9 is used to sort the devices under test that have completed the test on the interval conveying module 7, and to move the devices under test that require multiple rounds of testing to the cache station 1 on the right, and to move the devices under test that need to end the test to the unloading station 8.

[0031] In this embodiment, multiple unloading stations 8 can also be set in the unloading area, and multiple trays are deployed on each unloading station 8. The trays are used to place the tested devices that have completed the test; therefore, the unloading area can simultaneously place multiple tested devices that have completed the test, which is convenient for grouping and placing the tested devices of different levels; the unloading conveying module 9 is a three-axis linear module or a six-axis robotic arm, and the three-axis linear module can move in the X-axis, Y-axis and Z-axis directions. The three-axis linear module or the six-axis robotic arm are both commonly used transportation devices in this field, and their specific structures are not described one by one in this embodiment. The memory multi-level screening device of the present invention can replace manual or other external devices to complete the work of taking out and putting in, grouping and caching during repeated testing. It can reduce the investment of operators or other equipment, reduce the workload of operators, improve the efficiency of repeated testing, and avoid losses caused by operator errors.

[0032] Embodiment 2 Figure 2 FIG. 1 is a flow chart of a memory multi-level screening method provided by an embodiment of the present invention. Figure 2 As shown, this embodiment provides a memory multi-level screening method, which is implemented based on the memory multi-level screening device of embodiment 1, and includes: Step S10: In the test area, a basic test is performed on the device under test (the device under test is a memory module and / or memory chip) that is transported to the test area for the first time, that is, Figure 3 The DUT (Device under test) in the test area is the first device to be moved to the test area. Figure 1 The device under test in the cache station 1 on the left; after completing the basic test, the basic test result is obtained, and the basic test result includes: the device under test is qualified or the device under test is unqualified; in this embodiment, the basic test can be a basic frequency test, each memory has its own basic frequency, and each basic frequency needs to be tested. When the basic frequency test of any memory fails, it means that the memory is an unqualified product and is marked as unqualified. When any memory is qualified, multiple rounds of screening tests are performed. The screening test can be an overclocking test. The memory runs in an overclocking environment, and the level of overclocking performance of the memory stick can be screened and divided; please see step S20 for specific screening test steps.

[0033] In this embodiment, the basic frequency is determined by the device under test itself, and different types of devices under test have different basic frequencies. The test operation of this embodiment is mainly performed on the devices under test of the same batch, and the basic frequencies are the same.

[0034] In this embodiment, unqualified memory is directly transported to the unloading area to complete the test of the memory. Memory multi-level screening step S20: When the basic test result is that the device under test is qualified, multiple rounds of screening tests are performed on the qualified device under test to obtain multiple rounds of test results; wherein the frequency of the previous round of overclocking test is less than the frequency of the next round of overclocking test; for example, in multiple rounds of overclocking tests, the overclocking frequencies are 3200MHz, 3600 MHz, 4000 MHz, 4400 MHz and 4800MHz, and the number of overclocking test processes and test frequencies need to be determined according to specific circumstances.

[0035] Specifically, for step S20, if Figure 3 As shown, multiple rounds of screening tests are performed on qualified devices under test to obtain multiple rounds of test results, including: Step S201: In the first round of screening test (i.e. Figure 3In the screening test 1), determine whether the device under test passes the first round of screening test. If so, perform the second round of screening test on the device under test; if not, mark the device under test as a qualified product; Step S202: In the second round of screening test, determine whether the device under test passes the second round of screening test. If so, perform a third round of screening test on the device under test; if not, move the device under test to the first buffer station in the buffer area (i.e. Figure 3 1) cache in the buffer area in the cache; count the number of DUTs in the first buffer station, when the number of DUTs in the first buffer station reaches a preset number, use all DUTs in the first buffer station as DUTs for repeated testing, move the DUTs for repeated testing to the test station again, and perform the first round of screening test on the DUTs for repeated testing again, and judge whether all the DUTs for repeated testing have passed the first round of screening test. If so, mark all the DUTs for repeated testing as first-class products; if not, filter out the DUTs that have not passed the first round of screening test from the DUTs for repeated testing, and mark them as compliant products; filter out the DUTs that have passed the first round of screening test from the DUTs for repeated testing, and move them back to the first buffer station in the cache area (i.e. Figure 3 Cache area in 1) cache; Step S203: In the mth round of screening test, determine whether the device under test has passed the mth round of screening test. If so, perform the m+1th round of screening test on the device under test; if not, transport the device under test to the m-1th cache station in the cache area for cache, count the number of devices under test in the m-1th cache station in the cache area, and when the number of devices under test after the second test in the m-1th cache station reaches a preset number, use the device under test in the m-1th cache station as a new device under test for repeated testing, and transport the new device under test for repeated testing to the test station again to perform repeated testing on the new device under test. The device performs the m-1th round of screening test, and determines whether all the new repeated tested devices have passed the m-1th round of screening test. If so, all the new repeated tested devices are marked as m-1-level products; if not, the tested devices that have not passed the m-1th round of screening test are screened out from the new repeated tested devices, and are re-transferred to the m-2th buffer station in the buffer area for buffering; the tested devices that have passed the m-1th round of screening test are screened out from the new repeated tested devices, and are re-transferred to the m-1th buffer station in the buffer area for buffering; wherein, m=3,4,…,n, and n is the total number of screening test rounds; Step S204: using the mark of the device under test obtained in each round of screening test as the test result of each round of screening test, and obtaining multiple rounds of test results after the nth round of screening test is performed.

[0036] Step S30: Determine the grade of the device under test based on the results of multiple rounds of testing.

[0037] As a further optimization of this embodiment, based on the results of multiple rounds of testing, the level of the device under test is determined, including: obtaining the mark of the device under test obtained in each round of screening test, and determining the level of the device under test according to the mark of the device under test obtained in each round of screening test In this embodiment, if Figure 3 As shown, the levels of the device under test are constructed according to "first-level product", "second-level product", ..., "n-level product", for example, level 1, level 2, ..., level n-1, level n; among which, level 1 has the lowest overclocking level and level n has the highest overclocking level.

[0038] The memory multi-level screening device of the present invention can replace manual or other external devices to complete the work of taking out and putting in, grouping and caching during repeated testing, etc. It can reduce the input of operators or other equipment, reduce the workload of operators, improve the efficiency of repeated testing, and avoid losses caused by operator errors.

[0039] Structurally, the process handler of the present invention adds multiple cache stations, and the DUT after testing can be placed in the cache station, and the DUT in the cache station can be moved to the tester for testing. The existing handler can only directly move the DUT after testing to the unloading station, and cannot move the DUT in the unloading station to the tester for testing.

[0040] The present invention adds a related process for retesting the tested DUT. The existing Handler can only directly output the DUT after the test is completed. If the tested DUT needs to be retested, it can only be taken out by an operator or other equipment and then put back into the Handler loading position; the Process Handler can put the tested DUT into the cache area first, and then move the DUT in the cache area back to the tester for testing.

[0041] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0042] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0043] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A memory multi-level screening device, characterized in that: The equipment includes: a loading area, a testing area, a buffer area and a unloading area; The loading area is used to: provide a loading station for the device under test, and transport the device under test to the buffer area; The test area is used to: move the devices under test in the buffer area to the test area, and perform multiple rounds of tests on the devices under test moved to the test area, and adjust the test parameters of the devices under test in each round of tests; after each round of tests, move the devices under test that have completed the round of tests to the buffer area for temporary buffering; after the number of devices under test that are temporarily buffered in the buffer area and belong to the same round of tests reaches a preset number, move the devices under test that are temporarily buffered in the buffer area and belong to the same round of tests to the test area again to perform the next round of tests on the devices under test; The buffer area is used to: provide a temporary buffering station for a device under test that needs to perform multiple rounds of testing; The unloading area is used to provide an unloading station for the device under test that needs to finish testing.

2. The memory multi-level screening device according to claim 1, characterized in that: The buffer area comprises: a plurality of buffer stations (1), wherein the plurality of buffer stations (1) are used to temporarily buffer devices under test that need to perform multiple rounds of testing and to store devices under test that are transported from a loading area to the buffer area.

3. The memory multi-level screening device according to claim 2, characterized in that: The loading area comprises: a loading station (3) and a loading conveying module (4), wherein the loading conveying module (4) is arranged above the loading station (3), and the loading conveying module (4) is used to transport the device under test in the loading station (3) to the corresponding buffer station (1).

4. The memory multi-level screening device according to claim 3, characterized in that: The test area comprises: a test station (5), a test conveying module (6) and an interval conveying module (7); the loading conveying module (4) is also used to carry the device under test from the loading station (3) in the buffer station (1) to the interval conveying module (7); the interval conveying module (7) is used to transport the device under test to the bottom of the test conveying module (6); The test conveying module (6) is deployed above the test station (5). The test conveying module (6) is used to transport the device under test on the interval conveying module (7) to the test station (5), or to transport the device under test that has completed a round of testing at the test station (5) to the interval conveying module (7). The interval conveying module (7) is also used to transport the device under test that has completed a round of testing to the corresponding cache station (1).

5. The memory multi-level screening device according to claim 4, characterized in that: The unloading area comprises: an unloading station (8) and an unloading conveying module (9), wherein the unloading conveying module (9) is used to sort the tested devices on the interval conveying module (7) that have completed the test, transport the tested devices that need to perform multiple rounds of tests to the buffer station (1), and transport the tested devices that need to end the test to the unloading station (8).

6. The memory multi-level screening device according to claim 4, characterized in that: The device under test is: a memory module and / or a memory chip.

7. A memory multi-level screening method, the method is implemented based on the memory multi-level screening device according to any one of claims 1 to 6, characterized in that: The method comprises: In the test area, Performing basic tests on the device under test that is first transported to the test area to obtain basic test results, wherein the basic test results include: the device under test is qualified or the device under test is unqualified; When the basic test result shows that the device under test is qualified, multiple rounds of screening tests are performed on the qualified device under test to obtain multiple rounds of test results; Based on the results of multiple rounds of testing, the grade of the device under test is determined.

8. The memory multi-level screening method according to claim 7, characterized in that: The basic test is a basic frequency test, and the screening test is an overclocking test. In multiple rounds of screening tests, the frequency of the overclocking test in the previous round is less than the frequency of the overclocking test in the next round.

9. The memory multi-level screening method according to claim 7, characterized in that: Perform multiple rounds of screening tests on qualified DUTs to obtain multiple rounds of test results, including: In the first round of screening test, determine whether the device under test passes the first round of screening test. If so, perform the second round of screening test on the device under test; if not, mark the device under test as a qualified product; In the second round of screening test, determine whether the device under test has passed the second round of screening test. If so, perform the third round of screening test on the device under test; if not, move the device under test to the first cache station in the cache area for cache; count the number of devices under test in the first cache station, and when the number of devices under test in the first cache station reaches a preset number, use all devices under test in the first cache station as devices under test for repeated testing, and move the devices under test for repeated testing to the test station again to perform the first round of screening test on the devices under test for repeated testing again, and determine whether all the devices under test for repeated testing have passed the first round of screening test. If so, mark all the devices under test for repeated testing as first-level products; if not, screen out the devices under test that have not passed the first round of screening test from the devices under test for repeated testing, and mark them as compliant products; screen out the devices under test that have passed the first round of screening test from the devices under test for repeated testing, and move them back to the first cache station in the cache area for cache; In the mth round of screening test, determine whether the device under test has passed the mth round of screening test. If so, perform the m+1th round of screening test on the device under test; if not, transport the device under test to the m-1th cache station in the cache area for cache, count the number of devices under test in the m-1th cache station in the cache area, and when the number of devices under test after the second test in the m-1th cache station reaches a preset number, use the device under test in the m-1th cache station as a new device under test for repeated testing, and transport the new device under test for repeated testing to the test station again to perform the m+1th round of screening test on the new device under test for repeated testing. m-1 round screening test, determine whether all the new repeated tested devices have passed the m-1 round screening test, if so, mark all the new repeated tested devices as m-1 level products; if not, screen out the tested devices that have not passed the m-1 round screening test from the new repeated tested devices, and re-transfer them to the m-2th buffer station in the buffer area for buffering; screen out the tested devices that have passed the m-1 round screening test from the new repeated tested devices, and re-transfer them to the m-1th buffer station in the buffer area for buffering; wherein, m=3,4,…,n, and n is the total number of screening test rounds; The marks of the tested devices obtained in each round of screening test are used as the test results of each round of screening test. After the nth round of screening test is performed, multiple rounds of test results are obtained.

10. The memory multi-level screening method according to claim 9, characterized in that: Based on the results of multiple rounds of tests, the grade of the device under test is determined, including: obtaining the mark of the device under test obtained in each round of screening test, and determining the grade of the device under test according to the mark of the device under test obtained in each round of screening test.