Automatic error detection and correction method and system for mass electrical interconnection design and readable storage medium
By adopting automatic error detection and correction methods based on predefined rule element sets in complex electrical systems, the problem of difficult design errors in massive electrical interconnection designs is solved, and efficient and high-quality design verification and standardization inspection are achieved.
Patent Information
- Application Number
- CN202411691587.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-25
- Publication Date
- 2025-02-28
AI Technical Summary
The prior art is difficult to achieve efficient and high-quality verification of massive electrical interconnection designs in complex electrical systems, resulting in difficult to completely eliminate design errors and reduce product design quality.
The error automatic detection and correction method based on predefined rule feature sets and standard specifications is adopted to identify and locate design errors through automated tools, and the error correction and data synchronization is completed through a visual navigation interface.
It realizes automatic verification of massive electrical interconnection design data of complex electrical systems and automatic inspection of design specifications, significantly improving design efficiency and quality, and ensuring the correctness and standardization of the design.
Smart Images
Figure CN119537400A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of electrical interconnection design of complex systems, and in particular, relates to an automatic error detection and correction method, system and readable storage medium for massive electrical interconnection design. Background Art
[0002] At present, before converting the electrical interconnection relationship of a product or system into a CAD manufacturing drawing, it is usually necessary to fill in the specific design requirements in a table in text form, and then manually check and verify the table text one by one to confirm whether the table text is consistent with the design requirements. This is not only inefficient but also prone to omissions, resulting in errors that cannot be completely eliminated, thereby reducing the design quality of the product.
[0003] Modern complex electrical systems usually have as many as 100,000 interconnected nodes and include multiple connection types such as RF, IF, LF, optical, digital, power and ground. The interconnection bus transmission relationship is complex, resulting in a large scale of connection data and complex verification dimensions. It is basically impossible to achieve efficient and high-quality design verification solely by manual labor, making it difficult to ensure error-free design for massive electrical interconnection needs. Summary of the invention
[0004] The purpose of this application is to overcome the problems of the prior art and disclose a method, system and readable storage medium for automatic error detection and correction of massive electrical interconnection designs. This application automatically detects design errors in product electrical interconnection design data files based on a predefined set of rule elements and standard specifications, and completes error correction and data synchronization based on a visual navigation interface, so as to effectively solve the correctness and standardization of massive electrical interconnection design data in complex products or systems, thereby significantly improving the efficiency and quality of interconnection design of complex electrical systems.
[0005] On the one hand, the purpose of this application is achieved through the following technical solutions:
[0006] A method for automatically detecting and correcting errors in massive electrical interconnection designs, the method comprising:
[0007] S1: Product electrical interconnection design data file generation;
[0008] S2: Automatic detection of design errors, based on predefined rule element sets and standard specifications, to detect design errors in product electrical interconnect design data files;
[0009] S3: Automatically correct design errors and complete error correction and data synchronization through a visual navigation interface.
[0010] According to a preferred embodiment, step S1 includes: filling in the specific design requirements in the form of data item by item in a table, and annotating the attributes of the data item by item according to a predefined set of digital rule elements to form a product electrical interconnection design data file.
[0011] According to a preferred embodiment, step S2 further includes: after completing the design error detection in the product electrical interconnection design data file, forming an itemized verification report.
[0012] According to a preferred embodiment, step S3 includes: based on the itemized verification report obtained in step S2, guiding the designer to locate the design error item through the navigation interface, and giving optimization and improvement suggestions to complete error correction and data synchronization.
[0013] According to a preferred embodiment, the method for automatic error detection and correction of massive electrical interconnection designs further includes, after completing the automatic correction of design errors in step S3, performing automatic detection of design errors in step S2 again until verification is correct.
[0014] On the other hand, the present application also discloses:
[0015] An automatic error detection and correction system for massive electrical interconnection design, the automatic error detection and correction system for massive electrical interconnection design comprising a processor and a memory;
[0016] The memory is used to store computer programs or instructions.
[0017] The processor is used to execute the computer program or instructions in the memory. When the computer program or instructions are executed, it is used to implement the aforementioned automatic error detection and correction method for massive electrical interconnection design.
[0018] On the other hand, the present application also discloses:
[0019] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the aforementioned automatic error detection and correction method for massive electrical interconnection design.
[0020] The aforementioned main scheme of the present application and its further options can be freely combined to form multiple schemes, all of which are schemes that can be adopted and claimed for protection in the present application. After understanding the scheme of the present application, those skilled in the art can understand that there are multiple combinations based on the prior art and common knowledge, all of which are technical schemes to be protected by the present application, and they are not exhaustively listed here.
[0021] Beneficial effects of this application:
[0022] Through this application, in the massive electrical interconnection design of complex products or systems, based on a predefined digital rule element set, combined with rule matching and model calculation, design errors in massive electrical interconnection data can be automatically identified and located, automatic verification of electrical interconnection design data and automatic inspection of design specifications can be achieved, and error correction and data synchronization can be completed based on a visual navigation interface, achieving the one-time success goal of "design is standard", which can effectively solve the correctness and standardization of massive electrical interconnection design data in complex products or systems, thereby significantly improving the efficiency and quality of interconnection design of complex electrical systems. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a schematic diagram of an implementation process of the method for automatic error detection and correction of massive electrical interconnection design of the present application;
[0024] Figure 2 It is a schematic diagram for realizing automated inspection based on rule element sets, rapid error location and intelligent prompts. DETAILED DESCRIPTION
[0025] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0026] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0027] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the product of the application is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0028] In addition, the terms "horizontal", "vertical", "overhanging" and the like do not mean that the components are required to be absolutely horizontal or overhanging, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0029] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0030] In addition, the present application would like to point out that, in the present application, unless the specific structure, connection relationship, positional relationship, power source relationship, etc. are specifically written out, the structure, connection relationship, positional relationship, power source relationship, etc. involved in the present application are all known by those skilled in the art on the basis of the prior art without creative work.
[0031] Example 1
[0032] refer to Figure 1 As shown, this embodiment discloses a method for automatic error detection and correction of massive electrical interconnection designs. First, the designer fills in the specific design requirements in a table item by item in the form of data, and annotates the data item by item according to a predefined digital rule element set to form a product electrical interconnection design data file; the automatic error detection and correction tool for massive electrical interconnection designs of the present invention is called to automatically detect design errors in the product electrical interconnection design data file based on the predefined rule element set and standard specifications, and completes error correction and data synchronization based on a visual navigation interface.
[0033] The present application can effectively solve the correctness and standardization of massive electrical interconnection design data in complex products or systems through the above method, thereby significantly improving the efficiency and quality of interconnection design of complex electrical systems.
[0034] To achieve the above object, the technical solution adopted by the present invention comprises the following steps:
[0035] Step 1: Generate product electrical interconnection design data file. According to the electrical interconnection design requirements of the product or system, the designer fills in the design implementation plan in the form of text item by item in the form of text, and annotates the text item by item according to the predefined digital rule element set to form the product electrical interconnection design data file.
[0036] Step 2: Automatic detection of design errors. Based on step 1, the product electrical interconnection design data file is imported into the error automatic detection and correction tool designed based on the predefined rule element set and standard specifications. Based on the predefined rule element set and standard specifications, the design errors in the product electrical interconnection design data file are automatically detected to form an itemized verification report.
[0037] In step 2, the automatic error detection and correction tool of the present application can automatically identify and detect design errors and normative deviations in massive electrical interconnection data based on a predefined set of digital rule elements, and cover different signal forms such as low frequency, medium / radio frequency, different connection types such as bus / single point, different electrical characteristics such as differential / single-ended, and electrical design rules for different connection types such as optoelectronic heterogeneous composites commonly used in product or system design. The error detection efficiency is high and the coverage is comprehensive, which can achieve "one-time success" in massive electrical interconnection design.
[0038] The original predefined digital rule element set of this application not only includes mainstream electrical design standards and common bus types, but also covers enterprise standard specifications. The rule element set is injected into the design front end through attributes or tools, which can guide the automatic error detection and correction tool to realize automatic error detection and correction.
[0039] Step 3: Automatically correct design errors. Based on step 2, the error automatic detection and correction tool generates an itemized verification report, which guides designers to quickly locate design errors through the navigation interface, and automatically gives optimization and improvement suggestions. It can automatically complete error correction and data synchronization with one click. Repeat step 2 until the verification is correct.
[0040] In step 3, the present invention guides the designer to quickly complete the correction and synchronization of electrical design errors in a navigation manner based on the error detection results, which can support the rapid iteration and update and upgrade of complex systems.
[0041] refer to Figure 2 As shown, the present application is based on a digital set of rule elements, and the error detection and correction tool of the present invention is used to perform automated inspection and verification, such as connection relationship matching inspection, electrical design criteria inspection, etc. At the same time, the inspection results will be classified and marked by type in the present invention, and by double-clicking these reminder messages, the matching location can be automatically searched in the 100,000-level electrical interconnection relationship result data, and the modification and optimization method can be intelligently pushed to quickly iterate and complete the electrical interconnection design.
[0042] The technical method for automatic error detection and correction in massive electrical interconnection design of the present application is adopted to realize the automatic identification and location of design errors in massive electrical interconnection data in the massive electrical interconnection design of complex products or systems based on a predefined digital rule element set, combined with rule matching and model calculation, and realize automatic verification of electrical interconnection design data and automatic inspection of design specifications, and complete error correction and data synchronization based on a visual navigation interface, achieving the one-time success goal of "design is standard", which can effectively solve the correctness and standardization of massive electrical interconnection design data in complex products or systems, thereby significantly improving the efficiency and quality of interconnection design of complex electrical systems.
[0043] Example 2
[0044] Based on the same technical concept, the present application also discloses an automatic error detection and correction system for massive electrical interconnection designs. The automatic error detection and correction system for massive electrical interconnection designs may optionally also include: a communication interface and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus.
[0045] A computer program is stored in the memory. When the program is executed by the processor, the processor completes the steps of the automatic error detection and correction method for massive electrical interconnection design.
[0046] The communication bus mentioned in the automatic error detection and correction system for mass electrical interconnection design can be a Peripheral Component Inter connect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. The communication interface is used for communication between the above system device and other devices.
[0047] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.
[0048] The above-mentioned processor can be a general-purpose processor, including a central processing unit, a network processor (Network Processor, NP), etc.; it can also be a digital signal processing processor (Digital Signal Processing, DSP), an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc.
[0049] Example 3
[0050] Based on the same technical concept, the present application also discloses: a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the automatic error detection and correction method for massive electrical interconnection design as described above are implemented.
[0051] The above-mentioned computer-readable storage medium can be any available medium or data storage device that can be accessed by the processor in the system device, including but not limited to magnetic storage such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc., optical storage such as CD, DVD, BD, HVD, etc., and semiconductor storage such as ROM, EPROM, EEPROM, non-volatile memory (NANDFLASH), solid-state drive (SSD), etc.
[0052] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.
[0053] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0054] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0055] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0056] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.
Claims
1. A method for automatic error detection and correction in massive electrical interconnection design, characterized in that: The method for automatically detecting and correcting errors in massive electrical interconnection designs includes: S1: Product electrical interconnection design data file generation; S2: Automatic detection of design errors, based on predefined rule element sets and standard specifications, detects design errors in product electrical interconnect design data files; S3: Automatically correct design errors and complete error correction and data synchronization through a visual navigation interface.
2. The method for automatic error detection and correction of massive electrical interconnection design according to claim 1, characterized in that: Step S1 includes: filling in specific design requirements item by item in the form of data, and annotating the attributes of each item of data according to a predefined set of digital rule elements to form a product electrical interconnection design data file.
3. The method for automatic error detection and correction of massive electrical interconnection design according to claim 1, characterized in that: Step S2 also includes: after completing the design error detection in the product electrical interconnection design data file, forming an itemized verification report.
4. The method for automatic error detection and correction of massive electrical interconnection design as claimed in claim 3, characterized in that: Step S3 includes: based on the itemized verification report obtained in step S2, guiding the designer to locate the design error item through the navigation interface, and giving optimization and improvement suggestions to complete error correction and data synchronization.
5. The method for automatic error detection and correction of massive electrical interconnection design as claimed in claim 4, characterized in that: The method for automatic error detection and correction of massive electrical interconnection designs also includes, after completing the automatic correction of design errors in step S3, performing the automatic detection of design errors in step S2 again until verification is correct.
6. An automatic error detection and correction system for massive electrical interconnection design, characterized in that: The automatic error detection and correction system for massive electrical interconnection design includes a processor and a memory; The memory is used to store computer programs or instructions. The processor is used to execute the computer program or instructions in the memory. When the computer program or instructions are executed, it is used to implement the automatic error detection and correction method for massive electrical interconnection design as described in any one of claims 1 to 5.
7. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for automatic error detection and correction of massive electrical interconnection designs as described in any one of claims 1 to 5 is implemented.