Virtual terminal loop checking method, system, equipment and medium
Through federated learning algorithms and knowledge graph technology, local and global knowledge graphs of virtual terminal loops are constructed and compared, and the problems of low calibration efficiency and low accuracy of virtual terminal loops in the existing technology are solved, achieving more efficient and accurate calibration results.
Patent Information
- Application Number
- CN202411607769.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-12
- Publication Date
- 2025-02-28
AI Technical Summary
The existing SCD virtual terminal loop calibration method is inefficient and has low accuracy, and cannot meet the needs of large-scale engineering applications.
The federated learning algorithm and knowledge graph technology are used to construct the local knowledge graph of each virtual terminal loop, and compared it with the global knowledge graph, and check it through the collaboration of multiple local knowledge graphs.
It improves the accuracy and efficiency of virtual terminal loop calibration, can adapt to complex grid structures and diversified equipment connections, reduces misjudgment and misjudgment, and meets the needs of actual engineering applications.
Smart Images

Figure CN119539052A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power grid technology, and in particular to a virtual terminal loop verification method, system, equipment and medium. Background Art
[0002] Smart substation is an important direction of power grid development. Its core equipment is intelligent switching equipment. By integrating sensor technology, control technology, communication technology and power electronics technology, the equipment is intelligent. Relay protection is one of the key technologies of smart substation. Its main function is to monitor the operating status of the power system, detect faults in time and quickly remove faults to ensure the safe and stable operation of the power system. The SCD (Substation Configuration Description) file is a smart substation configuration description file that describes the primary equipment, secondary equipment and the connection relationship between them in the substation. Among them, the virtual terminal loop refers to the virtual connection point defined in the SCD file to describe the logical connection relationship between secondary equipment.
[0003] The existing SCD virtual terminal loop verification method mainly relies on manual verification, that is, manually comparing the virtual terminal loop in the SCD file with the actual wiring diagram to check whether the connection is correct. In addition, there are also some automatic verification methods based on rule bases, machine learning and other technologies. For example, the automatic verification method based on the virtual terminal loop rule base verifies whether the virtual terminal loop in the SCD file meets the specifications through a preset rule base; the virtual loop verification method based on the improved K-nearest neighbor algorithm uses the K-nearest neighbor algorithm to perform cluster analysis on the virtual terminal loop in the SCD file to identify possible incorrect connections; the method of implementing SCD file verification using the CNN model automatically identifies abnormal connections in the SCD file by constructing a convolutional neural network model; the algorithm based on knowledge graphs and deep learning uses knowledge graphs and deep learning technologies to automatically verify the virtual terminal loops in the SCD file.
[0004] Among them, manual verification is inefficient and prone to errors, which seriously affects the safety of relay protection and power grids. Secondly, although the existing automatic verification methods can improve the verification efficiency to a certain extent, their models are limited, the verification efficiency is not high, and the accuracy is low, which is not enough for large-scale engineering applications. For example, the automatic verification method based on the rule base needs to be constantly updated to adapt to the ever-changing power grid structure and equipment models, which increases maintenance costs; the automatic verification method based on machine learning requires a lot of manual annotation of the model training data, which increases the workload; the automatic verification method based on deep learning, although it can automatically extract features, requires a lot of training data and computing resources, which has certain difficulties in practical applications. Summary of the invention
[0005] In order to solve the above technical problems, the present invention discloses a virtual terminal loop verification method, system, equipment and medium for improving the accuracy and efficiency of verification.
[0006] In order to achieve the above object, in a first aspect, the present invention discloses a virtual terminal loop verification method, comprising:
[0007] Receive an actual configuration file and a standard configuration file corresponding to the substation to be verified, and obtain actual configuration information corresponding to each virtual terminal circuit from the actual configuration file;
[0008] According to the actual configuration information and the preset federated learning algorithm, construct a local knowledge graph corresponding to each of the virtual terminal loops;
[0009] Constructing a global knowledge graph corresponding to the standard configuration file, and comparing each of the local knowledge graphs with the global knowledge graph, so as to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result;
[0010] Summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
[0011] The present invention discloses a method for checking a virtual terminal circuit, which first receives an actual configuration file and a standard configuration file sent by a substation to be checked, so as to use the standard configuration file to realize the checking of the virtual terminal circuit and improve the accuracy of the checking. Specifically, during the checking process, the actual configuration information corresponding to each virtual terminal circuit is first extracted to construct a local knowledge graph corresponding to a single virtual terminal circuit, so as to simultaneously check the virtual terminal circuit in the substation to be checked through multiple local knowledge graphs to improve the checking rate. Furthermore, during the checking process, the checking is performed through a federated learning algorithm to realize distributed training and data sharing, so as to further improve the efficiency of the checking. After the local knowledge graph is constructed, each local knowledge graph is traversed and compared with the global knowledge graph to determine the verification result corresponding to each virtual terminal circuit according to the comparison result, thereby making full use of the advantages of multiple knowledge graphs, thereby improving the accuracy and efficiency of the checking. Finally, the checking results fed back by each local knowledge graph are summarized to generate a checking report corresponding to the substation to be checked.
[0012] As a preferred example, the receiving of the actual configuration file and the standard configuration file corresponding to the substation to be verified, and obtaining the actual configuration information corresponding to each virtual terminal loop from the actual configuration file includes:
[0013] Obtaining the actual SCD file corresponding to the substation to be verified, and obtaining the standard SCD file corresponding to the actual SCD file from a preset template library;
[0014] Parsing the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file;
[0015] According to the global knowledge graph, each of the virtual terminal loops is extracted from the actual SCD file, and the actual configuration information corresponding to the virtual terminal loop is obtained; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
[0016] The present invention obtains the actual SCD file corresponding to the substation and the correct standard SCD file, and uses the standard SCD file as a verification basis to calibrate the virtual terminal loop, thereby improving the accuracy of the verification. Furthermore, in the process of obtaining the configuration information of the virtual terminal loop, the knowledge graph is used to improve the accuracy of extracting a single virtual terminal loop.
[0017] As a preferred example, the construction of a local knowledge graph corresponding to each virtual terminal loop according to the actual configuration information and a preset federated learning algorithm includes:
[0018] Training the pre-built initial neural network model according to the actual configuration information to obtain an initial knowledge graph model corresponding to each virtual terminal loop;
[0019] Calculate the confidence corresponding to each of the initial knowledge graph models through a preset federated learning algorithm, and optimize the initial knowledge graph model according to the confidence to obtain a knowledge graph model corresponding to each of the virtual terminal loops;
[0020] According to the knowledge graph model, a local knowledge graph including nodes and identification vectors is generated.
[0021] The present invention constructs a local knowledge graph corresponding to a single virtual terminal loop, so as to perform multi-party collaboration through multiple local knowledge graphs, and jointly calibrate the overall SCD virtual terminal loop of the substation to improve the accuracy of the calibration. Furthermore, the constructed initial knowledge graph is optimized using the federated learning algorithm to improve the accuracy of the local knowledge graph, thereby improving the accuracy of the calibration.
[0022] As a preferred example, the comparing each of the local knowledge graphs with the global knowledge graph to determine the verification result corresponding to each of the virtual terminal loops according to the comparison result includes:
[0023] Select any interval in the actual SCD file and obtain the type attribute value of the interval; wherein the type attribute value includes description, type, category, function identifier, and belonging IED;
[0024] Extracting a first graph from the local knowledge graph and a second graph from the global knowledge graph according to the type attribute value;
[0025] Traversing the first graph and the second graph to generate a first dictionary corresponding to the first graph and a second dictionary corresponding to the second graph;
[0026] The difference between the first dictionary and the second dictionary is compared through a double loop to determine the verification result of the virtual terminal loop within the interval according to the difference.
[0027] The present invention extracts graphs corresponding to the same interval in the global knowledge graph and the local knowledge graph, and then traverses the graphs to generate corresponding dictionaries, so as to complete the verification of virtual terminal loops by comparing the differences in the dictionaries, thereby improving the accuracy of the verification.
[0028] As a preferred example, traversing the first graph and the second graph to generate a first dictionary corresponding to the first graph and a second dictionary corresponding to the second graph includes:
[0029] Traversing the first vertex with an in-degree of a preset in-degree value in the first graph and the second graph;
[0030] Searching for a second vertex whose relationship with the first vertex is GOOSE or SV;
[0031] A function identifier of the first vertex and a function identifier of the second vertex are obtained to form the first dictionary and the second dictionary according to the first vertex, the second vertex and the function identifier.
[0032] In the process of generating the dictionary, the present invention utilizes the in-degree and the relationship between two vertices to generate the dictionary, thereby ensuring the accuracy of the dictionary and further improving the accuracy of the verification.
[0033] As a preferred example, the step of summarizing each of the verification results to generate a verification report corresponding to the substation to be verified includes:
[0034] Obtain the verification result fed back by each local knowledge graph within the same interval to obtain a plurality of verification results corresponding to the same interval;
[0035] A plurality of verification results corresponding to each of the plurality of intervals are obtained, and the plurality of verification results are summarized and calculated by a preset distributed computing method to generate a verification result of the virtual terminal circuit in the substation to be verified.
[0036] The present invention improves the accuracy of verification by aggregating the verification results corresponding to different local knowledge graphs within the same interval, and simultaneously utilizes multiple local knowledge graphs to jointly complete the verification of the overall SCD virtual terminal loop, thereby improving the efficiency of verification.
[0037] In a second aspect, the present invention discloses a virtual terminal loop verification system, including a loop splitting module, a graph construction module, a loop verification module and a verification summary module;
[0038] The circuit splitting module is used to receive the actual configuration file and the standard configuration file corresponding to the substation to be verified, and obtain the actual configuration information corresponding to each virtual terminal circuit from the actual configuration file;
[0039] The graph construction module is used to construct a local knowledge graph corresponding to each virtual terminal loop according to the actual configuration information and a preset federated learning algorithm;
[0040] The loop verification module is used to construct a global knowledge graph corresponding to the standard configuration file, and compare each of the local knowledge graphs with the global knowledge graph to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result;
[0041] The verification summary module is used to summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
[0042] The present invention discloses a virtual terminal circuit verification system, which first receives the actual configuration file and the standard configuration file sent by the substation to be verified, so as to realize the verification of the virtual terminal circuit by using the standard configuration file, and improve the accuracy of the verification. Specifically, in the verification process, the actual configuration information corresponding to each virtual terminal circuit is first extracted to construct the local knowledge graph corresponding to the single virtual terminal circuit, so as to simultaneously perform the verification of the virtual terminal circuit in the substation to be verified through multiple local knowledge graphs, so as to improve the verification rate. Further, in the verification process, the verification is performed by a federated learning algorithm to realize distributed training and data sharing, and further improve the efficiency of the verification. After constructing the local knowledge graph, each local knowledge graph is traversed and compared with the global knowledge graph to determine the verification result corresponding to each virtual terminal circuit according to the comparison result, thereby making full use of the advantages of multiple knowledge graphs, thereby improving the accuracy and efficiency of the verification. Finally, the verification results fed back by each local knowledge graph are summarized to generate a verification report corresponding to the substation to be verified.
[0043] As a preferred example, the loop splitting module includes a parsing unit and a splitting unit;
[0044] The parsing unit is used to obtain the actual SCD file corresponding to the substation to be verified, and obtain the standard SCD file corresponding to the actual SCD file from a preset template library; parse the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file;
[0045] The splitting unit is used to extract each of the virtual terminal loops from the actual SCD file according to the global knowledge graph, and obtain the actual configuration information corresponding to the virtual terminal loop; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
[0046] The present invention obtains the actual SCD file corresponding to the substation and the correct standard SCD file, and uses the standard SCD file as a verification basis to calibrate the virtual terminal loop, thereby improving the accuracy of the verification. Furthermore, in the process of obtaining the configuration information of the virtual terminal loop, the knowledge graph is used to improve the accuracy of extracting a single virtual terminal loop.
[0047] In a third aspect, the present invention discloses an electronic device, comprising: at least one processor; and a memory communicatively connected to at least one of the processors; wherein the memory stores instructions executable by at least one of the processors, and the instructions are executed by at least one of the processors so that at least one of the processors can execute a virtual terminal loop verification method described in the first aspect.
[0048] In a fourth aspect, the present invention discloses a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the virtual terminal loop verification method described in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] Figure 1 : A schematic diagram of a flow chart of a virtual terminal loop verification method disclosed in an embodiment of the present invention;
[0050] Figure 2 : A structural schematic diagram of a virtual terminal loop verification system disclosed in an embodiment of the present invention;
[0051] Figure 3 : A flowchart of a virtual terminal loop verification method disclosed in another embodiment of the present invention;
[0052] Figure 4 : A schematic diagram of a federated learning architecture disclosed in another embodiment of the present invention. DETAILED DESCRIPTION
[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0054] Embodiment 1
[0055] This embodiment discloses a virtual terminal circuit verification method. Specifically, the implementation process of the verification method is as follows: Figure 1 , mainly including steps 101 to 104, wherein the steps are mainly:
[0056] Step 101: receiving an actual configuration file and a standard configuration file corresponding to a substation to be verified, and obtaining actual configuration information corresponding to each virtual terminal loop from the actual configuration file.
[0057] In this embodiment, this step mainly includes: obtaining the actual SCD file corresponding to the substation to be verified, and obtaining the standard SCD file corresponding to the actual SCD file from a preset template library; parsing the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file; extracting each of the virtual terminal loops from the actual SCD file according to the global knowledge graph, and obtaining the actual configuration information corresponding to the virtual terminal loop; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
[0058] In this embodiment, this step obtains the actual SCD file corresponding to the substation and the correct standard SCD file, and uses the standard SCD file as the basis for verification to calibrate the virtual terminal loop, thereby improving the accuracy of the verification. Furthermore, in the process of obtaining the configuration information of the virtual terminal loop, the knowledge graph is used to improve the accuracy of extracting a single virtual terminal loop.
[0059] Step 102: Construct a local knowledge graph corresponding to each of the virtual terminal loops according to the actual configuration information and a preset federated learning algorithm.
[0060] In this embodiment, this step mainly includes: training the pre-constructed initial neural network model according to the actual configuration information to obtain the initial knowledge graph model corresponding to each of the virtual terminal loops; calculating the confidence corresponding to each of the initial knowledge graph models through a preset federated learning algorithm, and optimizing the initial knowledge graph model according to the confidence to obtain the knowledge graph model corresponding to each of the virtual terminal loops; based on the knowledge graph model, generating a local knowledge graph containing nodes and identification vectors.
[0061] In this embodiment, this step constructs a local knowledge graph corresponding to a single virtual terminal loop, so as to perform multi-party collaboration through multiple local knowledge graphs to jointly verify the overall SCD virtual terminal loop of the substation and improve the accuracy of the verification. Furthermore, the constructed initial knowledge graph is optimized using the federated learning algorithm to improve the accuracy of the local knowledge graph, thereby improving the accuracy of the verification.
[0062] Step 103: construct a global knowledge graph corresponding to the standard configuration file, and compare each of the local knowledge graphs with the global knowledge graph to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result.
[0063] In this embodiment, this step mainly includes: selecting any interval in the actual SCD file and obtaining the type attribute value of the interval; wherein the type attribute value includes description, type, category, function identifier, and belonging IED; extracting a first graph from the local knowledge graph and a second graph from the global knowledge graph according to the type attribute value; traversing the first graph and the second graph to generate a first dictionary corresponding to the first graph and a second dictionary corresponding to the second graph; comparing the difference between the first dictionary and the second dictionary through a double loop to determine the verification result of the virtual terminal loop in the interval according to the difference.
[0064] Furthermore, the first vertices whose in-degree is a preset in-degree value in the first graph and the second graph are traversed; the second vertex whose relationship with the first vertex is GOOSE or SV is searched; the function identifier of the first vertex and the function identifier of the second vertex are obtained to form the first dictionary and the second dictionary according to the first vertex, the second vertex and the function identifier.
[0065] In this embodiment, this step extracts the graphs corresponding to the same interval in the global knowledge graph and the local knowledge graph, and then traverses the graphs to generate a corresponding dictionary, so as to complete the verification of the virtual terminal loop by comparing the differences in the dictionaries, thereby improving the accuracy of the verification.
[0066] Furthermore, in the process of generating the dictionary, the in-degree and the relationship between two vertices are used to generate the dictionary, so as to ensure the accuracy of the dictionary and thus improve the accuracy of the verification.
[0067] Step 104: Summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
[0068] In this embodiment, this step mainly includes: obtaining the verification results fed back by each local knowledge graph within the same interval to obtain several verification results corresponding to the same interval; obtaining several verification results corresponding to each of several intervals, and summarizing and calculating several verification results through a preset distributed computing method to generate the verification results of the virtual terminal circuit in the substation to be verified.
[0069] In this embodiment, this step improves the accuracy of the verification by aggregating the verification results corresponding to different local knowledge graphs within the same interval, and at the same time uses multiple local knowledge graphs to jointly complete the verification of the entire SCD virtual terminal loop, which can improve the efficiency of the verification.
[0070] On the other hand, this embodiment also discloses a virtual terminal circuit verification system. For the specific structure of the verification system, please refer to Figure 2 , including a loop splitting module 201, a graph building module 202, a loop verification module 203 and a verification summary module 204.
[0071] The loop splitting module 201 is used to receive the actual configuration file and the standard configuration file corresponding to the substation to be verified, and obtain the actual configuration information corresponding to each virtual terminal loop from the actual configuration file.
[0072] The graph construction module 202 is used to construct a local knowledge graph corresponding to each of the virtual terminal loops according to the actual configuration information and a preset federated learning algorithm.
[0073] The loop verification module 203 is used to construct a global knowledge graph corresponding to the standard configuration file, and compare each of the local knowledge graphs with the global knowledge graph to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result.
[0074] The verification summary module 204 is used to summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
[0075] In this embodiment, the loop splitting module 201 includes a parsing unit and a splitting unit.
[0076] The parsing unit is used to obtain the actual SCD file corresponding to the substation to be verified, and obtain the standard SCD file corresponding to the actual SCD file from a preset template library; parse the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file;
[0077] The splitting unit is used to extract each of the virtual terminal loops from the actual SCD file according to the global knowledge graph, and obtain the actual configuration information corresponding to the virtual terminal loop; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
[0078] Accordingly, this embodiment provides a computer device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and the processor implements the virtual terminal loop verification method when executing the computer program. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc. The processor is the control center of the terminal, and various interfaces and lines are used to connect the various parts of the entire terminal. The memory may be used to store the computer program, and the processor implements various functions of the terminal by running or executing the computer program stored in the memory and calling the data stored in the memory. The memory may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, a phone book, etc.), etc. In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (SmartMedia Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.
[0079] Correspondingly, this embodiment also provides a computer-readable storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the computer-readable storage medium is located is controlled to execute the virtual terminal loop verification method.
[0080] Wherein, if the module integrated with the fault protection circuit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, all or part of the processes in the above-mentioned embodiment method can also be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Wherein, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal and software distribution medium, etc.
[0081] Compared with the prior art, the virtual terminal loop verification method and system provided by the embodiment of the present invention have the following beneficial effects:
[0082] The present embodiment provides a method and system for checking a virtual terminal circuit, which first receives an actual configuration file and a standard configuration file sent by a substation to be checked, so as to use the standard configuration file to check the virtual terminal circuit and improve the accuracy of the check. Specifically, during the check, the actual configuration information corresponding to each virtual terminal circuit is first extracted to construct a local knowledge graph corresponding to a single virtual terminal circuit, so as to simultaneously check the virtual terminal circuit in the substation to be checked through multiple local knowledge graphs to improve the check rate. Further, during the check, the check is performed through a federated learning algorithm to achieve distributed training and data sharing, further improving the efficiency of the check. After the local knowledge graph is constructed, each local knowledge graph is traversed and compared with the global knowledge graph to determine the verification result corresponding to each virtual terminal circuit according to the comparison result, thereby making full use of the advantages of multiple knowledge graphs, thereby improving the accuracy and efficiency of the check. Finally, the check results fed back by each local knowledge graph are summarized to generate a check report corresponding to the substation to be checked.
[0083] Embodiment 2
[0084] With the widespread establishment of substations, the correctness verification of virtual terminal circuits has become an important prerequisite for ensuring the safe and stable operation of substations. In the prior art, the methods for automatically verifying virtual terminal circuits mostly rely on predefined rules or models, lacking adaptability and generalization capabilities. When faced with complex power grid structures and diversified equipment connections, there will be misjudgment or missed verification results, resulting in low verification accuracy. At the same time, due to the large scale of substations, when verifying virtual terminal circuits, the existing models need to process large-scale data, resulting in low verification efficiency and unable to meet the needs of actual engineering applications.
[0085] In this regard, in order to solve the above-mentioned technical problems, the present embodiment discloses a virtual terminal circuit verification method, which sets a local knowledge graph corresponding to each virtual terminal circuit in the substation, and then verifies the overall virtual terminal circuit in the substation through multiple local knowledge graphs to improve the efficiency and accuracy of the verification.
[0086] Specifically, please refer to the implementation process of the virtual terminal loop verification method provided in this embodiment. Figure 3 , mainly including steps 301 to 304, the steps are mainly:
[0087] Step 301: obtaining an actual configuration file of a substation to be verified, and obtaining a standard configuration file corresponding to the actual configuration file, so as to extract each virtual terminal loop from the actual configuration file according to the standard configuration file.
[0088] In this embodiment, this step mainly includes: obtaining the actual SCD file corresponding to the substation to be verified, and obtaining the standard SCD file corresponding to the actual SCD file from a preset template library. Among them, the actual SCD file can be split into strings, and each character obtained after the splitting is matched from a preset database or template library to obtain a correct and error-free standard SCD file, so that the standard SCD file can be used as a judgment basis to verify the accuracy of the virtual terminal circuit in the actual SCD file.
[0089] Next, the standard SCD file is parsed to construct a global knowledge graph corresponding to the standard SCD file, and then each virtual terminal loop is extracted from the actual SCD file according to the global knowledge graph, and the actual configuration information corresponding to the virtual terminal loop is obtained; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device and the relationship between the devices.
[0090] Specifically, first, the knowledge graph corresponding to the standard SCD file is constructed by referring to the knowledge graph construction method to ensure the accuracy of virtual terminal loop extraction. In one embodiment, the relationship and functional attributes between devices are extracted from the SCD file by natural language processing technology, and then the knowledge graph is constructed. Furthermore, each virtual terminal loop in the actual SCD file is extracted using the constructed knowledge graph.
[0091] Step 302: construct a local knowledge graph corresponding to each of the virtual terminal loops, and optimize the local knowledge graph through a preset federated learning algorithm.
[0092] In this embodiment, this step mainly includes: training the pre-built initial neural network model according to the actual configuration information to obtain the initial knowledge graph model corresponding to each of the virtual terminal loops. Calculating the confidence corresponding to each of the initial knowledge graph models through a preset federated learning algorithm, and optimizing the initial knowledge graph model according to the confidence to obtain the knowledge graph model corresponding to each of the virtual terminal loops; generating a local knowledge graph containing nodes and identification vectors according to the knowledge graph model.
[0093] Specifically, after using the global knowledge graph to extract each virtual terminal circuit in the substation to be verified, the local knowledge graph corresponding to each virtual terminal circuit can be constructed using the knowledge graph construction method. In certain implementations of this embodiment, a local model corresponding to each virtual terminal circuit is constructed using a method for constructing a knowledge graph model to obtain a knowledge graph. Among them, after using the initial neural network model to construct the knowledge graph model corresponding to each virtual terminal circuit, in order to improve the accuracy of the knowledge graph model, an improved federated learning architecture can be introduced to dynamically suppress unsatisfactory models by calculating the confidence scores of each model, thereby obtaining a global optimal model.
[0094] Specifically, after the introduction of the federated learning architecture, multiple participants, namely the knowledge graph model corresponding to each virtual terminal loop, jointly train the knowledge graph model based on their respective combined data, without any participant having to display local data to the centralized server. In order to improve learning efficiency, the federated learning architecture introduced in this embodiment can refer to Figure 4 ,like Figure 4 As shown, the confidence scores of each model are calculated, unsatisfactory models are dynamically suppressed, the generalization ability of the model is improved, and the model aggregation speed is optimized.
[0095] Reference Figure 4 In the federated learning architecture, the local model, i.e., each local knowledge graph model, is constructed using the corresponding knowledge graph, and the central server aggregates the local knowledge graph models. ing i is the knowledge graph stored on client i, Ω is the total number of clients. Different knowledge graphs are placed on multiple clients with overlapping entity sets. These different knowledge graphs define triples and relationship sets. Knowledge graphs on different clients use their own triples to update the embedding representations of entities and relationships through client updates. The server is responsible for controlling the aggregation and sharing of entity embedding representations through server operations. On the server side, an entity table is stored and maintained to record all entities in the client, and is responsible for mapping entities from different client knowledge graphs to the server-side entity table.
[0096] Step 303: Traverse the optimized local knowledge graph and the global knowledge graph corresponding to the standard configuration file to obtain a first dictionary corresponding to the local knowledge graph and a second dictionary corresponding to the global knowledge graph, and obtain the difference between the first dictionary and the second dictionary to determine the verification result of the virtual terminal loop based on the difference.
[0097] In this embodiment, this step mainly includes: selecting any interval in the actual SCD file and obtaining the type attribute value of the interval; wherein the type attribute value includes description, type, category, function identifier, and belonging IED; extracting the first graph from the local knowledge graph and extracting the second graph from the global knowledge graph according to the type attribute value.
[0098] In some implementations of this embodiment, any interval of the Inputs element in the actual SCD file is selected to obtain the original type attribute value of the interval, wherein the attribute value includes: description, type, category, function identifier, and belonging IED. All virtual terminal loops of the interval are extracted in each local knowledge graph to obtain the first graph of each local knowledge graph in the interval. Next, the second graph of the type attribute value is searched and extracted in the global knowledge graph corresponding to the standard SCD file.
[0099] The first map and the second map are traversed to generate a first dictionary corresponding to the first map and a second dictionary corresponding to the second map; the difference between the first dictionary and the second dictionary is compared through a double loop to determine the verification result of the virtual terminal loop in the interval according to the difference.
[0100] In some implementations of this embodiment, the first graph and the second graph extracted are traversed to find the vertex P 1i The in-degree is 2, and find P 2i That is, with vertex P 1iVertices with GOOSE or SV relationships. Create dictionaries corresponding to the first graph and the second graph, respectively, and the expression form of the dictionary is: G = {P 1i .Function identifier, P 2i .Function identifier}, starting with P 1i For key, P 2i is the value.
[0101] Then, the difference between the two dictionaries is compared through a double loop, and the difference result Diff = {P 1i ,P 2i ,ErrorCode} are recorded in a table, thereby obtaining the verification result corresponding to the virtual terminal loop. Specifically, the verification results are divided into the following types:
[0102] (1) The functional identifiers at both ends of the virtual circuit are complete, but they do not exist in the reference diagram, that is, there is a redundant virtual circuit;
[0103] (2) The function identification attribute of one end of the virtual circuit is empty, but the other end can be matched with the reference graph, indicating that the correctness of one end is questionable;
[0104] (3) One end of the virtual circuit has a mismatched function identification attribute, but the other end can match the reference graph, that is, one end of the virtual circuit is connected incorrectly;
[0105] (4) Relationships that exist in the baseline graph but not in the entity graph are judged based on their degree of association. Relationships with weak correlation are considered errors, and relationships with weak correlation are considered hints.
[0106] Step 304: Collect each of the verification results to obtain a virtual terminal circuit verification report corresponding to the substation to be verified.
[0107] In this embodiment, this step mainly includes: obtaining the verification results of each local knowledge graph in the same interval, generating several verification results corresponding to the same interval, and then summarizing the verification results of each interval together to obtain the verification results of the entire SCD virtual terminal circuit of the smart substation.
[0108] Specifically, in some implementations of this embodiment, the aggregation and calculation of the verification results of each interval can be achieved through distributed computing technology.
[0109] Compared with the prior art, the virtual terminal loop verification method and system provided by the embodiment of the present invention have the following beneficial effects:
[0110] (1) This embodiment combines the improved federated learning architecture to verify the virtual terminal loop, and dynamically suppresses unsatisfactory models through the knowledge graph to obtain the global optimal model. This method has adaptive and generalization capabilities, can adapt to complex power grid structures and diversified device connections, and reduce the possibility of misjudgment or missed judgment.
[0111] (2) This embodiment processes data through multiple models, has high computational efficiency, and the verification time does not exceed 300 seconds, which can meet the needs of actual engineering applications. Compared with the existing methods, the computational efficiency has been significantly improved, and it is suitable for real-time or near real-time SCD file verification.
[0112] (3) This embodiment combines the advantages of multiple models through a federated learning architecture to achieve verification of the SCD virtual terminal loop of the entire station. This method not only improves the accuracy of the verification, but also improves the efficiency of the verification, providing a strong guarantee for the reliable operation of the smart substation.
[0113] (4) The verification accuracy rate provided by this embodiment is about 95%. Compared with the verification method provided by the prior art, the verification method provided by this embodiment can dynamically suppress unsatisfactory models based on the federated learning architecture, thereby improving the generalization ability of the model, thereby improving the verification ability of each client, so that the average verification accuracy rate of each client is about 95%. It can more accurately identify and correct errors in SCD files.
[0114] (5) The verification method provided in this embodiment is based on the knowledge graph, and the construction and update of the knowledge graph are relatively simple and easy to expand and maintain.
[0115] With the development of the power grid and the introduction of new equipment, the automatic identification and verification of new equipment can be realized by updating the knowledge graph, which improves the scalability and maintainability of the system. In general, the virtual terminal loop verification method proposed in this embodiment is superior to the existing technology in terms of accuracy, efficiency, adaptability and generalization ability, and has good engineering application value.
[0116] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It is particularly pointed out that for those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of protection of the present invention.
Claims
1. A virtual terminal loop verification method, characterized in that: include: Receive an actual configuration file and a standard configuration file corresponding to the substation to be verified, and obtain actual configuration information corresponding to each virtual terminal circuit from the actual configuration file; According to the actual configuration information and the preset federated learning algorithm, construct a local knowledge graph corresponding to each of the virtual terminal loops; Constructing a global knowledge graph corresponding to the standard configuration file, and comparing each of the local knowledge graphs with the global knowledge graph, so as to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result; Summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
2. A virtual terminal loop verification method according to claim 1, characterized in that: The receiving of the actual configuration file and the standard configuration file corresponding to the substation to be verified, and obtaining the actual configuration information corresponding to each virtual terminal loop from the actual configuration file, includes: Obtaining the actual SCD file corresponding to the substation to be verified, and obtaining the standard SCD file corresponding to the actual SCD file from a preset template library; Parsing the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file; Each of the virtual terminal loops is extracted from the actual SCD file according to the global knowledge graph, and actual configuration information corresponding to the virtual terminal loop is obtained; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
3. A virtual terminal loop verification method according to claim 2, characterized in that: The step of constructing a local knowledge graph corresponding to each virtual terminal loop according to the actual configuration information and a preset federated learning algorithm includes: Training the pre-built initial neural network model according to the actual configuration information to obtain an initial knowledge graph model corresponding to each virtual terminal loop; Calculate the confidence corresponding to each of the initial knowledge graph models through a preset federated learning algorithm, and optimize the initial knowledge graph model according to the confidence to obtain a knowledge graph model corresponding to each of the virtual terminal loops; According to the knowledge graph model, a local knowledge graph including nodes and identification vectors is generated.
4. A virtual terminal loop verification method according to claim 2, characterized in that: The comparing each of the local knowledge graphs with the global knowledge graph to determine the verification result corresponding to each of the virtual terminal loops according to the comparison result includes: Select any interval in the actual SCD file and obtain the type attribute value of the interval; wherein the type attribute value includes description, type, category, function identifier, and belonging IED; Extracting a first graph from the local knowledge graph and a second graph from the global knowledge graph according to the type attribute value; Traversing the first graph and the second graph to generate a first dictionary corresponding to the first graph and a second dictionary corresponding to the second graph; The difference between the first dictionary and the second dictionary is compared through a double loop to determine the verification result of the virtual terminal loop within the interval according to the difference.
5. A virtual terminal loop verification method according to claim 4, characterized in that: The traversing the first graph and the second graph to generate a first dictionary corresponding to the first graph and a second dictionary corresponding to the second graph includes: Traversing the first vertex with an in-degree of a preset in-degree value in the first graph and the second graph; Searching for a second vertex whose relationship with the first vertex is GOOSE or SV; A function identifier of the first vertex and a function identifier of the second vertex are obtained to form the first dictionary and the second dictionary according to the first vertex, the second vertex and the function identifier.
6. A virtual terminal loop verification method according to claim 4, characterized in that: The step of summarizing each of the verification results to generate a verification report corresponding to the substation to be verified includes: Obtain the verification result fed back by each local knowledge graph within the same interval to obtain a plurality of verification results corresponding to the same interval; A plurality of verification results corresponding to each of the plurality of intervals are obtained, and the plurality of verification results are summarized and calculated by a preset distributed computing method to generate a verification result of the virtual terminal circuit in the substation to be verified.
7. A virtual terminal circuit verification system, characterized in that: It includes a circuit splitting module, a graph building module, a circuit verification module and a verification summary module; The circuit splitting module is used to receive the actual configuration file and the standard configuration file corresponding to the substation to be verified, and obtain the actual configuration information corresponding to each virtual terminal circuit from the actual configuration file; The graph construction module is used to construct a local knowledge graph corresponding to each virtual terminal loop according to the actual configuration information and a preset federated learning algorithm; The loop verification module is used to construct a global knowledge graph corresponding to the standard configuration file, and compare each of the local knowledge graphs with the global knowledge graph to determine a verification result corresponding to each of the virtual terminal loops according to the comparison result; The verification summary module is used to summarize each of the verification results and generate a verification report corresponding to the substation to be verified.
8. A virtual terminal circuit verification system according to claim 7, characterized in that: The loop splitting module includes a parsing unit and a splitting unit; The parsing unit is used to obtain the actual SCD file corresponding to the substation to be verified, and obtain the standard SCD file corresponding to the actual SCD file from a preset template library; Parsing the standard SCD file to construct a global knowledge graph corresponding to the standard SCD file; The splitting unit is used to extract each of the virtual terminal loops from the actual SCD file according to the global knowledge graph, and obtain the actual configuration information corresponding to the virtual terminal loop; wherein the actual configuration information includes the name of the device where the virtual terminal loop is located, the functional attributes of the device, and the relationship between the devices.
9. An electronic device, characterized in that: include: at least one processor; And a memory communicatively connected to at least one of the processors; wherein the memory stores instructions executable by at least one of the processors, and the instructions are executed by at least one of the processors so that at least one of the processors can execute a virtual terminal circuit verification method according to any one of claims 1-6.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute a virtual terminal loop verification method according to any one of claims 1 to 6.
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