Field emission device and preparation method thereof

By using the gate-anode integrated structure and independently prepared cathode structure assembly in the field emitting device, the problems of poor process complexity and structural regulation in the prior art are solved, and the optimization of device performance and the expansion of application scope are achieved.

CN119542091AActive Publication Date: 2025-02-28PEKING UNIV
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Patent Information

Application Number
CN202411520259.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-29
Publication Date
2025-02-28
Estimated Expiration
2044-10-29

AI Technical Summary

Technical Problem

When existing field emitters use new cathode emitters, the process complexity increases, making it difficult to achieve a large-length-diameter nanowire structure, and the structure is flexible and controllable, and the device performance is difficult to optimize, and the future application prospects are limited.

Method used

The gate-anode integrated structure and independently prepared cathode structure are assembled to achieve optimization of device structure and performance improvement. The individual preparation of the cathode allows the free selection and optimization of various complex cathode tip array structures, and the application of special machining techniques ensures the high field emission performance, reliability and consistency of the cathode.

Benefits of technology

It improves the performance optimization and regulation capabilities of field transmitting devices, reduces the production cost and difficulty, simplifies the process flow, improves the yield rate, expands the application range of the device, and reduces the cost.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a field emission device and a preparation method thereof, and belongs to the field of vacuum micro-nano electronic devices. The field emission device prepared by the invention comprises a gate-anode integrated structure and a cathode structure, the gate-anode integrated structure comprises a metal electrode positioned on the back surface of the high-conductivity anode, an anode-gate insulating layer positioned on the front surface of the high-conductivity anode, a patterned gate layer positioned on the anode-gate insulating layer, a gate-cathode insulating layer positioned on the gate layer, and a gate metal lead electrode positioned on the gate-cathode insulating layer; wherein the gate metal lead electrode is close to the gate working area and is connected to the gate layer; the cathode structure comprises a substrate, a cathode located on the front face of the substrate and a metal electrode located on the back face of the cathode. And the cathode side of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of the gate-anode integrated structure. According to the invention, the performance optimization and regulation capability of the device can be enhanced, and the preparation cost and difficulty are reduced.
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Description

Technical Field

[0001] The invention belongs to the field of vacuum micro-nano electronic devices, and in particular relates to a field emission device and a preparation method thereof. Background Art

[0002] Field electron emission (FE) relies on ballistic electron transport in a vacuum to achieve high operating speeds, low energy losses, high temperature and radiation resistance, high reliability, and long life. Field emission devices are suitable for a wide range of applications from sensors and displays to high-performance integrated circuits (ICs), and have better noise immunity than solid-state devices, so they can operate at lower currents and are suitable for high-speed and high-power applications and harsh environments such as high temperature and radiation.

[0003] The existing methods for constructing field emission devices are divided into two categories: one is a cathode or (gate-cathode) integrated structure, and then the anode is assembled to form a field emission device; the second is a monolithic integrated processing device. Both use micromachining technology to construct the cathode, insulating layer and gate on the same substrate in sequence. The latter continues to make the insulating layer and anode, and the former assembles the anode through alignment bonding. The former process is relatively simple, and the anode is easy to achieve a large gap, giving full play to the high-voltage and high-power characteristics of the field emission device. However, a highly conductive anode plate needs to be installed during operation, which is not conducive to the miniaturization and integration of field emission devices, and reduces the reliability of the device, especially under high temperature or harsh environment. The introduction of an external anode may increase parasitic capacitance and affect the high-frequency response and performance stability of the device. The latter realizes a compact three-terminal field emission device, which is conducive to the integration and miniaturization of the device, avoids the alignment error and thermal expansion mismatch problems that may occur during the bonding process, and improves the performance stability of the device. However, the key component of the field emission device is the cathode emitter, and the conventional material is silicon and molybdenum needle tip. In order to further improve its emission performance, a lower work function and a larger aspect ratio field enhancement structure are required. Therefore, new materials and structures have been introduced in recent research and development, such as thin films and nanowires of diamond, carbon nanotubes, silicon carbide, zinc oxide, etc. However, when the two existing field emission device construction methods use this type of new cathode emitter, not only does it greatly increase the complexity of the process, but it is also difficult to achieve a large aspect ratio nanowire structure. In addition, the structure has poor flexibility and controllability, and the device performance is difficult to optimize, and the future application prospects are limited. Summary of the invention

[0004] The object of the present invention is to provide a field emission device and a method for preparing the same, so as to enhance the performance optimization and control capability of the device and reduce the preparation cost and difficulty.

[0005] The technical solution adopted by the present invention to achieve the above-mentioned purpose is as follows:

[0006] A field emission device comprises a gate-anode integrated structure and a cathode structure;

[0007] The gate-anode integrated structure comprises a metal electrode located on the back of the high-conductivity anode, an anode-gate insulating layer located on the front of the high-conductivity anode, a patterned gate layer located on the anode-gate insulating layer, a gate-cathode insulating layer located on the gate layer, and a gate metal lead electrode located on the gate-cathode insulating layer; wherein the gate metal lead electrode is adjacent to the gate working area and connected to the gate layer;

[0008] The cathode structure includes a substrate, a cathode located on the front side of the substrate, and a metal electrode located on the back side of the cathode;

[0009] The cathode side of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure.

[0010] Furthermore, the gate layer can be patterned into any opening shape, such as square, comb-shaped, and any period.

[0011] Furthermore, the anode-gate insulating layer and the gate-cathode insulating layer can be patterned into any opening shape, such as square, comb-shaped, and any period.

[0012] Furthermore, the cathode is a thin film structure or a tip array structure.

[0013] Furthermore, the metal electrode on the cathode structure is located on a side of the substrate facing away from the cathode, or is located between the cathode and the substrate.

[0014] Furthermore, the highly conductive anode is made of one of heavily doped silicon, tungsten and nickel.

[0015] Furthermore, the metal electrodes of the gate-anode integrated structure and the cathode structure are made of one material selected from the group consisting of gold, aluminum and platinum.

[0016] Furthermore, the anode-gate insulating layer and the gate-cathode insulating layer are made of one of silicon dioxide and silicon nitride.

[0017] Furthermore, the gate layer is made of one of chromium, molybdenum and polysilicon.

[0018] Furthermore, the gate metal lead electrode is made of one of aluminum, gold and copper.

[0019] Furthermore, the substrate is made of one or more materials selected from the group consisting of heavily doped silicon, indium tin oxide, and copper.

[0020] Furthermore, the cathode is made of a material selected from the group consisting of silicon, molybdenum, diamond, carbon nanotubes, silicon carbide, and zinc oxide.

[0021] A method for preparing a field emission device comprises the following steps:

[0022] Depositing a metal electrode on the back side of the highly conductive anode;

[0023] An anode-gate insulating layer, a gate layer, and a gate-cathode insulating layer are sequentially deposited on the front side of the highly conductive anode;

[0024] patterning the gate layer before or after deposition;

[0025] Patterning is performed at a position of the gate-cathode insulating layer adjacent to the gate working area to expose the gate layer, and then a gate metal lead electrode is deposited to obtain a gate-anode integrated structure;

[0026] depositing a cathode on a substrate;

[0027] Depositing a metal electrode on a side of the substrate facing away from the cathode or between the substrate and the cathode to obtain a cathode structure;

[0028] The cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure, and assembled and fixed to obtain a field emission device.

[0029] Furthermore, chemical vapor deposition, sputtering or electron beam evaporation methods are used to deposit metal electrodes of a gate-anode integrated structure, an anode-gate insulating layer, a gate layer and a gate-cathode insulating layer, and a metal electrode of a cathode structure.

[0030] Furthermore, the method of patterning the gate layer includes: patterning the gate layer by photolithography, wet etching or dry etching after deposition, or patterning by photolithography followed by metal stripping, or patterning the gate layer together with the anode-gate insulating layer and gate-cathode insulating layer above and below it.

[0031] Furthermore, the step of patterning the gate layer together with the anode-gate insulating layer and the gate-cathode insulating layer above and below it includes: etching the gate-cathode insulating layer, the gate layer and the anode-gate insulating layer in sequence using patterning technology such as photolithography, nanoimprinting or electron beam lithography and laser etching, ion etching, reactive ion etching or wet etching methods.

[0032] Furthermore, the gate-cathode insulating layer near the gate working area is photoetched using patterning technology such as photolithography, nanoimprinting or electron beam lithography, and stripping, wet etching and sputtering methods to expose the gate layer, and then the gate metal lead electrode is deposited by sputtering or electron beam evaporation.

[0033] Furthermore, the cathode is a thin film structure or a tip array structure; if it is a thin film structure, the thin film is grown by physical vapor deposition or chemical vapor deposition; if it is a tip array structure, a nanoscale tip array structure is formed on a substrate by reactive ion etching, focused ion beam milling or self-assembly mask technology, and then the emitter material is grown on the tip array structure by chemical vapor deposition, or the cathode material is directly formed into a nanoscale tip array structure by reactive ion etching, wet etching or electrochemical etching process.

[0034] Furthermore, the cathode surface is treated by surface doping, coating with low work function materials or plasma treatment.

[0035] Furthermore, the cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure using micro-nano alignment technology, and then assembled and fixed using bonding, welding or bonding technology.

[0036] The technical effects achieved by the present invention are:

[0037] The field emission device proposed in the present invention prepares the cathode part separately and assembles it with the gate-anode integrated structure, thereby optimizing the device structure and improving performance. This discrete preparation strategy allows the design and manufacture of the cathode emitter to be free from the limitations of traditional silicon and molybdenum materials, so that various complex cathode tip array structures can be freely selected and optimized, and special processing techniques can be applied to ensure the high field emission performance, reliability and consistency of the cathode. At the same time, the independence of the gate-anode integrated structure eliminates the dependence on special requirements of the cathode, and facilitates mass production using micromachining technology. In addition, this structure is also convenient for the preparation of finely patterned gates and the regulation of gate spacing and anode spacing, thereby enhancing the performance optimization and regulation capabilities of the device. The present invention can significantly expand the practicality and application scope of field emission devices, providing more possibilities for applications in different fields. At the same time, due to the simplification and optimization of the preparation process, the overall process difficulty is reduced, the yield rate is improved, the cost is reduced, and the economic benefits are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1A-1B It is a schematic diagram of the structure of two field emission devices.

[0039] Figure 2A-2E This is a schematic diagram of the preparation process of two field emission devices. DETAILED DESCRIPTION

[0040] In order to make the various technical features and advantages or technical effects in the above technical solutions of the present invention more obvious and easy to understand, they are described in detail below with reference to the accompanying drawings.

[0041] The embodiment of the present invention specifically proposes a field emission device, and the structure of the field emission device can be in two forms, such as Figure 1A-1B As shown, the field emission device specifically includes the following two structures:

[0042] 1. Grid-anode integrated structure: The back of the highly conductive anode (specifically a plate type) contains a metal electrode, and the front of the highly conductive anode has an anode-gate insulating layer, a patterned gate layer, and a gate-cathode insulating layer in sequence, and the gate metal lead electrode is contained on the gate-cathode insulating layer near the working area. Among them, the gate layer and the upper and lower insulating layers are patterned (see Figure 1A-1B ).

[0043] 2. Cathode structure: The cathode is contained on the substrate. In order to enhance field emission, the cathode is surface treated to reduce the work function (see Figure 1A ), or processed into an array structure with a sharp tip (see Figure 1B ); The electrode can be between the substrate and the cathode or on the back of the cathode.

[0044] The independently prepared cathode structure is fixed on the working area of ​​the gate-anode integrated structure through micro-nano alignment technology and bonding, bonding and other technologies.

[0045] The embodiment of the present invention also specifically proposes a method for preparing a field emission device. The technical idea is: prepare a cathode structure and a gate-anode integrated structure separately, and finally assemble the cathode structure and the gate-anode integrated structure together to obtain a field emission device. Specifically, the electrode metal on the back, the anode-gate insulating layer, the gate layer and the gate-cathode insulating layer on the front are deposited in sequence on the highly conductive anode, the two insulating layers and the gate layer are patterned, and the gate metal lead electrode is made on the gate-cathode insulating layer near the working area to obtain the gate-anode integrated structure. A cathode structure of special material and structure is independently prepared, and a metal electrode is deposited on the back of the substrate. Finally, the cathode is fixed on the gate working area of ​​the gate-anode integrated structure by alignment assembly technology to obtain a field emission device. The process of the method for preparing the field emission device is as follows: Figure 2A-2E As shown, the specific steps include:

[0046] 1. Preparation of gate-anode integrated structure

[0047] (1) Preparation of metal electrodes, see Figure 2A The highly conductive anode can be made of heavily doped silicon, tungsten, nickel and other materials. A metal electrode is deposited on the back of the highly conductive anode by chemical vapor deposition, sputtering, electron beam evaporation and other methods. The metal electrode can be made of gold, aluminum, platinum and other materials.

[0048] (2) Preparation of anode-gate insulation layer, see Figure 2AOn the highly conductive anode, the anode-gate insulating layer can be made of silicon oxide, silicon nitride and other materials by deposition using chemical vapor deposition, sputtering, electron beam evaporation and other methods.

[0049] (3) Preparation of gate layer, see Figure 2A . Materials such as chromium, molybdenum, and polysilicon can be used; and deposition methods such as sputtering, evaporation coating, and chemical vapor deposition can be used.

[0050] (4) Gate layer patterning, see Figure 2B The patterning can be performed during preparation, that is, the gate layer can be patterned by photolithography, wet etching or dry etching immediately after deposition, or by photolithography first and then patterning by stripping the deposited metal; or the patterning can be performed after preparing the upper and lower insulating layers on the gate layer.

[0051] (5) Preparation of gate-cathode insulating layer, see Figure 2A Or 2B. On the gate layer film, chemical vapor deposition, sputtering, electron beam evaporation and other methods can be used for deposition, and the gate-cathode insulating layer can be made of silicon oxide, silicon nitride and other materials.

[0052] (6) Prepare the gate metal lead electrode, see Figure 2C The gate-cathode insulating layer is patterned by photolithography, wet etching or dry etching to expose the underlying gate layer. Then, the lead metal, which can be aluminum, gold, copper or other metals, is deposited by sputtering, electron beam evaporation or other methods to obtain the gate metal lead electrode.

[0053] 2. Cathode structure preparation

[0054] (1) The substrate of the cathode structure can be heavily doped silicon, indium tin oxide, copper, etc.

[0055] (2) The cathode can be made of silicon, molybdenum, diamond, carbon nanotubes, silicon carbide, zinc oxide, etc. The cathode can be a thin film (see Figure 2D (a) in Figure 2), or a tip array (see Figure 2D (b) in the figure). For thin film cathodes, thin films can be grown by physical vapor deposition, chemical vapor deposition and other technologies. For tip array cathodes, one method is to form sharp nanostructures on the substrate using reactive ion etching, focused ion beam milling and other technologies, and then grow emitter materials on these structures by chemical vapor deposition and other methods; the other method is to directly form the cathode material into a nano tip array by reactive ion etching, wet etching, electrochemical etching and other processes.

[0056] (3) Cathode surface treatment: Surface treatment can be performed by surface doping, coating with low work function materials, plasma treatment, etc. to enhance field emission performance.

[0057] (4) Preparation of metal electrodes: Use chemical vapor deposition, sputtering, electron beam evaporation and other methods to sputter metal electrodes on the substrate or the back of the cathode. The metal electrodes can be made of gold, aluminum, platinum and other materials.

[0058] 3. Assembling to form a field emission device

[0059] See Figure 2E , using micro-nano alignment technology, the cathode structure is accurately aligned with the gate working area of ​​the gate-anode integrated structure, and fixed using adhesive bonding, welding, bonding and other technologies.

[0060] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Appropriate modifications or equivalent substitutions of the technical solutions of the present invention made by ordinary technicians in the field should all be included in the protection scope of the present invention. The protection scope of the present invention shall be based on what is defined in the claims.

Claims

1. A field emission device, characterized in that: It includes a grid-anode integrated structure and a cathode structure; The gate-anode integrated structure includes a metal electrode located on the back of the highly conductive anode, an anode-gate insulating layer located on the front of the highly conductive anode, a patterned gate layer located on the anode-gate insulating layer, a gate-cathode insulating layer located on the gate layer, and a gate metal lead electrode located on the gate-cathode insulating layer; The gate metal lead electrode is adjacent to the gate working area and connected to the gate layer; The cathode structure includes a substrate, a cathode located on the front side of the substrate, and a metal electrode located on the back side of the cathode; The cathode side of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure.

2. The field emission device according to claim 1, characterized in that: The gate layer, the anode-gate insulating layer and the gate-cathode insulating layer are patterned to expose the anode, and are patterned into arbitrary opening shapes.

3. The field emission device according to claim 1, characterized in that: The cathode is a thin film structure or a tip array structure; the metal electrode on the cathode structure is located on the side of the substrate away from the cathode, or is located between the cathode and the substrate.

4. The field emission device according to claim 1, characterized in that: The highly conductive anode is made of one of heavily doped silicon, tungsten, and nickel; the metal electrodes of the gate-anode integrated structure and the cathode structure are made of one of gold, aluminum, and platinum; the anode-gate insulating layer and the gate-cathode insulating layer are made of one of silicon dioxide and silicon nitride; the gate layer is made of one of chromium, molybdenum, and polycrystalline silicon; the gate metal lead electrode is made of one of aluminum, gold, and copper; the substrate is made of one or more of heavily doped silicon, indium tin oxide, and copper; the cathode is made of one of silicon, molybdenum, diamond, carbon nanotubes, silicon carbide, and zinc oxide.

5. A method for preparing a field emission device according to any one of claims 1 to 4, characterized in that: The following steps are involved: Depositing a metal electrode on the back side of the highly conductive anode; An anode-gate insulating layer, a gate layer, and a gate-cathode insulating layer are sequentially deposited on the front side of the highly conductive anode; patterning the gate layer before or after deposition; Patterning is performed at a position of the gate-cathode insulating layer adjacent to the gate working area to expose the gate layer, and then a gate metal lead electrode is deposited to obtain a gate-anode integrated structure; depositing a cathode on a substrate; Depositing a metal electrode on a side of the substrate facing away from the cathode or between the substrate and the cathode to obtain a cathode structure; The cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure, and assembled and fixed to obtain a field emission device.

6. The preparation method according to claim 5, characterized in that: Chemical vapor deposition, sputtering or electron beam evaporation methods are used to deposit metal electrodes of a gate-anode integrated structure, an anode-gate insulating layer, a gate layer and a gate-cathode insulating layer, as well as a metal electrode of a cathode structure.

7. The preparation method according to claim 5, characterized in that: Methods for patterning the gate layer include: patterning the gate layer by photolithography, wet etching or dry etching after deposition, or patterning by photolithography followed by metal stripping, or patterning the gate layer together with the anode-gate insulating layer and the gate-cathode insulating layer above and below it; the step of patterning the gate layer together with the anode-gate insulating layer and the gate-cathode insulating layer above and below it includes: etching the gate-cathode insulating layer, the gate layer and the anode-gate insulating layer in sequence by using patterning technology of photolithography, nanoimprinting or electron beam lithography and laser etching, ion etching, reactive ion etching or wet etching.

8. The preparation method according to claim 5, characterized in that: The gate-cathode insulating layer near the gate working area is photoetched using patterning technology such as photolithography, nanoimprinting or electron beam lithography, and stripping, wet etching and sputtering methods to expose the gate layer, and then the gate metal lead electrode is deposited by sputtering or electron beam evaporation.

9. The preparation method according to claim 5, characterized in that: The cathode is a thin film structure or a tip array structure; If it is a thin film structure, the thin film is grown by physical vapor deposition or chemical vapor deposition. If it is a tip array structure, a nanoscale tip array structure is formed on the substrate by reactive ion etching, focused ion beam milling or self-assembly mask technology, and then the emitter material is grown on the tip array structure by chemical vapor deposition, or the cathode material is directly formed into a nanoscale tip array structure by reactive ion etching, wet etching or electrochemical etching process.

10. The preparation method according to claim 5, characterized in that: The cathode surface is treated by surface doping, coating with low work function materials or plasma treatment; the cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure by micro-nano alignment technology, and then assembled and fixed by bonding, welding or bonding technology.

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