Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof, and the manufacturing method comprises the steps: providing a substrate, and forming a first metal layer on the substrate; forming a capacitor part on the first metal layer; the first metal layer is etched to form an antenna component, and the antenna component and the capacitor component are arranged at an interval; forming a first dielectric layer covering the capacitor component and the antenna component on the substrate; a rewiring layer is formed on the first dielectric layer, and part of the rewiring layer is an inductance component and is electrically connected with the capacitance component, so that the capacitance component and the inductance component form a filtering component. According to the integrated module, the antenna part and the filtering part are integrated on the same substrate, connecting lines of all devices in the integrated module are reduced, high integration force of passive devices is obtained, meanwhile, power consumption of the integrated module is reduced, the antenna part and the filtering part are integrated on the same substrate, and the production cost is reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for manufacturing the same. Background Art

[0002] With the widespread development of fifth-generation communication research and the upgrading of communication technology, 5G mobile phones need to integrate more RF devices, including antennas, switches, low-noise amplifiers, filters, duplexers and many other devices.

[0003] In the related art, the antenna RF module integration method is mainly system in package (SIP), and the integration of filters, such as LC filters, can be integrated through the integrated passive device (IPD) process, while the SIP method is usually adopted to integrate the antenna and LC filter into a modular form.

[0004] However, when the antenna and LC filter are integrated and modularized using the SIP method, the integration level of the passive components is not high enough. As the integration level increases, the power consumption will also increase. Summary of the invention

[0005] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further described in detail in the Detailed Description of the Invention section. The Summary of the Invention section of this application does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0006] In view of the existing problems, the present application provides a method for manufacturing a semiconductor device, the manufacturing method comprising:

[0007] providing a substrate, and forming a first metal layer on the substrate;

[0008] forming a capacitor component on the first metal layer;

[0009] Etching the first metal layer to form an antenna component, wherein the antenna component and the capacitor component are spaced apart from each other;

[0010] forming a first dielectric layer covering the capacitor component and the antenna component on the substrate;

[0011] A redistribution layer is formed on the first dielectric layer, wherein a portion of the redistribution layer is an inductor component and is electrically connected to the capacitor component, so that the capacitor component and the inductor component constitute a filter component.

[0012] In one embodiment of the present application, the capacitor component is a MIM capacitor, and the forming of the capacitor component on the first metal layer includes:

[0013] forming an insulating layer and a second metal layer in sequence on the first metal layer;

[0014] The second metal layer and the insulating layer are etched in sequence and stopped at the top surface of the first metal layer, wherein the first metal layer and the etched second metal layer and the insulating layer constitute a capacitor component.

[0015] In one embodiment of the present application, the antenna component includes an antenna body and a feeding structure, and the etching of the first metal layer to form the antenna component includes:

[0016] The first metal layer is etched to form an antenna body and a feeding structure spaced apart from the capacitor component on one side of the first metal layer located at the capacitor component.

[0017] In one embodiment of the present application, the feeding structure includes a coplanar waveguide structure.

[0018] In one embodiment of the present application, forming a redistribution layer on the first dielectric layer, wherein part of the redistribution layer is an inductor component and is electrically connected to the capacitor component, comprises:

[0019] forming a first conductive plug and a second conductive plug in the first dielectric layer, wherein the bottom of the first conductive plug is connected to the second metal layer, and the bottom of the second conductive plug is connected to the first metal layer;

[0020] A first metal wiring layer and a second metal wiring layer are formed on the first dielectric layer, wherein the first metal wiring layer covers a top surface of the first conductive plug, and the second metal wiring layer covers a top surface of the second conductive plug.

[0021] In one embodiment of the present application, forming a redistribution layer on the first dielectric layer further comprises:

[0022] forming a third conductive plug in the first dielectric layer, wherein the bottom of the third conductive plug is connected to the feeding structure;

[0023] A third metal wiring layer is formed on the first dielectric layer, and the third metal wiring layer covers the top surface of the third conductive plug.

[0024] In one embodiment of the present application, the material of the first dielectric layer includes SiO2, PI or BCB.

[0025] In one embodiment of the present application, an auxiliary electrode layer is formed between the first metal layer and the insulating layer and between the second metal layer and the insulating layer.

[0026] In one embodiment of the present application, the material of the auxiliary electrode layer includes titanium nitride or tantalum nitride.

[0027] According to the second aspect of the present application, a semiconductor device is also provided. The semiconductor device is manufactured using the above manufacturing method.

[0028] The semiconductor device and manufacturing method of the embodiment of the present application integrate two passive devices, the antenna component and the filter component, on the same substrate, thereby reducing the connection lines of each device in the integrated module to obtain a high degree of integration of the passive devices, while also reducing the power consumption of the integrated module. In addition, the antenna component and the filter component are integrated on the same substrate, thereby reducing production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The following drawings of the present application are used as a part of the present application for understanding the present application. The drawings show the embodiments of the present application and their descriptions, which are used to explain the principle of the present application.

[0030] In the attached figure:

[0031] Figure 1 A flowchart showing a method for manufacturing a semiconductor device according to a specific embodiment of the present application is shown;

[0032] Figure 2A-2I A cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of the present application is shown. DETAILED DESCRIPTION

[0033] Next, the present application will be described more completely in conjunction with the accompanying drawings, in which embodiments of the present application are shown. However, the present application can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, for clarity, the sizes and relative sizes of layers and regions may be exaggerated. The same reference numerals throughout represent the same elements.

[0034] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0035] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0036] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "a", "an", and "said / the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0037] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the present application. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present application should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the present application.

[0038] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by ordinary technicians in the field of this application. It will also be understood that terms such as those defined in commonly used dictionaries should be understood to have a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an ideal or overly formal sense unless expressly defined as such herein.

[0039] In order to thoroughly understand the present application, detailed steps and structures will be presented in the following description to illustrate the technical solution proposed by the present application. The preferred embodiments of the present application are described in detail below, but in addition to these detailed descriptions, the present application may also have other implementations.

[0040] With the widespread development of fifth-band communication research and the upgrading of communication technology, 5G mobile phones need to integrate more RF devices, including antennas, switches, low-noise amplifiers, filters, duplexers and many other devices. The two key components of traditional RF front-ends, filters and antennas, are usually designed independently and then packaged on the module through additional transmission lines cascaded or resolved. Therefore, modularization and miniaturization are the inevitable trend of RF front-end packaging.

[0041] In the related technology, the main integration method of antenna RF module is SIP, which is to integrate several chips and micro passive devices manufactured by different integrated circuit manufacturing processes into the same small substrate to form a high-performance micro component with system functions. It is a miniaturized packaging process. SIP technology can reduce production costs and improve production efficiency. It is suitable for large-scale production and cost-sensitive applications. At the same time, SIP technology can freely combine chips and components according to functions and needs, provide flexible design, help meet the diverse needs of 5G communication technology, and provide more design options. However, as the degree of integration increases, the heat density in the module integrated by SIP technology will also increase, and its power consumption will also increase.

[0042] In recent years, IPD technology has been widely mentioned and studied in RF research. In related technologies, there is already rich experience in mass production of miniaturized LC filters using IPD technology, and there are also related solutions for making antennas using IPD technology, but the SIP method is usually used to modularize antennas and LC filters. However, the integration level of antennas and LC filters using SIP technology is not high enough, and as the integration level increases, the power consumption after integration will also increase.

[0043] Therefore, in view of the existence of the aforementioned technical problems, the present application proposes a method for manufacturing a semiconductor device, as shown in the figure, which mainly includes the following steps:

[0044] Step S110, providing a substrate, and forming a first metal layer on the substrate;

[0045] Step S120, forming a capacitor component on the first metal layer;

[0046] Step S130, etching the first metal layer to form an antenna component, wherein the antenna component and the capacitor component are spaced apart;

[0047] Step S140, forming a first dielectric layer covering the capacitor component and the antenna component on the substrate;

[0048] Step S150: forming a redistribution layer on the first dielectric layer, wherein a portion of the redistribution layer is an inductor component and is electrically connected to the capacitor component, so that the capacitor component and the inductor component constitute a filter component.

[0049] In the above scheme, two passive components, the antenna component and the filter component, are integrated on the same substrate, thereby reducing the connection lines of each component in the integrated module to obtain a high degree of integration of the passive components, while also reducing the power consumption of the integrated module. In addition, the antenna component and the filter component are integrated on the same substrate, thereby reducing the production cost.

[0050] Embodiment 1

[0051] Below, reference Figures 1 to 2I The manufacturing method of the semiconductor device of the present application is described in detail, wherein: Figure 1 A flowchart of a method for manufacturing a semiconductor device according to a specific embodiment of the present application is shown. Figure 2A-2I A cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of the present application is shown.

[0052] Exemplarily, the method for manufacturing a semiconductor device of the present application includes the following steps:

[0053] First, step S110 is performed to provide a substrate and form a first metal layer on the substrate.

[0054] In some embodiments, the substrate 200 may include a semiconductor base and an epitaxial layer formed on the semiconductor base. Optionally, the semiconductor base and the epitaxial layer may have the same conductivity type. In other embodiments, the substrate 200 may include only a semiconductor base without forming an epitaxial layer.

[0055] Specifically, Figure 2A As shown, the substrate 300 includes a semiconductor base, and the semiconductor base may include at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs or other III / V compound semiconductors, or the semiconductor base may also include silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) or germanium on insulator (GeOI). Although several examples of materials that can form a semiconductor base are described here, any material that can be used as a semiconductor base falls within the scope of protection of the present application. In addition, the substrate 200 can be divided into active areas, and / or a doped well (not shown) can be formed in the substrate 200, etc.

[0056] like Figure 2A As shown, an insulating dielectric layer 201 is first formed on a substrate 200, and then a first metal layer 202 is formed on the insulating dielectric layer 201. Exemplarily, the material of the insulating dielectric layer includes but is not limited to silicon dioxide (SiO2) and polyimide (PI), and the excellent insulation of these materials ensures the normal operation and stability of the circuit. Exemplarily, the first metal layer includes but is not limited to aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), platinum (Pt), germanium (Ge), iron (Ti), tantalum (Ta), gold (Au), nickel (Ni), tin (Sn), other suitable metal materials and / or at least one material in any combination thereof.

[0057] Next, step 120 is performed to form a capacitor component on the first metal layer.

[0058] In some embodiments, the capacitor component is a MIM capacitor, wherein the first metal layer is a part of the conductive structure (e.g., the lower electrode) in the MIM capacitor. Then, an insulating layer and a second metal layer are formed in sequence. In some embodiments, in order to enhance the structural stability of the capacitor component and to ensure the performance of the capacitor component, an auxiliary electrode layer is formed between the first metal layer and the insulating layer and between the second metal layer and the insulating layer. In some embodiments, the material of the auxiliary electrode layer includes titanium nitride or tantalum nitride.

[0059] Specifically, Figure 2B As shown, an auxiliary electrode layer 218 is formed on the first metal layer 201, an insulating layer 203 is formed on the auxiliary electrode layer 218, another auxiliary electrode layer 218 is formed on the insulating layer 203, and finally a second metal layer 204 is formed on the auxiliary electrode layer 218 formed for the second time.

[0060] Then, if Figure 2C As shown, a mask layer 205 is formed on the second metal layer 204. In some embodiments, the mask layer 205 can be a photoresist layer or a hard mask layer. Then, etching is performed starting from the second metal layer 204, etching the second metal layer 204 and the insulating layer 203 in sequence, and stopping at the top surface of the first metal layer 202. It is worth mentioning that during the etching process, the auxiliary electrode layer 218 located on the upper and lower sides of the insulating layer 203 is also etched at the same time. After the etching is completed, the mask layer 205 is removed, and the first metal layer 202, the etched auxiliary electrode layer 218, the etched insulating layer 203, and the etched second metal layer 204 form as shown. Figure 2D In the capacitor component shown, the first metal layer 202 serves as the lower electrode of the MIM capacitor, and the second metal layer 204 serves as the upper electrode of the MIM capacitor.

[0061] Next, step 130 is performed to etch the first metal layer to form an antenna component, wherein the antenna component and the capacitor component are spaced apart.

[0062] In some embodiments, the first metal layer is etched to form an antenna body and a feeding structure spaced apart from the capacitor component on one side of the first metal layer located at the capacitor component.

[0063] Specifically, Figure 2E As shown, an antenna mask layer 206 is formed on the first metal layer 202, and the antenna mask layer 206 also covers the top surface of the second metal layer 206, so that the capacitor component part on the first metal layer 202 will not be etched. Then, the first metal layer 202 is etched to obtain the following Figure 2F The first metal layer 202 after etching is shown as Figure 2FAs shown, an antenna component spaced apart from the capacitor component is formed on the first metal layer on one side of the capacitor component, and the antenna component includes an antenna body 208 and a feeding structure 207 spaced apart from the antenna body 208. The antenna body 208 is used to transmit the radio frequency signal from the wire to the space or to receive the wire from the space. The antenna body can mutually convert the guided wave on the transmission line and the electromagnetic wave in the space, and is a passive device. It is worth mentioning that the shape of the antenna body 208 can be designed according to the requirements, and this application is not limited. The shape and size of the antenna body 208 are controlled to transmit and receive radio frequency signals of different frequencies. The feeding structure 207 is used to transmit the radio frequency signal from the transmitter to the antenna body 208, or from the antenna 208 to the receiver, to ensure the minimum energy loss during the transmission process, and to achieve impedance matching between the antenna body 208 and the transmission line, reduce signal reflection, and improve the performance of the antenna component. In some embodiments, the feeding structure includes a coplanar waveguide (CPW) structure. The coplanar waveguide structure can enable the radio frequency signal to be transmitted in the same plane, reducing loss and interference. The coplanar waveguide structure can support a wide frequency range and can show good transmission performance from low frequency to millimeter wave band. The frequency bands involved in the embodiments of the present application are mainly 5G or sub-6G (wireless communication bands with frequencies below 6GHz) or millimeter waves. The working bandwidth of the antenna body can be changed by controlling the width of the coplanar waveguide.

[0064] Next, step 140 is performed to form a first dielectric layer covering the capacitor component and the antenna component on the substrate.

[0065] like Figure 2G As shown, a first dielectric layer 209 is formed on the substrate 200, and the first dielectric layer 209 covers the capacitor component and the antenna component, so that the entire antenna component and the capacitor component are covered by the first dielectric layer, thereby protecting the antenna component and the capacitor component. In some embodiments, the material of the first dielectric layer includes SiO2, PI or BCB (benzocyclobutene), and the electrical loss is reduced by the protection of the first dielectric layer.

[0066] Next, step 150 is performed to form a redistribution layer on the first dielectric layer, wherein part of the redistribution layer is an inductor component and is electrically connected to the capacitor component, so that the capacitor component and the inductor component constitute a filter component. The filtering requirements of the filter component are met by designing the redistribution layer in different sizes.

[0067] In some embodiments, a first conductive plug and a second conductive plug are formed in the first dielectric layer, the bottom of the first conductive plug is connected to the second metal layer, and the bottom of the second conductive plug is connected to the first metal layer; a first metal wiring layer and a second metal wiring layer are formed on the first dielectric layer, the first metal wiring layer covers the top surface of the first conductive plug, and the second metal wiring layer covers the top surface of the second conductive plug. The first metal wiring layer is an inductor component, and the inductor component is electrically connected to the capacitor component through the first conductive plug.

[0068] Specifically, Figure 2G As shown, a first conductive plug 210 and a second conductive plug 211 are formed in the first dielectric layer 209, the bottom of the first conductive plug 210 is electrically connected to the second metal layer 204, and the bottom of the second conductive plug 211 is electrically connected to the first metal layer 202; a first metal wiring layer 212 and a second metal wiring layer 213 are formed on the first dielectric layer 209, the first metal wiring layer 212 covers the top surface of the first conductive plug, and the second metal wiring layer 213 covers the top surface of the second conductive plug 211. In some embodiments, the inductor component includes a coil (not shown) and a first pad (not shown). One end of the coil is electrically connected to the first conductive plug 210, and the other end of the coil is connected to the first pad; the second metal wiring layer 213 includes a second pad (not shown), and the second pad is electrically connected to the first metal layer 202 through the second conductive plug 211, so that the capacitor component and the inductor component are connected in series to form a filter component, which is electrically connected to the external circuit through the first pad.

[0069] In some embodiments, forming a redistribution layer on the first dielectric layer further includes forming a third conductive plug in the first dielectric layer, the bottom of the third conductive plug being connected to the feed structure; and forming a third metal wiring layer on the first dielectric layer, the third metal wiring layer covering the top surface of the third conductive plug.

[0070] Specifically, Figure 2G As shown, a third conductive plug 214 is formed in the first dielectric layer 209, the bottom of the third conductive plug 214 is connected to the feeding structure 207, and a third metal wiring layer 215 is formed on the first dielectric layer 209, and the third metal wiring layer 215 covers the top surface of the third conductive plug 214. The third metal wiring layer 215 includes a third pad (not shown), and the third conductive plug 214 is used as a lead. The third pad in the third metal wiring layer 215 introduces the signal source of the radio frequency signal into the antenna body 208 through the feeding structure 207 to achieve electromagnetic wave transmission and reception.

[0071] Then, if Figure 2HAs shown, a second dielectric layer (passivation layer) 216 is formed on the first dielectric layer 209, and the second dielectric layer 216 covers the first metal wiring layer 212, the second metal wiring layer 213, and the third metal wiring layer 215. In some embodiments, the dielectric constant of the material of the second dielectric layer is higher than the dielectric constant of the material of the first dielectric layer, so that the structure in the first dielectric layer is not easily damaged by the external environment, thereby ensuring the performance of the antenna and the filtering component. Specifically, the material of the second dielectric layer is PI.

[0072] Then, if Fig.2I As shown, openings 217 are formed on the second dielectric layer 216 and respectively on the first metal wiring layer 212, the second metal wiring layer 213 and the third metal wiring layer 215, and the openings 217 expose the first pad, the second pad and the third pad for subsequent wiring processes to connect to external circuits.

[0073] At this point, the antenna component and the filter component have been integrated into the same substrate, and can be subsequently packaged using the SIP technology.

[0074] At this point, the process steps of the semiconductor device manufacturing method implemented according to an embodiment of the present application have been completed. It can be understood that the semiconductor device manufacturing method of this embodiment not only includes the above steps, but may also include other necessary steps before, during or after the above steps, which are all included in the scope of the manufacturing method of this embodiment.

[0075] In some of the above embodiments, two passive components, the antenna component and the filter component, are integrated on the same substrate, and the connection lines of each component in the integrated module are reduced to obtain a high degree of integration of the passive components. At the same time, the power consumption of the integrated module is also reduced. In addition, the antenna component and the filter component are integrated on the same substrate, thereby reducing the production cost.

[0076] Embodiment 2

[0077] The present application also provides a semiconductor device, which is prepared by the method in the above-mentioned embodiment 1.

[0078] Specifically, Fig.2I As shown, the semiconductor device includes: a substrate 200, a first metal layer 202 located on the substrate 200; a capacitor component and an antenna component located on the first metal layer 202, and the antenna component and the capacitor component are spaced apart; a first dielectric layer 209 located on the substrate 200 and covering the capacitor component and the antenna component, and a redistribution layer located on the first dielectric layer 209, wherein part of the redistribution layer does not have an inductor component, and the inductor component is electrically connected to the capacitor component so that the capacitor component and the inductor component constitute a filter component.

[0079] In some embodiments, Fig.2IAs shown, the capacitor component is a MIM capacitor, which includes a stacked first metal layer 202, an insulating layer 203, a second metal layer 204, and an auxiliary electrode layer 218 located between the first metal layer 202 and the insulating layer 203 and between the second metal layer 204 and the insulating layer.

[0080] In some embodiments, Fig.2I As shown, the redistribution layer includes a first conductive plug 210 and a second conductive plug 211 located in the first dielectric layer 209, and a first metal wiring layer 212 and a second metal wiring layer 213 located on the first dielectric layer 209; the bottom of the first conductive plug 210 is connected to the second metal layer 204, the bottom of the second conductive plug 211 is connected to the first metal layer 202, the first metal wiring layer 212 covers the top surface of the first conductive plug 210, and the second metal wiring layer 213 covers the top surface of the second conductive plug 211. In some embodiments, the inductor component includes a coil (not shown) and a first pad (not shown). One end of the coil is electrically connected to the first conductive plug 210, and the other end of the coil is connected to the first pad; the second metal wiring layer 213 includes a second pad (not shown), which is electrically connected to the first metal layer 202 through the second conductive plug 211, so that the capacitor component and the inductor component are connected in series to form a filter component, which is electrically connected to the external circuit through the first pad.

[0081] In some embodiments, Fig.2I As shown, the redistribution layer also includes a third conductive plug 214 located in the first dielectric layer 209 and a third metal wiring layer 215 located on the first dielectric layer 209. The bottom of the third conductive plug 214 is connected to the feeding structure 207, and the third metal wiring layer 215 covers the top surface of the third conductive plug 214. The third metal wiring layer 215 includes a third pad (not shown). The third conductive plug 214 is used as a lead. The third pad in the third metal wiring layer 215 introduces the signal source of the radio frequency signal into the antenna body 208 through the feeding structure 207 to achieve electromagnetic wave transmission and reception.

[0082] Since the device of the present application is prepared by the aforementioned method, it has the same advantages as the aforementioned method.

[0083] Although multiple embodiments are described herein, it should be understood that a variety of other modifications and embodiments may be conceived by those skilled in the art, all of which will fall within the spirit and scope of the concepts disclosed herein. More particularly, various modifications and changes may be made to the arrangements and / or components of the combined arrangements of the subject matter within the scope of the disclosure, drawings, and appended claims of the present application. In addition to modifications and changes to the components and / or arrangements, the use of alternatives is also an obvious option for those skilled in the art.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The method comprises: providing a substrate, and forming a first metal layer on the substrate; forming a capacitor component on the first metal layer; Etching the first metal layer to form an antenna component, wherein the antenna component and the capacitor component are spaced apart from each other; forming a first dielectric layer covering the capacitor component and the antenna component on the substrate; A redistribution layer is formed on the first dielectric layer, wherein a portion of the redistribution layer is an inductor component and is electrically connected to the capacitor component, so that the capacitor component and the inductor component constitute a filter component.

2. The manufacturing method according to claim 1, characterized in that The capacitor component is a MIM capacitor, and the capacitor component is formed on the first metal layer, including: forming an insulating layer and a second metal layer in sequence on the first metal layer; The second metal layer and the insulating layer are etched in sequence and stopped at the top surface of the first metal layer, wherein the first metal layer and the etched second metal layer and the insulating layer constitute a capacitor component.

3. The manufacturing method according to claim 1, characterized in that: The antenna component includes an antenna body and a feeding structure, and the etching of the first metal layer to form the antenna component includes: The first metal layer is etched to form an antenna body and a feeding structure spaced apart from the capacitor component on one side of the first metal layer located at the capacitor component.

4. The manufacturing method according to claim 3, characterized in that: The feeding structure includes a coplanar waveguide structure.

5. The manufacturing method according to claim 2, characterized in that: The forming of a redistribution layer on the first dielectric layer, wherein part of the redistribution layer is an inductor component and is electrically connected to the capacitor component, comprises: forming a first conductive plug and a second conductive plug in the first dielectric layer, wherein the bottom of the first conductive plug is connected to the second metal layer, and the bottom of the second conductive plug is connected to the first metal layer; A first metal wiring layer and a second metal wiring layer are formed on the first dielectric layer, wherein the first metal wiring layer covers a top surface of the first conductive plug, and the second metal wiring layer covers a top surface of the second conductive plug.

6. The manufacturing method according to claim 3, characterized in that: The forming of a redistribution layer on the first dielectric layer further comprises: forming a third conductive plug in the first dielectric layer, wherein the bottom of the third conductive plug is connected to the feeding structure; A third metal wiring layer is formed on the first dielectric layer, and the third metal wiring layer covers the top surface of the third conductive plug.

7. The manufacturing method according to claim 1, characterized in that: The material of the first dielectric layer includes SiO2, PI or BCB.

8. The manufacturing method according to claim 2, characterized in that: An auxiliary electrode layer is formed between the first metal layer and the insulating layer and between the second metal layer and the insulating layer.

9. The manufacturing method according to claim 8, characterized in that: The material of the auxiliary electrode layer includes titanium nitride or tantalum nitride.

10. A semiconductor device, characterized in that: The semiconductor device is manufactured by the manufacturing method according to any one of claims 1 to 9.

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