Circuit and method for simultaneously switching transimpedances of multiple channels by adopting shifting register

Abstract

The invention discloses a circuit for simultaneously switching transimpedances of multiple channels by adopting a shift register. The circuit is characterized in that an FPGA (Field Programmable Gate Array) is connected with a signal acquisition and conversion circuit module through an analog-to-digital converter and a clock generation and distribution module; the signal acquisition and conversion circuit module comprises a bias voltage setting module, a pi-type filter, a photoelectric sensor and a transimpedance amplification module which are connected in series; the input end of a transimpedance amplifier in the transimpedance amplification module is connected with a transimpedance gain access circuit, the transimpedance gain access circuit is connected with the output end of the transimpedance amplifier through an analog switch, and the control end of the analog switch is connected with the FPGA through a shifting register. According to the circuit and the method for simultaneously switching the transimpedances of the multiple channels by adopting the shift register, the transimpedance gain of the transimpedance amplifier is judged and switched according to the size of the signal, the range of the input signal is expanded, the resolution is improved, and the IO resources of the FPGA are saved and the cost is reduced by utilizing the storage function and the serial-parallel conversion function of the shift register.

Description

Technical Field

[0001] The present invention relates to the technical field of detection equipment, and in particular to a circuit and method for simultaneously switching the transimpedance of multiple channels by using a shift register. Background Art

[0002] In the electronic system of the flow cytometer, after each channel converts the light signal into a weak current signal through the photoelectric sensor, the weak current signal needs to be further amplified and converted into a voltage signal through the TIA (transimpedance amplifier). The analog voltage signal output by the TIA (transimpedance amplifier) ​​is then converted into a digital signal through the analog-to-digital converter, and then provided to the back-end field programmable gate array module for underlying data processing; in this entire signal process from signal generation to amplification conversion and post-processing, the TIA (transimpedance amplifier) ​​is a very critical link. It plays a decisive role in the range in which the signal can be amplified, that is, the dynamic output range of the flow cytometer. In layman's terms, the dynamic output range of the flow cytometer is the range of the instrument; in the current flow cytometers, the TIA (transimpedance amplifier) ​​amplification circuit adopts a single fixed transimpedance gain circuit form.

[0003] Disadvantages / deficiencies of conventional technologies: First, the conventional single fixed transimpedance TIA (transimpedance amplifier) ​​amplifier circuit is as follows Figure 1 , the amplification gain is fixed, and the maximum amplitude of its output signal is limited by the maximum output swing of the TIA (transimpedance amplifier) ​​op amp itself. Therefore, in order to linearly amplify the input signal without distortion, it is necessary to require that the input signal cannot be too large; at the same time, since the output of the TIA (transimpedance amplifier) ​​is given to the analog-to-digital converter for analog-to-digital conversion, and the input signal range of the analog-to-digital converter is limited by its own maximum input analog voltage, the maximum input analog voltage of the analog-to-digital converter is also another important factor that restricts the TIA input signal from being too large. For the above two reasons, when the photoelectric sensor and analog-to-digital converter are selected, a single fixed transimpedance TIA (transimpedance amplifier) ​​has certain restrictions on the upper limit of its input signal amplitude, resulting in the upper limit of the input signal range that the flow cytometer can detect is not large enough.

[0004] Second, in the application of flow cytometers, sometimes we encounter signals excited from sample groups, some of which are very weak and some are very strong. These signals with amplitudes that differ by hundreds of thousands or even millions of times need to be grouped together at the same time, and the maximum input signal of the analog-to-digital converter is often only a few volts, which means that the several microvolt signals output by the TIA (transimpedance amplifier) ​​need to be distinguished from the noise, and it is extremely difficult for the TIA (transimpedance amplifier) ​​amplification circuit to achieve ultra-low noise below the microvolt level, so system noise is another key factor and problem that restricts the lower limit of the input signal from being too low. In summary, for a single fixed transimpedance TIA (transimpedance amplifier) ​​amplification circuit, if its noise cannot be suppressed below the microvolt level, then very small signals such as microvolt signals will be submerged in the noise and cannot be distinguished, resulting in insufficient resolution of the instrument.

[0005] In summary, in flow cytometer applications, a single fixed transimpedance TIA (transimpedance amplifier) ​​amplifier circuit will have insufficient resolution for small signals and exceed the upper limit of components for large signals, resulting in an insufficient dynamic range of detectable signals in the instrument. Summary of the invention

[0006] The present invention overcomes the shortcomings of the prior art and provides a circuit and method for simultaneously switching the transimpedance of multiple channels using a shift register, so that during the signal acquisition process, the instrument can judge according to the size of the signal and use the shift register to simultaneously switch the transimpedance gain of the transimpedance amplifier, thereby expanding the range of the input signal and improving the resolution. In addition, the serial-to-parallel conversion of the shift register saves IO resources and reduces costs.

[0007] To achieve the above object, the technical solution adopted by the present invention is: a circuit for simultaneously switching the transimpedance of multiple channels using a shift register, comprising: a field programmable gate array module, the field programmable gate array module is connected to a signal acquisition conversion circuit module through an analog-to-digital converter and a clock generation and distribution module; The signal acquisition conversion circuit module includes a bias voltage setting module, one end of the bias voltage setting module is connected to the field programmable gate array module, the other end of the bias voltage setting module is connected to one of the input ends of the transimpedance amplifier in the transimpedance amplifier module through a π-type filter and a photoelectric sensor, the other input end of the transimpedance amplifier is grounded through a resistor voltage divider bias circuit, the output end of the transimpedance amplifier is connected to the field programmable gate array module through a single-ended input to differential output module and an analog-to-digital converter, and the field programmable gate array module and the analog-to-digital converter are respectively connected to a clock generation and distribution module; The input end of the transimpedance amplifier is connected to a plurality of groups of transimpedance gain access circuits, and the transimpedance gain access circuits are connected to the output end of the transimpedance amplifier through an analog switch, and the control end of the analog switch is connected to the field programmable gate array module through a shift register.

[0008] In a preferred embodiment of the present invention, the resistor voltage divider bias circuit includes a capacitor three connected to the input end of the transimpedance amplifier and grounded; resistor two is connected in parallel to both ends of the capacitor three, and the connection end of resistor two and capacitor three is connected to the power supply voltage end of the transimpedance amplifier through resistor three.

[0009] In a preferred embodiment of the present invention, the power supply voltage terminal of the transimpedance amplifier is grounded through a filter circuit seven; and the negative power supply voltage signal terminal of the transimpedance amplifier is grounded through a filter circuit six.

[0010] In a preferred embodiment of the present invention, the plurality of groups of transimpedance gain access circuits include two groups of transimpedance gain access circuits 1 and 2 with different transimpedance gain parameters; The transimpedance gain access circuit 1 includes a resistor 4 and a capacitor 4 which are arranged in parallel between the input end of the transimpedance amplifier and the analog switch; The second transimpedance gain access circuit comprises a resistor five and a capacitor five which are arranged in parallel between the input end of the transimpedance amplifier and the analog switch; The transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 are respectively connected to different switch access ends of the analog switch, and the field programmable gate array module controls the control end of the analog switch through the shift register, thereby controlling the on-off access of the transimpedance gain access circuit 1 or the transimpedance gain access circuit 2.

[0011] In a preferred embodiment of the present invention, the feedback resistor of the transimpedance amplifier is a transimpedance, and the capacitor connected in parallel with the transimpedance is a feedback capacitor. The parameter value of the feedback capacitor is obtained by a capacitor parameter formula, which is: ; Wherein, GBP is the gain bandwidth product of the transimpedance amplifier used in the transimpedance amplifier module; is the transimpedance of the operational amplifier; is the feedback capacitance of the operational amplifier; It is the parasitic capacitance of the photoelectric sensor + the sum of the input common-mode capacitance and input differential-mode capacitance of the transimpedance amplifier + the PCB trace capacitance near the input of the transimpedance amplifier.

[0012] In a preferred embodiment of the present invention, the π-type filter includes a resistor 1 connecting the bias voltage setting module and the photoelectric sensor, and both ends of the resistor 1 are grounded at a common point through a capacitor 1 and a capacitor 2, respectively.

[0013] In a preferred embodiment of the present invention, the analog switch uses a CMOS single-pole double-throw switch; the photoelectric sensor uses an avalanche photodiode; the clock fan-out buffer is used in the clock generation and distribution module; and the transimpedance amplifier uses a field effect transistor input operational amplifier.

[0014] In a preferred embodiment of the present invention, a method for simultaneously switching the transimpedance of a circuit using a shift register to simultaneously switch the transimpedance of multiple channels comprises the following steps: Sending an initialization instruction to the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register through the field programmable gate array module, the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register receive the initialization instruction, and complete the initialization of the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register; After completing the initialization operation, a default state operation after power-on is performed; the steps of the default state operation after power-on include: sending a switch to large resistance gain instruction to the analog switch of the corresponding channel through the field programmable gate array module, and the analog switch of the corresponding channel switches and selects to connect one end of the large resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2; After completing the default state operation after power-on, a simultaneous trans-impedance switching operation instruction for a circuit for simultaneous trans-impedance switching of multiple channels is issued through the field programmable gate array module to implement the simultaneous trans-impedance switching operation of multiple channels.

[0015] In a preferred embodiment of the present invention, the bias voltage setting module is used to set the bias voltage of the photoelectric sensor, and adjusting the magnitude of the bias voltage can change the magnitude of the output current of the photoelectric sensor; the π-type filter is used to filter out part of the noise introduced by the bias voltage of the bias voltage setting module; The photoelectric sensor is used to complete the conversion from optical signal to electrical signal. The photoelectric sensor converts the fluorescence signal or scattered light signal generated by the test sample after being excited into a current signal. The transimpedance amplification module includes a transimpedance amplifier, a filter circuit at the power supply voltage end of the transimpedance amplifier, and a resistor voltage divider bias circuit at the same-direction input end of the transimpedance amplifier provide a bias voltage for the operational amplifier, a transimpedance gain access circuit 1 and a transimpedance gain access circuit 2 are connected in parallel at the reverse input end and the output end of the transimpedance amplifier, an analog switch is connected in series between the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 and the analog switch together constitute a transimpedance switching circuit for switching the transimpedance gain; The single-ended input to differential output module is used to complete the conversion of the single-ended input signal to the differential output signal, and convert the single-ended signal output by the transimpedance amplifier into the differential signal required to be input by the analog-to-digital converter; the analog-to-digital converter is used to convert the analog signal of the differential input provided by the single-ended input to differential output module into a digital signal, and provide it to the field programmable gate array module for underlying data processing.

[0016] The present invention solves the defects existing in the technical background, and the beneficial technical effects of the present invention are: The present invention discloses a circuit and method for simultaneously switching the transimpedance of multiple channels using a shift register, so that during the process of signal acquisition, the instrument can judge according to the size of the signal and use the shift register to simultaneously switch the transimpedance gain of the transimpedance amplifier, thereby expanding the range of the input signal and improving the resolution. In addition, the serial-to-parallel conversion of the shift register saves IO resources and reduces costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0018] Figure 1 It is a conventional single fixed transimpedance TIA (transimpedance amplifier) ​​amplifier circuit in the prior art; Figure 2 is a general block diagram of the circuit structure of a preferred embodiment of the present invention; Figure 3 is a circuit structure diagram of signal collection and conversion of each channel in a preferred embodiment of the present invention; Figure 4 It is a schematic diagram of the FPGA control flow of switching the transimpedance gain of each channel and data acquisition processing in a preferred embodiment of the present invention; Figure 5 It is a timing diagram of input and output signals of 74LVC594A of a preferred embodiment of the present invention; Figure 6 is a simplified schematic diagram of TMUX6119 of a preferred embodiment of the present invention; Figure 7 It is a pin description table of 74LVC594A of a preferred embodiment of the present invention; Figure 8 This is the truth table of TMUX6119 of the preferred embodiment of the present invention. DETAILED DESCRIPTION

[0019] The present invention will now be further described in detail with reference to the accompanying drawings and embodiments. These drawings are simplified schematic diagrams that only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0020] It should be noted that if there are directional indications (such as up, down, bottom, top, etc.) involved in the embodiments of the present invention, the directional indication is only used to explain the relative position relationship, movement, etc. between the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly. The terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. Unless otherwise clearly specified and defined, the terms "set", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected, or indirectly connected through an intermediate medium, or it can be the internal connection of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0021] In view of the shortcomings of the existing flow cytometer that the dynamic range of detectable signals is not wide enough and the resolution is not high enough when a single fixed transimpedance TIA (transimpedance amplifier) ​​amplification circuit is used, and considering saving the IO port resources of a field programmable gate array module as much as possible to reduce the cost, the present invention provides an application circuit for simultaneously switching the transimpedance of multiple channels by using a shift register. When the input signal is small, the field programmable gate array module controls the analog switch to switch to a TIA channel with a larger transimpedance value through the shift register to ensure that the input small signal can be amplified to a large extent, thereby improving the resolution of the instrument; when the input signal is large, the field programmable gate array module controls the analog switch to switch to a TIA channel with a smaller transimpedance value through the shift register to ensure that the TIA (transimpedance amplifier) ​​output does not exceed the maximum swing and the maximum input voltage of the analog-to-digital converter under large signal input, thereby expanding the upper limit of the input signal range that can be detected by the flow cytometer, and at the same time, the IO control ports of the field programmable gate array module are greatly reduced through the serial input and parallel output shift register, saving costs. Embodiment 1

[0022] The overall circuit structure diagram is as follows Figure 2, a circuit for simultaneously switching the transimpedance of multiple channels using a shift register, comprising: a field programmable gate array module, the field programmable gate array module is connected to a signal acquisition conversion circuit module through an analog-to-digital converter and a clock generation distribution module; the signal acquisition conversion circuit module comprises a bias voltage setting module, one end of the bias voltage setting module is connected to the field programmable gate array module, the other end of the bias voltage setting module is connected to one of the input ends of a transimpedance amplifier in a transimpedance amplifier module through a π-type filter and a photoelectric sensor, the other input end of the transimpedance amplifier is grounded through a resistor voltage divider bias circuit, the output end of the transimpedance amplifier is connected to the field programmable gate array module through a single-ended input to differential output module and an analog-to-digital converter, and the field programmable gate array module and the analog-to-digital converter are respectively connected to the clock generation distribution module; the input end of the transimpedance amplifier is connected to a plurality of groups of transimpedance gain access circuits, and the transimpedance gain access circuits are connected to the output end of the transimpedance amplifier through an analog switch, and the control end of the analog switch is connected to the field programmable gate array module through a shift register.

[0023] like Figure 3 As shown, the structure diagram of the signal acquisition and conversion circuit module of each channel includes a bias voltage setting module, a π-type filter, a photoelectric sensor, a transimpedance amplifier module, a single-ended input to differential output module, and an analog-to-digital converter.

[0024] Specifically, the bias voltage setting module is used to set the bias voltage of the photoelectric sensor. By adjusting the bias voltage, the output current of the photoelectric sensor can be changed. The π-type filter is used to filter out part of the noise introduced by the bias voltage of the bias voltage setting module. The photoelectric sensor is used to complete the conversion from the optical signal to the electrical signal. The photoelectric sensor converts the fluorescence signal or the scattered light signal generated by the test sample after being excited into a current signal. Specifically, the π-type filter includes a resistor 1 (R11 or Rn1) connecting the bias voltage setting module and the photoelectric sensor, and both ends of the resistor 1 (R11 or Rn1) are grounded at a common point through a capacitor 5 (C11 or Cn1) and a capacitor 6 (C12 or Cn2).

[0025] Specifically, the transimpedance amplifier module includes a transimpedance amplifier, a filter circuit at the power supply voltage end of the transimpedance amplifier, and a resistor voltage divider bias circuit at the same-direction input end of the transimpedance amplifier to provide a bias voltage to the operational amplifier, and a transimpedance gain access circuit 1 and a transimpedance gain access circuit 2 are connected in parallel at the reverse input end and the output end of the transimpedance amplifier, and an analog switch is connected in series between the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 together with the analog switch constitute a transimpedance switching circuit for switching the transimpedance gain. Further, when the input signal is large, the analog switch is switched to connect to one end of the small resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and by reducing the amplification factor of the transimpedance amplifier, its output will not exceed the maximum input voltage of the analog-to-digital converter, thereby increasing the upper limit of the input signal; when the input signal is small, the analog switch is switched to connect to one end of the large resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and by increasing the amplification factor of the transimpedance amplifier, the output exceeds the system noise and is easily distinguished, thereby reducing the lower limit of the input signal and improving the resolution. In addition, the capacitor connected in parallel to the transresistance in the transresistance gain access circuit 1 and the transresistance gain access circuit 2 prevents the operational amplifier from generating self-oscillation and filters the output signal.

[0026] More specifically, the resistor voltage divider bias circuit includes a capacitor three (C13 or Cn3) connected to the input end of the transimpedance amplifier and grounded; two ends of the capacitor three (C13 or Cn3) are connected in parallel with a resistor two (R12 or Rn2), and the connection end of the resistor two (R12 or Rn2) and the capacitor three (C13 or Cn3) is connected to the power supply voltage end of the transimpedance amplifier through the resistor three (R13 or Rn3). The power supply voltage end of the transimpedance amplifier is grounded through the filter circuit seven (C17 or Cn7); the negative power supply voltage signal end of the transimpedance amplifier is grounded through the filter circuit six (C16 or Cn6).

[0027] More specifically, several groups of transimpedance gain access circuits include two groups of transimpedance gain access circuits 1 and 2 with different transimpedance gain parameters; the transimpedance gain access circuit 1 includes a resistor 4 (R14 or Rn4) and a capacitor 4 (C14 or Cn4) arranged in parallel between the input end of the transimpedance amplifier and the analog switch; the transimpedance gain access circuit 2 includes a resistor 5 (R15 or Rn5) and a capacitor 5 (C15 or Cn5) arranged in parallel between the input end of the transimpedance amplifier and the analog switch; and the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 are respectively connected to different switch access ends of the analog switch, and the field programmable gate array module controls the control end of the analog switch through a shift register, thereby controlling the on-off access of the transimpedance gain access circuit 1 or the transimpedance gain access circuit 2. The analog switch uses a CMOS single-pole double-throw switch; the photoelectric sensor uses an avalanche photodiode; the clock fan-out buffer used in the clock generation and distribution module; the transimpedance amplifier uses a field effect transistor input operational amplifier.

[0028] Furthermore, the feedback resistor of the transimpedance amplifier is the transimpedance, and the capacitor connected in parallel with the transimpedance is the feedback capacitor. The parameter value of the feedback capacitor is obtained by a capacitor parameter formula, which is: ; Wherein, GBP is the gain bandwidth product of the transimpedance amplifier used in the transimpedance amplifier module; is the transimpedance of the operational amplifier; is the feedback capacitance of the operational amplifier; It is the parasitic capacitance of the photoelectric sensor + the sum of the input common-mode capacitance and input differential-mode capacitance of the transimpedance amplifier + the PCB trace capacitance near the input of the transimpedance amplifier. Specifically, the input common-mode capacitance is the parasitic capacitance of the op amp input to ground, and the input differential-mode capacitance is the parasitic capacitance between the two inputs of the op amp. The specific values ​​of the input common-mode capacitance and the input differential-mode capacitance can be found in the input impedance parameter list of the op amp specification. The PCB trace capacitance is the parasitic capacitance generated on the PCB connection. The PCB trace capacitance is about 0.3pF. These parasitic capacitances are not reflected in the circuit diagram. They are parasitic parameters inside the components and between the traces, not parameters of external components.

[0029] Specifically, the single-ended input to differential output module is used to complete the conversion of the single-ended input signal to the differential output signal, and convert the single-ended signal output by the transimpedance amplifier into the differential signal required to be input by the analog-to-digital converter; the single-ended input to differential output module completes the signal matching.

[0030] Specifically, the analog-to-digital converter is used to convert the analog signal of the differential input provided by the single-ended input to differential output module into a digital signal, and provide it to the field programmable gate array module for underlying data processing.

[0031] Specifically, Figure 2 As shown, the field programmable gate array module, as the core processor, can initialize the analog-to-digital converter and the clock generation and distribution module, synchronize and align the data of multiple channels converted by the analog-to-digital converter and perform algorithmic processing, and the data processing of multiple channels is parallel; it can set the bias voltage of the photoelectric sensor, control the state of the shift register to switch the analog switch to change the transimpedance gain of the transimpedance amplifier, and communicate with other modules or the host computer.

[0032] Specifically, Figure 2 As shown, the clock generation and distribution module is used to generate multiple synchronous clocks with the same frequency, which are provided to the analog-to-digital converters of each channel and the field programmable gate array module at the back end, and are used to synchronize the analog-to-digital converters of each channel to perform analog-to-digital conversion, and the field programmable gate array module at the back end to align and process the underlying data of all channels.

[0033] Specifically, Figure 2 As shown, the serial-in-parallel-out shift register is used to switch the analog switch states of all channels. It has a storage function for the serial input data, which can ensure that the analog switch state of each channel remains unchanged under the current situation until the next group of switching switch state data of the field programmable gate array module is fully shifted into the shift register, and then it switches to the next state of the analog switch; at the same time, the serial-in-parallel-out shift register also completes the conversion from serial input to multi-channel parallel output, saving the IO port resources of the field programmable gate array module and reducing the cost.

[0034] Working principle: A circuit of this embodiment that uses a shift register to switch the transimpedance of multiple channels simultaneously is an electronic system for signal acquisition and data processing in a flow cytometer, which includes signal acquisition, conversion and processing of multiple channels. The signal acquisition, conversion and processing of each channel are parallel, and the data synchronization is performed under the coordination of the same clock generation and distribution module. The circuit structure of the signal acquisition and conversion of each channel is the same, but the bias voltage of each channel and the transimpedance value of the TIA (transimpedance amplifier) ​​will be different. The reason for this difference is that the spectral response of each channel will be different. The circuit structure diagram of the signal acquisition and conversion of each channel is as follows Figure 3 , including a bias voltage setting module, a π-type filter, a photoelectric sensor, a transimpedance amplifier module, a single-ended input to differential output module, and an analog-to-digital converter.

[0035] The transimpedance amplifier module includes a low input noise transimpedance amplifier, a power supply filter circuit, a resistor voltage divider bias circuit at the same direction input end (to set a suitable bias voltage for the operational amplifier), two transimpedances in parallel at the reverse input end and the output end, and an analog switch in series. The transimpedance and the analog switch together constitute a transimpedance switching circuit, which is used to switch the transimpedance gain. When the input signal is large, the switch is switched to the end with a small resistance gain, and the output does not exceed the maximum input voltage of the analog-to-digital converter by reducing the amplification factor of the TIA (transimpedance amplifier), thereby increasing the upper limit of the input signal; when the input signal is small, the switch is switched to the end with a large resistance gain, and the output exceeds the system noise by increasing the amplification factor of the TIA (transimpedance amplifier), which is easy to distinguish, thereby reducing the lower limit of the input signal and improving the resolution. The parallel capacitors on the other two transimpedances prevent the operational amplifier from self-oscillating and filter the output signal. Embodiment 2

[0036] The transimpedance gain of the transimpedance amplifier is switched by analog switches. The switchable transimpedance gain indirectly expands the upper and lower limits of the input signal, expands the dynamic range, and improves the resolution. The simultaneous switching of multiple analog switches is achieved through a serial-in-parallel-out shift register controlled by a field programmable gate array module (FPGA). The storage function of the shift register ensures the stability of the state of the analog switch before and after switching, and realizes the interface conversion from serial input to parallel output, saving IO resources and reducing costs.

[0037] like Figure 2 As shown, the key components of TIA (transimpedance amplifier) ​​are as follows: The transimpedance operational amplifier circuit uses a FET-Input (field effect transistor input) operational amplifier, and its specific parameters are recommended: Low Input Bias Current (low input bias current) below 5pA, Low Input Offset Voltage (low input bias voltage) below 250 μV, Low Offset Voltage Drift (low bias voltage drift) below 5μV / °C, Low Distortion (low distortion) below –71dBc, GBP (gain bandwidth product) between 200MHz and 500MHz, Slew Rate (conversion rate) greater than 250V / μs, Input Voltage Noise (input voltage noise) less than 10nV / √Hz, Input Current Noise (input current noise) less than 10fA / √Hz.

[0038] All resistors must be precision resistors with an accuracy of 1‰. The larger resistance of the two transresistors ranges from 500KΩ to 2000KΩ, and the smaller resistance ranges from 51KΩ to 499KΩ. The specific values ​​need to be determined based on the actual measured signal size.

[0039] The capacitors are selected with 5% accuracy and good temperature stability NPO capacitors (negative-positive 0 ppm / °C, abbreviated as NPO). After the transresistance value is determined, The parameter value of the feedback capacitor is obtained through a capacitance parameter formula, which is: ; GBP is the gain-bandwidth product of the transimpedance amplifier used in the transimpedance amplifier module, and the specific parameter value can be found in the specification sheet of the operational amplifier; is the transimpedance of the transimpedance amplifier (the feedback resistor of the transimpedance amplifier); is the feedback capacitance of the transimpedance amplifier (i.e., the capacitance in parallel with the transimpedance); It is the parasitic capacitance of the photoelectric sensor + the sum of the input common-mode capacitance and input differential-mode capacitance of the transimpedance amplifier + the PCB (printed circuit board) trace capacitance near the input of the transimpedance amplifier (PCB trace capacitance is about 0.3pF). The input common-mode capacitance is the parasitic capacitance of the op amp input to ground, and the input differential-mode capacitance is the parasitic capacitance between the two inputs of the op amp. The specific values ​​of the input common-mode capacitance and the input differential-mode capacitance can be found in the input impedance parameter list of the op amp specification. The PCB trace capacitance is the parasitic capacitance generated on the PCB connection line. The PCB trace capacitance is about 0.3pF. These parasitic capacitances are not reflected in the circuit diagram. They are parasitic parameters inside the components and between the traces, not parameters of external components.

[0040] The analog switch uses a precision CMOS (complementary metal oxide semiconductor) single-pole double-throw switch with low input leakage, low on-resistance, low on-capacitance, fast conversion time, wide power supply voltage range, and rail-to-rail operation. Here, Texas Instruments' TMUX6119 is selected (its specific parameters: low input leakage: 0.5pA, low on-resistance: 120Ω, low on-capacitance: 6.4pF, conversion time: 68ns, wide power supply voltage range: ±5V to ±16.5V).

[0041] like Figure 2 As shown, the shift register selection is as follows: The shift register uses serial input and parallel output, with short setup time, small transmission delay time, high input clock frequency, and high-speed serial-input-parallel-output shift register with storage register. Ansem's 74LVC594A is selected here.

[0042] like Figure 2As shown, other components are selected as follows: The photoelectric sensor uses avalanche photodiode APD (avalanche photo-diode), the operational amplifier in the single-ended input to differential output module uses a low-distortion differential ADC driver, the analog-to-digital converter uses a high-speed ADC with a sampling frequency greater than 40MHz and a bit number of 16 or above, the field programmable gate array module uses Xilinx KINTEX-7 series XC7K325T, and the clock fan-out buffer in the clock generation and distribution module uses Analog Devices' AD9508, which integrates output frequency division and delay adjustment functions.

[0043] Further, the transimpedance gain is switched by an analog switch, and the simultaneous switching of the analog switch is achieved by a serial-in parallel-out shift register controlled by a field programmable gate array module.

[0044] Furthermore, the control process of the serial-in and parallel-out shift register is as follows: The serial-input-parallel-output shift register used in this embodiment is 74LVC594A from Ansem, and the pin description is as follows: Figure 7 As shown, the timing diagram of the input and output signals of 74LVC594A is as follows Figure 5 As shown: The input signal of the shift register is controlled by the output signal of the FPGA. Refer to the timing diagram of 74LVC594A ( Figure 5 ), let the SHCP shift clock end of the shift register first have 8 shift pulses. During this period, the STCP storage clock remains at a low level, so that the 8-way parallel output data of the storage register remains unchanged. When the 8th SHCP falling edge comes (the serial input control data of the 8 FPGAs have all been shifted into the shift register), start the first STCP storage clock. At the rising edge of the first STCP storage clock, the 8-way control data is output in parallel and applied to the control input end of the 8-way analog switch, driving the 8-way analog switch to switch states at the same time.

[0045] Furthermore, the control of the state switching of the analog switch is as follows: The analog switch used in this embodiment is TMUX6119 from Texas Instruments, and its simplified schematic diagram is shown in FIG. Figure 6 As shown: according to Figure 6 The switching principle shown in the figure is to connect the larger end of the two transresistors to the SA end of the analog switch, and the smaller end of the two transresistors to the SB end of the analog switch. The other ends of the two parallel transresistors are connected to the inverting input end of the transresistance amplifier, and the D end of the analog switch is connected to the output end of the transresistance amplifier. The specific connections are as follows: Figure 2 As shown in the relevant part of Figure 8As shown in the TMUX6119 truth table, connecting the EN terminal and VDD terminal of the analog switch together can make the analog switch always in the enabled state. In addition, each parallel output port of the serial input and output shift register is connected to the SEL terminal of each channel analog switch respectively. In this way, the state switching of the analog switch can be controlled by adding high and low levels to the SEL terminal (when SEL is low level 0, SA and D of the analog switch are connected, and SB and D are disconnected; when SEL is high level 1, SB and D of the analog switch are connected, and SA and D are disconnected). Embodiment 3

[0046] Based on the second embodiment, the FPGA controls each channel to switch the transimpedance gain and the data acquisition process flow chart is as follows: Figure 4 As shown: After initialization, the larger transimpedance gain of the two gears is set as the default state after power-on (the larger transimpedance gain extends the lower limit of the input signal range). Because the analog-to-digital converter can sample an input pulse dozens to hundreds of times, it is possible to determine whether the acquisition process is in the rising edge or falling edge stage of the input pulse by continuously collecting 3 numbers and calculating the slope of these 3 numbers. When it is in the rising edge stage of the input pulse (that is, the slope is greater than 0) and the last number of these 3 consecutive numbers is greater than the large threshold set by the software, the field programmable gate array module controls the serial input and output shift register to switch to a smaller transimpedance gain gear to expand the upper limit of the input signal range. The software large threshold is set to 90% of the maximum value of the ADC output, and a 10% margin is reserved to prevent the output of the analog-to-digital converter from overflowing from the maximum value and generating erroneous conversion data values. When the transimpedance gain is switched to a smaller gear, because the amplification factor is reduced, the ADC data collected from the analog-to-digital converter is also reduced by the same factor. Therefore, the collected ADC data of the analog-to-digital converter must be restored to the signal value before reduction (the data collected under the larger transimpedance gain remains unchanged, and the data switched to the smaller transimpedance gain needs to be multiplied by the larger transimpedance value and then divided by the smaller transimpedance value). After data restoration, it is necessary to continue to collect the subsequent values ​​of this pulse until the falling edge stage (slope is less than 0) and the last number of the subsequent three consecutive numbers is less than the small threshold set by the software (the small threshold is set to 10% of the maximum value of the analog-to-digital converter output), the field programmable gate array module controls the serial input and output shift register to switch back to a larger transimpedance gain gear (therefore, the amplitude of the input signal pulse becomes smaller at this time, and the transimpedance gain needs to be increased to improve the signal-to-noise ratio and resolution). The larger transimpedance gain is the default gain and does not need to be restored. Finally, continue to collect until the last one or two numbers are less than the minimum threshold set by the software (the minimum threshold is set to the system noise value when the input signal is slightly greater than 0), and the first input pulse is collected. The next step is to periodically collect subsequent input pulses until the acquisition termination command is issued, at which point the data processing program of the field programmable gate array module ends. In addition, it should be pointed out that the field programmable gate array module is a parallel processor, so the data processing process of each channel is parallel, and the processing algorithm of each channel is also the same. Embodiment 4

[0047] In a preferred embodiment of the present invention, a method for simultaneous transimpedance switching of a circuit using a shift register to simultaneously switch the transimpedance of multiple channels is implemented using the circuit using a shift register to simultaneously switch the transimpedance of multiple channels, and includes the following steps: Sending an initialization instruction to the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register through the field programmable gate array module, the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register receive the initialization instruction, and complete the initialization of the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register; After completing the initialization operation, a default state operation after power-on is performed; the steps of the default state operation after power-on include: sending a switch to large resistance gain instruction to the analog switch of the corresponding channel through the field programmable gate array module, and the analog switch of the corresponding channel switches and selects to connect one end of the large resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2; After completing the default state operation after power-on, a simultaneous trans-impedance switching operation instruction for a circuit for simultaneous trans-impedance switching of multiple channels is issued through the field programmable gate array module to implement the simultaneous trans-impedance switching operation of multiple channels.

[0048] Specifically, the operation of simultaneously switching the transimpedance of multiple channels includes the following steps: Step a, obtaining the data of the analog-to-digital converter of the input pulse in the corresponding channel through the field programmable gate array module; Step b, the field programmable gate array module continuously collects three numbers and calculates the slope, Step c, determining whether the slope is greater than 0; Step c1: When the slope is greater than 0, Step c11, determining whether the last number of three consecutively collected numbers is greater than a set maximum threshold; Step c111, when it is greater than the threshold, step c1111, send a switching instruction to the serial-in parallel-out shift register, the serial-in parallel-out shift register controls the driving analog switch to switch and select one end of the small resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and then restore the data; step c1112, the field programmable gate array module continues to collect the next three numbers and calculate the slope, step c1113, determine whether the slope is less than 0; Step c11131: when the slope is not less than 0, continue to maintain a small transimpedance gain, jump to data restoration, and then continue processing at step c1112; Step c11132, when the slope is less than 0, determine whether the last number of the three consecutively collected numbers is less than the set minimum threshold; when it is less than the threshold, send a switching instruction to the serial-in-parallel-out shift register, and the serial-in-parallel-out shift register controls the analog switch to switch and select one end of the large resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2; jump to step c1122 and continue processing; when it is not less than the threshold, continue to maintain a small transimpedance gain, jump to data restoration, and then continue processing in step c1112; Step c112, when it is not greater than the threshold, step c1121, maintain a larger transimpedance gain, step c1122, the field programmable gate array module continues to collect three numbers and calculate the slope; when the slope is not less than 0, jump to step c11; when the slope is less than 0, step c11221, determine whether the last or two numbers are less than the set minimum threshold, if not less than the minimum threshold, jump to step c1121, continue processing; when less than the minimum threshold, the first pulse acquisition is completed, determine whether to terminate the acquisition, and when the acquisition is terminated, jump to the field programmable gate array module to end the processing program. When the acquisition is not terminated, the analog switch is switched again to select the end of the larger resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and continue to enter step a; Step c2: when the slope is not greater than 0, jump to the field programmable gate array module processing program and end.

[0049] Working principle: A circuit and method for simultaneously switching the transimpedance of multiple channels using a shift register, so that during the signal acquisition process, the instrument can judge according to the size of the signal and use the shift register to simultaneously switch the transimpedance gain of the transimpedance amplifier, thereby expanding the range of the input signal and improving the resolution. In addition, the serial-to-parallel conversion of the shift register saves IO resources and reduces costs.

[0050] During the signal acquisition process, the instrument automatically determines and switches the transimpedance gain of the TIA (transimpedance amplifier) ​​according to the size of the signal (when the signal is small, it switches to a large transimpedance gain. Under the same system noise conditions, a small signal can easily be larger than the noise and distinguished from the noise at a large gain, thereby improving the resolution of the instrument. When the signal is large, it switches to a small transimpedance gain so that the input signal entering the analog-to-digital converter will not exceed its maximum input analog voltage, thereby extending the upper limit of the signal range). The back-end field programmable gate array module restores the data converted by the analog-to-digital converter according to the switched gain multiple.

[0051] By utilizing the storage function and serial-to-parallel conversion function of the shift register, not only can the transimpedance gains of multiple channels be switched simultaneously, but also the IO port resources of the field programmable gate array module can be greatly saved. Therefore, the present invention not only expands the range of the input signal and improves the resolution by dynamically switching the transimpedance gain, but also saves IO resources and reduces costs through the serial-to-parallel conversion of the shift register.

[0052] The above specific implementation methods are specific support for the scheme ideas proposed in the present invention, and cannot be used to limit the protection scope of the present invention. Any equivalent changes or equivalent modifications made on the basis of this technical scheme in accordance with the technical ideas proposed in the present invention still fall within the scope of protection of the technical scheme of the present invention.

Claims

1. A circuit for simultaneously switching the transimpedance of multiple channels using a shift register, characterized in that: It includes: a field programmable gate array module, which is connected to a signal acquisition conversion circuit module through an analog-to-digital converter and a clock generation and distribution module; The signal acquisition conversion circuit module includes a bias voltage setting module, one end of the bias voltage setting module is connected to the field programmable gate array module, the other end of the bias voltage setting module is connected to one of the input ends of the transimpedance amplifier in the transimpedance amplifier module through a π-type filter and a photoelectric sensor, the other input end of the transimpedance amplifier is grounded through a resistor voltage divider bias circuit, the output end of the transimpedance amplifier is connected to the field programmable gate array module through a single-ended input to differential output module and an analog-to-digital converter, and the field programmable gate array module and the analog-to-digital converter are respectively connected to a clock generation and distribution module; The input end of the transimpedance amplifier is connected to a plurality of groups of transimpedance gain access circuits, and the transimpedance gain access circuits are connected to the output end of the transimpedance amplifier through an analog switch, and the control end of the analog switch is connected to the field programmable gate array module through a shift register.

2. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 1, characterized in that: The resistor voltage divider bias circuit includes a capacitor three connected to the input end of the transimpedance amplifier and grounded; resistor two is connected in parallel to both ends of the capacitor three, and the connection end of resistor two and capacitor three is connected to the power supply voltage end of the transimpedance amplifier through resistor three.

3. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 2, characterized in that: The power supply voltage terminal of the transimpedance amplifier is grounded through a filter circuit seven; and the negative power supply voltage signal terminal of the transimpedance amplifier is grounded through a filter circuit six.

4. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 1, characterized in that: The plurality of groups of transimpedance gain access circuits include two groups of transimpedance gain access circuits 1 and 2 with different transimpedance gain parameters; The transimpedance gain access circuit 1 includes a resistor 4 and a capacitor 4 which are arranged in parallel between the input end of the transimpedance amplifier and the analog switch; The second transimpedance gain access circuit comprises a resistor five and a capacitor five which are arranged in parallel between the input end of the transimpedance amplifier and the analog switch; The transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 are respectively connected to different switch access ends of the analog switch, and the field programmable gate array module controls the control end of the analog switch through the shift register, thereby controlling the on-off access of the transimpedance gain access circuit 1 or the transimpedance gain access circuit 2.

5. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 4, characterized in that: The feedback resistor of the transimpedance amplifier is the transimpedance, and the capacitor connected in parallel with the transimpedance is the feedback capacitor. The parameter value of the feedback capacitor is obtained through a capacitor parameter formula, which is: ； Wherein, GBP is the gain bandwidth product of the transimpedance amplifier used in the transimpedance amplifier module; is the transimpedance of the operational amplifier; is the feedback capacitance of the operational amplifier; It is the parasitic capacitance of the photoelectric sensor + the sum of the input common-mode capacitance and input differential-mode capacitance of the transimpedance amplifier + the PCB trace capacitance near the input of the transimpedance amplifier.

6. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 1, characterized in that: The π-type filter includes a resistor 1 connecting the bias voltage setting module and the photoelectric sensor, and both ends of the resistor 1 are grounded at a common point through a capacitor 1 and a capacitor 2 respectively.

7. The circuit for simultaneously switching the transimpedance of multiple channels using a shift register according to claim 1, characterized in that: The analog switch uses a CMOS single-pole double-throw switch; the photoelectric sensor uses an avalanche photodiode; the clock generation and distribution module uses a clock fan-out buffer; the transimpedance amplifier uses a field effect transistor input operational amplifier.

8. A method for simultaneously switching the transimpedance of a circuit using a shift register to simultaneously switch the transimpedance of multiple channels, characterized in that: The circuit implementation of using a shift register to simultaneously switch the transimpedance of multiple channels as claimed in any one of claims 1 to 7 comprises the following steps: Sending an initialization instruction to the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register through the field programmable gate array module, the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register receive the initialization instruction, and complete the initialization of the analog-to-digital converter, the clock generation and distribution module, and the serial-input and parallel-output shift register; After completing the initialization operation, a default state operation after power-on is performed; the steps of the default state operation after power-on include: sending a switch to large resistance gain instruction to the analog switch of the corresponding channel through the field programmable gate array module, and the analog switch of the corresponding channel switches and selects to connect one end of the large resistance gain in the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2; After completing the default state operation after power-on, a simultaneous trans-impedance switching operation instruction for a circuit for simultaneous trans-impedance switching of multiple channels is issued through the field programmable gate array module to implement the simultaneous trans-impedance switching operation of multiple channels.

9. The method for simultaneous transimpedance switching of a circuit using a shift register to simultaneously switch the transimpedance of multiple channels according to claim 8, characterized in that: The bias voltage setting module is used to set the bias voltage of the photoelectric sensor. By adjusting the bias voltage, the output current of the photoelectric sensor can be changed. The π-type filter is used to filter out part of the noise introduced by the bias voltage of the bias voltage setting module. The photoelectric sensor is used to complete the conversion from optical signal to electrical signal. The photoelectric sensor converts the fluorescence signal or scattered light signal generated by the test sample after being excited into a current signal. The transimpedance amplification module includes a transimpedance amplifier, a filter circuit at the power supply voltage end of the transimpedance amplifier, and a resistor voltage divider bias circuit at the same-direction input end of the transimpedance amplifier provide a bias voltage for the operational amplifier, a transimpedance gain access circuit 1 and a transimpedance gain access circuit 2 are connected in parallel at the reverse input end and the output end of the transimpedance amplifier, an analog switch is connected in series between the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2, and the transimpedance gain access circuit 1 and the transimpedance gain access circuit 2 and the analog switch together constitute a transimpedance switching circuit for switching the transimpedance gain; The single-ended input to differential output module is used to complete the conversion of the single-ended input signal to the differential output signal, and convert the single-ended signal output by the transimpedance amplifier into the differential signal required to be input by the analog-to-digital converter; The analog-to-digital converter is used to convert the analog signal of the differential input provided by the single-ended input to differential output module into a digital signal, and provide it to the field programmable gate array module for bottom-level data processing.

Images