Transmitting and receiving integrated detection system based on CMUT sensor

Abstract

The invention discloses a receiving and transmitting integrated detection system based on a CMUT sensor. The system comprises a DC bias voltage supply module, a CMUT detection module, a CMUT detection module, a CMUT detection module and a CMUT detection module, the system power supply module is used for supplying power; the PC upper computer end is used for generating upper computer data; the data communication module is used for transmitting data of the upper computer; the FPGA gating signal control module is used for receiving data of the upper computer and processing and distributing the data; the high-voltage pulse circuit generation module is used for selectively starting corresponding n paths of high-voltage pulse excitation signals according to the gating signal; the time division multiplexing circuit module is used for expanding n paths of high-voltage pulse excitation signals to 2n paths of high-voltage pulse excitation signals; the LC impedance matching module is matched with a specific transducer; an echo signal amplification module for secondary amplification; and the analog-to-digital conversion module is used for quantifying the echo data after secondary amplification. According to the invention, multi-channel synchronous driving of the array CMUT sensor can be realized, mutual crosstalk between different channels can be suppressed, and delay caused by different path lengths can be suppressed.

Description

Technical Field

[0001] The present invention belongs to the field of ultrasonic technology, and in particular relates to a multi-channel ultrasonic transmitting system based on a CMUT (Capacitive Micromachined Ultrasonic Transducer) sensor. Background Art

[0002] Ultrasonic flaw detection is a non-destructive testing method. It is mainly divided into two categories: biomedical ultrasound and industrial flaw detection based on the differences in the detection object, imaging method, and equipment architecture. Among them, in the field of biomedical ultrasound, ultrasonic flaw detection technology has become an indispensable technical means. Compared with traditional CT imaging, X-ray imaging, and magnetic resonance imaging technology, ultrasound has the advantages of no radiation risk and real-time when obtaining data on organ structure and morphology, which greatly improves the accuracy and safety of diagnosis.

[0003] In the field of biomedical ultrasound, due to the complexity of application scenarios, diversification of objects, and huge data processing volume, there is a greater demand for the frequency, bandwidth, and volume of its key component transducer. At the same time, the progress of micro-machining technology of MEMS (Micro-Electro-Mechanical Systems) has promoted the development of CMUT. CMUT can not only overcome the phenomenon that piezoelectric materials are difficult to couple with air, but also has the advantages of high energy conversion efficiency, high receiving sensitivity, wide bandwidth, high detection accuracy, and easy arraying. Therefore, it is particularly important to give full play to the advantages of CMUT in biological ultrasound detection and design a multi-channel transmission system that matches the CMUT probe.

[0004] In the existing ultrasonic flaw detection system circuit, usually only single-point detection can be achieved for the object to be detected, and multi-point detection cannot be achieved. In real life applications, in order to achieve multi-point detection of the same detection material, it is necessary to build a multi-point simultaneous driving ultrasonic emission system that can match the CMUT line array or surface array. However, the existing multi-channel driving circuit is not only complex in structure design and bulky, but also prone to large crosstalk between the signals of various pulse emission circuits, which has an adverse effect on the integrity of the signal.

[0005] In summary, it is necessary to develop a transmitting system that matches the multi-array capacitive ultrasonic micromechanical transducer, design an impedance matching circuit that matches the CMUT probe, solve the problem of signal interference between ultrasonic pulses, and at the same time, the designed circuit system achieves low delay between channels, and the control system has a high-precision delay control algorithm, which is of great significance for ultrasonic driving and detection. Summary of the invention

[0006] The purpose of the present invention is to overcome the shortcomings of the prior art and propose a transceiver integrated detection system based on CMUT sensors, aiming to realize multi-channel synchronous driving of array CMUT sensors and suppress mutual crosstalk between different channels and suppress delays caused by different path lengths.

[0007] In order to achieve the above object, the technical solution specifically adopted by the present invention is as follows:

[0008] A transceiver integrated detection system based on a CMUT sensor, the system comprising: a DC bias voltage supply module for providing a bias voltage for the CMUT sensor; a system power supply module for providing power for the entire circuit system; a PC host computer end for generating data transmitted by a host computer; a data communication module for transmitting the data transmitted by the host computer to an FPGA system; an FPGA selection signal control module for receiving the data transmitted by the host computer and processing the distribution of the host computer data; a high-voltage pulse circuit generation module for selecting to start corresponding n-channel high-voltage pulse excitation signals according to the selection signal generated by the FPGA selection signal control module; a time-division multiplexing circuit module for expanding the n-channel high-voltage pulse excitation signals to 2n channels; an LC impedance matching module for matching a specific transducer; an echo signal amplification module for receiving echo data and performing secondary amplification; and an analog-to-digital conversion module for quantizing the echo data after the secondary amplification.

[0009] Furthermore, the DC bias voltage supply module is controlled by the LM5022 chip as the main control, loads a 30V input voltage, decouples through capacitor filtering, and inputs it to the main control chip. The output voltage is based on current mode control, through resistor voltage division and SEPIC voltage regulation, and through MOS tube control of current size and output shutdown to achieve boost voltage regulation and voltage output. The voltage output terminal is connected to capacitor filtering and supplied to the CMUT sensor through a matching circuit for a stable supply of 100V bias voltage.

[0010] Furthermore, the external part of the system power supply module is supplied with ±30V voltage by a voltage-stabilizing power supply module. The first part is directly connected to the high-voltage pulse circuit generation module by the ±30V voltage, which is used to control the size of the excitation signal. The system is configured with a voltage supply system of ±30V to ±40V, which can reach a maximum of ±40V excitation high-voltage pulse signal. The 30V voltage is loaded into the LM25085 chip, and the switching power supply is used to achieve voltage division and voltage stabilization, and the output voltage is obtained through N-MOS, and then the current required by the system is obtained through the inductor L2, which is converted from 30V to an output voltage of 12V.

[0011] Furthermore, the 12V voltage obtained in the voltage supply system is obtained through the TP54302 switching chip, and a 5V input voltage is obtained by means of resistor voltage division and inductor current control. The ±5V voltage is obtained through the design of the ICL7660 switching power supply chip, and is supplied to the multi-channel multiplexing chip of the post-circuit. Then, the input 12V power supply voltage is obtained through the TPS62130 chip to obtain the power supply voltage part required by the FPGA system, including 3.3V, 3.15V, 1.9V, 1.8V, 1.5V, 1.2V and 1V, to meet the power supply requirements of different parts of the system.

[0012] Furthermore, the PC host computer end sets specific required data through the host computer interface, including serial port channel, serial port transmission current, baud rate, signal frequency, signal number and other data and generates a data stream. 80-bit wide data is sent in a packaged data frame, and the host computer transmission data is generated by using a frame header and a frame footer to package the data.

[0013] Furthermore, the data communication module is sent to the FPGA using a serial communication method.

[0014] Furthermore, the FPGA sending digital control module includes an FPGA serial port data receiving module, a data cache FPGA data classification module, a MAX14808 high-voltage drive circuit control module, and a MAX14866 signal multi-channel multiplexing control module.

[0015] Furthermore, the high-voltage pulse circuit generation module is composed of a MAX14808 main control chip as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 20 IO ports, which are divided into 4 current control ports and a mode selection port for loading. The power supply is +30VPP and -30VPP, and then the whole system outputs 8 positive and negative pulse signals with a duty cycle of 50%. The whole system uses a total of 4 high-voltage pulse excitation chips and generates 64 pulse excitation signals.

[0016] Furthermore, the time-division multiplexing circuit module uses the MAX14866 main control chip as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 6 ports, including clock, chip select, set, and MISO and MOSI interfaces of SPI communication. Then the input signal is connected to its input port from the front MAX14808 chip output port, and finally 64 output signals are realized. The module is powered by +5V voltage and +3V3 voltage.

[0017] Furthermore, the LC impedance matching module has an input impedance closer to the probe impedance for the signal sending circuit part, and the matching network has a wider frequency response, which is suitable for high-frequency signals.

[0018] Further, impedance matching includes the following steps:

[0019] Step 1: In the LC tuning network, according to the CMUT structural parameters, design and calculate and analyze the CMUT equivalent circuit resistance and the CMUT equivalent circuit series resonant frequency;

[0020] Step 2: Using the Smith chart, combined with the reactance of the CMUT equivalent circuit and the series resonant frequency of the CMUT equivalent circuit, adjust the inductance value of the tuning inductor L and the capacitance value of the tuning capacitor C, so that the overall reactance of the CMUT equivalent circuit and the LC tuning network is 0 and the resistance is 50Ω±5Ω, and the final parameters of the inductance value of the inductor L and the capacitance value of the tuning capacitor C are obtained.

[0021] Furthermore, the echo signal amplification module includes a TIA transimpedance amplifier circuit, an LNA in-phase proportional amplifier circuit, and a BPF bandpass filter to achieve secondary amplification and filtering of high-frequency weak echo signals.

[0022] Furthermore, the echo signal passes through the three circuits of TIA, LNA, and BPF, and then passes through the analog-to-digital conversion module for ADC conversion. The analog-to-digital conversion module is mainly controlled by the AFE5832 chip, which integrates multiple functions such as signal attenuator, amplifier, filter, analog-to-digital conversion, etc., and through internal time division multiplexing, 32-way data reception can be achieved with 16 channels.

[0023] The present invention implements the self-crossing control algorithm of the LVDS data receiving part, which can realize the stable reception of data. Compared with the prior art, the present invention has the following characteristics and beneficial effects:

[0024] (1) Design an impedance matching circuit that matches the CMUT probe to ensure and realize that the CMUT can work stably and resonantly under a certain voltage.

[0025] (2) Compared with the traditional driving circuit, the realized 64-channel driving circuit has higher integration and smaller size, which is conducive to portable design. It adopts modular design and has complete overall functions.

[0026] (3) In terms of control algorithm, at a frequency of 250MHz, the delay accuracy can reach 1ns. The layout utilizes equal-length differential lines, which greatly reduces the delay error. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0028] Figure 1 is a block diagram of an FPGA system in an embodiment of the present invention;

[0029] Figure 2 A system power supply module in an embodiment of the present invention;

[0030] Figure 3 A DC bias voltage supply module in an embodiment of the present invention;

[0031] Figure 4 Supplying circuits for some systems in embodiments of the present invention;

[0032] Figure 5 Supplying circuits for some systems in embodiments of the present invention;

[0033] Figure 6 It is the hardware circuit of the MAX14808 high-voltage pulse generation module in the embodiment of the present invention;

[0034] Figure 7 It is the hardware circuit of the MAX14866 signal multi-channel time division multiplexing circuit module in the embodiment of the present invention;

[0035] Figure 8 It is the impedance matching Smith diagram in the embodiment of the present invention; DETAILED DESCRIPTION

[0036] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0037] The embodiment of the present invention provides a transceiver integrated detection system based on a CMUT sensor, which mainly includes: a PC host terminal, an FPGA system, a DC bias voltage supply module, a system power supply module, and an LC impedance matching module; specifically:

[0038] In the embodiment of the present invention, a PC host computer end and an FPGA system are provided to match the circuit port. Figure 1 As shown, the PC host end sets the specific required data by the host interface, including serial port channel, serial port transmission current, baud rate, signal frequency, signal number and other data and generates a data stream. The 80-bit wide data is sent in a packaged data frame, and the host transmission data is generated by using the frame header 0xAA and the frame tail 0xFF. The host transmission data contains a variety of information such as drive signal frequency, drive signal length, drive signal shutdown control, and drive signal delay parameter setting, so as to achieve the data transmission part of the host computer.

[0039] The FPGA system includes a power module, a serial port data transmission module, a data cache DDR3 module, a USB3.0 echo data receiving module, an echo digital control module, a transmission digital control module, a MAX14808 high-voltage pulse generation module, a MAX14866 signal multi-channel time division multiplexing circuit module, a hardware circuit analog signal amplification module, a bandpass filter, an ADC analog signal to digital signal module and a data LVDS receiving module. Among them, the MAX14808 high-voltage pulse generation module hardware circuit is combined with Figure 6 The MAX14808 main control chip is used as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 20 IO ports, which are divided into 4 current control ports and mode selection ports. The power supply is +30VVPP and -30VPP. Then the whole system outputs 8 positive and negative pulse signals with a duty cycle of 50%. The whole system uses a total of 4 high-voltage pulse excitation chips and generates 64 pulse excitation signals.

[0040] MAX14866 signal multi-channel time division multiplexing circuit module hardware circuit combination Figure 7 As shown, the MAX14866 main control chip is used as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 6 ports, including clock, chip select, set, and MISO and MOSI interfaces of SPI communication. Then the input signal is connected to its input port from the front MAX14808 chip output port, and finally 64 output signals are realized. The module is powered by +5V voltage and +3V3 voltage.

[0041] During operation, the PC host generates host transmission data, which is transmitted to the FPGA system via the data communication module. The FPGA system receives the host transmission data, which is processed by the transmitting digital control module and distributed to the MAX14808 high-voltage pulse generation module. The MAX14808 high-voltage pulse generation module selects to open the corresponding n-channel high-voltage pulse excitation signal according to the selection signal generated by the echo digital control module. After that, the MAX14866 signal multi-channel time-division multiplexing circuit module expands the n-channel high-voltage pulse excitation signal to 2n channels. At the same time, the high-voltage pulse wave generated by the MAX14808, the de-excited CMUT ultrasonic transducer, and the ultrasonic wave generated by the CMUT ultrasonic transducer encounter the defect reflected ultrasonic signal to form an echo signal. The echo signal is processed by the hardware circuit analog signal amplification module, the bandpass filter, and the ADC analog signal to digital signal module in sequence, and then transmitted to the echo digital control module via the data LVDS receiving module. After being processed by the echo digital control module, it is transmitted to the PC host via the USB3.0 echo data receiving module. Wherein, the data communication module is sent to the FPGA in a serial communication mode.

[0042] The system power supply module of the present invention is combined with Figure 2 Description: The external voltage is ±30V supplied by the voltage-stabilized power supply module. The first part is directly connected to the high-voltage pulse circuit generation module by the ±30V voltage, which is used to control the size of the excitation signal. The system is configured with a voltage supply system of ±30V to ±40V, which can reach a maximum of ±40V excitation high-voltage pulse signal. The 30V voltage is loaded into the LM25085 chip, and the output voltage is obtained through the switching power supply design by voltage division and stabilization and N-MOS. Then the current required by the system is obtained through inductor 2, and the output voltage is converted from 30V to 12V. The converted 12V voltage continues to pass through the TP54302 switch chip, and obtains a 5V input voltage by means of resistor voltage division and inductor current control. The ±5V voltage is obtained through the design of the ICL7660 switching power supply chip, which is supplied to the multi-channel multiplexing chip of the post-circuit. The input 12V power supply voltage is then passed through the TPS62130 chip to obtain the power supply voltage required by the FPGA system, including 3.3V, 3.15V, 1.9V, 1.8V, 1.5V, 1.2V and 1V, to meet the power supply requirements of different parts of the system.

[0043] Figure 3 The DC bias voltage part required for driving the CMUT sensor, the DC bias voltage supply module includes the LM5022 chip as the main control, loading a 30V input voltage, decoupling through capacitor filtering, and inputting it to the main control chip. The output voltage is based on current mode control, through resistor voltage division, SEPIC voltage regulation, and MOS tube control of current size and output shutdown to achieve boost voltage regulation and voltage output. The voltage output terminal is connected to capacitor filtering and supplied to the CMUT sensor through a matching circuit for a stable supply of 100V bias voltage.

[0044] Combining impedance matching circuit and Smith circle Figure 8 , wherein the LC impedance matching module of the present invention comprises the following steps when performing impedance matching,

[0045] Step 1: In the LC tuning network, according to the equivalent circuit principle, the CMUT equivalent circuit can be constructed according to the CMUT structural parameters. The CMUT film loss and mechanical loss can be equivalent to the resistance R m =π×R 2 ×Z rad , where R represents the film radius, Z rad Represents the acoustic impedance of the medium; the mass of the CMUT film is equivalent to the inductance L m =1.84π×R 2 ×h×ρ, h represents the equivalent height of the composite film, ρ represents the equivalent density of the composite film; the capacitance of the CMUT physical structure is equivalent to the capacitance ε0 represents the acoustic dielectric constant, g0 represents the cavity height, x represents the average displacement of the film collapse, and h 薄膜材料 Indicates the corresponding height of different film materials, ε 薄膜材料 Represents the relative dielectric constant of different film materials; CMUT film stiffness equivalent capacitance c0 represents the equivalent capacitance of the CMUT physical structure, Q represents the charge, and C0 ′ It represents the derivative of the equivalent capacitance with respect to the average displacement of the film collapse.

[0046] Step 2: Use the Smith chart, combined with the impedance of the CMUT equivalent circuit and the series resonant frequency of the CMUT equivalent circuit, to adjust the inductance value of the tuning inductor L and the capacitance value of the tuning capacitor C, so that the overall reactance of the CMUT equivalent circuit and the LC tuning network is 0, and the resistance is 50Ω±5Ω, and the final parameters of the inductance value of the inductor L and the capacitance value of the tuning capacitor C are obtained. Among them, 50Ω is the standard input impedance of the RF transmission band.

[0047] According to the above description, the overall workflow of the present invention is as follows: first, the PC generates the data required for emitting ultrasonic waves, and sends the data to the FPGA system through serial port communication. The data is processed by the FPGA chip, and a differential control signal that can excite the MAX14808 high-voltage pulse chip and the MAX14866 channel time-division multiplexing chip is generated. Finally, the chip generates a positive and negative pulse excitation signal with an adjustable frequency of 0KHz-6.5535MHz, adjustable excitation duration, adjustable repeated excitation interval, adjustable excitation delay duration, and an excitation delay accuracy of up to 1ns, and an excitation voltage of up to ±30V to ±40V. The signal can drive the 64-channel CMUT chip and generate ultrasonic waves. When the ultrasonic signal passes through different media, a reflection effect will be generated. The reflected ultrasonic wave passes through a secondary amplification circuit, thereby generating an analog signal that can be recognized by the AFE5832 analog-to-digital chip. The converted signal is communicated via USB3.0 and sent back to the host computer for signal processing. The above is the overall workflow of the system.

[0048] Based on the above description, those skilled in the art should have a clear understanding of the multi-channel transceiver integrated detection system based on CMUT sensors of the present invention.

[0049] In summary, the present invention designs an impedance matching circuit that matches the CMUT probe, ensuring and realizing that the CMUT can stably resonate under a certain voltage. Compared with the traditional driving circuit, it has a higher integration level and a smaller overall volume, which is conducive to the trend of portable design. In addition, it designs a delay signal with an accuracy of 1ns, and uses equal-length wiring for wiring, which achieves better synchronization and coordination of signal transmission, while improving performance and integration.

[0050] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and descriptions are only preferred examples of the present invention and are not intended to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A transceiver integrated detection system based on CMUT sensor, characterized in that: The system includes: A DC bias voltage supply module, used for providing a bias voltage for the CMUT sensor; System power supply module, used to provide power for the entire circuit system; PC host computer side, used to generate data for host computer transmission; A data communication module is used to transmit the data sent by the host computer to the FPGA system using a serial communication method; The FPGA system is equipped with an FPGA selection signal control module, a high-voltage pulse circuit generation module and a time-division multiplexing circuit module, wherein the FPGA selection signal control module is used to receive the host computer data and process and distribute it; the high-voltage pulse circuit generation module is used to select and open the corresponding n-channel high-voltage pulse excitation signal according to the selection signal generated by the FPGA selection signal control module; the time-division multiplexing circuit module is used to expand the n-channel high-voltage pulse excitation signal to 2n channels; LC impedance matching module, used to match specific transducers; An echo signal amplification module, used for receiving echo data and performing secondary amplification; The analog-to-digital conversion module is used to quantify the echo data after secondary amplification.

2. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The DC bias voltage supply module uses the LM5022 chip as the main control, loads a 30V input voltage, decouples through capacitor filtering, and inputs it to the main control chip. The output voltage is based on current mode control, and is stabilized by resistor voltage division and SEPIC. The MOS tube controls the current size and output shutdown to achieve boost stabilization and voltage output. The voltage output terminal is connected to capacitor filtering and supplied to the CMUT sensor through a matching circuit to stably supply a bias voltage of 100V.

3. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The external part of the system power supply module is supplied with ±30V voltage by a voltage-stabilizing power supply module. The first part is directly connected to the high-voltage pulse circuit generation module by the ±30V voltage to control the size of the excitation signal. The system is configured with a voltage supply system of ±30V to ±40V. The 30V voltage is loaded into the LM25085 chip, and the switching power supply is used to achieve voltage division and voltage stabilization. The output voltage is obtained through N-MOS, and then the current size required by the system is obtained through the inductor L2, which is converted from 30V to an output voltage of 12V.

4. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 3, characterized in that: The 12V voltage obtained in the voltage supply system is obtained through the TP54302 switch chip, and the 5V input voltage is obtained by resistor voltage division and inductor current control. The ±5V voltage is obtained through the design of the ICL7660 switch power supply chip, which is supplied to the multi-channel multiplexing chip of the post-circuit. Then the input 12V power supply voltage is obtained through the TPS62130 chip to obtain the power supply voltage part required by the FPGA system, including 3.3V, 3.15V, 1.9V, 1.8V, 1.5V, 1.2V and 1V, to meet the power supply requirements of different parts of the system.

5. The CMUT sensor-based integrated transceiver detection system according to claim 1, characterized in that: The PC host computer end sets the specific required data through the host computer interface, including serial port channel, serial port sending current, baud rate, signal frequency, number of signals and other data and generates a data stream, uses a packaged data frame to send 80-bit wide data, and uses a frame header and a frame footer to package data to generate host computer transmission data.

6. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The FPGA digital transmission control module comprises an FPGA serial port data receiving module, a data buffer FPGA data classification module, a MAX14808 high-voltage drive circuit control module, and a MAX14866 signal multi-channel multiplexing control module.

7. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The high-voltage pulse circuit generation module is composed of a MAX14808 main control chip as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 20 IO ports, which are divided into 4 current control ports and a mode selection port for loading. The power supply is +30VPP and -30VPP, and then the whole system outputs 8 positive and negative pulse signals with a duty cycle of 50%. The whole system uses a total of 4 high-voltage pulse excitation chips and generates 64 pulse excitation signals.

8. The CMUT sensor-based integrated transceiver detection system according to claim 1, characterized in that: The time-division multiplexing circuit module uses the MAX14866 main control chip as the main control module of the system. The port of a single MAX14808 chip connected to the FPGA consists of 6 ports, including clock, chip select, set, and MISO and MOSI interfaces of SPI communication. Then the input signal is connected to its input port from the front MAX14808 chip output port, and finally 64 output signals are realized. The module is powered by +5V voltage and +3V3 voltage.

9. The CMUT sensor-based integrated transceiver detection system according to claim 1, characterized in that: The LC impedance matching module comprises the following steps during impedance matching: Step 1: In the LC tuning network, according to the CMUT structural parameters, design and calculate and analyze the CMUT equivalent circuit resistance and the CMUT equivalent circuit series resonant frequency; Step 2: Using the Smith chart, combined with the reactance of the CMUT equivalent circuit and the series resonant frequency of the CMUT equivalent circuit, adjust the inductance value of the tuning inductor L and the capacitance value of the tuning capacitor C, so that the overall reactance of the CMUT equivalent circuit and the LC tuning network is 0 and the resistance is 50Ω±5Ω, and the final parameters of the inductance value of the inductor L and the capacitance value of the tuning capacitor C are obtained.

10. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The echo signal amplification module comprises a TIA transimpedance amplifier circuit, an LNA inverse proportional amplifier circuit, and a BPF bandpass filter, so as to realize secondary amplification and filtering of high-frequency weak echo signals.

11. A transceiver-integrated detection system based on a CMUT sensor as claimed in claim 1, characterized in that: The analog-to-digital conversion module uses the AFE5832 chip as the main control module, which integrates a signal attenuator, an amplifier, a filter, and an ADC conversion channel. Through time division multiplexing internally, 32 channels of data reception can be achieved with 16 channels.

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