Display device

Abstract

The invention relates to a display device. A display device according to one embodiment includes a display region in which a plurality of display elements are disposed, and a peripheral region in the periphery of the display region. The display device is provided with: partition walls that are disposed in the display region and between adjacent display elements; an electrode layer disposed in the peripheral region; a conductive layer disposed above the electrode layer; and an inorganic insulating layer disposed between the electrode layer and the conductive layer. The partition wall and the conductive layer have a conductive lower portion and an upper portion protruding from a side surface of the lower portion. The electrode layer has an electrode opening penetrating in the lamination direction. The conductive layer overlaps the electrode opening portion.

Description

[0001] Cross-references to related applications

[0002] This application claims the priority based on Japanese Patent Application No. 2023-138098 for which it applied on August 28, 2023, and cites all the contents described in the Japanese patent application. Technical Field

[0003] Embodiments of the present invention relate to a display device. Background Art

[0004] In recent years, a display device using an organic light emitting diode (OLED) as a display element has been put into practical use. The display element includes a lower electrode, an organic layer covering the lower electrode, and an upper electrode covering the organic layer.

[0005] When manufacturing the above-described display device, a technology for improving the yield in the manufacturing process is required. Summary of the invention

[0006] In general, the display device according to the embodiment has a display region in which a plurality of display elements are arranged and a peripheral region around the display region. The display device has: a partition wall arranged in the display region and between adjacent display elements; an electrode layer arranged in the peripheral region; a conductive layer arranged above the electrode layer; and an inorganic insulating layer arranged between the electrode layer and the conductive layer.

[0007] The partition wall and the conductive layer include a lower portion having conductivity and an upper portion protruding from a side surface of the lower portion. The electrode layer includes an electrode opening portion penetrating in a stacking direction. The conductive layer overlaps with the electrode opening portion.

[0008] A display device according to another embodiment includes a display region in which a plurality of display elements are arranged and a peripheral region around the display region. The display device includes: a partition wall arranged in the display region and between adjacent display elements; an electrode layer arranged in the peripheral region; a conductive layer arranged above the electrode layer; and an inorganic insulating layer arranged between the electrode layer and the conductive layer.

[0009] The partition wall and the conductive layer include a lower portion having conductivity and an upper portion protruding from a side surface of the lower portion. The conductive layer includes a conductive opening portion penetrating in a stacking direction. The electrode layer overlaps with the conductive opening portion.

[0010] In addition, a display device according to another embodiment includes a display region in which a plurality of display elements are arranged and a peripheral region around the display region. The display device includes: a partition wall arranged in the display region and between adjacent display elements; a first organic insulating layer arranged in the peripheral region; an electrode layer arranged above the first organic insulating layer; and an inorganic insulating layer arranged above the electrode layer.

[0011] The partition wall includes a conductive lower portion and an upper portion protruding from a side surface of the lower portion. The first organic insulating layer includes an inclined surface located at an end of the first organic insulating layer. The electrode layer includes an electrode opening that penetrates in a stacking direction and overlaps with the inclined surface.

[0012] According to such a configuration, it is possible to provide a display device capable of improving the yield rate in the manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a diagram showing a configuration example of a display device according to an embodiment.

[0014] Figure 2 It is a schematic plan view showing an example of the layout of sub-pixels.

[0015] Figure 3 It is along Figure 2 A schematic cross-sectional view of a display device taken along line III-III in FIG.

[0016] Figure 4 FIG. 1 is a diagram showing an example of a layer structure applicable to an organic layer.

[0017] Figure 5 It is a schematic plan view showing a part of the display device in an enlarged manner.

[0018] Figure 6 It is along Figure 5 A schematic cross-sectional view of the display device taken along line VI-VI in FIG.

[0019] Figure 7 It is along Figure 5 A schematic cross-sectional view of the display device taken along line VII-VII in FIG.

[0020] Figure 8 It is along Figure 5 Schematic cross-sectional view of the display device taken along line VIII-VIII in FIG.

[0021] Fig. 9 It is a schematic cross-sectional view of a display device according to a comparative example. DETAILED DESCRIPTION

[0022] One embodiment will be described with reference to the drawings.

[0023] The disclosed content is only an example, and for those skilled in the art, the content that can be easily thought of with respect to appropriate changes that maintain the gist of the invention is of course included in the scope of the present invention. In addition, in order to make the description clearer, the width, thickness, shape, etc. of each part are sometimes schematically shown in the drawings compared with the actual method, but this is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, the same reference numerals are sometimes used to mark the constituent elements that perform the same or similar functions as the constituent elements described above with respect to the figures that have appeared, and repeated detailed descriptions are appropriately omitted.

[0024] It should be noted that, in the accompanying drawings, as needed, for easy understanding, the X-axis, Y-axis and Z-axis that are orthogonal to each other are recorded. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction of the plane including the X-direction and the Y-direction. In the present embodiment, the Z-direction is equivalent to the stacking direction. In addition, the situation of observing various elements parallel to the Z-direction is called top view.

[0025] A display device according to one embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be mounted on various electronic devices such as televisions, personal computers, vehicle-mounted equipment, tablet terminals, smartphones, mobile phone terminals, and wearable terminals.

[0026] Figure 1 1 is a diagram showing an example of the configuration of a display device DSP according to the present embodiment. The display device DSP includes an insulating substrate 10. The substrate 10 includes a display area DA for displaying an image and a peripheral area SA around the display area DA. A plurality of display elements described later are arranged in the display area DA. The substrate 10 may be glass or a flexible resin film.

[0027] In the present embodiment, the shape of the substrate 10 in plan view is a rectangle, but the shape of the substrate 10 in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0028] The display area DA includes a plurality of pixels PX arranged in a matrix in the X direction and the Y direction. The pixel PX includes a plurality of sub-pixels SP that display different colors. In the present embodiment, it is assumed that the pixel PX includes a blue sub-pixel SP1, a green sub-pixel SP2, and a red sub-pixel SP3. However, the pixel PX may include a sub-pixel SP of another color such as white together with the sub-pixels SP1, SP2, and SP3, or instead of any of the sub-pixels SP1, SP2, and SP3.

[0029] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0030] In the display area DA, a plurality of scanning lines GL for supplying scanning signals to the pixel circuits 1 of the sub-pixels SP, a plurality of signal lines SL for supplying video signals to the pixel circuits 1 of the sub-pixels SP, and a plurality of power supply lines PL are arranged. Figure 1 In the example shown, the scanning lines GL and the power supply lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0031] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4. In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0032] It should be noted that the configuration of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0033] Figure 2 FIG. 1 is a schematic top view showing an example of the layout of sub-pixels SP1, SP2, and SP3. Figure 2 In the example shown, the sub-pixels SP2 and SP3 are arranged in the X direction with the sub-pixel SP1. In addition, the sub-pixel SP2 and the sub-pixel SP3 are arranged in the Y direction.

[0034] When the sub-pixels SP1, SP2, and SP3 are arranged in this way, columns in which the sub-pixels SP2 and SP3 are alternately arranged in the Y direction and columns in which a plurality of sub-pixels SP1 are repeatedly arranged in the Y direction are formed in the display area DA. These columns are alternately arranged in the X direction. It should be noted that the layout of the sub-pixels SP1, SP2, and SP3 is not limited to Figure 2 Example shown.

[0035] The rib 5 is disposed in the display area DA. The rib 5 has pixel openings AP1, AP2, and AP3 in the sub-pixels SP1, SP2, and SP3, respectively. Figure 2 In the example shown, the pixel opening AP1 is larger than the pixel opening AP2, and the pixel opening AP2 is larger than the pixel opening AP3. That is, among the sub-pixels SP1, SP2, and SP3, the sub-pixel SP1 has the largest aperture ratio and the sub-pixel SP3 has the smallest aperture ratio.

[0036] The sub-pixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1 respectively overlapping with the pixel opening AP1. The sub-pixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2 respectively overlapping with the pixel opening AP2. The sub-pixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3 respectively overlapping with the pixel opening AP3.

[0037] The lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 that overlaps with the pixel opening AP1 constitute the display element DE1 of the sub-pixel SP1. The lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 that overlaps with the pixel opening AP2 constitute the display element DE2 of the sub-pixel SP2. The lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 that overlaps with the pixel opening AP3 constitute the display element DE3 of the sub-pixel SP3. The display elements DE1, DE2, and DE3 may further include a cover layer described later.

[0038] The conductive partition 6 is disposed in the display area DA. The partition 6 is disposed on the rib 5. The partition 6 overlaps the rib 5 as a whole and has the same planar shape as the rib 5. The partition 6 is disposed between the adjacent display elements DE1, DE2, and DE3.

[0039] That is, the partition wall 6 has openings in the sub-pixels SP1, SP2, and SP3, respectively. From another point of view, the ribs 5 and the partition walls 6 are lattice-shaped in a plan view, and surround the sub-pixels SP1, SP2, and SP3, respectively. The partition wall 6 has a function as a wiring for supplying a common voltage to the upper electrodes UE1, UE2, and UE3.

[0040] Figure 3 It is along Figure 2 A schematic cross-sectional view of a display device DSP along line III-III in FIG. A circuit layer 11 is arranged on the substrate 10. The circuit layer 11 includes Figure 1 The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 has a function as a planarizing film that planarizes the unevenness generated in the circuit layer 11.

[0041] The lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. The ribs 5 are disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the ribs 5.

[0042] Although in Figure 3 Although not shown in the cross section, the lower electrodes LE1 , LE2 , and LE3 are connected to the pixel circuit 1 of the circuit layer 11 through contact holes provided in the organic insulating layer 12 .

[0043] The partition wall 6 includes a conductive lower portion 61 disposed on the rib 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a greater width than the lower portion 61. Thus, both ends of the upper portion 62 protrude from the side surfaces of the lower portion 61. Such a shape of the partition wall 6 is called a cantilever shape.

[0044] exist Figure 3 In the example shown, the lower portion 61 has a bottom layer 63 disposed on the rib 5 and a shaft layer 64 disposed on the bottom layer 63. For example, the bottom layer 63 is formed thinner than the shaft layer 64. Figure 3 In the example shown, both end portions of the bottom layer 63 protrude from the side surfaces of the shaft layer 64 .

[0045] The organic layer OR1 covers the lower electrode LE1 through the pixel opening AP1. The upper electrode UE1 covers the organic layer OR1 and faces the lower electrode LE1. The organic layer OR1 is disposed between the lower electrode LE1 and the upper electrode UE1.

[0046] The organic layer OR2 covers the lower electrode LE2 through the pixel opening AP2. The upper electrode UE2 covers the organic layer OR2 and is opposite to the lower electrode LE2. The organic layer OR3 covers the lower electrode LE3 through the pixel opening AP3. The upper electrode UE3 covers the organic layer OR3 and is opposite to the lower electrode LE3. The upper electrodes UE1, UE2, UE3 are in contact with the side surface of the lower portion 61 of the partition wall 6.

[0047] The display element DE1 includes a cap layer CP1 disposed on the upper electrode UE1. The display element DE2 includes a cap layer CP2 disposed on the upper electrode UE2. The display element DE3 includes a cap layer CP3 disposed on the upper electrode UE3. The cap layers CP1, CP2, and CP3 respectively function as optical adjustment layers to improve the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3.

[0048] In the following description, the multilayer body including the organic layer OR1, the upper electrode UE1 and the cover layer CP1 is referred to as the stacked film FL1, the multilayer body including the organic layer OR2, the upper electrode UE2 and the cover layer CP2 is referred to as the stacked film FL2, and the multilayer body including the organic layer OR3, the upper electrode UE3 and the cover layer CP3 is referred to as the stacked film FL3.

[0049] A portion of the laminate film FL1 is located above the upper portion 62. This portion is separated from the portion of the laminate film FL1 located below the partition wall 6 (the portion constituting the display element DE1). Similarly, a portion of the laminate film FL2 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL2 located below the partition wall 6 (the portion constituting the display element DE2). In addition, a portion of the laminate film FL3 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL3 located below the partition wall 6 (the portion constituting the display element DE3).

[0050] Seal layers SE1, SE2, and SE3 are respectively arranged in sub-pixels SP1, SP2, and SP3. Seal layer SE1 continuously covers cap layer CP1 and partition walls 6 around sub-pixel SP1. Seal layer SE2 continuously covers cap layer CP2 and partition walls 6 around sub-pixel SP2. Seal layer SE3 continuously covers cap layer CP3 and partition walls 6 around sub-pixel SP3.

[0051] exist Figure 3 In the example shown, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP2 are separated from the laminated film FL2 and the sealing layer SE2 on the partition wall 6. In addition, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP3 are separated from the laminated film FL3 and the sealing layer SE3 on the partition wall 6.

[0052] The sealing layers SE1, SE2, and SE3 are covered by the resin layer 13. The resin layer 13 is covered by the sealing layer 14. The sealing layer 14 is covered by the resin layer 15. The resin layers 13, 15, and the sealing layer 14 are continuously provided at least in the entire display area DA, and a part of them also reaches the peripheral area SA.

[0053] A cover member such as a polarizing plate, a touch panel, a protective film or a cover glass may be further disposed on the resin layer 15. Such a cover member may be bonded to the resin layer 15 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0054] The organic insulating layer 12 is formed of an organic insulating material such as polyimide. The rib 5 and the sealing layers 14, SE1, SE2, and SE3 are formed of inorganic insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). In one example, the rib 5 is formed of silicon oxynitride, and the sealing layers 14, SE1, SE2, and SE3 are formed of silicon nitride. The resin layers 13 and 15 are formed of resin materials (organic insulating materials) such as epoxy resin and acrylic resin.

[0055] The lower electrodes LE1, LE2, and LE3 include, for example, a reflective layer formed of silver and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer can be formed of, for example, a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0056] The upper electrodes UE1, UE2, UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg), etc. For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrodes UE1, UE2, UE3 correspond to cathodes.

[0057] Figure 4 is a diagram showing an example of a layer structure that can be applied to the organic layers OR1, OR2, and OR3. The organic layers OR1, OR2, and OR3 are composed of a plurality of thin films including a light-emitting layer EML. In the present embodiment, it is assumed that the organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL are sequentially stacked in the Z direction. However, the organic layers OR1, OR2, and OR3 may have other structures such as a so-called tandem structure including a plurality of light-emitting layers EML.

[0058] The cover layers CP1, CP2, and CP3, for example, have a stacked structure formed by overlapping multiple transparent layers. These transparent layers may include layers formed by inorganic materials and layers formed by organic materials. In addition, these transparent layers have different refractive indices from each other. For example, the refractive indices of these transparent layers are different from the refractive indices of the upper electrodes UE1, UE2, and UE3 and the refractive indices of the sealing layers SE1, SE2, and SE3. It should be noted that at least one of the cover layers CP1, CP2, and CP3 may also be omitted.

[0059] The base layer 63 and the shaft layer 64 of the partition wall 6 are formed of a metal material. As the metal material of the base layer 63, for example, molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW) or molybdenum-niobium alloy (MoNb) can be used.

[0060] As the metal material of the shaft layer 64, for example, aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY), or aluminum-silicon alloy (AlSi) can be used. It should be noted that the shaft layer 64 can be formed of an insulating material.

[0061] For example, the upper portion 62 of the partition wall 6 has a laminated structure of a lower layer formed of a metal material and an upper layer formed of a conductive oxide. As the metal material forming the lower layer, for example, titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy or molybdenum-niobium alloy can be used. As the conductive oxide forming the upper layer, for example, ITO or IZO can be used. It should be noted that the upper portion 62 may have a single-layer structure of a metal material. In addition, the upper portion 62 may include a layer formed of an insulating material.

[0062] A common voltage is supplied to the partition wall 6. The common voltage is supplied to the upper electrodes UE1, UE2, UE3 in contact with the side surface of the lower portion 61. Pixel voltages corresponding to the video signals of the signal lines SL are supplied to the lower electrodes LE1, LE2, LE3 through the pixel circuits 1 of the sub-pixels SP1, SP2, SP3.

[0063] The organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, if a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer EML of the organic layer OR1 emits light in the blue wavelength region. If a potential difference is formed between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer EML of the organic layer OR2 emits light in the green wavelength region. If a potential difference is formed between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer EML of the organic layer OR3 emits light in the red wavelength region.

[0064] As another example, the light-emitting layers EML of the organic layers OR1, OR2, and OR3 may emit light of the same color (e.g., white). In this case, the display device DSP may also include a color filter that converts the light emitted by the light-emitting layer EML into light of a color corresponding to the sub-pixels SP1, SP2, and SP3. In addition, the display device DSP may also include a layer including quantum dots that are excited by the light emitted by the light-emitting layer EML to generate light of a color corresponding to the sub-pixels SP1, SP2, and SP3.

[0065] Next, a configuration applicable to the surrounding area SA will be described.

[0066] Figure 5 It is a schematic plan view showing a part of the display device DSP in an enlarged manner. Figure 6 It is along Figure 5 A schematic cross-sectional view of the display device DSP taken along line VI-VI in FIG. Figure 7 It is along Figure 5 A schematic cross-sectional view of the display device DSP taken along line VII-VII in FIG. Figure 8 It is along Figure 5 A schematic cross-sectional view of the display device DSP taken along line VIII-VIII in FIG.

[0067] exist Figure 5 , a portion of the display area DA and the peripheral area SA near the end of the substrate 10 are shown. Figure 6 Hereinafter, the substrate 10 , the resin layers 13 , 15 , the sealing layer 14 and the like are omitted in the illustration.

[0068] like Figure 5 As shown, the substrate 10 has a display area DA and a peripheral area SA. The display area DA includes a plurality of pixels PX including sub-pixels SP1, SP2, and SP3. The partition 6 is disposed between adjacent display elements DE1, DE2, and DE3.

[0069] like Figure 6 As shown, the display device DSP includes organic insulating layers 12 and 16, an electrode layer 21, an inorganic insulating layer 50, a conductive layer 60, a laminate film FL, and a sealing layer SE. In this embodiment, the organic insulating layer 16 corresponds to the second organic insulating layer, and the organic insulating layer 12 corresponds to the first organic insulating layer.

[0070] exist Figure 5 In the display area DA, a point is marked on a portion where the rib 5 is not formed. Figure 5 In the peripheral area SA, the portion where the inorganic insulating layer 50 is not formed is marked with dots, and the portion where the conductive layer 60 is not formed is marked with oblique lines. Figure 5 In the figure, in the peripheral area SA except for the area where a plurality of dummy pixels DX described later are formed, a portion where the electrode layer 21 is not formed is represented as an electrode opening 23 and is colored black.

[0071] The organic insulating layer 16 corresponds to the circuit layer 11 ( Figure 3 The organic insulating layer 16 is one of the multiple elements of the display area DA and the peripheral area SA. The organic insulating layer 16 is arranged below the organic insulating layer 12.

[0072] The electrode layer 21 is disposed in the peripheral area SA. The electrode layer 21 is disposed on the organic insulating layer 12. The electrode layer 21 is, for example, made of the same material as the lower electrodes LE1, LE2, LE3 in the display area DA and formed by the same manufacturing process.

[0073] The inorganic insulating layer 50 is disposed between the electrode layer 21 and the conductive layer 60. The inorganic insulating layer 50 is made of the same material and is formed by the same manufacturing process as the ribs 5 in the display area DA. The inorganic insulating layer 50 is connected to the ribs 5 disposed in the display area DA.

[0074] The conductive layer 60 is disposed on the electrode layer 21 . Focusing on the electrode layer 21 , the organic insulating layers 12 and 16 are disposed below the electrode layer 21 , and the inorganic insulating layer 50 is disposed above the electrode layer 21 .

[0075] The conductive layer 60 is made of the same material and is formed by the same manufacturing process as the partition 6 in the display area DA. The conductive layer 60 is connected to the partition 6 arranged in the display area DA.

[0076] The conductive layer 60 and the partition wall 6 ( Figure 3 The present invention also includes a conductive lower portion 61 and an upper portion 62 protruding from the side of the lower portion 61. The lower portion 61 includes a bottom layer 63 disposed on the inorganic insulating layer 50, and an axial layer 64 disposed on the bottom layer 63. For example, the bottom layer 63 is formed to be thinner than the axial layer 64. In addition, both ends of the bottom layer 63 protrude from the side of the axial layer 64, for example.

[0077] The laminated film FL includes an organic layer ORs, an upper electrode UEs, and a cap layer CPs. The organic layer ORs is formed of the same material and by the same manufacturing process as any of the organic layers OR1, OR2, and OR3. The upper electrode UEs is formed of the same material and by the same manufacturing process as any of the upper electrodes UE1, UE2, and UE3.

[0078] The cap layer CPs is formed of the same material and by the same manufacturing process as any of the cap layers CP1, CP2, and CP3. In one example, the organic layer ORs, the upper electrode UEs, and the cap layer CPs are respectively formed of the same material and by the same manufacturing process as the organic layer OR3, the upper electrode UE3, and the cap layer CP3.

[0079] The sealing layer SE is formed of the same material and by the same manufacturing process as any of the sealing layers SE1, SE2, and SE3. In one example, the sealing layer SE is formed of the same material and by the same manufacturing process as the sealing layer SE3. The laminated film FL and the sealing layer SE overlap with the conductive layer 60 in a plan view.

[0080] like Figure 6 As shown, the organic insulating layer 12 has an end E12. The end E12 is formed in a frame shape surrounding the display area DA in a plan view, for example. The end E12 is covered by the electrode layer 21. The end E12 is located on the inclined surface S12. In other words, the organic insulating layer 12 has an inclined surface S12 located at the end E12.

[0081] The inclined surface S12 corresponds to a part of the surface facing the electrode layer 21. The inclined surface S12 is inclined so as to approach the organic insulating layer 16 as it moves away from the display area DA. In other words, the thickness of the organic insulating layer 12 at the end E12 decreases as it moves away from the display area DA.

[0082] Inclined surface S12 Figure 6In the example shown, the inclined surface S12 is curved. However, the inclined surface S12 may not be curved. The width W of the inclined surface S12 ( Figure 5 As shown) in one example is approximately 50 μm.

[0083] like Figure 6 As shown, the organic insulating layer 16 protrudes from the end E12 of the organic insulating layer 12 in the peripheral area SA. Specifically, the organic insulating layer 16 has a portion P16 that protrudes from the end E12. An upper surface S16 of the portion P16 is covered by the electrode layer 21.

[0084] The upper surface S16 corresponds to a part of the surface facing the organic insulating layer 12. The inorganic insulating layer 50, the conductive layer 60, the laminated film FL, and the sealing layer SE are further laminated on the electrode layer 21 covering the portion P16.

[0085] like Figure 5 As shown, the electrode layer 21 has a plurality of electrode openings 23. The electrode openings 23 have a function as openings for releasing moisture from the organic insulating layer 12 after the electrode layer 21 is formed, for example.

[0086] like Figure 6 As shown in FIG. 1 , the plurality of electrode openings 23 penetrate the electrode layer 21 in the Z direction. The conductive layer 60 overlaps with the electrode openings 23 in a plan view. In other words, the conductive layer 60 is disposed above the electrode openings 23 .

[0087] Specifically, the lower portion 61 of the conductive layer 60 is disposed above the electrode opening 23 . More specifically, the axial layer 64 of the conductive layer 60 is disposed above the electrode opening 23 . A portion of the inorganic insulating layer 50 is located in the electrode opening 23 .

[0088] Focusing on the inclined surface S12, the electrode opening 23 overlaps with the inclined surface S12 in a plan view. In other words, the electrode opening 23 is also formed in a region overlapping with the inclined surface S12 in a plan view.

[0089] In addition, the conductive layer 60 also overlaps with the electrode opening 23 overlapping the inclined surface S12 in a plan view. The electrode opening 23 is not formed in the region overlapping with the portion P16 of the organic insulating layer 16 in a plan view.

[0090] exist Figure 5 In the example shown, the electrode opening 23 has a quadrilateral shape in a plan view. Here, the quadrilateral includes a rectangle and a square. As another example, the electrode opening 23 may have a circular shape, an elliptical shape, or another polygonal shape.

[0091] exist Figure 5In the example shown, the width (eg, length in the Y direction) of the electrode opening 23 is smaller than the distance between the two conductive openings 65. Figure 6 In the example shown, the width of the electrode opening 23 is smaller than the width of the lower portion 61 of the conductive layer 60. More specifically, in Figure 6 In the example shown, the width of the electrode opening 23 is smaller than the width of the shaft layer 64 of the conductive layer 60 .

[0092] like Figure 5 As shown, the conductive layer 60 has a plurality of conductive openings 65. Figure 6 As shown, a plurality of conductive openings 65 penetrate the conductive layer 60 in the Z direction. The electrode layer 21 overlaps with the conductive openings 65 in a plan view. In addition, the electrode openings 23 do not overlap with the conductive openings 65 in a plan view.

[0093] Focusing on the inclined surface S12, the conductive opening portion 65 does not overlap with the inclined surface S12 in a plan view. In other words, the conductive opening portion 65 is not formed in a region overlapping with the inclined surface S12 in a plan view.

[0094] exist Figure 5 In the example shown, the conductive opening 65 has a quadrilateral shape in a plan view. As another example, the electrode opening 23 may have a circular shape, an elliptical shape, or other polygonal shape.

[0095] In a plan view, the conductive opening 65 is, for example, larger than the electrode opening 23. It should be noted that the conductive opening 65 may be smaller than the electrode opening 23 in a plan view, or may be the same size as the electrode opening 23.

[0096] A portion of the laminated film FL is located in the conductive opening 65. A portion of the laminated film FL located above the conductive layer 60 is separated from a portion of the laminated film FL located below the conductive layer 60.

[0097] like Figure 6 As shown, the sealing layer SE is disposed above the conductive layer 60 and the conductive opening 65. In other words, a portion of the sealing layer SE is located in the conductive opening 65. By allowing a portion of the sealing layer SE to enter the conductive opening 65, the sealing layer SE bites into the conductive layer 60, making it difficult for the sealing layer SE to be peeled off.

[0098] Next, the virtual pixel DX will be described.

[0099] like Figure 5As shown, the display device DSP has a plurality of dummy pixels DX that do not display an image in the peripheral area SA. The plurality of dummy pixels DX are arranged to surround the display area DA. A plurality of electrode openings 23 and a plurality of conductive openings 65 are formed between the plurality of dummy pixels DX and the end E12 of the organic insulating layer 12.

[0100] The dummy pixel DX has the same shape as the pixel PX in plan view, for example, and is arranged in the same layout as the pixel PX. In the present embodiment, it is assumed that the dummy pixel DX includes sub-pixels DP1, DP2, and DP3.

[0101] exist Figure 5 In the example shown, the sub-pixels DP2 and DP3 are arranged in the X direction with the sub-pixel DP1. In addition, the plurality of sub-pixels DP1 are arranged in the Y direction, and the sub-pixels DP2 and DP3 are arranged in the Y direction.

[0102] When the sub-pixels DP1, DP2, and DP3 are arranged in such a layout, columns in which the sub-pixels DP2 and DP3 are alternately arranged in the Y direction and columns in which a plurality of sub-pixels DP1 are repeatedly arranged in the Y direction are formed in the peripheral area SA. These columns are arranged alternately in the X direction. These columns surround the display area DA. It should be noted that the layout of the sub-pixels DP1, DP2, and DP3 is not limited to Figure 5 Example shown.

[0103] In the region where the plurality of dummy pixels DX are formed in the peripheral region SA, the partition wall 6 has a lattice-like planar shape. The partition wall 6 has openings in each of the sub-pixels DP1, DP2, and DP3.

[0104] like Figure 7 As shown, in the region where the plurality of dummy pixels DX are formed in the peripheral region SA, openings corresponding to the pixel openings AP1 , AP2 , and AP3 are not formed in the inorganic insulating layer 50 .

[0105] like Figure 7 As shown in FIG. 1 , the sub-pixel DP1 includes a lower electrode LE1 and a laminate film FL1. An inorganic insulating layer 50 is disposed between the lower electrode LE1 and the laminate film FL1. In other words, the organic layer OR1 ( Figure 3 as shown) is not in contact with the lower electrode LE1.

[0106] like Figure 7 As shown in FIG. 1 , the sub-pixel DP3 includes a lower electrode LE3 and a laminate film FL3. An inorganic insulating layer 50 is disposed between the lower electrode LE3 and the laminate film FL3. In other words, the organic layer OR3 ( Figure 3 As shown) does not contact the lower electrode LE3.

[0107] Seal layers SE1 and SE3 are disposed in sub-pixels DP1 and DP3, respectively. Seal layer SE1 continuously covers laminate film FL1 and partition wall 6 around sub-pixel DP1. Seal layer SE3 continuously covers laminate film FL3 and partition wall 6 around sub-pixel DP3. Figure 7 In the illustrated example, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels DP1 and DP3 are separated from the laminated film FL3 and the sealing layer SE3 on the partition wall 6 .

[0108] It should be noted that although Figure 7 Although not shown in the figure, the sub-pixel DP2 includes a lower electrode LE2 and a laminated film FL2, and an inorganic insulating layer 50 is arranged between the lower electrode LE2 and the laminated film FL2. A sealing layer SE2 is arranged in each sub-pixel DP2. The sealing layer SE2 continuously covers the laminated film FL2 and the partition wall 6 around the sub-pixel DP2. The laminated film FL1 and the sealing layer SE1 on the conductive layer 60 between the sub-pixels DP1 and DP2 are separated from the laminated film FL2 and the sealing layer SE2 on the partition wall 6.

[0109] In one example, each element of the sub-pixels DP1 , DP2 , and DP3 of the dummy pixel DX is made of the same material and through the same manufacturing process as each element of the sub-pixels SP1 , SP2 , and SP3 of the display area DA.

[0110] In the sub-pixel DP1, no opening is formed in the inorganic insulating layer 50. Therefore, even if a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, no voltage is applied to the organic layer OR1, and the light-emitting layer EML of the organic layer OR1 does not emit light. Similarly, in the sub-pixels DP2 and DP3, no opening is formed in the inorganic insulating layer 50. As a result, the dummy pixel DX does not display an image.

[0111] Next, the contact portion H1 of the inorganic insulating layer 50 will be described.

[0112] like Figure 5 As shown, the inorganic insulating layer 50 has a plurality of contact portions H1 in the peripheral area SA. Figure 8 As shown, the plurality of contact portions H1 penetrate the inorganic insulating layer 50 in the Z direction.

[0113] The plurality of contact portions H1 are located between the plurality of dummy pixels DX and the end portion E12 of the organic insulating layer 12 in a plan view. The plurality of contact portions H1 are formed, for example, to surround the display area DA. Figure 5 In the example shown, a part of the plurality of contact portions H1 is arranged in the Y direction. However, the layout of the plurality of contact portions H1 is not limited to this example.

[0114] exist Figure 5In the example shown, the contact portion H1 has a quadrilateral shape in a plan view. As another example, the contact portion H1 may have a circular shape, an elliptical shape, or other polygonal shape.

[0115] In plan view, contact portion H1 is, for example, larger than conductive opening 65 and electrode opening 23. It should be noted that contact portion H1 may be smaller than conductive opening 65 and electrode opening 23 in plan view, or may be the same size as conductive opening 65 and electrode opening 23.

[0116] The conductive layer 60 covers the electrode layer 21 through the contact portion H1. In other words, the conductive layer 60 is electrically connected to the electrode layer 21 via the contact portion H1. Specifically, the lower portion 61 of the conductive layer 60 is electrically connected to the electrode layer 21. More specifically, the bottom layer 63 of the lower portion 61 is in contact with the electrode layer 21.

[0117] The electrode layer 21 is electrically connected to a feed line (not shown) at the end of the substrate 10. A common voltage is supplied to the feed line. The conductive layer 60 is electrically connected to the upper electrodes UE1, UE2, UE3 constituting the display elements DE1, DE2, DE3 via the partition 6. Therefore, a common voltage is supplied from the electrode layer 21 to the upper electrodes UE1, UE2, UE3 via the contact portion H1.

[0118] According to the display device DSP configured as described above, the yield rate in the manufacturing process can be improved as described below.

[0119] Fig. 9 2 is a schematic cross-sectional view of a display device DSP 10 according to a comparative example. The display device DSP 10 is different from the display device DSP according to the present embodiment in that the electrode opening 23 and the conductive opening 65 overlap.

[0120] The inorganic insulating layer 50 formed of an inorganic insulating material may have cracks due to the step difference of the electrode layer 21 at the edge of the electrode opening 23. If such cracks are generated, moisture may penetrate into the organic insulating layer 12 through the cracks and the electrode opening 23 during the process of sequentially forming the elements above the inorganic insulating layer 50 (rib 5).

[0121] In addition, similar cracks may also occur in the sealing layer SE formed of an inorganic insulating material. If cracks occur in both the inorganic insulating layer 50 and the sealing layer SE, a path for moisture to penetrate into the organic insulating layer 12 may also be formed in the process of patterning the sealing layer SE (for example, the sealing layer SE3) or in the process after the patterning.

[0122] The moisture that penetrates into the organic insulating layer 12 may cause corrosion of elements in the peripheral area SA and the display area DA, or cause the display element DE to not light up. Therefore, cracks in the inorganic insulating layer 50 and the sealing layer SE may cause a decrease in the yield in the manufacturing process.

[0123] According to the display device DSP according to the present embodiment, the electrode opening 23 does not overlap with the conductive opening 65 . In other words, the conductive layer 60 is formed so as to cover the electrode opening 23 .

[0124] Therefore, even if cracks are generated in the inorganic insulating layer 50 near the electrode opening 23, the cracks are covered by the conductive layer 60. Thus, the moisture intrusion path to the organic insulating layer 12 through the cracks can be blocked.

[0125] As a result, the display device DSP according to the present embodiment can improve the yield rate in the manufacturing process. In addition, according to the present embodiment, by blocking the path for water intrusion, the process margin can be improved, and the reliability of the display device DSP can be improved.

[0126] In this embodiment, the organic insulating layer 12 has an inclined surface S12 located at the end E12. The electrode opening 23 also overlaps with the inclined surface S12 when viewed from above. The conductive layer 60 overlaps with the electrode opening 23 overlapping with the inclined surface S12 when viewed from above. In contrast, the conductive opening 65 is not formed in the region overlapping with the inclined surface S12 when viewed from above.

[0127] Therefore, in the manufacturing process, when the conductive layer 60 is formed, the shape of the conductive layer 60 is less likely to be abnormal. As a result, according to the display device DSP according to the present embodiment, the yield in the manufacturing process can be further improved.

[0128] In this embodiment, the display device DSP has a plurality of virtual pixels DX surrounding the display area in the peripheral area SA. As a result, in the manufacturing process, the partition wall 6, the display elements DE1, DE2, DE3 and other elements arranged in the display area DA are less likely to have shape abnormalities due to uneven etching. As a result, according to the display device DSP involved in this embodiment, the yield rate in the manufacturing process can be further improved.

[0129] Based on the display device described above as an embodiment of the present invention, any display device that can be implemented by appropriately designing and modifying the display device by a person skilled in the art also belongs to the scope of the present invention as long as it includes the gist of the present invention.

[0130] Within the scope of the present invention, those skilled in the art can think of various variations, which also belong to the scope of the present invention. For example, embodiments obtained by adding, deleting or designing the above-mentioned embodiments appropriately by those skilled in the art, or embodiments obtained by adding, omitting or changing the conditions of the processes are included in the scope of the present invention as long as they have the gist of the present invention.

[0131] In addition, regarding other effects brought about by the methods described in the above-mentioned embodiments, the effects that are clear from the description of this specification or the effects that can be appropriately thought of by those skilled in the art are of course understood as the effects brought about by the present invention.

Claims

1. A display device comprising a display area in which a plurality of display elements are arranged and a peripheral area around the display area, the display device comprising: a partition wall disposed in the display region and disposed between adjacent display elements; an electrode layer, which is disposed in the peripheral area; A conductive layer, disposed above the electrode layer; and an inorganic insulating layer disposed between the electrode layer and the conductive layer, The partition wall and the conductive layer include a lower portion having conductivity and an upper portion protruding from a side surface of the lower portion. The electrode layer has an electrode opening portion penetrating in the stacking direction, The conductive layer overlaps with the electrode opening.

2. The display device according to claim 1, wherein: The conductive layer has a conductive opening extending through the stacking direction. The electrode layer overlaps with the conductive opening.

3. The display device according to claim 2, wherein: The electrode opening does not overlap with the conductive opening.

4. The display device according to claim 2, further comprising an organic insulating layer disposed below the electrode layer in the peripheral region, The organic insulating layer has an inclined surface located at an end portion of the organic insulating layer.

5. The display device according to claim 4, wherein: The electrode opening portion overlaps with the inclined surface.

6. The display device according to claim 5, wherein: The conductive layer overlaps with the electrode opening portion overlapping the inclined surface.

7. A display device comprising a display area in which a plurality of display elements are arranged and a peripheral area around the display area, the display device comprising: a partition wall disposed in the display region and disposed between adjacent display elements; an electrode layer, which is disposed in the peripheral area; A conductive layer, disposed above the electrode layer; and an inorganic insulating layer disposed between the electrode layer and the conductive layer, The partition wall and the conductive layer include a lower portion having conductivity and an upper portion protruding from a side surface of the lower portion. The conductive layer has a conductive opening portion penetrating in the stacking direction, The electrode layer overlaps with the conductive opening.

8. The display device according to claim 7, wherein: The electrode layer has an electrode opening extending through the stacking direction. The conductive layer overlaps with the electrode opening.

9. The display device according to claim 7, further comprising an organic insulating layer disposed below the electrode layer in the peripheral region, The organic insulating layer has an inclined surface located at an end portion of the organic insulating layer, The conductive opening does not overlap with the inclined surface. 10 . The display device according to claim 2 , further comprising a sealing layer disposed above the conductive layer and the conductive opening.

11. The display device according to claim 1 or 7, wherein: The inorganic insulating layer has a contact portion penetrating in the stacking direction, The conductive layer is electrically connected to the electrode layer via the contact portion.

12. The display device according to claim 1 or 7, further comprising a plurality of virtual pixels that do not display an image in the peripheral area. The plurality of virtual pixels surround the display area.

13. The display device according to claim 1 or 7, wherein: Each of the plurality of display elements includes: a lower electrode; an upper electrode opposite to the lower electrode; and an organic layer disposed between the lower electrode and the upper electrode and emitting light in response to a potential difference between the lower electrode and the upper electrode. The electrode layer is formed of the same material as that of the lower electrode.

14. The display device according to claim 13, further comprising a rib portion disposed in the display area and having a pixel opening overlapping with the lower electrode, The organic layer covers the lower electrode through the pixel opening, The rib is formed of the same inorganic insulating material as the inorganic insulating layer.

15. The display device according to claim 14, wherein: The partition wall is arranged on the rib.

16. A display device comprising a display area in which a plurality of display elements are arranged and a peripheral area around the display area, the display device comprising: a partition wall disposed in the display region and disposed between adjacent display elements; a first organic insulating layer disposed in the peripheral region; an electrode layer disposed above the first organic insulating layer; and an inorganic insulating layer, which is arranged above the electrode layer, The partition wall includes a conductive lower portion and an upper portion protruding from a side surface of the lower portion. The first organic insulating layer has an inclined surface located at an end of the first organic insulating layer, The electrode layer has an electrode opening that penetrates in a stacking direction and overlaps with the inclined surface. 17 . The display device according to claim 16 , further comprising a conductive layer disposed above the electrode layer and having the lower portion and the upper portion.

18. The display device according to claim 17, wherein: The conductive layer overlaps with the electrode opening.

19. The display device according to claim 17, further comprising a plurality of virtual pixels that do not display an image in the peripheral area. The inorganic insulating layer has a contact portion penetrating in the stacking direction, The conductive layer is electrically connected to the electrode layer via the contact portion. The contact portion is located between the plurality of dummy pixels and the end portion of the first organic insulating layer.

20. The display device according to claim 16, further comprising a second organic insulating layer disposed below the first organic insulating layer. The second organic insulating layer protrudes beyond the end portion.

21. The display device according to claim 20, wherein: The protruding portion is covered by the electrode layer.

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