Glass core laminated structure and method for manufacturing glass core laminated structure

Abstract

The purpose of the present invention is to provide a technique capable of ensuring the reliability of a glass core laminated structure and a wiring board while avoiding the occurrence of damage in a core substrate. A laminated glass core structure is provided with: a glass core substrate having a first surface and a second surface facing the first surface; and a laminated body including a layer formed of a material different from that of the glass core substrate above the first surface and below the second surface, characterized in that: a side surface of the glass core laminated structure is covered with the same material as one of the materials constituting the laminated body; a plurality of substantially rectangular recesses are formed in at least a portion of a side surface of the glass core substrate, the recesses allowing the plurality of longitudinal ridge lines and transverse ridge lines to be viewed.

Description

Technical Field

[0001] The present invention relates to a glass core laminated structure and a method for producing the glass core laminated structure. Background Art

[0002] With the high functionality and miniaturization of electronic devices, the requirements for high density of wiring substrates constituting semiconductor devices are getting higher and higher. Among them, with the miniaturization of circuit wiring, miniaturization is also required for passive components such as resistors, capacitors, and inductors. However, further miniaturization is limited only by miniaturizing these passive components and mounting them at high density on the surface of the substrate. Therefore, a technology for embedding passive components into the mounting substrate has been proposed (for example, refer to Patent Document 1).

[0003] In this technology, passive elements are formed by printing or vacuum film forming and then built into a multilayer substrate. In addition to miniaturization, high-frequency noise can be reduced by shortening the wiring length.

[0004] On the other hand, organic materials such as glass epoxy resin are generally used as materials for wiring substrates. In recent years, due to the advancement of hole-forming technology for glass materials, for example, small-diameter through holes of 100 μm or less can be formed with a pitch of 150 μm or less for a 300 μm thick glass substrate. Therefore, glass has attracted much attention as a material for electronic circuit substrates.

[0005] The circuit substrate using glass material as the core substrate (hereinafter referred to as "glass circuit substrate") has high mounting reliability because the linear thermal expansion coefficient (CTE) of glass is as small as 2ppm to 8ppm, which matches the CTE of silicon chips. In addition, due to its excellent flatness, high-precision mounting is possible, which also plays a positive role in fine wiring formation and high-speed transmission.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Publication No. 2000-151114 Summary of the invention

[0009] Problems to be solved by the invention

[0010] However, when a capacitor is formed in the above-mentioned glass circuit substrate, there are the following problems.

[0011] When a glass substrate is used as a core substrate and wiring layers are formed on the upper and lower surfaces of the glass substrate to form a multilayer wiring substrate, when the multilayer wiring substrate is singulated from the mother substrate, micro cracks are sometimes generated in the glass substrate due to the stress of the wiring layer. Micro cracks (hereinafter also referred to as "micro cracks") become the cause of the glass substrate fracture phenomenon. Therefore, it is difficult to ensure the reliability of a multilayer wiring substrate using a glass material as a core substrate.

[0012] In addition, generally, the singulation of a multilayer wiring substrate using a glass material as a core substrate is performed by grinding. The end surface of the singulated glass substrate generates very fine cracks due to the grinding process, and the very fine cracks expand due to the stress generated by the difference in linear expansion coefficient between the glass substrate and the wiring layer, and the glass substrate cracks to generate μ cracks. The generation of μ cracks becomes significant when stress accumulates, especially when the difference in linear expansion coefficient between the glass substrate and the wiring layer is large, and when the temperature changes, especially during the temperature cycle test.

[0013] μ cracks are caused by extremely small cracks generated on the end faces of the monolithic glass substrate and stress caused by the difference in linear expansion coefficient between the glass substrate and the wiring layer. Therefore, if the wiring layer of the multilayer wiring substrate is a structure composed of a material having a linear expansion coefficient difference with the glass substrate, stress will be generated, and μ cracks may sometimes be generated. As a structure, for example, even if it is a layer of only conductive material, a layer of only resin material, or a layer of a mixture of these, stress will be generated when it is composed of a material having a linear expansion coefficient difference with the glass substrate, and thus μ cracks may be generated.

[0014] In addition, due to the difference in linear expansion coefficient with the glass substrate, stress will be generated even in a single-layer structure instead of a multi-layer structure, and μ cracks may be generated. In the case of a multi-layer structure, the accumulated stress is greater than that of a single layer, so the generation of μ cracks becomes more significant.

[0015] As described above, the occurrence of μ cracks is an important issue in a glass core laminate structure in which a structure having a linear expansion coefficient different from that of a glass substrate is laminated on a glass substrate.

[0016] Therefore, an object of the present invention is to provide a technology capable of preventing damage to a core substrate and ensuring the reliability of a glass core laminate structure and a wiring substrate.

[0017] Means for solving problems

[0018] In order to solve the above-mentioned problems, a representative glass core stacking structure of the present invention comprises: a glass core substrate having a first surface and a second surface opposite to the first surface; and a stacking body comprising layers formed of a material different from the glass core substrate above the first surface and below the second surface, characterized in that the side surfaces of the glass core stacking structure are covered with a material identical to one of the materials constituting the stacking body, and a plurality of roughly rectangular recesses with visible multiple longitudinal ridges and transverse ridges are formed on at least a portion of the side surfaces of the glass core substrate.

[0019] Effects of the Invention

[0020] According to the present invention, it is possible to avoid damage to the core substrate and ensure the reliability of the glass core laminate structure and the wiring substrate. Other problems, configurations, and effects than those described above will become clear from the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] [ Figure 1 ] Figure 1 It is a cross-sectional view showing a multilayer wiring substrate according to the first embodiment.

[0022] [ Figure 2 ] Figure 2 It is a cross-sectional view showing the structure of a through electrode in the multilayer substrate wiring according to the first embodiment.

[0023] [ Figure 3 ] Figure 3 It is a cross-sectional view for explaining the step of bonding the first support in the production method according to the first embodiment.

[0024] [ Figure 4 ] Figure 4 It is a cross-sectional view for explaining the step of forming the laser modified portion in the manufacturing method according to the first embodiment.

[0025] [ Figure 5 ] Figure 5 It is a diagram for explaining the formation position of the laser modified portion in the manufacturing method according to the first embodiment.

[0026] [ Figure 6 ] Figure 6 It is a cross-sectional view for explaining the step of forming the first wiring layer in the manufacturing method according to the first embodiment.

[0027] [ Figure 7 ] Figure 7 It is a cross-sectional view for explaining the bonding step of the second support in the production method according to the first embodiment.

[0028] [ Figure 8 ] Figure 8It is a cross-sectional view for explaining the peeling step of the first support in the production method according to the first embodiment.

[0029] [ Fig. 9A ] Fig. 9A It is a cross-sectional view for explaining the step of forming a through hole by etching in the manufacturing method according to the first embodiment.

[0030] [ Fig. 9B ] Fig. 9B This is a bottom view when the separation groove is formed.

[0031] [ Fig. 9C ] Fig. 9C This is a diagram schematically showing a part of the bottom view of the separation tank in an enlarged manner.

[0032] [ Fig.9D ] Fig.9D It is a diagram schematically showing the side surface of a separation tank.

[0033] [ Fig.9E ] Fig.9E This is a diagram schematically showing an enlarged separation tank.

[0034] [ Fig.9F ] Fig.9F This is a diagram schematically showing a part of the bottom view of the separation tank in an enlarged manner.

[0035] [ Fig.10 ] Fig.10 It is a cross-sectional view for explaining the step of forming the second wiring layer in the manufacturing method according to the first embodiment.

[0036] [ Fig.11 ] Fig.11 It is a cross-sectional view for explaining the peeling step of the second support in the production method according to the first embodiment.

[0037] [ Fig.12 ] Fig.12 This is a cross-sectional view showing a state after the second support body is peeled off in the production method according to the first embodiment.

[0038] [ Fig.13 ] Fig.13 It is a cross-sectional view for explaining a step of forming a build-up layer in the manufacturing method according to the first embodiment.

[0039] [ Fig.14 ] Fig.14 It is a cross-sectional view for explaining a process of forming a connection pad in the manufacturing method according to the first embodiment.

[0040] [ Fig.15 ] Fig.15 It is a cross-sectional view for explaining the singulation step in the manufacturing method according to the first embodiment.

[0041] [ Fig.16 ] Fig.16 It is a diagram showing a flow chart of the manufacturing method according to the first embodiment.

[0042] [ Fig.17 ] Fig.17 It is a cross-sectional view for explaining a step of forming a first wiring layer in the manufacturing method according to the first modification.

[0043] [ Fig.18 ] Fig.18 It is a cross-sectional view for explaining the step of forming the laser modified portion in the manufacturing method according to the first modification.

[0044] [ Fig.19 ] Fig.19 It is a diagram showing a flow chart of the manufacturing method according to the first modification.

[0045] [ Fig. 20 ] Fig. 20 It is a cross-sectional view for explaining the bonding step of the second support in the manufacturing method according to the second modification.

[0046] [ Fig.21 ] Fig.21 It is a cross-sectional view for explaining the step of forming the laser modified portion in the manufacturing method according to the second modification.

[0047] [ Fig. 22 ] Fig. 22 It is a diagram showing a flow chart of the manufacturing method according to the second modification.

[0048] [ Fig.23 ] Fig.23 This is a diagram for explaining the repetition rate of the laser modified portion and the through hole.

[0049] [ Fig.24 ] Fig.24 It is a cross-sectional view showing a multilayer wiring substrate according to the second embodiment. DETAILED DESCRIPTION

[0050] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0051] It should be noted that the following description relates to an example of the present invention, and the present invention is not limited to these examples. In the description of the drawings, the same parts are marked with the same symbols.

[0052] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0053] It should be noted that in the present disclosure, "surface" refers not only to the surface of a plate-like component, but also to the interface of a layer contained in a plate-like component that is roughly parallel to the surface of the plate-like component. In addition, "above" and "below" refer to the surface shown above or below in the accompanying drawings when a plate-like component or a layer contained in a plate-like component is shown in the drawings. It should be noted that "above" and "below" are sometimes also referred to as "surface 1" and "surface 2".

[0054] In addition, "side surface" refers to the surface of a plate-shaped member or a layer included in the plate-shaped member or a thickness portion of a layer. In addition, a part of a surface and a side surface may be collectively referred to as an "end portion".

[0055] In addition, "above" refers to the vertically upward direction when a plate-like component or layer is placed horizontally. In addition, "above" and its opposite "below" are sometimes referred to as "Z-axis positive direction" and "Z-axis negative direction", and the horizontal direction is sometimes referred to as "X-axis direction" and "Y-axis direction".

[0056] In addition, the "bottom" may refer to a portion located in a direction perpendicular to the paper surface in the drawings.

[0057] <First Embodiment>

[0058] (Structure of a Multilayer Wiring Board)

[0059] Reference Figure 1 and Figure 2 , a multilayer wiring substrate according to the first embodiment is described. Figure 1 It is a cross-sectional view showing a multilayer wiring substrate according to the first embodiment of the present invention. Figure 2 1 is a cross-sectional view showing the structure of a through electrode in a multilayer wiring substrate according to the first embodiment. As shown here, the multilayer wiring substrate 1 has a core substrate 10 (hereinafter also referred to as a "glass core substrate 10") as a glass substrate. The core substrate 10 has a first wiring layer 21 formed on the upper surface in the positive direction of the Z axis (hereinafter also referred to as the "first surface 20"), and has a second wiring layer 22 formed on the lower surface in the negative direction of the Z axis (hereinafter also referred to as the "second surface 30").

[0060] The core substrate 10 has a first surface 20 and a second surface 30 opposite to the first surface 20. A through hole 11 is formed in the core substrate 10, which passes through from the first surface 20 to the second surface 30, in other words, passes through the front and back surfaces. A seed metal layer is formed on the inner wall surface of the through hole 11, thereby forming a through electrode 12, so that the first surface 20 side and the second surface 30 side of the core substrate 10 are connected. In addition, as Figure 2 As shown, in the first wiring layer 21, the capacitor electrode 13 is arranged above the through electrode 12. It should be noted that other circuit elements (for example, inductors) other than capacitors may be built into the first wiring layer 21.

[0061] The structure of the first wiring layer 21, which is a wiring layer formed on the first surface 20 of the core substrate 10, is described. The through-electrode connecting portion 41 (hereinafter also referred to as the "first conductive portion") is an electrode arranged in the first wiring layer 21 and connected to the through-electrode 12 via the hydrofluoric acid-resistant metal layer 15, and the conductive electrode 31 is provided on the through-electrode connecting portion 41. The capacitor electrode 13, the dielectric layer 14, and the through-electrode connecting portion 41 (and the hydrofluoric acid-resistant metal layer 15) form a MIM (Metal Insulator Metal) structure. In addition, the wiring 16 is a wiring arranged in the first wiring layer 21, and is connected to the through-electrode 12, the conductive electrode 31, etc. The through-electrode connecting portion 41, the conductive electrode 31, the capacitor electrode 13, the dielectric layer 14, and the wiring 16 are all protected by the insulating resin layer 25. In addition, when the multilayer wiring substrate 1 is used as a relay substrate for connecting multiple semiconductor elements, that is, an interposer substrate, the semiconductor element bonding pad 51 is a bump used when mounting other semiconductor elements or connecting with other semiconductor elements. The solder resist 55 is a film composed of an insulating member for protecting the multilayer wiring substrate 1. Here, two conductive electrodes 31 are overlapped in the first wiring layer 21. This means that the first wiring layer 21 is made by overlapping two wiring layers.

[0062] It should be noted that, regarding the method for forming a capacitor having a capacitor electrode 13, a capacitor is formed by using a portion of a wiring layer (the first wiring layer or the second wiring layer) as a lower electrode, stacking a dielectric layer on the wiring layer in a manner that covers a portion or all of the upper surface of the lower electrode, and arranging an upper electrode on the dielectric layer in a manner that covers a portion or all of the dielectric layer and a portion or all of the lower electrode when viewed from above, and is not conductive with the lower electrode. In addition, the dielectric layer and the upper electrode are arranged within the range of the thickness direction of the insulating layer, wherein the insulating layer is arranged between the conductor layer including the lower electrode and the conductor layer directly above it. In addition, an inductor is formed by connecting a portion of the wiring layer, or connecting a portion of the wiring layer and a through electrode.

[0063] The structure of the second wiring layer 22, which is a wiring layer formed on the second surface 30 of the core substrate 10, is described. The through-electrode connecting portion 42 (hereinafter also referred to as the "second conductive portion") is an electrode arranged in the second wiring layer 22 and connected to the through-electrode 12, and is formed to match the shape of the opening end of the through-electrode 12. The through-electrode connecting portion 42 is connected to the conductive electrode 32. A predetermined combination of the through-electrode connecting portion 42 arranged in the second wiring layer 22 and the through-electrode connecting portion 41 arranged in the first wiring layer 21 is conductively connected through the through-electrode 12. The substrate bonding solder 54 is a bump used when connecting to a printed wiring substrate. The solder resist 55 is a film composed of an insulating component for protecting the multilayer wiring substrate 1. Here, the conductive electrode 32 forms a conductive path in the second wiring layer 22 by overlapping or via other wiring layers. This means that the second wiring layer 22 is made by overlapping two wiring layers.

[0064] When the insulating resin layer 25 is included in the first wiring layer 21 and the second wiring layer 22 , the side surface of the core substrate 10 is covered with the same kind of insulating resin as the insulating resin constituting the insulating resin layer 25 .

[0065] It should be noted that, in the following description, the case where the multilayer wiring substrate 1 includes the first wiring layer 21 and the second wiring layer 22 is exemplified and described, but the present invention is not limited to the case where the first wiring layer 21 and the second wiring layer 22 are included. It is also possible to form a layer having a stacked structure other than the first wiring layer 21 and the second wiring layer 22, that is, a laminated body. In this case, the multilayer wiring substrate 1 can also be referred to as a glass core laminated structure. In addition, when a wiring substrate is formed in the glass core laminated structure, the glass core laminated structure can also be referred to as a glass core wiring substrate. In addition, depending on the number of wiring layers, it can also be referred to as a glass core multilayer wiring substrate. Here, the glass core laminated structure includes: a glass core substrate 10 having a first surface 20 and a second surface 30 opposite to the first surface; and a laminated body including a layer formed of a material different from the glass core substrate 10 above the first surface 20 and below the second surface 30. The side surface of the glass core laminated structure is covered with a material that is the same as one of the materials constituting the laminated body.

[0066] In addition, the glass core substrate 10 has a plurality of through holes 11 extending from the first surface 20 to the second surface 30, and a portion or all of the plurality of through holes 11 are through electrodes 12 formed by stacking a conductor layer on the inner wall thereof. The glass core substrate 10 has a first wiring layer 21 including a conductor on the first surface 20, and a second wiring layer 22 including a conductor on the second surface 30, and the first wiring layer 21 and the second wiring layer 22 are electrically connected via the through electrodes 12.

[0067] In addition, a first insulating resin layer is stacked on the first wiring layer 21, and a second insulating resin layer is stacked on the second wiring layer 22. The through electrode 12 is filled with insulating resin extending from the first insulating resin layer or the second insulating resin layer, and the side of the glass core substrate 10 is covered with insulating resin extending from the first insulating resin layer or the second insulating resin layer.

[0068] In addition, wiring layers and insulating layers are alternately stacked on the first insulating resin layer one time or multiple times, and wiring layers and insulating layers are alternately stacked on the second insulating resin layer one time or multiple times. The upper and lower wiring layers are electrically connected by through electrodes arranged inside the insulating layer.

[0069] (Dimensions and composition of multilayer wiring board)

[0070] The relationship between the opening diameter D1 on the first surface 20 side and the opening diameter D2 on the second surface 30 side of the through electrode 12 (opening diameter D1 on the first surface side / opening diameter D2 on the second surface side) is within a range of 0.35 to 0.65. By making the opening diameter on the first surface 20 side smaller than the opening diameter on the second surface 30 side, the capacitor electrode 13 can be stably formed on the through electrode 12.

[0071] The thickness of the core substrate 10 is within the range of 50 μm to 150 μm, and the thickness can be set according to the characteristic values ​​of the capacitor electrode 13, inductor, resistor, etc. formed on the first wiring layer 21. When the thickness of the core substrate 10 is 200 μm or more, the relationship between the opening diameter D1 on the first surface 20 side and the opening diameter D2 on the second surface 30 side (opening diameter D1 on the first surface side / opening diameter D2 on the second surface side) is 0.35 to 0.65, making it difficult to form the capacitor electrode 13 on the through electrode 12 and ensure the connection reliability of the through electrode 12. The thickness of the core substrate 10 is more preferably within the range of 100 μm to 150 μm.

[0072] It should be noted that the relationship between the opening diameter D1 on the first surface 20 side and the opening diameter D2 on the second surface 30 side may be appropriately set as long as it is within the above range.

[0073] The relative dielectric constant of the insulating resin layer 25 is within a range of 3.1 to 3.5, and the dielectric loss tangent is within a range of 0.002 to 0.012. The insulating resin layer 25 is formed of a thermosetting resin.

[0074] As the thermosetting resin, the following materials can be used: epoxy resin, polyimide resin, polyamide resin and their composite materials, and filled with a filling material having at least SiO2 as a component in the range of 65% to 80%. When the filling rate of the filling material of SiO2 is less than 65%, the relative dielectric constant and the dielectric loss tangent are outside the above range, which becomes the main reason for the reduction of transmission characteristics. The filling rate of the filling material of SiO2 is more preferably 72% or more.

[0075] In addition, for the material of the composite material filled with a large amount of SiO2 filler, the linear expansion coefficient of the insulating resin is low, and becomes a value close to the linear expansion coefficient of the glass material. Therefore, by using such a material, the stress that may be generated when forming the wiring layer on the core substrate 10 can be reduced. Thus, the values ​​of the relative dielectric constant and the dielectric loss tangent can be suppressed within the above range, and the influence on the transmission characteristics can be avoided.

[0076] The insulating resin layer 25 included in the first wiring layer 21 and the second wiring layer 22 and the insulating resin formed on the side of the core substrate 10 are exposed on the side of the multilayer wiring substrate 1. When measured in the horizontal direction (the direction in which the multilayer wiring substrate 1 extends), the thickness wi of the insulating resin located on the side portion of the multilayer wiring substrate 1 is at least 50μm. Assuming a straight line perpendicular to the first surface 20 toward the second surface 30 and setting the angle between the straight line and the side as θ1, with the end of the core substrate 10 of the first wiring layer 21 as a reference, the side of the core substrate 10 is inclined within the range of θ1 being greater than 21° and less than 35° to reach the second wiring layer 22. In addition, the shape of the side of the multilayer wiring substrate 1 is a shape extending in the same vertical direction as the vertical straight line.

[0077] The side of the multilayer wiring substrate 1 including the side of the core substrate 10 is covered with an insulating resin material, and is protected by the insulating resin material. As a result, the stress generated by the first wiring layer 21 or the second wiring layer 22 formed on the upper and lower surfaces of the core substrate 10 can be dispersed to the other wiring layer through the insulating resin located on the side of the core substrate 10. In addition, μ cracks and chipping at the end of the core substrate 10 can be suppressed, and the reliability of the multilayer wiring substrate 1 can be improved.

[0078] The capacitor formed in the first wiring layer 21 of the multilayer wiring substrate 1 has a MIM structure. From the perspective of insulation and dielectric constant, the dielectric layer 14 forming the capacitor can be selected from at least one of aluminum oxide, silicon dioxide, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate. In addition, the material for the upper and lower electrodes of the MIM structure can be, for example, at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu. For example, Cu is a preferred material.

[0079] The core substrate 10 used for the multilayer wiring substrate 1 is a transparent glass material with light transmittance. There is no particular limitation on the composition of the glass or the proportion of the components contained in the glass, and the method for manufacturing the glass. For example, as glass, alkali-free glass, alkali glass, borosilicate glass, quartz glass, sapphire glass, photosensitive glass, etc. can be listed, but any glass material with silicate as the main component can also be used. In addition, other so-called glass materials can also be used. However, in the multilayer wiring substrate involved in this embodiment, it is preferred to use alkali-free glass.

[0080] The core substrate 10 uses glass manufactured by a float method, a down-drawing method, a melting method, an up-drawing method, a roll-out method, etc., but a glass material made by any method may also be used. The linear expansion coefficient of the glass is preferably in the range of -1ppm / K to 15.0ppm / K. The reason is that it is difficult to select the glass material itself when it is below -1ppm / K. On the other hand, when it is above 15.0ppm / K, the difference in thermal expansion coefficient with other layers becomes larger, and the reliability is reduced when used for a multilayer wiring substrate. In addition, when a silicon chip is mounted on the multilayer wiring substrate 1 of the present embodiment, the connection reliability with the silicon chip is reduced. It should be noted that the linear expansion coefficient of the glass is more preferably in the range of 0.5ppm / K to 8.0ppm / K, and further preferably in the range of 1.0ppm / K to 4.0ppm / K.

[0081] <First Manufacturing Method According to Embodiment of the Present Invention>

[0082] Below, refer to Figures 3 to 15 , a method for manufacturing the multilayer wiring substrate 1 according to the first embodiment will be described.

[0083] (Adhesion of the first support)

[0084] First, refer to Figure 3 , a process of bonding the first support 61 to the glass substrate 60 as a mother material substrate will be described. Figure 3It is a cross-sectional view for explaining the bonding step of the first support 61 in the manufacturing method according to the first embodiment.

[0085] The glass substrate 60 has a first surface 20 and a second surface 30. As shown here, the first support 61 is attached to the glass substrate 60 using the first adhesive layer 62, so that a laminated structure 63 composed of the glass substrate 60, the first adhesive layer 62, and the first support 61 is formed.

[0086] It should be noted that, in the drawings, the first adhesive layer is originally of a thickness that can be roughly ignored compared to the glass substrate 60 and the first support 61, and can also be expressed as an interface between the glass substrate 60 and the first support 61, but is illustrated as a layer with thickness for ease of observation. In addition, the glass substrate 60 has an extension in the Y-axis direction, and a portion is extracted in the drawings for display, so the end in the Y-axis direction is represented by a straight line.

[0087] The first adhesive layer 62 is an adhesive layer for temporarily fixing the first support 61 to the glass substrate 60. The first adhesive layer 62 is a surface containing hydroxyl groups formed on the second surface 30 of the glass substrate 60. The bonding interface can be formed as long as it contains hydroxyl groups, and can also contain multiple other functional groups. Therefore, the material of the first adhesive layer 62 can be appropriately selected from the following: a resin that can be peeled off by absorbing light such as UV light to generate heat, sublimate or denature; a resin or functional group that can be peeled off by foaming by heating, etc.

[0088] In order to bond the first support 61 to the glass substrate 60 , for example, a laminator, a vacuum press machine, a reduced pressure bonding machine, or the like can be used.

[0089] Thus, by forming an interface containing hydroxyl groups on the second surface 30 of the glass substrate 60, hydrogen bonds using hydroxyl groups can be formed between the glass substrate 60 and the first support 61. It should be noted that the adhesive layer containing hydroxyl groups can also be formed on the first surface 20 of the glass substrate 60.

[0090] The first support 61 is preferably made of the same material as the glass substrate 60. When the material of the glass substrate 60 is alkali-free glass, the material of the first support 61 is preferably also alkali-free glass. In addition, the thickness of the first support 61 can be appropriately set according to the thickness T1 of the glass substrate 60. However, it is preferred that the thickness can be conveyed in the manufacturing process, for example, when the thickness T1 of the glass substrate 60 is in the range of 75 μm to 200 μm, the thickness of the first support 61 can be set in the range of 300 μm to 1,500 μm.

[0091] It should be noted that, in the present embodiment, the first support 61 is made of a glass material, and hydroxyl groups and a plurality of functional groups are used as a bonding interface.

[0092] The adhesion strength between the glass substrate 60 and the first support 61 is preferably within 0.15 J / cm 2 Above 0.45J / cm 2 In the case where the strength in the above range cannot be obtained, annealing treatment can be performed after the formation of hydroxyl groups to improve the adhesion strength. 2 When the adhesion strength is 0.45 J / cm, the possibility of peeling at the interface between the glass substrate 60 and the first support 61 during the process flow increases. 2 If the adhesion strength is above 0.25 J / cm, the adhesion strength may be poor in the peeling step described separately. 2 Above 0.4J / cm 2 It should be noted that the adhesion strength was measured using a crack opening method, but the measurement method is not limited to this.

[0093] (Formation of Laser Modified Area)

[0094] Next, refer to Figure 4 , the process of forming the laser modified part is described. Figure 4 1 is a cross-sectional view illustrating a step of forming a laser modified portion in the manufacturing method according to the first embodiment. Figure 4 In FIG. 6 , the dotted line represents the laser modified portion 65. Figure 4 As shown, the stacked structure 63 is irradiated with laser light from the first surface 20 side to form a laser modified portion 65. The laser modified portion 65 extends in a direction perpendicular to the glass substrate 60, for example, and can be formed at a desired position on substantially the entire surface of the glass substrate 60. In this case, the laser modified portion 65 can also be formed to reach the first adhesive layer 62 and the first support 61.

[0095] In this embodiment, by irradiating the glass substrate 60 with laser light while the first support 61 is overlapped, the process window of laser irradiation can be expanded, and the laser modified portion 65 can be formed at a desired position on the glass substrate 60 .

[0096] Here, when an adhesive layer composed of a resin is used as the first adhesive layer 62, cracks may sometimes be generated in the resin of the adhesive due to laser irradiation, and the adhesive resin may remain on the glass substrate 60 when the first support 61 is peeled off from the glass substrate 60. In the case where such an adhesive resin remains on the glass substrate 60, it may become a cause of a bad situation in the subsequent process of forming a through hole by etching with hydrofluoric acid. For example, it may cause the surface of the glass substrate 60 to be uneven. Therefore, compared with using a resin adhesive layer, it is preferred to use an interface containing hydroxyl (hydroxyl) to bond the glass substrate 60 and the first support 61.

[0097] in addition, Figure 5 It is a diagram for explaining the formation position of the laser modified portion in the manufacturing method according to the first embodiment. Figure 5 (a) is a plan view of the glass substrate 60 viewed from the positive direction of the Z axis. Figure 5 (b) is an example of enlarged view of a part of the glass substrate 60. Here, the singulation line 64 is indicated by a dot-dash line. The singulation line indicates the position where the separation groove is formed when the multilayer wiring substrate is separated from the glass substrate 60. In addition, the laser modified portion 65, which is the starting point of the through hole 11, is indicated by a black circle. The laser modified portion 65 is a portion where the through hole 11 or the separation groove is formed.

[0098] in addition, Figure 5 (c) is another example showing a part of a glass substrate in another example in an enlarged manner. As shown here, when forming the laser modified portion of the separation groove, a plurality of laser modified portions may be formed as the singulation line 64 by shifting the irradiation position of the laser.

[0099] (Formation of the First Wiring Layer)

[0100] Next, refer to Figure 6 , the formation process of the first wiring layer 21 is described. Figure 6 1 is a cross-sectional view for explaining the step of forming the first wiring layer in the manufacturing method according to the first embodiment. As shown here, the first wiring layer 21 including a conductive layer and an insulating layer is formed on the first surface 20 on the glass substrate 60 of the stacked structure 63 .

[0101] First, a seed layer including a hydrofluoric acid-resistant metal layer 15 is formed on a glass substrate 60. The hydrofluoric acid-resistant metal layer 15 on the glass substrate 60 is an alloy layer containing at least one of chromium or nickel, and is formed in a range of 10 nm to 1,000 nm by sputtering. Then, a conductive metal coating is formed on the hydrofluoric acid-resistant metal layer 15 with a desired thickness. The material of the conductive metal coating can be appropriately selected from, for example, Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO, IZO, AZO, ZnO, PZT, TiN, and Cu3N4.

[0102] The formation of the electrode connection portion (electrode) and the wiring is performed, for example, by a semi-additive (SAP) process. In the semi-additive process, a desired pattern is formed using a photoresist. A dry film resist is usually used, but a liquid resist may also be used. After the resist is exposed and developed to form the desired pattern, a plated film having a thickness of not less than 2 μm and not more than 20 μm is formed by electrolytic plating. The unnecessary resist pattern is stripped off, and the wiring 16 located between the through-electrode connection portion 41 and the laser modified portion 65 is formed by etching the seed layer, and the through-electrode connection portion 41 is located above the laser modified portion.

[0103] From the viewpoint of insulation and relative dielectric constant, at least one of aluminum oxide, silicon dioxide, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate is used to form the dielectric layer 14 on the through-electrode connection portion 41. The thickness of the dielectric layer 14 is preferably in the range of 10 nm to 5 μm. When the thickness of the dielectric layer 14 is less than 10 nm, the insulation cannot be maintained and the function as a capacitor cannot be exhibited. When the thickness of the dielectric layer 14 is more than 5 μm, not only does the film formation take too long and lack mass productivity, but the process of removing unnecessary parts also takes more time. The thickness of the dielectric layer 14 is more preferably in the range of 50 nm to 1 μm.

[0104] The capacitor electrode 13 is formed by dividing into a lower electrode layer and an upper electrode layer. As the lower electrode layer, from the viewpoint of adhesion and conductivity, at least one of Cu, Ni, Al, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu is used as a material. For example, Ti is excellent in adhesion, conductivity, ease of manufacturing, and cost.

[0105] A seed metal layer is formed on the upper electrode of the capacitor electrode 13, and an electrolytic plating layer is further formed. As the seed metal layer, for example, at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu can be applied. From the point of view of the ease of subsequent etching removal, copper is preferably used. The thickness of the seed metal layer is preferably in the range of 10 nm to 5 μm. When the thickness of the seed metal layer is less than 100 nm, poor current conduction may occur in the subsequent electrolytic plating process. When the thickness of the seed metal layer exceeds 5 μm, etching removal takes time. The thickness of the seed metal layer 113 is more preferably in the range of 100 nm to 500 nm.

[0106] After that, an electrolytic plating layer is formed as the upper electrode of the capacitor electrode 13. Electrolytic copper plating is simple and inexpensive, and has good conductivity. In addition to electrolytic copper plating, electrolytic nickel plating, electrolytic chromium plating, electrolytic Pd plating, electrolytic gold plating, electrolytic rhodium plating, electrolytic iridium plating, etc. can also be used. After forming the upper electrode, the seed metal layer is removed. Wet etching, dry etching, etc. can be appropriately set according to the purpose.

[0107] Regarding the formation of the capacitor electrode 13, in the previous manufacturing method of manufacturing a multilayer wiring substrate using a substrate with a through hole 11 formed in advance, since conductive materials cannot be deposited on the through hole, it is necessary to avoid the through hole to form a MIM structure. On the other hand, according to the manufacturing method involved in this embodiment, since the wiring formation process and the capacitor electrode formation process are performed before the through hole formation process, the capacitor electrode 13 can be formed near the through hole and above the through hole. In other words, it is not limited by the position of the through hole. For example, the capacitor electrode 13 can also be set directly above the through hole. As a result, the transmission distance to the capacitor can be shortened, and the reduction of the transmission characteristics can be avoided. In addition, by forming a lower electrode layer when forming the capacitor electrode 13, the deviation of the capacitor capacitance can be reduced.

[0108] Finally, the insulating resin layer 25 is formed. The insulating resin layer 25 is composed of a thermosetting resin, and its material is preferably the following material: containing at least one of epoxy resin, polyimide resin, and polyamide resin, and containing a filling material of SiO2, which is in liquid or film form. In the case of a liquid resin, the insulating layer can be formed by spin coating, and in the case of a film resin, a vacuum laminator can be used to heat and pressurize under vacuum to form the insulating layer. The material of the insulating resin layer 25 can be appropriately selected as needed. However, in the case of using a photosensitive insulating resin material, it becomes difficult to fill the filling material of SiO2 in order to ensure photolithography, so it is limited to non-photosensitive thermosetting resins.

[0109] (Adhesion of the Second Support)

[0110] Next, refer to Figure 7 , the bonding process of the second support is described. Figure 7 This is a cross-sectional view for explaining the bonding step of the second support in the manufacturing method according to the first embodiment. As shown here, the second adhesive layer 71 is formed on the first wiring layer 21 of the stacked structure 63 , and the second support 70 is bonded to the second adhesive layer 71 .

[0111] Regarding the second adhesive layer 71, as with the first adhesive layer 62, it can be appropriately selected from the following: a resin that can be peeled off by absorbing light such as UV light to generate heat, sublimate or denature; a resin that can be peeled off by foaming by heating; or a functional group that temporarily fixes the glass substrate 60 or the first support 61, but it is preferably formed from a material different from the first adhesive layer 62.

[0112] The second support 70 is preferably made of the same material as the glass substrate 60. When the glass substrate 60 is alkali-free glass, the first support 61 is also preferably alkali-free glass. The thickness of the second support can be appropriately set according to the thickness of the glass substrate 60. However, it is preferably a thickness that allows conveyance, which is within a range of 300 μm to 1,500 μm.

[0113] (Peeling off of the first support)

[0114] Next, refer to Figure 8 , the peeling process of the first support is described. Figure 8 This is a cross-sectional view for explaining the peeling step of the first support 61 in the manufacturing method according to the first embodiment. As shown here, the interface between the glass substrate 60 and the first adhesive layer 62 is peeled, and the first adhesive layer 62 and the first support 61 are separated from the glass substrate 60.

[0115] When the first support 61 is separated from the glass substrate 60 , a physical force is applied to the side surface of the first adhesive layer 62 to form a peeling start portion, and force is applied from the peeling start portion as a starting point, so that the interface of the first adhesive layer 62 can be peeled.

[0116] More specifically, the glass substrate 60 and the first support 61 can be separated by applying force in a direction to separate the first support 61 and the glass substrate at a portion where the side surface of the first adhesive layer 62 is scribed by a cutter or the like as a peeling start portion.

[0117] It should be noted that when the scribing process is performed while a force is applied to separate the first support 61 and the glass substrate, the peeling process can be smoothly performed. According to the material used for the first adhesive layer 62, a peeling method corresponding to the material used is appropriately selected from UV light irradiation, heat treatment, physical peeling, etc. In addition, when the glass substrate 60 generates residues of the first adhesive layer 62, plasma cleaning, ultrasonic cleaning, water cleaning, solvent cleaning using alcohol, etc. can also be performed.

[0118] (Through hole formation by etching)

[0119] Next, refer to 9A to 9F , the process of forming the through hole by etching is described. Fig. 9A It is a cross-sectional view for explaining the step of forming a through hole by etching in the manufacturing method according to the first embodiment. Fig. 9A The shape of the glass substrate 60 after hydrofluoric acid etching is shown. By hydrofluoric acid etching, the through hole 11 and the separation groove 17 described later are formed at the same time, and in the separation groove 17, a structure in which the insulating resin layer 25 is exposed is formed. As shown here, the laser modified portion 65 is selectively removed from the second surface 30 side of the glass substrate 60 by etching. The through hole 11 is thereby formed. Regarding etching, wet etching using an aqueous hydrogen fluoride solution is suitable. The etching amount of the aqueous hydrogen fluoride solution is appropriately set according to the thickness of the glass multilayer wiring substrate. For example, when the thickness T1 of the glass substrate 60 is 200μm, the etching amount is preferably in the range of 50μm to 175μm. It should be noted that the structure in which the insulating resin layer 25 is exposed is shown here, but the structure is not limited to this. In the case where the seed layer of the first wiring layer 21 containing the hydrofluoric acid-resistant metal layer 15 remains in the separation groove 17, the seed layer of the first wiring layer 21 remains in the singulation line portion.

[0120] It should be noted that, as the laser modified portion 65 is etched, the glass substrate 60 is also etched. The thickness T2 of the etched glass substrate 60 is preferably in the range of 25 μm to 150 μm. Here, in the conventional multilayer wiring substrate, the thickness of the core substrate is usually 300 μm to 400 μm. In the first embodiment, since a thin core substrate can be realized, the influence on the transmission characteristics can be suppressed.

[0121] Next, Fig. 9B It is a bottom view when the separation groove 17 is formed. Fig. 9C This is a diagram schematically showing a part of the bottom view of the separation tank in an enlarged manner. Fig. 9C It is shown Fig. 9B Figure 60S of the range. Fig.9D It is a diagram schematically showing the side surface of a separation tank. Fig.9D It is schematically shown viewed from the side Fig. 9B The range of 60S is shown in the figure. Fig.9D For example, it can be obtained by SEM (scanning electron microscope). Fig. 9C In the separation groove 17, along the processing pitch of the laser modified portion used to form the separation groove 17, a vertical ridge line is formed on the side of the glass substrate 60, which is visible by connecting the convex portions in the normal direction (z-axis direction) of the glass substrate. Fig.9D The solid lines shown in FIG. 1 show the ridges of the concave and convex parts, which are composed of the longitudinal ridges formed on the side of the glass substrate 60 and the transverse ridges substantially orthogonal to the longitudinal ridges. Therefore, a plurality of substantially rectangular concave parts are formed on the side of the glass substrate 60. Regarding the size of these rectangles, for example, when the laser modified part is processed at a pitch of 10 μm, Fig. 9C The spacing R1 of the ridge lines formed below the separation groove 17 shown in the figure is Fig.9D The interval R1 of the ridges formed on the side surface shown in the figure is less than 10 μm. According to the interval R1 of the ridges, the processing pitch of the laser modified part can be set arbitrarily. Fig. 9C The width of the concave-convex formed along the ridgeline on the separation groove 17 is also called the "ridgeline PV" (Peak to Valley). The PV value is about 10 μm or less. In addition, when the range is specified in more detail, the PV value of the longitudinal ridgeline and the transverse ridgeline can also be set to, for example, 1.8 μm or more and 10.6 μm or less.

[0122] The side surface of the core substrate has a plurality of roughly rectangular recesses formed by a plurality of longitudinal ridges and transverse ridges. As an example, the lateral dimension of the rectangle (in other words, the spacing between the longitudinal ridges) is greater than 5 μm and less than 20 μm, the longitudinal dimension (in other words, the spacing between the transverse ridges) is greater than 2 μm and less than 25 μm, and the depth of the plurality of recesses is greater than 0.5 μm and less than 11 μm.

[0123] The unevenness on the surface of the glass substrate 60 where the separation grooves 17 are formed is minute, and has the effect of improving the adhesion between the insulating resin layer 25 of the second wiring layer 22 described later and the glass substrate 60. Fig. 9A yes Fig. 9B AA section view in.

[0124] in addition, Fig.9E This is a diagram schematically showing an enlarged separation tank. Fig.9E yes Fig. 9B In the separation tank 17, as shown in FIG. Fig.9EAs shown, the relationship between the bottom processing width 17B and the opening width 17T of the opening (bottom processing width 17B / opening width 17T) can be formed within a range of 0.85 or more and 1.0 or less by changing the pitch interval and number of the laser modified parts. By processing the bottom processing width 17B of the separation groove 17 in the desired width range, the amount of the insulating resin layer formed in the inclined portion of the separation groove caused by the difference between the processing width 17B and the opening width 17T in the subsequent process can be adjusted, so it is easy to form the thickness of the insulating resin layer on the side of the glass substrate 60 after the multi-layer wiring substrate is singulated to a desired thickness.

[0125] Fig.9F This is a diagram schematically showing a part of the bottom view of the separation tank 17 in an enlarged manner. Fig.9F It is shown Fig. 9B FIG. 17E of the region 17E. At the bottom of the separation groove 17, after hydrofluoric acid etching, a transfer mark 65T of the laser modified portion is formed on the Cr, Cu, and insulating resin layers at the bottom, forming minute concavities and convexities. The concavities and convexities generate an anchoring effect when the wiring is subsequently formed and the insulating resin of the second wiring layer is formed, and the adhesion between the insulating resin layer 25 and the glass substrate 60 can be improved.

[0126] When the above description is applied to the glass core laminate structure, it is considered that a plurality of substantially rectangular recesses in which a plurality of longitudinal ridgelines and transverse ridgelines are visible are formed in at least a portion of the side surface of the glass core substrate 10 .

[0127] (Formation of the Second Wiring Layer)

[0128] Next, refer to Fig.10 , the formation process of the second wiring layer is described. Fig.10 1 is a cross-sectional view illustrating the formation process of the second wiring layer in the manufacturing method involved in the first embodiment. As shown here, the second wiring layer 22 composed of the through-electrode connecting portion 42 and the insulating resin layer 25 is formed on the second surface 30 of the glass substrate 60. In the formation of the through-electrode 12 and the through-electrode connecting portion 42, the seed layer for power supply is formed, the pattern is formed using the resist, and the plating treatment is performed in a manner to form a plating layer with a thickness of 2 μm or more and 20 μm or less. Then, the unnecessary resist pattern is peeled off, the seed layer is removed, and the through-electrode 12 and the through-electrode connecting portion 42 are formed. Finally, the insulating resin layer 25 is formed to form the second wiring layer 22. The insulating resin layer 25 is also filled in the through-electrode 12. It should be noted that in the example shown here, the insulating resin layer 25 formed in the first wiring layer 21 and the second wiring layer 22 is formed of the same material, but is not limited to this. The insulating resin layer can also be formed of different materials.

[0129] Since the second wiring layer 22 is not subjected to etching treatment using an aqueous hydrogen fluoride solution in a subsequent process, a material different from the hydrofluoric acid-resistant metal layer 15 can be used. In this case, a metal layer made of a material different from the hydrofluoric acid-resistant metal layer 15 is formed on the side of the through hole 11 to form a through-electrode connecting portion 42. Examples of the material different from the hydrofluoric acid-resistant metal layer 15 include Ti, Cu, and the like, and at least one metal layer made of these materials is formed on the side of the through hole 11 and on the second surface 30 of the glass substrate 60. The material, the number of layers, and the like are not limited to the disclosed contents of the embodiment and can be appropriately set as needed.

[0130] It should be noted that the portion of the through hole 11 that does not become the through electrode 12 becomes the separation groove 17. The separation groove 17 is also filled with an insulating resin layer 25. The through hole 11 filled with the insulating resin material can also be called a resin through hole. Fig.10 As shown, the resin through-hole includes a resin through-hole in which a conductive layer (metal layer) is formed and a resin through-hole in which a conductive layer is not formed.

[0131] (Peeling off of the second support)

[0132] Next, refer to Fig.11 and Fig.12 , the peeling process of the second support body 70 is described. Fig.11 1 is a diagram for explaining a peeling step of the second support 70 in the manufacturing method according to the first embodiment. Fig.12 1 is a diagram showing a state after the peeling step of the second support 70 is performed in the manufacturing method according to the embodiment of the present invention. Fig.11 As shown, the interface between the first wiring layer 21 and the second support 70 is peeled off to separate the second support 70 and the second adhesive layer 71. Fig.12 As shown, a glass substrate 60 is obtained in which the first wiring layer 21 is formed on the first surface 20 side of the glass substrate 60 and the second wiring layer 22 is formed on the second surface 30 side.

[0133] When separating the second support 70 from the second wiring layer 22, an appropriate peeling method corresponding to the material used can be selected from UV light irradiation, heat treatment, physical peeling, etc., depending on the material used for the second adhesive layer 71. In addition, when residues of the second adhesive layer 71 are generated on the bonding surface between the first wiring layer 21 and the second adhesive layer 71, plasma cleaning, ultrasonic cleaning, water cleaning, solvent cleaning using alcohol, etc. can also be performed.

[0134] (Formation of accumulation layer)

[0135] Next, refer to Fig.13Next, a process for forming a buildup layer, in other words, a layer formed by laminating the first wiring layer 21 and the second wiring layer 22 will be described. Fig.13 It is a diagram for explaining the step of forming a deposition layer in the manufacturing method according to the first embodiment.

[0136] like Fig.13 As shown, a conducting electrode 31 for conducting the first wiring layer on the first surface 20 side and a conducting electrode 32 for conducting the second wiring layer on the second surface side are formed on the first wiring layer 21 on the first surface 20 side and the second wiring layer 22 on the second surface 30 side of the glass substrate 60. The conducting electrodes 31 and 32 are formed by forming a via in the insulating resin layer 25 by laser, forming a seed layer on the via, and then using a semi-additive method (i.e., a series of processes including resist pattern formation, plating treatment, resist stripping, seed layer removal, and insulating resin layer formation).

[0137] It should be noted that the first wiring layer 21 and the second wiring layer 22 are stacked by at least one layer, and the number of layers can be set appropriately as needed. Fig.13 In the embodiment, the first wiring layer 21 and the second wiring layer 22 are stacked in two layers.

[0138] The laser used to form the conduction electrodes 31 and 32 may be different from the laser used to form the laser modified portion 65. For example, a pulsed laser such as a carbon dioxide laser or a UV-YAG laser is preferably used, and a laser having a pulse width of μs order is suitable.

[0139] (Formation of connection pads)

[0140] Next, refer to Fig.14 , the formation of the connection pad is described. Fig.14 1 is a diagram for explaining the formation process of the connection pad in the manufacturing method according to the first embodiment. As shown here, after forming an outer protective film such as a solder resist 55 on the first wiring layer 21 and the second wiring layer 22, a semiconductor element bonding pad 51 is formed on the first wiring layer 21, and a substrate bonding pad 53 is formed on the second wiring layer 22. The semiconductor element bonding pad 51 and the substrate bonding pad 53 are subjected to surface treatment such as Ni / Au, Ni / Pd / Au, IT, OSP (water-soluble pre-flux), and a semiconductor element bonding solder 52 and a substrate bonding solder 54 are formed as needed to complete a multilayer wiring substrate. It should be noted that Ni / Au refers to the use of both Ni and Au, and Ni / Pd / Au refers to the use of three of Ni, Pd, and Au.

[0141] (Single chip)

[0142] Next, refer to Fig.15 , the monolithization of a multilayer wiring substrate is described. Fig.15 FIG. 1 is a cross-sectional view illustrating a singulation step in the manufacturing method according to the first embodiment. Fig.15 As shown, singulation is performed along singulation lines formed by laser and hydrofluoric acid etching. Fig.15 In FIG. 1 , a case where blade dicing using a blade 72 is assumed is shown, but in addition to blade dicing, laser, scribing, etc. may be used. In addition, blade dicing, laser, and scribing may be combined to perform singulation.

[0143] (Flowchart of the manufacturing method according to the first embodiment)

[0144] The steps described above are summarized in a flow chart. Fig.16 It is a diagram showing a flow chart of the manufacturing method according to the first embodiment.

[0145] Step S1 is a step of bonding the first support. The first support is bonded to the mother substrate. In the first embodiment, an example of using a bonding layer containing a hydroxyl group is described.

[0146] Step S2 is a step of forming a laser modified layer. Laser is irradiated from the surface opposite to the surface bonded to the first support. The laser modified portion becomes the starting point of the through hole and the separation groove.

[0147] Step S3 is a step of forming a first wiring layer. Electrodes, wirings, capacitors, inductors, and the like can be formed in the first wiring layer.

[0148] Step S4 is a step of bonding the second support body. The second support body is bonded to the first wiring layer.

[0149] Step S5 is a step of peeling off the first support body, in which the mother substrate and the first support body are separated from the adhesive layer.

[0150] Step S6 is a step of forming a through hole by etching. The portion where the modified portion is removed becomes the through hole 11 or the separation groove 17.

[0151] Step S7 is a step of forming the second wiring layer. Through electrodes are formed in the through holes of the base substrate, and electrodes and wirings are formed that are electrically connected to the through electrodes.

[0152] Step S8 is a step of peeling off the second support body, in which the second support body is separated from the mother substrate.

[0153] Step S9 is a step of forming a buildup layer, in which electrodes and wirings are formed on the first wiring layer and the second wiring layer.

[0154] Step S10 is a step of forming a connection pad. After forming a protective film on the first wiring layer and the second wiring layer, the connection pad is formed.

[0155] Step S11 is a singulation step in which the mother substrate is diced or the like to separate the multilayer wiring substrates.

[0156] It should be noted that, when the above description is applied to a method for manufacturing a glass core laminated structure, the method for manufacturing a glass core laminated structure includes:

[0157] A first step (step S1) of attaching a support (first support 61) to the second surface 30 of the glass core substrate 10;

[0158] A second step (step S2) of irradiating the separation groove forming region (singulation line 64) of the glass core substrate 10 with laser light from the first surface 20 side to form the laser modified portion 65;

[0159] A third step of forming a laminate on the first surface 20 of the glass core substrate 10 (step S3);

[0160] A fourth step of peeling the support from the glass core substrate 10 (step S5);

[0161] A fifth step (step S6) of etching the second surface 30 side of the glass core substrate 10 to remove the laser modified portion and form the separation groove 17;

[0162] A sixth step (step S7 ) of forming a laminated body below the second surface 30 of the glass core substrate 10 and filling the separation groove 17 ; and

[0163] The seventh step is to cut the region of the separation groove 17 (step S11).

[0164] In addition, in the method for producing a glass core laminate structure,

[0165] The material covering the side surface of the glass core laminated structure is an insulating resin material having insulating properties. The layer containing the insulating resin material laminated in the third step is referred to as the first insulating resin layer, and the layer containing the insulating resin material laminated in the sixth step is referred to as the second insulating resin layer.

[0166] The second step is to irradiate the separation groove forming region (singulation line 64) and the through hole forming region of the glass core substrate 10 with laser light from the first surface 20 side to form the laser modified portion 65.

[0167] The third step includes forming a first conductive layer on the first surface 20 of the glass core substrate 10.

[0168] The fifth step is a step including removing the laser modified portion 65 from the second surface 30 side of the glass core substrate 10 by etching, forming a separation groove 17 and a through hole 11 at the same time, and forming a second conductive layer above the second surface 30 of the glass core substrate 10 and on the inner surface of the through hole 11.

[0169] In addition, in the method for producing a glass core laminate structure,

[0170] The third step further includes the following steps:

[0171] forming a resin through hole in the first insulating layer;

[0172] forming a conductive layer on the first insulating layer and in the resin through hole;

[0173] forming an insulating resin layer on the conductive layer,

[0174] The method further includes repeating a series of steps of forming the resin through-hole, forming the conductive layer, and forming the insulating resin layer a desired number of times.

[0175] In addition, in the method for producing a glass core laminate structure,

[0176] In the third step, a capacitor lower electrode is formed on a portion of the first conductive layer, a dielectric layer is formed so as to cover the upper surface or the entirety of the capacitor lower electrode, and a capacitor upper electrode is stacked on the dielectric layer, thereby forming a capacitor.

[0177] and / or

[0178] In the sixth step, a capacitor lower electrode is formed on a portion of the second conductive layer, a dielectric layer is formed to cover the upper surface or the entirety of the capacitor lower electrode, and a capacitor upper electrode is stacked on the dielectric layer, thereby forming a capacitor.

[0179] <First Modification>

[0180] Next, refer to Figures 17 to 19 A production method as a first modification example will be described.

[0181] The first modification example is different from the first embodiment in that the step of forming the laser modified portion is performed after the step of forming the first wiring layer.

[0182] In the following description, the same reference numerals are used for the same or equivalent components as those in the first embodiment described above, and the description thereof will be simplified or omitted.

[0183] Fig.171 is a cross-sectional view illustrating the step of forming the first wiring layer in the manufacturing method according to the first variant. In the first variant, after the bonding step of the first support, the first wiring layer 21 is formed on the glass substrate 60 of the stacked structure 63. At this time, after forming a seed layer including a hydrofluoric acid-resistant metal layer 15 on the glass substrate 60, a through-electrode connection portion 41 and wiring 16 are formed by a semi-additive (SAP) method, and after removing the unnecessary seed layer, an insulating resin layer 25 is formed.

[0184] It should be noted that the materials and film forming methods of the hydrofluoric acid-resistant metal layer and the through-electrode connecting portion are the same as those in the first embodiment.

[0185] (Formation of Laser Modified Area)

[0186] Next, refer to Fig.18 , the process of forming the laser modified portion in the first variant is described. Fig.18 1 is a cross-sectional view for explaining the step of forming a laser modified portion in the manufacturing method according to the first modification. As shown here, the laser is irradiated from the surface of the first support 61 to the stacked structure 63 to form the laser modified portion 65.

[0187] In this step, the laser modified portion is also formed along the singulation line of the multilayer wiring substrate 1 , and therefore the same shape as the side surface shape of the multilayer wiring substrate 1 described in the first embodiment can be obtained.

[0188] (Steps after bonding of the second support)

[0189] Fig.19 1 is a diagram showing a flow chart of the manufacturing method according to the first modification. In the first modification, the manufacturing method is the same as that of the first embodiment except for the first wiring layer forming step (step S12) and the laser modified portion forming step (step S13).

[0190] <Second Modification>

[0191] Next, refer to Figure 20 to Figure 22 , a manufacturing method as a second variant is described.

[0192] The second modification example is different from the first embodiment in that a laser modification step is performed after the step of bonding the second support.

[0193] In the following description, the same reference numerals are used for the same or equivalent components as those in the first embodiment and the first modification described above, and the description thereof will be simplified or omitted.

[0194] (Adherence of First Support and Formation of First Wiring Layer)

[0195] In the manufacturing method according to the second modification, the first step of bonding the first support and the first wiring layer are the same as those of the first embodiment, and thus description thereof will be omitted.

[0196] (Adhesion of the Second Support)

[0197] Next, refer to Fig. 20 , the bonding process of the second support body in the second variant is described. Fig. 20 2 is a cross-sectional view for explaining a bonding step of a second support in a manufacturing method according to a second modification. In the second modification, as shown here, a second adhesive layer 71 and a second support 70 are formed on the first wiring layer 21 of a stacked structure 63.

[0198] (Formation of Laser Modified Area)

[0199] Fig.21 1 is a cross-sectional view for explaining the step of forming a laser modified portion in the manufacturing method according to the second modification. As shown here, the laser modified portion 65 is formed by irradiating the stacked structure 63 with laser light from the first support 61 side.

[0200] In this step, the laser modified portion is also formed along the singulation line of the multilayer wiring substrate 1 , so that the same shape as the side surface shape of the multilayer wiring substrate 1 described in the first embodiment can be obtained.

[0201] (Steps after peeling off the first support)

[0202] Fig. 22 2 is a diagram showing a flow chart of a manufacturing method according to a second modification. The second modification is the same as the manufacturing method according to the first embodiment except that the order of the laser modified portion forming step (step S22) is different.

[0203] <Function and Effect>

[0204] According to the first embodiment, the first variant, and the second variant of the present invention, damage to the core substrate can be avoided by protecting the glass core laminated structure and the side of the core substrate of the wiring substrate. The following uses examples and comparative examples to explain the details. It should be noted that each of the embodiments shown below is an example of an embodiment of the present invention, and the present invention is not limited to these embodiments.

[0205] <Examples and Comparative Examples of the First Embodiment, First and Second Modifications>

[0206] For the embodiment and comparative example, the mounting process was carried out in a manner classified into whether there was an insulating resin on the side of the core substrate 10 of the multilayer wiring substrate, and a temperature cycle test was performed. Table 1 shows the manufacturing conditions, repetition rate of through holes, and interval of ridge lines of the embodiment and comparative example. In embodiments 1 to 3, the processing pitch of the laser modified portion was changed so that the repetition rate of the through holes 11 of the glass substrate 60 formed by hydrofluoric acid etching was 40, 65, and 90%. The processing shown here Fig.23 1 is a diagram illustrating the repetition rate of the laser modified portion 65 and the through hole 11. Fig.23 As shown, the repetition rate indicates the ratio of overlap between through-hole 11 and adjacent through-hole 11 when through-hole 11 is formed by hydrofluoric acid etching in laser modified portion 65. An increase in the repetition rate indicates a high ratio of overlap between through-hole 11 and adjacent through-hole. Fig.23 (1) is a diagram showing a case where there are two laser modified areas. Fig.23 (2) is a diagram showing a case where a plurality of laser modified portions are formed to form separation grooves. Fig.23 As shown in (1), in the separation groove 17, the through hole 11a is formed for the laser modified portion 65a, and the through hole 11b is formed for the laser modified portion 65b. The overlapping area between the through hole 11a and the through hole 11b is DR. The repetition rate is the size of the overlapping area DR relative to the size of the through hole 11a or the size of the through hole 11b. Fig.23 As shown in (2), by forming a plurality of laser modified portions 65 and through holes 11, separation grooves 17 are formed.

[0207] In Comparative Example 1, the processing spacing of the laser modified portion in the separation groove 17 is set to a value larger than that of Examples 1 to 3, so that the repetition rate of the through hole 11 of the glass substrate 60 formed by hydrofluoric acid etching is 30%. In Comparative Example 2, a multilayer wiring substrate is manufactured without forming a separation groove, and a cutting process is performed after the manufacturing to perform singulation. Table 1 shows each embodiment and comparative example. Here, the interval between the ridges represents the ridges generated in the vertical direction relative to the first surface 20 and the second surface 30 of the glass substrate 60. It can be seen that as the repetition rate decreases, the interval between the ridges becomes wider.

[0208] [Table 1]

[0209]

[0210] Next, Table 2 is used to illustrate the upper opening diameter, bottom opening diameter, and PV of the dividing groove of each embodiment and comparative example. It should be noted that in Table 2, the processing is performed in a manner in which the upper opening diameter of the dividing groove is 300um. As shown in Table 2, it can be seen that as the repetition rate and the interval between the ridges become wider, the average opening width of the bottom becomes smaller, and the deviation (standard deviation) σ becomes larger. In addition, it is confirmed that as the repetition rate and the interval between the ridges become wider, the PV of the ridges becomes larger, and the side of the separation groove becomes rougher. According to the above content, it is taught that by setting the repetition rate and the interval between the ridges to be wider, the side of the separation groove becomes rougher, and the smoothness of the side of the separation groove is reduced.

[0211] [Table 2]

[0212]

[0213] Next, Table 3 shows the results of the temperature cycle test. As shown in Table 3, in Comparative Example 1, the temperature cycle test was qualified until 500 cycles, but failed after 600 cycles. In Comparative Example 2, the temperature cycle test failed after 50 cycles. In the case of failure, it was confirmed that there were undesirable conditions such as micro cracks. In addition, in Examples 1, 2, and 3, the temperature cycle test was qualified even if it was performed for 1000 cycles. In Comparative Example 1, a separation groove is formed in the same manner as in Examples 1 to 3, but as shown in Table 2, the PV of the ridgeline is large. Therefore, for example, in the case of singulation by cutting along the dividing groove, the cutting blade partially contacts the glass substrate 60, and grinding marks, i.e., micro cracks, are generated on the glass substrate 60, so that it can be considered that the temperature cycle test has failed.

[0214] In addition, the cutting process along the dividing groove, the temperature cycle test conditions, and the evaluation method are as follows.

[0215] <Cutting>

[0216] Use blade: R07-SD600-BB200-75 54×0.15A2×40

[0217] Device used: DAD322

[0218] <Temperature cycle test>

[0219] Test conditions: One cycle was defined as a change from -55°C to RT (room temperature) and then to 125°C. After maintaining each temperature for 30 minutes, the cycle was repeated up to 1000 times.

[0220] Observation method: Observe the side of the substrate using a metal microscope at ×100 or ×500 to evaluate whether the glass substrate is damaged.

[0221] [Table 3]

[0222]

[0223] <Application Examples>

[0224] Next, the application examples of the embodiments of the present invention are described using Table 4. In Table 4, when the number of singulation lines and the interval between singulation lines of the separation grooves of Example 3 are set to 1, the ratio of the number of singulation lines is set to 0.89, 1.11, and 1.22. In addition, the opening of the separation grooves at this time, the processing width of the bottom, and the PV of the ridge are shown. It should be noted that the repetition rate uses the same value as in Example 3. As can be seen from Table 4, by setting the modified line ratio high, the processing width of the bottom is increased, and the processing width / opening width of the bottom can be set high. Regarding Application Examples 1 to 3, the opening width and the processing width of the bottom are increased to more than Examples 1 to 3, and even if the temperature cycle test is performed after singulation, the same temperature cycle test as in Examples 1 to 3 can be performed without problems. It is believed that this is because the effect of improving the adhesion between the insulating resin layer 25 of the second wiring layer 22 and the glass substrate 60 is produced.

[0225] [Table 4]

[0226]

[0227] According to the above embodiments and application examples, it is preferred that the repetition rate is in the range of greater than 40% and less than 90%, the resin thickness on the side of the core substrate is greater than 52.8 μm, the processing width / opening width at the bottom is greater than 0.88, and the PV of the ridge line is greater than 1.8 μm and less than 10.6 μm.

[0228] <Second Embodiment>

[0229] The second embodiment is different from the first embodiment in that an inductor is formed in the first wiring layer.

[0230] Fig.24 2 is a cross-sectional view showing a multilayer wiring board 100 according to the second embodiment. In the following description, the same or equivalent components as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0231] The first wiring layer 121 is composed of three wiring layers, and the second wiring layer 122 is also composed of three wiring layers. Fig.24 (b) is located in Fig.24(a) is a perspective view of a circuit element of a portion cl surrounded by a dashed line. As shown here, an LC resonant circuit is formed by connecting at least one of the capacitors and at least one of the inductors. Specifically, adjacent conductive electrodes 31 are connected via through-electrode connecting portions 41 and wiring 16 to form a coil as a whole. The coil is connected to the capacitor electrode 13, for example, to exhibit characteristics as an LC circuit.

[0232] As a manufacturing method, in the step of forming the first wiring layer, the arrangement of the through-electrode connection portion 41 and the wiring 16 is set so as to form an inductor.

[0233] <Function and Effect>

[0234] By protecting the side surfaces of the core substrate 10 with the insulating resin, high reliability can be obtained. Furthermore, since the inductor is provided on the multilayer wiring substrate 100, the wiring distance can be shortened and good transmission characteristics can be obtained.

[0235] <Other methods>

[0236] The present disclosure also includes the following aspects.

[0237] (Method 1)

[0238] A multilayer wiring substrate, comprising: a core substrate having a first surface and a second surface opposite to the first surface; a first wiring layer formed on the first surface; and a second wiring layer formed on the second surface, characterized in that:

[0239] At least the side surfaces of the core substrate are covered with insulating resin.

[0240] (Method 2)

[0241] The multilayer wiring substrate according to embodiment 1 is characterized in that

[0242] The core substrate

[0243] having a through hole extending from the first surface to the second surface,

[0244] A through electrode is formed, which allows electrical conduction between the first surface and the second surface through the through hole,

[0245] A first conductive portion connected to the through-electrode is disposed on the first wiring layer, and a second conductive portion connected to the through-electrode is disposed on the second wiring layer. The first conductive portion and the second conductive portion are electrically connected to each other via the through-electrode.

[0246] (Method 3)

[0247] The multilayer wiring substrate according to aspect 1 or 2, characterized in that

[0248] The first wiring layer and the second wiring layer include insulating resin layers,

[0249] The insulating resin is the same kind of insulating resin as the insulating resin constituting the insulating resin layer.

[0250] (Method 4)

[0251] The multilayer wiring substrate according to any one of aspects 1 to 3, characterized in that:

[0252] The insulating resin covering the side surface of the core substrate has a thickness of 50 μm or more.

[0253] The thickness of the core substrate is within the range of 50 μm to 150 μm.

[0254] The insulating resin has a relative dielectric constant in a range of 3.1 to 3.5, and a dielectric loss tangent in a range of 0.002 to 0.012.

[0255] (Method 5)

[0256] The multilayer wiring substrate according to any one of aspects 1 to 4, characterized in that:

[0257] The side surface of the core substrate has a plurality of substantially rectangular recesses formed by a plurality of longitudinal ridgelines and transverse ridgelines, wherein the lateral dimension of the rectangle is 5 μm to 20 μm, and the longitudinal dimension is 2 μm to 25 μm.

[0258] (Method 6)

[0259] The multilayer wiring substrate according to any one of aspects 1 to 5, characterized in that:

[0260] The PV of the ridgeline is not less than 1.8 μm and not more than 10.6 μm.

[0261] (Method 7)

[0262] The multilayer wiring substrate according to any one of aspects 1 to 6, characterized in that:

[0263] The depth of the plurality of recesses is not less than 0.5 μm and not more than 11 μm.

[0264] (Method 8)

[0265] The multilayer wiring substrate according to any one of aspects 1 to 7, wherein:

[0266] The thickness of the resin on the side surface of the core substrate is 52.8 μm or less.

[0267] (Method 9)

[0268] A method for manufacturing a multilayer wiring substrate, which is a method for manufacturing a multilayer wiring substrate using a mother substrate having a first surface and a second surface opposite to the first surface, comprising:

[0269] A first step, wherein a support is bonded to the second surface of the mother substrate between the first surface and the second surface;

[0270] A second step, wherein a laser is irradiated from the first surface side of the mother substrate to a position where a through hole is formed penetrating from the first surface to the second surface, i.e., a through hole position, and a singulation line position indicating a position of a separation groove for separating a multilayer wiring substrate from the mother substrate, to form a modified portion;

[0271] A third step of forming a first conductive portion on the first surface side and depositing a resin member to form a first wiring layer;

[0272] A fourth step, wherein the support is peeled off from the mother substrate;

[0273] A fifth step, wherein the modified portion is removed from the second surface side by etching to form the through hole and the separation groove;

[0274] a sixth step, wherein a conductive member is introduced into the through hole from the second surface side to form a through electrode that electrically connects the first conductive portion to the second surface;

[0275] a seventh step of depositing an insulating resin of the same kind as that of the resin member on the second surface to form a second wiring layer on the second surface; and

[0276] The eighth step is to separate the multilayer wiring substrate into pieces along the separation grooves.

[0277] (Method 10)

[0278] The method for manufacturing a multilayer wiring substrate according to Embodiment 9 is characterized in that:

[0279] The side surfaces of the singulated multilayer wiring substrate are covered with the insulating resin.

[0280] (Method 11)

[0281] The method for manufacturing a multilayer wiring substrate according to aspect 9 or 10 is characterized in that:

[0282] In the fifth step, the etching is performed so that the thickness of the mother substrate is within a range of 50 μm to 150 μm.

[0283] The thickness of the insulating resin covering the side surface of the multilayer wiring substrate is 50 μm or more.

[0284] The insulating resin has a relative dielectric constant in a range of 3.1 to 3.5, and a dielectric loss tangent in a range of 0.002 to 0.012.

[0285] (Method 12)

[0286] The method for manufacturing a multilayer wiring substrate according to any one of aspects 9 to 11, characterized in that:

[0287] In the second step, a repetition rate of the through holes in the separation grooves is 40% to 90%.

[0288] (Method 13)

[0289] The method for manufacturing a multilayer wiring substrate according to any one of aspects 9 to 12, characterized in that:

[0290] In the second step, a ratio of a processed width of the bottom of the through hole in the separation groove to an opening width is 0.88 or more.

[0291] (Method 14)

[0292] A mother substrate has a first surface and a second surface and includes a plurality of multilayer wiring substrates, characterized in that it has:

[0293] a first wiring layer formed on the first surface;

[0294] a second wiring layer formed on the second surface, and

[0295] a separation groove for singulating the plurality of multilayer wiring substrates,

[0296] The separation groove is filled with an insulating resin.

[0297] The scope of the present invention is not limited to the exemplary embodiments described in the drawings, but includes various modifications. For example, the above-mentioned embodiments are described in detail to explain the present invention in an easy-to-understand manner, and are not necessarily limited to having all the described configurations.

[0298] In addition, a part of the configuration of a certain embodiment may be replaced with the configuration of another embodiment, and a configuration of another embodiment may be added to a configuration of a certain embodiment. In addition, other configurations may be added, deleted, or replaced with a part of the configuration of each embodiment.

[0299] Furthermore, all embodiments having the same effects as the purpose of the present invention are also included.

[0300] For example, the present disclosure shows that the laser modified portion is formed after the first support is bonded to the glass substrate, and then the first support is peeled off, but it is not limited to this. For example, the laser modified portion may be formed without using the first support, and the laser modified portion may be etched to a desired thickness in the through hole forming step.

[0301] Explanation of symbols

[0302] 1; 100: multilayer wiring substrate, 10: core substrate, 11: through hole, 12: through electrode, 13: capacitor electrode, 14: dielectric layer, 15: hydrofluoric acid resistant metal layer, 16: wiring, 17: separation groove, 17T: opening width of separation groove, 17B: processing width of bottom of separation groove, 21; 121: first wiring layer, 22; 122: second wiring layer, 25: insulating resin layer, 31; 32: conductive electrode, 41; 42 : Through-electrode connecting portion, 51: Joining pad for semiconductor element, 52: Joining solder for semiconductor element, 53: Joining pad for substrate, 54: Joining solder for substrate, 55: Solder resist, 60: Glass substrate, 61: First support, 62: First adhesive layer, 63: Laminated structure, 65; 65a; 65b: Laser modified portion, 65T: Transfer mark of laser modified portion, 70: Second support, 71: Second adhesive layer, 72: Blade.

Claims

1. A glass core laminate structure comprising: A glass core substrate having a first surface and a second surface opposite to the first surface; and A laminate comprising layers formed of a material different from that of the glass core substrate above the first surface and below the second surface, characterized in that: The side surface of the glass core laminate structure is covered with a material that is the same as one of the materials constituting the laminate, A plurality of substantially rectangular recessed portions are formed in at least a portion of the side surface of the glass core substrate so that a plurality of vertical ridge lines and horizontal ridge lines can be visually recognized.

2. The glass core laminate structure according to claim 1, characterized in that: The interval between the longitudinal ridges of the plurality of recesses is 5 μm or more and 20 μm or less. The interval between the horizontal ridge lines is not less than 2 μm and not more than 25 μm.

3. The glass core laminate structure according to claim 1, characterized in that: The PV values ​​of the longitudinal ridgeline and the transverse ridgeline are 1.8 μm or more and 10.6 μm or less.

4. The glass core laminate structure according to claim 1, characterized in that: The depth of the plurality of recesses is not less than 0.5 μm and not more than 11 μm.

5. The glass core laminate structure according to any one of claims 1 to 4, characterized in that: The glass core substrate has a plurality of through holes penetrating from the first surface to the second surface. Some or all of the plurality of through holes are through electrodes formed by laminating a conductor layer on the inner wall thereof, The glass core substrate has a first wiring layer including a conductor on the first surface. A second wiring layer including a conductor is provided on the second surface. The first wiring layer and the second wiring layer are electrically connected to each other through the through-electrode.

6. The glass core laminate structure according to claim 5, characterized in that: A first insulating resin layer is stacked on the first wiring layer. A second insulating resin layer is stacked on the second wiring layer. The through electrode is filled with insulating resin extending from the first insulating resin layer or the second insulating resin layer. The side surface of the glass core stacked structure is covered with the insulating resin extending from the first insulating resin layer or the second insulating resin layer.

7. The glass core laminate structure according to claim 6, characterized in that: A wiring layer and an insulating layer are alternately stacked on the first insulating resin layer in a single or multiple layers. A wiring layer and an insulating layer are alternately stacked on the second insulating resin layer in a single or multiple layers. The through-electrodes provided inside the insulating layers stacked a plurality of times provide electrical conduction between upper and lower wiring layers.

8. The glass core laminate structure according to claim 7, characterized in that: Using a portion of the wiring layer as a lower electrode, A dielectric layer is stacked on the wiring layer so as to cover a part or the whole of the upper surface of the lower electrode. An upper electrode is arranged on the dielectric layer so as to cover a part or all of the dielectric layer and a part or all of the lower electrode in a plan view and to be non-conductive with the lower electrode, thereby forming a capacitor. The dielectric layer and the upper electrode are arranged within the range of the insulating layer in the thickness direction, and the insulating layer is arranged between the conductive layer including the lower electrode and the conductive layer directly thereover.

9. The glass core laminate structure according to claim 8, characterized in that: By connecting a portion of the wiring layer, or connecting a part of the wiring of the wiring layer and the through-electrode, Thus, an inductor is formed.

10. The glass core laminate structure according to claim 9, characterized in that: By connecting at least one of the capacitors and at least one of the inductors, an LC resonance circuit is formed.

11. A method for manufacturing a glass core laminated structure, which is a method for manufacturing the glass core laminated structure according to claim 1, comprising: A first step, wherein a support is attached to the second surface of the glass core substrate; A second step of irradiating the separation groove formation region of the glass core substrate with laser light from the first surface side to form a laser modified portion; A third step, wherein the laminate is formed on the first surface of the glass core substrate; A fourth step, wherein the support is peeled off from the glass core substrate; A fifth step of removing the laser modified portion by etching the second surface side of the glass core substrate to form a separation groove; a sixth step of forming the laminated body below the second surface of the glass core substrate to fill the separation groove; and The seventh step is to cut the region of the separation groove.

12. The method for producing a glass core laminate structure according to claim 11, wherein: The material covering the side surface of the glass core laminated structure is an insulating resin material having insulating properties, the layer containing the insulating resin material laminated in the third step is referred to as the first insulating resin layer, and the layer containing the insulating resin material laminated in the sixth step is referred to as the second insulating resin layer. The second step is a step of irradiating the separation groove forming region and the through hole forming region of the glass core substrate with laser light from the first surface side to form a laser modified portion. The third step includes forming a first conductive layer on the first surface of the glass core substrate. The fifth step includes removing the laser modified portion from the second surface of the glass core substrate by etching, forming a separation groove and a through hole, and forming a second conductive layer above the second surface of the glass core substrate and inside the through hole.

13. The method for producing a glass core laminate structure according to claim 12, wherein: The third step further comprises the following steps: forming a resin through hole in the first insulating layer; forming a conductive layer on the first insulating layer and in the resin through hole; forming an insulating resin layer on the conductive layer, The method further includes repeating a series of steps of forming the resin through-hole, forming the conductive layer, and forming the insulating resin layer a desired number of times.

14. The method for producing a glass core laminate structure according to claim 13, wherein: In the third step, a capacitor lower electrode is formed on a portion of the first conductive layer, a dielectric layer is formed so as to cover the upper surface or the entirety of the capacitor lower electrode, and a capacitor upper electrode is stacked on the dielectric layer to form a capacitor. and / or In the sixth step, a capacitor lower electrode is formed on a portion of the second conductive layer, a dielectric layer is formed to cover the upper surface or the entirety of the capacitor lower electrode, and a capacitor upper electrode is stacked on the dielectric layer, thereby forming a capacitor.

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