Angle resolving system based on CORDIC instruction

By designing an angle solution system based on CORDIC instructions in an embedded microprocessor, the real-time and efficiency problems when calculating the arctangent function are solved, and the trigonometric function operation support on the RISC-V architecture is realized, which improves the computing efficiency and resource utilization.

CN119556988AActive Publication Date: 2025-03-04NORTH CHINA ELECTRIC POWER UNIV
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Patent Information

Application Number
CN202411762239.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-03
Publication Date
2025-03-04
Estimated Expiration
2044-12-03

AI Technical Summary

Technical Problem

Existing embedded microprocessors find it difficult to meet real-time requirements when calculating arctangent functions, and traditional processors require multiple instructions to calculate, resulting in a long time.

Method used

An angle solution system based on CORDIC instructions is designed, including an IFU instruction fetch unit and an EXU execution unit. By extending the CORDIC operation instruction set and designing the corresponding hardware pipeline structure, efficient calculation of the arctangent function is realized.

Benefits of technology

It realizes the support of trigonometric function operations on the RISC-V architecture, reduces the number of instructions and calculation time, improves the utilization of hardware resources, and expands the output range of angle solutions.

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Abstract

The invention belongs to the technical field of computers, and relates to an angle resolving system based on a CORDIC instruction. The system comprises an IFU instruction fetching unit and an EXU execution unit. The IFU instruction fetching unit reads the CORDIC instruction in the instruction memory according to the address of the PC in the instruction fetching stage; the EXU execution unit comprises a decoding module, an arithmetic logic unit, a loading storage unit and a write-back unit. According to the method, a CORDIC angle solution instruction set is expanded based on an RISC-V architecture, a complete assembly line hardware structure is designed, and trigonometric function operation is supported; a complete CORDIC operation path hardware circuit structure is provided, different operation processes multiplex the same operation path, and the utilization rate of hardware resources is increased; the limitation of calculation result range convergence during angle calculation based on a CORDIC algorithm is overcome, the calculation time is shortened by pre-storing a special angle result, and the circuit working frequency is optimized.
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Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular, relates to an angle solving system based on CORDIC instructions. Background Art

[0002] In the fields of scientific computing, digital signal processing, servo control and image processing, the inverse tangent operation is one of the commonly used basic operations. At present, most processors do not support trigonometric function operations. When calculating trigonometric operations such as the inverse tangent function, general embedded microprocessors usually call software. However, it is difficult to meet the real-time requirements of embedded microprocessors by calculating the inverse tangent function and performing angle calculations by calling software. The inverse tangent angle calculation by general-purpose processors generally uses the basic processor instruction set, which often requires dozens of instructions to realize the function calculation and takes a long time to calculate. Designing an inverse tangent angle calculation module separately will increase the hardware overhead. In order to take into account the calculation time, resource consumption and working frequency of the inverse tangent function calculation, it is considered a better solution to expand the angle calculation instruction set in the general-purpose processor and design the corresponding hardware control circuit to realize the inverse tangent function operation. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides an angle solving system based on CORDIC instructions, including an IFU instruction fetching unit and an EXU execution unit;

[0004] The IFU instruction fetch unit reads the CORDIC instruction in the instruction memory according to the address of the PC during the instruction fetch stage;

[0005] The EXU execution unit includes a decoding module, an arithmetic logic unit, a load storage unit and a write back unit; during the execution phase, the EXU execution unit decodes the CORDIC instruction through the decoding module, decodes the CORDIC instruction into the corresponding operand, passes the decoded operand to the arithmetic logic unit, and reads the operand from the load storage unit; after the arithmetic logic unit finishes executing, the write back unit writes the result back to the register stack;

[0006] an arithmetic logic unit, comprising an ALU logic operator unit, a CORDIC operator unit and an operation data path module; the CORDIC operator unit initiates a shared operation request to the operation data path module according to the CORDIC angle solution instruction, and retrieves the operation result from the operation path module; the operation data path module accepts the request of the ALU logic operator module and the CORDIC operator unit and performs calculation, and returns the calculation result to the corresponding ALU logic operator module and the CORDIC operator unit after the calculation is completed;

[0007] The CORDIC operator unit includes a quadrant and special angle discrimination module, a CORDIC algorithm serial iteration module and an angle compensation module; the quadrant and special angle discrimination module performs quadrant pre-judgment on the coordinate value corresponding to the input source operand and discriminates the angle. When the angle is a preset angle value, it outputs a preset angle solution value, otherwise it enters the CORDIC algorithm serial iteration module, and after the operation is completed, the angle value is output through the angle compensation module.

[0008] Based on the above technical solution, the present invention can also be improved as follows.

[0009] Furthermore, the CORDIC instruction has a total of 32 bits, bits 25-31 are the func7 field, the content is 0000010, which is defined as the CORDIC instruction set; bits 20-24 of the instruction are the second source operand index; bits 15-19 of the instruction are the first source operand index; bits 12-14 of the instruction are the func3 field, which is the inverse tangent operation instruction; bits 7-11 of the instruction are the result operand index; bits 0-6 of the instruction are the opcode code.

[0010] Furthermore, the ALU logic operation subunit and the CORDIC operation subunit share an operation data path during the process of executing instructions and performing operations; the ALU logic operation subunit initiates an operation request to the shared operation path according to the ALU instruction, and retrieves the operation result from the shared operation path; the CORDIC operation subunit initiates a shared operation request to the operation data path according to the CORDIC angle solution instruction, and retrieves the operation result from the operation data path; the operation data path accepts the requests of the ALU logic operation submodule and the CORDIC operation subunit, and performs the operation process at the same time, and after the calculation is completed, returns the calculation result to the operation data path of the corresponding subunit.

[0011] Furthermore, the operation value includes the operand register index, write-back register index and operand required to execute the CORDIC instruction.

[0012] Furthermore, a dispatch module is provided between the decoding module and the operation data path; the CORDIC angle resolution long instruction is first dispatched to the ALU logic operation subunit, and delivered through the interface between the ALU logic operation subunit and the delivery module, and at the same time, the CORDIC angle resolution long instruction is dispatched to the CORDIC operation subunit through the ALU logic operation subunit according to the corresponding indication signal obtained by decoding.

[0013] Furthermore, the dispatch module is provided with a FIFO module. When a CORDIC angle solution long instruction is dispatched, a table entry is allocated in the FIFO module to store the source operand register index and the result register index of the CORDIC angle solution long instruction. After the CORDIC angle solution long instruction is written back, the information in the table entry is withdrawn from the cache of the FIFO module. When subsequent CORDIC angle solution long instructions are dispatched, the source operand register index and the result register index of the CORDIC angle solution long instruction are compared with each table entry in the FIFO module respectively to determine whether the CORDIC angle solution long instruction has RAW and WAW correlation with the CORDIC angle solution long instruction that has been dispatched but not yet written back.

[0014] Furthermore, the CORDIC operator unit receives the initial source operand and the source operand in the initial state, and initializes the angle value of the first round of iteration; when receiving the cordic_i_valid signal, it enters the CORDIC angle solution instruction execution state, and cordic_sta_is_exec is valid; when receiving the exec_last_cycle signal, the last round of calculation of the CORDIC angle solution instruction is completed: the angle calculation iteration process is exited, and the cordic_sta_is_done signal is valid; after the operation is completed, the cordic_o_valid signal and the final solved 32-bit angle value are output; when the CORDIC operator unit receives commands such as initialization and refresh, it does not take any action and the state is idle.

[0015] Furthermore, the CORDIC operation subunits reuse and share operation data paths, including:

[0016] The CORDIC operator unit transmits to the operation data path X values ​​and Y values ​​to represent the cordic operation input value, and Z value to represent the cordic operation output value during each round of iterative operation. X and Y are both coordinate information, and Z is the output angle value obtained according to the input angle information. The CORDIC operator unit controls the start, progress and end of iterative calculation by outputting control signals. The control signals include addition operation signals, subtraction operation signals and shift signals. The operation data path receives the control signals and uses the adder, subtractor and shift register inside the operation path to perform operations. The output of each round of iterative operation is fed back as the input of the CORDIC operator unit until the final result is derived.

[0017] Furthermore, the CORDIC operator unit includes an angle compensation unit and an angle determination unit; the angle compensation unit widens the CORDIC angle output range to (0, 2π) through interval conversion, and at the same time, the CORDIC angle is determined by the angle determination unit, and when the CORDIC angle belongs to the set angle, the corresponding function value is directly output.

[0018] The beneficial effects of the present invention are:

[0019] (1) The present invention is based on the RISC-V architecture. According to the instruction encoding rules of the RISC-V architecture, the CORDIC angle calculation instruction set is expanded and the corresponding pipeline hardware structure is designed. The original RISC-V instruction set uses a fixed 47 instructions RV32I as the core, which is a basic integer instruction, among which the R-type instruction set is an arithmetic operation instruction, including a basic instruction set (funct7 field is 0000000) and a multiplication instruction set (funct7 field is 0000001). This design expands the CORDIC operation instruction set (funct7 field is 0000010) based on the original instruction set, and has a complete hardware pipeline structure including the instruction fetch stage and the execution stage, so that the RISC-V architecture supports trigonometric function operations;

[0020] (2) The present invention has designed a complete CORDIC operation path hardware circuit structure. When the CORDIC operation instruction is received from the IFU instruction register, the decoding module decodes it according to the instruction encoding rules of the RISC-V architecture to generate CORDIC operation instruction type information and operand register index. After the CORDIC operation instruction is decoded and the operand is read from the register group, it is dispatched to the ALU module for execution. The special feature of this design in the instruction execution process compared with the traditional execution method is that the CORDIC instruction is first dispatched to the ALU, delivered through the interface between the ALU and the delivery module, and at the same time, the instruction is dispatched to the CORDIC operation subunit through the ALU according to the corresponding indication signal obtained by decoding. During the dispatch process, the source operand register index and the result register index of the CORDIC long instruction are written into the FIFO structure, thereby solving the problem of data correlation. All function operations, including angle calculations performed using the CORDIC algorithm, will pass through the same core computing unit, which includes a data path module that is actually used for calculations, and a state machine that specifically controls the execution of calculations in the CORDIC computing subunit. Their actual computing processes share the actual computing data path, which means that different computing processes reuse the same set of computing paths, thereby improving hardware resource utilization.

[0021] (3) The hardware circuit structure of the traditional CORDIC algorithm is optimized to overcome the limitation of the convergence range of calculation results when solving angles based on the CORDIC algorithm. The hardware circuit solution of the CORDIC inverse tangent function is optimized to widen the output angle range to the entire quadrant. The calculation time is reduced by pre-storing special angle results, thereby optimizing the circuit operating frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of an angle calculation system based on CORDIC instructions provided in an embodiment of the present invention;

[0023] Figure 2 It is the CORDIC operation instruction format table;

[0024] Figure 3 This is the structural block diagram of the ALU arithmetic logic unit;

[0025] Figure 4 This is the principle block diagram of the angle solution system based on CORDIC instructions;

[0026] Figure 5 This is the schematic diagram of the state machine jump process of the CORDIC operation module;

[0027] Figure 6 It is the timing diagram of CORDIC operation subunit;

[0028] Figure 7 This is a simulation diagram of the changes in key signals when the angle resolution instruction is executed. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0030] Example 1

[0031] As an example, Figure 1 As shown, in order to solve the above technical problems, this embodiment provides an angle solving system based on CORDIC (Coordinated Rotation Digital Computer) instructions, including an IFU instruction fetch unit (Instruction Fetch Unit) and an EXU execution unit;

[0032] The IFU instruction fetch unit reads the CORDIC instruction in the instruction memory according to the address of the PC during the instruction fetch stage;

[0033] The EXU execution unit (Execution Unit) includes a decoding module, an arithmetic logic unit, a load storage unit, and a write-back unit. During the execution phase, the EXU execution unit decodes the CORDIC instruction through the decoding module, decodes the CORDIC instruction into the corresponding operand, passes the decoded operand to the arithmetic logic unit, and reads the operand from the load storage unit. After the execution of the arithmetic logic unit, the write-back unit writes the result back to the register stack.

[0034] an arithmetic logic unit, comprising an ALU logic operator unit, a CORDIC operator unit and an operation data path module; the CORDIC operator unit initiates a shared operation request to the operation data path module according to the CORDIC angle solution instruction, and retrieves the operation result from the operation path module; the operation data path module accepts the request of the ALU logic operator module and the CORDIC operator unit and performs calculation, and returns the calculation result to the corresponding ALU logic operator module and the CORDIC operator unit after the calculation is completed;

[0035] The CORDIC operator unit includes a quadrant and special angle discrimination module, a CORDIC algorithm serial iteration module and an angle compensation module; the quadrant and special angle discrimination module performs quadrant pre-judgment on the coordinate value corresponding to the input source operand and discriminates the angle. When the angle is a preset angle value, it outputs a preset angle solution value, otherwise it enters the CORDIC algorithm serial iteration module, and after the operation is completed, the angle value is output through the angle compensation module.

[0036] The EXU execution unit maintains the resource conflicts and data conflicts of the pipeline during the execution phase.

[0037] The decoding module decodes according to the instruction encoding rules of the RISC-V architecture, and generates CORDIC instruction type information and operand register index. The decoding module receives the 32-bit CORDIC angle solution instruction from the IFU decoding module, as well as the PC value corresponding to the CORDIC angle solution instruction, and obtains the register index value of the source operand 1 of the CORDIC angle solution instruction and the register index value of the instruction source operand 2. By comparing the register index in the register stack, the source operand 1 and source operand 2 that need to be read in the corresponding register are obtained. Source operand 1 is the X-coordinate value of the input number required for the CORDIC angle solution operation, and source operand 2 is the Y-coordinate value of the input number required for the CORDIC angle solution operation. At the same time, a control signal for writing the result operand is generated after the CORDIC instruction calculation is completed.

[0038] The present invention proposes a hardware pipeline structure of a CORDIC algorithm instruction processor based on a RISC-V architecture. The complete pipeline structure includes: a two-stage pipeline structure, including an IFU instruction fetch unit and an EXU execution unit. In the instruction fetch stage, the CORDIC instruction in the instruction memory is read according to the address of the PC; in the execution stage, the CORDIC instruction is first decoded and the operand is read from the register stack; after entering the operation stage, the operand enters the corresponding functional module according to the decoding result, and the EXU execution unit includes a decoding module, an ALU logic operation submodule, a load storage unit and a write back unit; all arithmetic operations in the ALU logic operation submodule reuse arithmetic logic resources, and after the execution stage ends, the result will be written back to the register stack.

[0039] After fetching the instruction, the IFU instruction fetch unit places the instruction in the instruction register between the EXU execution unit; the PC value of the instruction is also placed in the PC register, and the instruction and PC will be used for further operations during subsequent execution.

[0040] During the execution phase, the decoding module decodes the designed CORDIC instruction into the corresponding operation value, including the operand register index, write-back register index and operand required by the CORDIC instruction, and passes the above information to the EXU execution unit; the EXU execution unit mainly includes the arithmetic logic unit ALU and the CORDIC operation unit.

[0041] The decoding module decodes according to the instruction encoding rules of the RISC-V architecture, and generates CORDIC instruction type information and operand register index. In the actual application process, the decoding module receives the 32-bit CORDIC angle calculation instruction from the IFU, as well as the PC value corresponding to the instruction, and obtains the register index value of the source operand 1 of the instruction and the register index value of the source operand 2 of the instruction. By comparing the register index in the register stack, the source operand 1 and source operand 2 that need to be read inside the corresponding register are obtained. Source operand 1 is the X coordinate value of the input number required for the CORDIC angle calculation operation, and source operand 2 is the Y coordinate value of the input number required for the CORDIC angle calculation operation. At the same time, the control signal for writing the result operand is generated after the CORDIC instruction calculation is completed.

[0042] Optionally, the CORDIC instruction has a total of 32 bits, bits 25-31 are the func7 field, the content is 0000010, defined as the CORDIC instruction set; bits 20-24 of the instruction are the second source operand index; bits 15-19 of the instruction are the first source operand index; bits 12-14 of the instruction are the func3 field, which is the inverse tangent operation instruction; bits 7-11 of the instruction are the result operand index; bits 0-6 of the instruction are the opcode code.

[0043] The designed CORDIC instruction has a total of 32 bits, the 31st:25th bits are the func7 field (Function7, indicating the function code field, that is, the first seven bits of the 32-bit RISC-V architecture instruction), and the corresponding field content is 0000010, which is defined as the CORDIC instruction set; the 24th:20th bits of the instruction are the source operand 2 index; the 19th:15th bits of the instruction are the source operand 1 index; the 14th:12th bits of the instruction are the func3 field, and the corresponding field content is 111, indicating that the instruction is included in the CORDIC instruction set and is an inverse tangent operation instruction; the 11th:7th bits of the instruction are the result operand index; the 6th:0th bits of the instruction are the opcode code, and the corresponding field content is 0110011, indicating that the CORDIC angle solution instruction type is an arithmetic instruction.

[0044] Let rs represent the source register, rs1 and rs2 are general registers of the RISC-V instruction system. The CORDIC instruction format is shown in Table 1.

[0045] Table 1 CORDIC instruction examples

[0046]

[0047]

[0048] The information bus required by the CORDIC operation unit is generated according to the designed CORDIC instruction, including the following contents: grouping information indicating that the current instruction belongs to the CORDIC instruction set, information indicating that the current instruction is a 32-bit instruction, and information indicating that the current instruction is an inverse tangent angle solution instruction belonging to the CORDIC instruction set.

[0049] In actual application, the custom CORDIC angle calculation instruction belongs to arithmetic instructions, which are classified into the R-type instruction set in RISC-V (opcode is 0110011), as shown in the attached figure. Figure 2 As shown in the CORDIC operation instruction format, since the input source operands cordic_i_rs1 and cordic_i_rs2 are both signed complements, the quadrant of the input coordinate value is predicted by judging cordic_i_rs1

[31] and cordic_i_rs2

[31] . The coordinates of the remaining quadrants except the first quadrant are added separately. π, Angle compensation, normalized to the first quadrant angle for calculation. The original R-type instruction set includes the basic instruction set (funct7 is 0000000) and the multiplication instruction set (funct7 is 0000001). The newly added CORDIC operation instruction set funct7 is defined as 0000010, and funct3 is defined as 111. Since the calculation of the inverse tangent function requires the input of two coordinate values ​​(x and y), it is defined as a double operand instruction and a register-register instruction. The operand needs to be read from the register and the result is written back to the register after the instruction is executed.

[0050] The present invention proposes an angle solving system based on RISC-V architecture and CORDIC algorithm, which realizes the angle solving of inverse tangent function through one instruction, solves the problems of large number of instructions and long calculation time required for angle solving using basic processor instruction set, and fills the gap that the current RISC-V architecture instruction set does not support trigonometric function operations; at the same time, the corresponding processor hardware circuit is designed, and the traditional CORDIC circuit structure is optimized, and the consumption of hardware resources is reduced by reusing the calculation path, thereby expanding the output range of the angle solving.

[0051] The CORDIC algorithm is widely used in the engineering field. The algorithm can realize complex operations such as trigonometric functions only through simple shift and addition and subtraction recursive operations. Therefore, this algorithm is widely used in the design of inverse tangent function digital circuits. The present invention designs a hardware system of a serial iterative CORDIC algorithm, which is controlled by an extended angle solution instruction and realizes the angle solution calculation through one instruction.

[0052] RISC-V is an instruction set architecture (ISA) based on the principle of Reduced Instruction Set Computer (RISC). Its advantages lie in openness and flexibility. As an open standard, it can run on a variety of different architectures. The flexibility of RISC-V enables it to meet the needs of different applications. Users can customize the instruction set to handle specific tasks such as encryption, multimedia processing, and artificial intelligence. In addition, RISC-V also has the advantages of scalability and portability. Since ISA is modular, users can add extended instruction sets as needed to handle different tasks, making it very suitable for application in various embedded systems. At the same time, the design of RISC-V makes it easy to port on different platforms because the ISA design is simple and transparent, following unified specifications and interface standards, thereby improving the interoperability between software and hardware.

[0053] RISC-V architecture microprocessors have been increasingly widely used in the industry. The architecture reserves a large amount of instruction encoding space that is easy to implement and apply, so it is increasingly used in academic and industrial fields. In resource-constrained RISC-V architecture embedded microprocessors, fast and low-power calculations of a large number of trigonometric functions can be completed by designing corresponding trigonometric function operation circuits. Since the RISC-V architecture has just been launched, trigonometric function operations have not yet been expanded based on the architecture. Therefore, designing the corresponding RISC-V architecture trigonometric function operation instruction set and the corresponding hardware control circuit is of great practical significance for further expanding the application field.

[0054] Optionally, the ALU logic operation subunit and the CORDIC operation subunit share an operation data path during the process of executing instructions and performing operations; the ALU logic operation subunit initiates an operation request for the shared operation path according to the ALU instruction, and retrieves the operation result from the shared operation path; the CORDIC operation subunit initiates a shared operation request for the operation data path according to the CORDIC angle solution instruction, and retrieves the operation result from the operation data path; the operation data path accepts the requests of the ALU logic operation submodule and the CORDIC operation subunit, and performs the operation process at the same time, and after the calculation is completed, returns the calculation result to the operation data path of the corresponding subunit.

[0055] As attached Figure 3 As shown in the ALU arithmetic logic unit structure block diagram, if the current CORDIC operation subunit has no resource conflict, it will send out a cordic_i_ready signal. When it receives a valid cordic_i_valid signal, the handshake signal cordic_i_hsked signal is valid, and the CORDIC operation subunit starts to work, initiates an operation request to the shared operation data path, and retrieves the operation result from the shared operation path; the operation data path module is the data path module that is actually used for calculation. After the calculation is completed, the calculation result is returned to the operation data path of the corresponding subunit.

[0056] Optionally, the operation value includes an operand register index, a write-back register index, and an operand required to execute the CORDIC instruction.

[0057] Optionally, a dispatch module is provided between the decoding module and the operation data path; the CORDIC angle resolution long instruction is first dispatched to the ALU logic operation subunit, and delivered through the interface between the ALU logic operation subunit and the delivery module, and at the same time, the CORDIC angle resolution long instruction is dispatched to the CORDIC operation subunit via the ALU logic operation subunit according to the corresponding indication signal obtained by decoding.

[0058] The angle resolution system is a two-stage pipeline structure. After the CORDIC angle resolution instruction is decoded, the operand is read from the register group and then dispatched to the CORDIC operation unit for execution. The dispatch mechanism of the dispatch process is that the CORDIC instruction needs to be dispatched to the ALU module, delivered through the interface between the ALU and the delivery module, and the ALU performs the actual dispatch, dispatching the decoded information to the CORDIC operation unit according to the CORDIC instruction indication signal generated by the decoding.

[0059] Instructions solve resource conflicts and data conflicts in the pipeline during dispatch. If the currently executed instruction is a long-cycle instruction and the same operation unit is required for subsequent execution, a resource conflict occurs. The CORDIC angle calculation instruction is dispatched by the ALU to the CORDIC operation subunit for execution. At this time, the cor_op signal (cor_op signal indicates that the instruction is a cordic angle calculation instruction signal) is high, and the cor_i_ready signal (cor_i_ready signal is a handshake signal in the cordic module indicating that it is ready to receive data) is selected. If the current CORDIC submodule has not completed the previous operation and a resource conflict occurs, the cor_i_ready signal is low, which makes the i_ready signal in the upstream dispatch module (i_ready is low, indicating that the dispatch module is not ready to receive data, and i_ready is high, indicating that the dispatch module is ready to receive data) low, then the current instruction cannot be dispatched, and it is necessary to wait until the cor_i_ready signal is high. After the previous operation is completed, the resource conflict is resolved, thereby solving the problem of resource conflict.

[0060] Optionally, the dispatch module is provided with a FIFO module. When a CORDIC angle solution long instruction is dispatched, a table entry is allocated in the FIFO module to store the source operand register index and the result register index of the CORDIC angle solution long instruction. After the CORDIC angle solution long instruction is written back, the information in the table entry is withdrawn from the cache of the FIFO module. When subsequent CORDIC angle solution long instructions are dispatched, the source operand register index and the result register index of the CORDIC angle solution long instruction are compared with each table entry in the FIFO module respectively to determine whether the CORDIC angle solution long instruction has RAW (Read After Write) and WAW (Write After Write) correlation with the CORDIC angle solution long instruction that has been dispatched but not yet written back.

[0061] Since the CORDIC angle calculation instruction is a multi-cycle execution long instruction, it may have RAW and WAW correlations with other instructions during execution, resulting in data conflicts. By adding a FIFO module, when a CORDIC angle calculation long instruction is dispatched, a table entry will be allocated in the FIFO to store the source operand register index and result register index of the instruction. After the instruction is written back, the information in the table entry will be removed from the FIFO cache. When the subsequent instructions are dispatched, the source operand register index and result register index of the instruction will be compared with each table entry in the FIFO to determine whether RAW and WAW correlations are generated with the CORDIC angle calculation long instruction that has been dispatched but not yet written back.

[0062] Optionally, the CORDIC operation subunit receives the initial source operand and the source operand in the initial state, and initializes the angle value of the first round of iteration; when receiving the cordic_i_valid signal (the data valid signal sent to the cordic operation module), it enters the CORDIC angle solution instruction execution state, and cordic_sta_is_exec (the cordic module starts to execute the operation signal) is valid; when receiving the exec_last_cycle signal (the indication signal for the cordic operation to perform the last iterative operation), the last round of calculation of the CORDIC angle solution instruction is completed: the angle calculation iteration process is exited, and the cordic_sta_is_done (cordic iteration process end signal) signal is valid; after the operation is completed, the cordic_o_valid signal and the last solved 32-bit angle value are output; when the CORDIC operation subunit receives the initialization and refresh commands, it does not take any action and the state is idle.

[0063] The ALU (Arithmetic Logic Unit) logic operation subunit initiates an operation request to the shared operation path according to the ALU instructions (such as add instruction, sub instruction and xor instruction, etc., the add instruction is used to perform addition operation, the function of sub instruction is to perform subtraction operation, and the function of xor instruction is to perform exclusive OR operation), and retrieves the operation result from the shared operation path; similarly, the CORDIC operation subunit initiates an operation request to the shared operation data path according to the CORDIC angle solution instruction, and retrieves the operation result from the shared operation path; the operation data path module is the data path module that is truly used for calculation. The function of the operation data path is relatively simple. It accepts the requests of the ALU logic operation submodule and the CORDIC operation subunit, and performs the specific operation process at the same time. After the calculation is completed, the calculation result is returned to the operation data path of the corresponding subunit. In summary, the ALU logic operation subunit and the CORDIC operation subunit are only responsible for the execution control of specific instructions. Their actual operation process shares the actual operation data path, which greatly reduces the area overhead required for CORDIC operation and reduces the hardware resource consumption of the overall design.

[0064] The specific implementation of the CORDIC operator unit is as follows: First, as shown in the attached Figure 4As shown, if there is no resource conflict in the current CORDIC operator unit, a cordic_i_ready signal (a handshake signal indicating that the CORDIC operation module is ready to receive data) is issued. When a valid cordic_i_valid signal is received, the handshake signal cordic_i_hsked signal is valid, and the CORDIC operator unit starts to work; after the instruction is dispatched, the CORDIC operator unit receives the source operand information obtained by decoding the CORDIC angle solution instruction designed above; after reset, the CORDIC operator unit is in the initial state, cordic_sta_is_0th (the first iteration start signal of the CORDIC algorithm) is valid, and in this state, the initial source operand 1, that is, the assignment of the X coordinate value and the initial source operand 2, that is, the assignment of the Y coordinate value are received, and the angle value Z value of the first iteration is initialized to 0. When the cordic_i_valid signal (data valid signal sent to the cordic operation module) is received, the CORDIC angle solution instruction execution state is entered, cordic_sta_is_exec (cordic module starts to execute the operation signal) is valid, and waits for the next state signal; when the exec_last_cycle signal (indication signal for the last iteration of the cordic operation) is received, the last round of calculation of the CORDIC angle solution instruction is completed: the angle calculation iteration process is exited, and the cordic_sta_is_done signal (cordic iteration process end signal) is valid. After the above steps, the CORDIC operation subunit sends information to the EXU execution unit, including the cordic_o_valid signal (cordic module output valid signal) and the cordic_o_wbck_wdat signal (cordic module writes back data value), where the cordic_o_wbck_wdat signal is the last solved 32-bit angle value. When other commands, including initialization, refresh and other commands, are received, no action is taken, and the state of the CORDIC operation subunit is IDLE, that is, idle state.

[0065] The traditional CORDIC calculation of inverse tangent angle solution only converges to the output angle range The CORDIC operator unit in the present invention improves on this limitation by expanding the angle range of the algorithm to (0, 2π) through interval conversion, while supporting signed number coordinate input.

[0066] In particular, when the input coordinate value enters the CORDIC circuit, it first passes through a special angle to determine whether it belongs to a special angle such as 0, π, And 2π. The function values ​​of special angles are stored in advance. When encountering these angles, the corresponding angle solution values ​​are directly output, thereby shortening the multiple iteration cycles of the traditional CORDIC circuit to 3 cycles, which can accelerate the execution speed of instructions. In summary, the optimization processing makes the hardware structure better applicable to engineering practice. When the input data is not a special angle, it will enter the iteration module. CORDIC calculation serial structure is as follows Figure 5 As shown, the output of each iteration module is sent back to the iteration module as input in the next clock cycle. The CORDIC iteration module contains 3 addition and subtraction units and 2 shift units, all of which use multiplexing of data paths to reduce resource consumption. Register 1 is a data register that stores the X value during the iteration process, Y_reg is a data register that stores the Y value during the iteration process, adder 1 is an adder that calculates the X result during the iteration process, adder 2 is an adder that calculates the Y result during the iteration process, and adder 3 is an adder that calculates the Z result during the iteration process; register 2 is a data register that stores the Z value during the iteration process; the adder calculates the Z result during the iteration process; the symbol judgment controller: the operation number is controlled according to the size of the Y value. If Y<0, the Y value is calculated as an addition operation in the next iteration process. If Y≥0, the Y value is calculated as a subtraction operation in the next iteration process. Shifter 1 is the shift parameter of the X value; shifter 2 is the shift parameter of the Y value.

[0067] The specific implementation of the CORDIC operation subunit and operation data path execution process is as follows:

[0068] The core of the CORDIC operator unit is the process of the state machine performing angle solution operation iteration in the cordic_sta_is_exec state. In this state, the CORDIC operator unit mainly outputs source operand 1, i.e., the signed coordinate value X, and source operand 2, i.e., the signed coordinate value Y, to the operation data path, and controls the entire angle solution iteration process. In each round of iteration, the operation data path receives the corresponding coordinate value X, coordinate value Y, and angle value Z, and performs corresponding addition, subtraction, and shift operations on each channel. After completing a round of iteration, the calculated value is output to the CORDIC operator unit as the operation value of the new round of iteration.

[0069] The specific operation process for each operand in each round of iteration is as follows:

[0070] For the coordinate value X, the current coordinate value X is output as the minuend to the output operation path, i is set as the number of iterations, the current coordinate value Y is multiplied by the rotation direction d and then multiplied by 2 i The difference value obtained after the subtraction operation is output to the operation path as the subtrahend, and is output to the CORDIC operation subunit as the X value of the new iteration for the next iteration;

[0071] For the coordinate value Y, the current coordinate value Y is output as the summand to the output operation path, and the current coordinate value X is multiplied by the rotation direction d and then multiplied by 2 i The sum is output to the operation path as an addend, and the sum obtained after the addition operation is performed by the operation path is output to the CORDIC operation subunit as the Y value of the new round of iteration for the next round of iteration;

[0072] For the angle value Z, the current angle value Z is output as the minuend to the output operation path, and the rotation direction d is multiplied by θ i The subtrahend is output to the operation path, and the difference obtained after the subtraction operation is output to the CORDIC operation subunit as the Z value of the new iteration for the next iteration. The rotation direction d is determined by the current coordinate value Y. When the Y value is less than or equal to 0, d takes the value of +1, and when the Y value is greater than or equal to 0, d takes the value of -1. The i value in the above operation process is the count value of the i-th iteration, and the θ value is the rotation angle value of the i-th iteration operation pre-stored in the ROM. When the iteration reaches the Y value infinitely close to 0, the angle solution iteration process ends.

[0073] Optionally, the CORDIC operation subunits multiplex and share operation data paths, including:

[0074] The CORDIC operator unit transmits to the operation data path X values ​​and Y values ​​to represent the cordic operation input value, and Z value to represent the cordic operation output value during each round of iterative operation. X and Y are both coordinate information, and Z is the output angle value obtained according to the input angle information. The CORDIC operator unit controls the start, progress and end of iterative calculation by outputting control signals. The control signals include addition operation signals, subtraction operation signals and shift signals. The operation data path receives the control signals and uses the adder, subtractor and shift register inside the operation path to perform operations. The output of each round of iterative operation is fed back as the input of the CORDIC operator unit until the final result is derived.

[0075] Optionally, the CORDIC operator unit includes an angle compensation unit and an angle determination unit; the angle compensation unit widens the CORDIC angle output range to (0, 2π) by interval conversion, and at the same time, the CORDIC angle is determined by the angle determination unit, and when the CORDIC angle belongs to the set angle, the corresponding function value is directly output.

[0076] As attached Figure 6 The CORDIC operation subunit timing diagram is shown in the figure. Figure 7The simulation diagram of the changes of key signals when the angle calculation instruction is executed is shown in the figure. clk represents the clock signal. The timing of the CORDIC operation subunit is: the cordic_i_valid signal is pulled high, cordic_i_rs1 and cordic_i_rs2 represent the input of the source register, and cordic_o_wbck_wdat[31:0] represents the result of the input to the destination register. The angle calculation of the conventional angle is 16 clock cycles; the module has a special angle value lookup table, so the calculation of the special angle value only takes 3 clock cycles, which can improve the average speed of the angle calculation instruction inside the processor pipeline.

[0077] Based on the present invention, a complete hardware angle solution system is completed, a test platform is built according to the complete system, the RISC-V GNU tool chain is downloaded to complete the establishment of the instruction compilation environment, the CORDIC angle solution instruction input is completed by writing assembly code, and the C language inline assembly is used to implement the call of the instruction to obtain the CORDIC angle solution calculation result.

[0078] The present invention expands CORDIC operation instructions based on the RISC-V architecture and designs a corresponding processor hardware circuit system, which has the following characteristics:

[0079] (1) When designing the CORDIC operation instructions of the RISC-V architecture, the instruction encoding rules of the RISC-V architecture are followed. First, according to the instruction encoding rules of the RISC-V architecture, the CORDIC operation instructions are encoded into 32-bit executable EXU instructions. In the EXU execution unit, the instructions are decoded according to the instruction encoding rules of the RISC-V architecture to generate CORDIC instruction type information and operand register index. Next, according to the decoded instruction information, the CORDIC operator unit is controlled to perform the operation;

[0080] (2) This design has a complete pipeline structure, including decoding and dispatching of CORDIC instructions, reading the general register group through the decoded operand register index, maintaining the data dependency of the instruction through the FIFO structure, the complete CORDIC instruction delivery process, and finally writing the angle solution operation result of the instruction back to the general register group;

[0081] (3) The ALU arithmetic logic unit includes an ALU logic operation subunit, a CORDIC operation subunit, and an operation data path. The CORDIC operation subunit initiates an operation request to the shared operation data path according to the CORDIC angle solution instruction, and retrieves the operation result from the shared operation path; the operation data path module is the data path module that is actually used for calculation, accepts requests from the ALU logic operation submodule and the CORDIC operation subunit, and performs specific calculation processes at the same time. After the calculation is completed, the calculation result is returned to the operation data path of the corresponding subunit. The CORDIC operation subunit specifically controls the state machine for the execution of the operation. Their actual operation process shares the actual operation data path, thereby reducing the area overhead required for CORDIC calculations and reducing the hardware resource consumption of the overall design;

[0082] (4) Compared with the traditional CORDIC algorithm hardware circuit, the CORDIC operator unit hardware circuit in the present invention expands the angle range of the algorithm to (0, 2π) through interval conversion, and supports the coordinate input method of signed numbers. In particular, the CORDIC operation circuit is designed with a special angle discrimination function, and the function values ​​of special angles are pre-stored in advance. When these angles are encountered, the corresponding function values ​​are directly output, thereby shortening the multiple iteration cycles of the traditional CORDIC circuit to 3 cycles, which can accelerate the execution speed of instructions.

[0083] The advantages of the present invention compared with the prior art are:

[0084] (1) The present invention is based on the RISC-V architecture. According to the instruction encoding rules of the RISC-V architecture, the CORDIC angle calculation instruction set is expanded and the corresponding pipeline hardware structure is designed. The original RISC-V instruction set uses a fixed 47 instructions RV32I as the core, which is a basic integer instruction, among which the R-type instruction set is an arithmetic operation instruction, including a basic instruction set (funct7 field is 0000000) and a multiplication instruction set (funct7 field is 0000001). This design expands the CORDIC operation instruction set (funct7 field is 0000010) based on the original instruction set, and has a complete hardware pipeline structure including the instruction fetch stage and the execution stage, so that the RISC-V architecture supports trigonometric function operations;

[0085] (2) The present invention has designed a complete CORDIC operation path hardware circuit structure. When the CORDIC operation instruction is received from the IFU instruction register, the decoding module decodes it according to the instruction encoding rules of the RISC-V architecture to generate CORDIC operation instruction type information and operand register index. After the CORDIC operation instruction is decoded and the operand is read from the register group, it is dispatched to the ALU module for execution. The special feature of this design in the instruction execution process compared with the traditional execution method is that the CORDIC instruction is first dispatched to the ALU, delivered through the interface between the ALU and the delivery module, and at the same time, the instruction is dispatched to the CORDIC operation subunit through the ALU according to the corresponding indication signal obtained by decoding. During the dispatch process, the source operand register index and the result register index of the CORDIC long instruction are written into the FIFO structure, thereby solving the problem of data correlation. All function operations, including angle calculations performed using the CORDIC algorithm, will pass through the same core computing unit, which includes a data path module that is actually used for calculations, and a state machine that specifically controls the execution of calculations in the CORDIC computing subunit. Their actual computing processes share the actual computing data path, which means that different computing processes reuse the same set of computing paths, thereby improving hardware resource utilization.

[0086] (3) The hardware circuit structure of the traditional CORDIC algorithm is optimized to overcome the limitation of the convergence range of calculation results when solving angles based on the CORDIC algorithm. The hardware circuit solution of the CORDIC inverse tangent function is optimized to widen the output angle range to the entire quadrant. The calculation time is reduced by pre-storing special angle results, thereby optimizing the circuit operating frequency.

[0087] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. Angle calculation system based on CORDIC instruction, characterized in that: Includes IFU instruction fetch unit and EXU execution unit; The IFU instruction fetch unit reads the CORDIC instruction in the instruction memory according to the address of the PC during the instruction fetch stage; The EXU execution unit includes a decoding module, an arithmetic logic unit, a load storage unit and a write back unit; during the execution phase, the EXU execution unit decodes the CORDIC instruction through the decoding module, decodes the CORDIC instruction into the corresponding operand, passes the decoded operand to the arithmetic logic unit, and reads the operand from the load storage unit; after the arithmetic logic unit finishes executing, the write back unit writes the result back to the register stack; an arithmetic logic unit, comprising an ALU logic operator unit, a CORDIC operator unit and an operation data path module; the CORDIC operator unit initiates a shared operation request to the operation data path module according to the CORDIC angle solution instruction, and retrieves the operation result from the operation path module; the operation data path module accepts the request of the ALU logic operator module and the CORDIC operator unit and performs calculation, and returns the calculation result to the corresponding ALU logic operator module and the CORDIC operator unit after the calculation is completed; The CORDIC operator unit includes a quadrant and special angle discrimination module, a CORDIC algorithm serial iteration module and an angle compensation module; the quadrant and special angle discrimination module performs quadrant pre-judgment on the coordinate value corresponding to the input source operand and discriminates the angle. When the angle is a preset angle value, it outputs a preset angle solution value, otherwise it enters the CORDIC algorithm serial iteration module, and after the operation is completed, the angle value is output through the angle compensation module.

2. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: The CORDIC instruction has a total of 32 bits, bits 25-31 are the func7 field, the content is 0000010, which is defined as the CORDIC instruction set; bits 20-24 of the instruction are the second source operand index; bits 15-19 of the instruction are the first source operand index; bits 12-14 of the instruction are the func3 field, which is the inverse tangent operation instruction; bits 7-11 of the instruction are the result operand index; bits 0-6 of the instruction are the opcode code.

3. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: The ALU logic operation subunit and the CORDIC operation subunit share an operation data path during the process of executing instructions and performing operations; the ALU logic operation subunit initiates an operation request to the shared operation path according to the ALU instruction, and retrieves the operation result from the shared operation path; the CORDIC operation subunit initiates a shared operation request to the operation data path according to the CORDIC angle solution instruction, and retrieves the operation result from the operation data path; the operation data path accepts the requests of the ALU logic operation submodule and the CORDIC operation subunit, performs the operation process at the same time, and returns the calculation result to the operation data path of the corresponding subunit after the calculation is completed.

4. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: The operation value includes the operand register index, write-back register index and operand required to execute the CORDIC instruction.

5. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: A dispatch module is provided between the decoding module and the operation data path; the CORDIC angle resolution long instruction is first dispatched to the ALU logic operation subunit, and delivered through the interface between the ALU logic operation subunit and the delivery module, and at the same time, the CORDIC angle resolution long instruction is dispatched to the CORDIC operation subunit through the ALU logic operation subunit according to the corresponding indication signal obtained by decoding.

6. The angle calculation system based on CORDIC instructions according to claim 4, characterized in that: The dispatch module is provided with a FIFO module. When a CORDIC angle solution long instruction is dispatched, a table entry is allocated in the FIFO module to store the source operand register index and the result register index of the CORDIC angle solution long instruction. After the CORDIC angle solution long instruction is written back, the information in the table entry is withdrawn from the cache of the FIFO module. When the subsequent CORDIC angle solution long instruction is dispatched, the source operand register index and the result register index of the CORDIC angle solution long instruction are compared with each table entry in the FIFO module respectively to determine whether the CORDIC angle solution long instruction has RAW and WAW correlation with the CORDIC angle solution long instruction that has been dispatched but not yet written back.

7. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: In the initial state, the CORDIC operator unit receives the initial source operand and the source operand, and initializes the angle value of the first round of iteration; when receiving the cordic_i_valid signal, it enters the CORDIC angle solution instruction execution state, and the cordic_sta_is_exec signal is valid; when receiving the exec_last_cycle signal, it completes the last round of calculation of the CORDIC angle solution instruction: exits the angle calculation iteration process, and the cordic_sta_is_done signal is valid; after the operation is completed, the cordic_o_valid signal and the last solved 32-bit angle value are output; when the CORDIC operator unit receives the initialization and refresh commands, it does not take any action and the state is idle.

8. The angle solving system based on CORDIC instruction according to claim 1, characterized in that: CORDIC operation subunits reuse and share operation data paths, including: The CORDIC operator unit transmits to the operation data path X value and Y value respectively representing the cordic operation input value, Z value representing the cordic operation output value, X and Y are both coordinate information, Z is the output angle value obtained according to the input angle information, and controls the start, progress and end of the iterative calculation by outputting control signals; the control signals include addition operation signals, subtraction operation signals and shift signals; the operation data path receives the control signals and uses the adder, subtractor and shift register inside the operation path to perform calculations; the output of each round of iterative calculations is fed back as the input of the CORDIC operator unit until the final result is derived.

9. The angle calculation system based on CORDIC instructions according to claim 1, characterized in that: The CORDIC operator unit includes an angle compensation unit and an angle discrimination unit; the angle compensation unit widens the CORDIC angle output range to (0, 2π) through interval conversion, and at the same time, the CORDIC angle is judged by the angle discrimination unit. When the CORDIC angle belongs to the set angle, the corresponding function value is directly output.

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