Packaging structure and packaging method
By designing the package structure of the photon interposer layer, chip, protection ring and plastic sealing layer that integrates photon devices in the co-packaging optical structure, the problems of easy warping, poor electrical connection reliability and cracking of the photon interposer layer are solved, and the quality of the package structure is significantly improved.
Patent Information
- Application Number
- CN202411642591.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-15
- Publication Date
- 2025-03-04
AI Technical Summary
The existing co-packaged optical structures have high quality risks, including the easy warping of the photon interposer, poor electrical connection reliability and high probability of cracking, resulting in low quality of the packaging structure.
A package structure is designed, including a photonic interposer, a chip, a protective ring and a plastic sealing layer that integrates photonic devices. The first side of the photon interposer has an optical coupling region, the protective ring surrounds the optical coupling region and has an exposed cavity, and the plastic sealing layer covers the outer wall of the chip and the protection ring.
The optical coupling area is protected by the protection ring, which reduces the probability of the plastic sealing layer contacting the optical coupling area and reduces the risk of damage to the optical coupling area; the plastic sealing layer cover reduces the probability of warping and cracking of the photon interposer layer, and improves the electrical connection reliability of the photon interposer layer and other circuit structures, thereby improving the quality of the packaging structure.
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Figure CN119560457A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the field of semiconductor packaging technology, and in particular to a packaging structure and a packaging method. Background Art
[0002] As the demand for network and computing bandwidth continues to increase, copper interconnects are reaching their bandwidth limits. Silicon photonics is critical to maintaining rapid data growth, artificial intelligence and AI (Artificial Intelligence) learning, high performance computing (HPC) and other high-bandwidth applications.
[0003] Among them, Co-Packaged Optics (CPO) technology is an advanced optical packaging technology. The co-packaged optical structure integrates optical devices and chips on a single packaging substrate, aiming to solve the next-generation bandwidth and power problems.
[0004] However, current co-packaged optical structures still have high quality risks. Summary of the invention
[0005] The problem solved by the embodiments of the present invention is to provide a packaging structure and a packaging method to improve the quality of the packaging structure.
[0006] To solve the above problems, an embodiment of the present invention provides a packaging structure, including: a photonic interposer integrated with photonic devices, the first surface of the photonic interposer having an optical coupling region; a chip bonded to the first surface and spaced apart from the optical coupling region, the chip being electrically connected to the photonic interposer; a guard ring located on the first surface and surrounding the optical coupling region, the guard ring having a cavity exposing the optical coupling region; and a plastic encapsulation layer located on the first surface of the chip side and outside the cavity, the plastic encapsulation layer covering the side walls of the chip and the outer wall of the guard ring.
[0007] Correspondingly, an embodiment of the present invention also provides a packaging method, including: providing a photonic interposer integrated with photonic devices, the first surface of the photonic interposer having an optical coupling region; bonding a chip on the first surface, the chip and the optical coupling region being spaced apart, and the chip and the photonic interposer being electrically connected; providing a cap on the first surface covering the optical coupling region, the cap having a cavity, and the projection of the cavity on the photonic interposer covering the optical coupling region; forming a plastic encapsulation layer on the first surface of the chip side and the cap side, the plastic encapsulation layer covering the side wall of the chip and the side wall of the cap; after forming the plastic encapsulation layer, thinning the cap to expose the cavity.
[0008] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:
[0009] In the packaging structure provided by the embodiment of the present invention, a photonic device is integrated in the photonic interposer, a first surface of the photonic interposer has an optical coupling region, a protective ring surrounding the optical coupling region is arranged on the first surface of the photonic interposer, the protective ring has a cavity exposing the optical coupling region, a plastic encapsulation layer is located on the first surface of the chip side and outside the cavity, and the plastic encapsulation layer covers the side wall of the chip and the outer wall of the protective ring; wherein, the cavity exposes the optical coupling region, and it is easy to realize the installation of the optical fiber structure through the cavity, and the protective ring can play a role in protecting the optical coupling region, so that the probability of the plastic encapsulation layer contacting the optical coupling region is reduced, thereby reducing the probability of damage to the optical coupling region, and at the same time, by covering the plastic encapsulation layer on the first surface, the probability of warping of the photonic interposer is reduced, which is conducive to improving the electrical connection reliability between the photonic interposer and other circuit structures (for example, a packaging substrate), and reducing the probability of cracking of the photonic interposer, thereby improving the quality of the packaging structure.
[0010] In the packaging method provided by the embodiment of the present invention, after providing a photonic interposer integrated with a photonic device, a cap is provided on the first surface of the photonic interposer to cover the optical coupling area, the cap has a cavity, and the projection of the cavity on the photonic interposer covers the optical coupling area, and a plastic encapsulation layer is formed on the first surface of the chip side and the cap side. After the plastic encapsulation layer is formed, the cap is thinned to expose the cavity; wherein the cap covers the optical coupling area, and can protect the optical coupling area when the plastic encapsulation layer is formed, so that the probability of the plastic encapsulation layer contacting the optical coupling area is reduced, thereby reducing the probability of damage to the optical coupling area, and by thinning the cap to expose the cavity, it is easy to realize the installation of the optical fiber structure through the cavity, and at the same time, by forming the plastic encapsulation layer covering the first surface, the probability of warping of the photonic interposer is reduced, which is conducive to improving the electrical connection reliability between the photonic interposer and other circuit structures, and reducing the probability of cracking of the photonic interposer, thereby improving the quality of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 It is a schematic diagram of the structure of a packaging structure;
[0012] Figure 2 is a top view of an embodiment of a packaging structure of the present invention;
[0013] Figure 3 yes Figure 2 A cross-sectional view at the position B1-B2;
[0014] Figures 4 to 21 is a schematic diagram corresponding to each step in an embodiment of a packaging method of the present invention;
[0015] Figure 22 to Figure 24 is a schematic diagram corresponding to each step in another embodiment of the packaging method of the present invention; DETAILED DESCRIPTION
[0016] As can be seen from the background technology, the current co-packaged optical structure still has a high quality risk. Now, in combination with a packaging structure, the reasons why the co-packaged optical structure still has a high quality risk are analyzed.
[0017] refer to Figure 1 , Figure 1 It is a structural diagram of a packaging structure.
[0018] The packaging structure includes: a packaging substrate 10; a photonic interposer 20 with integrated photonic devices, bonded to the packaging substrate 10 and electrically connected to the packaging substrate 10, and the first surface (not marked) of the photonic interposer 20 has an optical coupling area (not marked); a chip 30, located on the first surface and spaced from the optical coupling area, and the chip 30 is electrically connected to the photonic interposer 20; an optical fiber structure 50, mounted on the first surface and located in the optical coupling area.
[0019] In order to facilitate mounting the optical fiber structure 50 on the first surface, the packaging structure is usually a non-plastic-encapsulated structure. However, due to the small thickness of the photon interposer 20, it is easy to warp when it is not plastic-encapsulated. Therefore, along the edge of the photon interposer 20, the reliability of the electrical connection between the photon interposer 20 and the packaging substrate 10 is poor (for example, it is easy to have a cold solder joint problem), and the photon interposer 20 is also easy to crack, resulting in a high quality risk of the packaging structure.
[0020] In order to solve the technical problem, in the packaging structure provided by the embodiment of the present invention, a protection ring surrounding the optical coupling area is arranged on the first surface of the photon interposer, the protection ring has a cavity exposing the optical coupling area, and the plastic sealing layer is located on the first surface of the chip side and outside the cavity, and the plastic sealing layer covers the side wall of the chip and the outer wall of the protection ring; wherein, the cavity exposes the optical coupling area, and it is easy to realize the installation of the optical fiber structure through the cavity, and the protection ring can play a role in protecting the optical coupling area, so that the probability of the plastic sealing layer contacting the optical coupling area is reduced, thereby reducing the probability of damage to the optical coupling area. At the same time, by covering the plastic sealing layer on the first surface, the probability of warping of the photon interposer is reduced, which is conducive to improving the electrical connection reliability between the photon interposer and other circuit structures, and reducing the probability of cracking of the photon interposer, thereby improving the quality of the packaging structure.
[0021] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0022] Combined with reference Figure 2 and Figure 3 , Figure 2 is a top view of an embodiment of a packaging structure of the present invention, Figure 3 yes Figure 2 Cross-sectional view at position B1-B2.
[0023] The packaging structure includes: a photonic interposer 500 integrated with photonic devices, the first surface 500A of the photonic interposer 500 having an optical coupling region 550; a chip 600, bonded to the first surface 500A and spaced apart from the optical coupling region 550, the chip 600 being electrically connected to the photonic interposer 500; a guard ring 712, located on the first surface 500A and surrounding the optical coupling region 550, the guard ring 712 having a cavity 713 exposing the optical coupling region 550; a plastic encapsulation layer 720, located on the first surface 500A on the side of the chip 600 and outside the cavity 713, the plastic encapsulation layer 720 covering the side wall of the chip 600 and the outer wall (not marked) of the guard ring 712.
[0024] The photonic interposer 500 provides a process platform for chip integration. The chip 600 is arranged on the photonic interposer 500, so that the photonic interposer 500 can realize the transmission of electrical signals and optical signals, and enable the optical signals and electrical signals to be transmitted within a shorter distance, thereby realizing efficient conversion and transmission of optoelectronic signals, and is conducive to reducing power consumption and improving bandwidth, thereby obtaining a highly integrated co-packaged optical structure, so that the packaging structure can be suitable for high-performance computing and other applications with high-speed optical communication requirements.
[0025] Photonic devices are used to construct photonic integrated circuits (PIC).
[0026] It should be noted that the photonic devices in the photonic intermediary layer 500 include, but are not limited to, one or more of a laser, a photodetector, a waveguide, an optical coupler, an optical modulator, and an optical filter.
[0027] As an example, the photonic interposer 500 is made of silicon-based materials, so the photonic interposer 500 is a silicon photonic interposer. In other embodiments, the substrate of the photonic interposer can also be made of other materials to meet different functional and performance requirements. For example, the substrate of the photonic interposer can also be indium phosphide (InP), gallium arsenide (GaAs) or lithium niobate (LiNbO 3 )wait.
[0028] The optical coupling region 550 of the photonic interposer 500 is a core region for realizing efficient transmission of optical signals and is used to realize optical communication with an optical fiber structure.
[0029] In this embodiment, the photonic interposer 500 has a first interconnect structure 510 , so that the photonic interposer 500 can realize the transmission of electrical signals.
[0030] In one embodiment, the first interconnect structure 510 includes an interconnect via structure that penetrates the photonic interposer 500, thereby increasing the speed of signal transmission by vertical electrical interconnection. In other embodiments, the first interconnect structure may also include multiple layers of interconnect lines and an interconnect via structure that connects interconnect lines of adjacent layers.
[0031] In one embodiment, the material of the first interconnect structure 510 includes copper. It is understood that the first interconnect structure may also be made of other conductive materials, such as tungsten.
[0032] In this embodiment, the photon intermediary layer 500 also includes a first surface 500A (such as Figure 3 The second surface 500B (as shown) is disposed opposite to the Figure 3 shown).
[0033] The chip 600 is used to provide electronic devices, thereby realizing data processing, signal processing, data storage, driving photonic devices, etc. By integrating the chip 600 and the photonic interposer 500 in the same packaging structure, a highly integrated optoelectronic system is realized.
[0034] The specific type of chip 600 can be selected according to actual needs. For example, chip 600 may include one or more of an ASIC (Application-Specific Integrated Circuit) chip, an HBM (High Bandwidth Memory) chip, a CPU (Central Processing Unit) chip, a GPU (Graphics Processing Unit) chip, and an FPGA (Field-Programmable Gate Array) chip.
[0035] As an example, the chip 600 includes an ASIC chip 610 and an HBM chip 620. By integrating the ASIC chip 610 and the HBM chip 620 on the photonic interposer 500, a more compact, efficient and high-performance optoelectronic integrated system can be realized, thereby meeting the requirements of high-performance computing and big data processing.
[0036] It should be noted that Figure 2Only three chips 600 and one arrangement of the three chips 600 are illustrated, but the number of the chips 600 is not limited to three, and the chips 600 may also be arranged in other ways.
[0037] In this embodiment, the chip 600 is bonded to the photonic interposer 500 by a flip chip process, thereby improving the communication speed between optoelectronic devices.
[0038] To this end, the packaging structure further includes: a first conductive connection member 680 located between the chip 600 and the photonic interposer 500 , and the first conductive connection member 680 electrically connects the first interconnect structure 510 in the photonic interposer 500 and the chip 600 .
[0039] The first conductive connection member 680 may be a bump. For example, the first conductive connection member 680 may be a micro bump (μBump) or a C2 bump. The C2 bump generally refers to a copper pillar bump having a solder cap on the top surface.
[0040] The first conductive connection member 680 may be made of a material with good conductive properties, for example, may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin.
[0041] In this embodiment, the packaging structure further includes: a first underfill layer 540 located between the photonic interposer 500 and the chip 600 , and the first underfill layer 540 also covers the sidewalls of the first conductive connector 680 .
[0042] Filling the gap between the chip 600 and the photonic interposer 500 with the first bottom filling layer 540 is beneficial to improving the bonding strength between the chip 600 and the photonic interposer 500 and is also beneficial to protecting the first conductive connection member 680 .
[0043] As an example, the material of the first bottom filling layer 540 includes epoxy resin, so as to alleviate stress impact.
[0044] In this embodiment, the first bottom filling layer 540 is also filled between adjacent chips 600 , thereby further reinforcing and protecting the chips 600 .
[0045] In other embodiments, the chip may be bonded to the photonic interposer by using other suitable bonding processes, such as metal direct bonding or metal oxide hybrid bonding.
[0046] The protection ring 712 surrounds the light coupling region 550 and can protect the light coupling region 550 , thereby reducing the probability of the plastic encapsulation layer 720 contacting the light coupling region 550 , and correspondingly reducing the probability of the light coupling region 550 being damaged, thereby improving the quality of the packaging structure.
[0047] Moreover, the cavity 713 in the protection ring 712 exposes the optical coupling region 550, so that the optical fiber structure can be easily installed through the cavity 713. In addition, the cavity 713 serves as an installation window for the optical fiber structure, which is conducive to improving the alignment accuracy between the optical fiber structure and the optical coupling region 550.
[0048] In this embodiment, the projection shape of the cavity 713 on the first surface 500A is a square. However, the projection shape of the cavity 713 is not limited to a square. In other embodiments, the projection shape of the cavity on the first surface can also be a circle, an octagon, or an irregular shape.
[0049] In this embodiment, the shape of the protection ring 712 is a square ring. However, the shape of the protection ring 712 is not limited to a square ring. In other embodiments, the shape of the protection ring can also be a circular ring, an octagonal ring, or an irregular ring.
[0050] It should be noted that the protection ring 712 includes an inner wall (not shown) facing the light coupling region 550 and an outer wall facing away from the light coupling region 550 , and the inner wall of the protection ring 712 forms a cavity 713 .
[0051] The material of the protection ring 712 may include one or more of metal, epoxy molding compound (EMC), ceramic and silicon, so as to improve the compatibility with the packaging process.
[0052] In this embodiment, the material of the protection ring 712 is epoxy molding compound, thereby improving the bonding strength between the protection ring 712 and the plastic layer 720, and helping to reduce the preparation cost of the protection ring 712. Alternatively, in other embodiments, the material of the protection ring can also be metal, thereby improving the strength of the protection ring, and it is also easy to achieve heat dissipation through the metal protection ring.
[0053] In this embodiment, the packaging structure further includes: a connection layer 700 located between the first surface 500A and the guard ring 712. The connection layer 700 is used to fix the guard ring 712 on the first surface 500A and improve the bonding strength between the guard ring 712 and the photonic interposer 500.
[0054] In this embodiment, the connection layer 700 may include an epoxy resin layer or an adhesive layer, thereby reducing the complexity of fixing the protection ring 712 on the first surface 500A. The adhesive layer is sticky, so that the protection ring 712 can be fixed on the first surface 500A; or, after the protection ring 712 contacts with uncured epoxy resin, the protection ring 712 can also be fixed on the first surface 500A by curing the epoxy resin.
[0055] It should be noted that the material of the adhesive layer includes a silicon-based adhesive layer, a polyimide-based adhesive layer, an epoxy resin-based adhesive layer or a polyurethane-based adhesive layer.
[0056] It should also be noted that when the material of the protection ring 712 is metal, a thermally conductive adhesive layer can be selected to improve the heat dissipation performance of the packaging structure.
[0057] The plastic encapsulation layer 720 is used to protect the chip 600 and the photonic interposer 500 , and to plastic encapsulate the chip 600 and the photonic interposer 500 into a package.
[0058] In this embodiment, the material of the plastic encapsulation layer 720 is a molding material, such as epoxy resin. Epoxy resin has the advantages of low shrinkage, good adhesion, good corrosion resistance, excellent electrical properties and low cost. In other embodiments, the plastic encapsulation layer can also be made of other suitable packaging materials.
[0059] Among them, by covering the plastic encapsulation layer 720 of the first surface 500A, the probability of warping of the photonic interposer 500 is reduced, which is beneficial to improving the electrical connection reliability between the photonic interposer 500 and other circuit structures (for example, a packaging substrate), and reducing the probability of cracking of the photonic interposer 500, thereby improving the quality of the packaging structure.
[0060] In this embodiment, the top of the plastic layer 720, the top of the protective ring 712, and the top of the chip 600 are all flush, which not only helps to reduce the thickness of the packaging structure, but also allows the top of the chip 600 to be exposed by the plastic layer 720, which helps to improve the heat dissipation performance of the chip 600.
[0061] In this embodiment, the packaging structure further includes: a packaging substrate 570. The packaging substrate 570 is used to provide a process platform for packaging the photonic interposer 500 and the chip 600, and the packaging substrate 570 has a circuit therein, and the packaging substrate 570 can play a role in supplying power or transmitting electrical signals.
[0062] Correspondingly, the second surface 500B of the photon interposer 500 is bonded to the packaging substrate 570 , and the photon interposer 500 is electrically connected to the packaging substrate 570 .
[0063] In this embodiment, the packaging substrate 570 has a second interconnect structure (not shown) to achieve electrical connection between the packaging substrate 570 and the photonic interposer 500 .
[0064] In one embodiment, the second interconnect structure includes a plurality of interconnect lines 580 and a through-hole interconnect structure 590 connecting interconnect lines 580 of adjacent layers. It should be noted that the interconnect lines 580 exposed on the surface of the package substrate 570 can be used as solder pads.
[0065] In some other embodiments, the second interconnect structure may include an interconnect via structure penetrating the package substrate.
[0066] In this embodiment, the packaging structure further includes: a second conductive connector 530, located between the photon interposer 500 and the packaging substrate 570, and the second conductive connector 530 electrically connects the photon interposer 500 and the packaging substrate 570. Specifically, the second conductive connector 530 electrically connects the first interconnect structure 510 in the photon interposer 500 and the second interconnect structure in the packaging substrate 570.
[0067] The second conductive connection 530 may include a solder bump, a metal column, or a controlled collapse chip connection (C4) bump. The second conductive connection 530 may include a conductive material, for example, one or more of copper, aluminum, gold, nickel, silver, palladium, and tin. As an example, the second conductive connection 530 is a C4 bump.
[0068] In this embodiment, the packaging structure further includes: a second bottom filling layer 630 located between the photonic interposer 500 and the packaging substrate 570 , and the second bottom filling layer 630 also covers the sidewalls of the second conductive connector 530 .
[0069] Filling the second bottom filling layer 630 in the gap between the photon interposer 500 and the packaging substrate 570 is beneficial to improving the bonding strength between the photon interposer 500 and the packaging substrate 570 and is also beneficial to protecting the second conductive connection member 530 .
[0070] As an example, the material of the second bottom filling layer 630 includes epoxy resin, so as to alleviate stress impact.
[0071] In this embodiment, the packaging structure further includes: an optical fiber structure 770 installed in the cavity 713 .
[0072] The optical fiber in the optical fiber structure 770 is coupled with the photonic device in the photonic intermediary layer 500 to achieve optical communication. As an example, the optical fiber structure 770 can be fixed on the pad area in the optical coupling area 550 by an adhesive layer (eg, optical glue).
[0073] As an example, the optical fiber structure 770 may be a fiber array unit (FAU).
[0074] In this embodiment, the packaging structure further includes a stiffener ring 730 , which is located on the packaging substrate 570 and surrounds the photonic interposer 500 .
[0075] The reinforcement ring 730 helps to reduce the probability of warping of the packaging substrate 570 and is also helpful to improve the mechanical strength of the packaging structure. In addition, the reinforcement ring 730 surrounds the photonic interposer 500 and is also helpful to protect the photonic interposer 500 and the chip 600 to a certain extent.
[0076] As an example, the reinforcement ring 730 is located at the edge of the packaging substrate 570 , thereby improving the effect of improving the warpage problem and providing sufficient space for the installation of the photonic interposer 500 .
[0077] As an example, the projection shape of the reinforcement ring 730 on the packaging substrate 570 is a square. In other embodiments, the projection shape of the reinforcement ring may also be other shapes (eg, a circle or an octagon, etc.).
[0078] In this embodiment, the material of the reinforcement ring 730 includes metal. The reinforcement ring 730 made of metal is also conducive to improving the heat dissipation performance of the packaging structure. As an example, the material of the reinforcement ring 730 may include copper, iron, nickel, stainless steel, nickel-iron alloy, etc.
[0079] In this embodiment, the connection layer 700 located between the first surface 500A and the protection ring 712 is used as the first connection layer. The packaging structure further includes: a second connection layer 740 located between the reinforcement ring 730 and the packaging substrate 570 .
[0080] The second connection layer 740 is used to fix the reinforcement ring 730 on the packaging substrate 570 and improve the bonding strength between the reinforcement ring 730 and the packaging substrate 570 .
[0081] In this embodiment, the second connection layer 740 may be an adhesive layer, and the material of the adhesive layer includes a silicon-based adhesive layer, a polyimide-based adhesive layer, an epoxy resin-based adhesive layer, or a polyurethane-based adhesive layer.
[0082] As an example, the material of the reinforcement ring 730 is metal, and thus the second connection layer 740 can be a thermally conductive adhesive layer, thereby improving the heat dissipation performance of the packaging structure.
[0083] In this embodiment, the packaging structure may further include: a third conductive connection member 750 , located on a surface of the packaging substrate 570 facing away from the photonic interposer 500 , and the third conductive connection member 750 is electrically connected to the packaging substrate 570 .
[0084] The third conductive connector 750 is used to realize the electrical connection between the package substrate 570 and other external circuits. For example, the package substrate 570 is subsequently assembled onto a PCB (Printed Circuit Board) through the third conductive connector 750 .
[0085] In this embodiment, the third conductive connection member 750 is a bump, such as a solder ball. The third conductive connection member 750 can be made of a material with good conductivity, such as copper, aluminum, gold, nickel, silver, palladium and tin.
[0086] In this embodiment, the packaging structure may further include: a passive device 760 bonded to the surface of the packaging substrate 570 facing away from the photonic interposer 500. By integrating the passive device 760 in the packaging structure, the performance of the packaging structure is improved.
[0087] Passive devices 760 may include capacitors, inductors, resistors, etc., thereby playing a specific role in the operation of the optoelectronic system.
[0088] It should be noted that the passive device 760 is located on the surface of the packaging substrate 570 facing away from the photonic interposer 500 , which can fully utilize the area of the packaging substrate 570 and is beneficial to reducing the lateral size of the packaging structure.
[0089] Correspondingly, the present invention also provides a packaging method for a packaging structure. Figures 4 to 21 It is a schematic diagram corresponding to each step in an embodiment of a packaging method of the present invention.
[0090] refer to Figure 4 and Figure 5 , Figure 4 It is a top view. Figure 5 yes Figure 4 The cross-sectional view at the position A1 - A2 provides a photonic interposer 100 integrated with a photonic device, and a first surface 100A of the photonic interposer 100 has a light coupling region 150 .
[0091] The photonic interposer 100 provides a process platform for chip integration. The chip is set on the photonic interposer 100, so that the photonic interposer 100 can realize the transmission of electrical signals and optical signals, and enable the optical signals and electrical signals to be transmitted within a shorter distance, thereby realizing efficient conversion and transmission of optoelectronic signals, and is conducive to reducing power consumption and improving bandwidth, thereby obtaining a highly integrated co-packaged optical structure, so that the packaging structure can be suitable for high-performance computing and other applications with high-speed optical communication requirements.
[0092] It should be noted that the photonic devices in the photonic intermediary layer 100 include, but are not limited to, one or more of a laser, a photodetector, a waveguide, an optical coupler, an optical modulator, and an optical filter.
[0093] As an example, the photon intermediary layer 100 is a silicon photon intermediary layer. In other embodiments, the substrate of the photon intermediary layer 500 may also be made of other materials.
[0094] The optical coupling region 150 of the photonic interposer 100 is a core region for realizing efficient transmission of optical signals and is used to realize optical communication with an optical fiber structure.
[0095] In this embodiment, the photonic interposer 100 has a first interconnect structure 110 , so that the photonic interposer 100 can realize the transmission of electrical signals.
[0096] In one embodiment, the first interconnect structure 110 includes an interconnect via structure penetrating the photonic interposer 100. In other embodiments, the first interconnect structure may also include a plurality of layers of interconnect lines and an interconnect via structure connecting interconnect lines of adjacent layers.
[0097] In one embodiment, the material of the first interconnect structure 110 includes copper. It is understood that the first interconnect structure may also be made of other conductive materials, such as tungsten.
[0098] In this embodiment, the photonic intermediary layer 100 further includes a second surface 100B disposed opposite to the first surface 100A.
[0099] In this embodiment, a second conductive connection member 130 is formed on the second surface 100B of the photonic interposer 100 , and the second conductive connection member 130 is electrically connected to the first interconnect structure 110 .
[0100] Subsequently, the photonic interposer 100 is bonded to the packaging substrate through the second conductive connector 130 .
[0101] The second conductive connection 130 may include a solder bump, a metal column, or a controllable collapse chip connection bump. The second conductive connection 130 may include a conductive material, for example, one or more of copper, aluminum, gold, nickel, silver, palladium, and tin. As an example, the second conductive connection 130 is a C4 bump.
[0102] In this embodiment, the photonic interposer 100 is temporarily bonded to the carrier 101 , and the first surface 100A of the photonic interposer 100 faces away from the carrier 101 .
[0103] The carrier 101 can provide support for the photonic interposer 100 in the subsequent packaging steps, which is helpful to reduce the probability of warping or cracking of the photonic interposer 100 .
[0104] In this embodiment, the carrier 101 is a glass carrier. In other embodiments, the carrier may also be a silicon carrier or a carrier made of other materials.
[0105] As an example, the photonic interposer 100 may be temporarily bonded to the carrier 101 via a temporary bonding layer 102. The temporary bonding layer 102 serves as a peeling layer to facilitate the subsequent separation of the photonic interposer 100 and the carrier 101.
[0106] Continue to refer Figure 4 and Figure 5 , a chip 200 is bonded on the first surface 100A, the chip 200 is spaced apart from the optical coupling region 150 , and the chip 200 is electrically connected to the photonic interposer 100 .
[0107] The chip 200 is used to provide electronic devices, thereby realizing functions such as data processing, signal processing, data storage, and driving photonic devices.
[0108] The specific type of chip 200 can be selected according to actual needs. For example, chip 200 may include one or more of an ASIC chip, an HBM chip, a CPU chip, a GPU chip, and an FPGA chip.
[0109] As an example, the chip 200 includes an ASIC chip 610 and an HBM chip 620, thereby enabling a more compact, efficient and high-performance optoelectronic integrated system to meet the needs of high-performance computing and big data processing.
[0110] In this embodiment, the chip 200 is bonded to the photonic interposer 100 by a flip chip process, thereby improving the communication speed between optoelectronic devices.
[0111] Specifically, the chip 200 is bonded on the first surface 100A using the first conductive connector 280 . After bonding, the first conductive connector 280 is located between the chip 200 and the photonic interposer 100 . The first conductive connector 280 electrically connects the first interconnect structure 110 in the photonic interposer 100 and the chip 200 .
[0112] The first conductive connector 280 may be a bump. For example, the first conductive connector 280 may be a micro bump or a C2 bump. The first conductive connector 280 may be made of a material with good conductivity, for example, one or more of copper, aluminum, gold, nickel, silver, palladium and tin.
[0113] In this embodiment, after the chip 200 is bonded on the first surface 100A, the packaging method further includes: forming a first bottom filling layer 140 between the photonic interposer 100 and the chip 200 , and the first bottom filling layer 140 also covers the sidewalls of the first conductive connection member 280 .
[0114] As an example, the material of the first underfill layer 140 includes epoxy resin.
[0115] In this embodiment, the first bottom filling layer 140 is also filled between adjacent chips 200 , thereby further reinforcing and protecting the chips 200 .
[0116] In other embodiments, the chip may also be bonded to the photonic interposer by using other suitable bonding processes, such as metal direct bonding or metal oxide hybrid bonding.
[0117] refer to Figures 6 to 9 , Figure 6 is based on Figure 4 It is a top view. Figure 7 yes Figure 6 The cross-sectional view at the A1-A2 position, Figure 8 is based on Figure 6 It is a top view. Fig. 9 yes Figure 8 In the cross-sectional view at position A1 - A2 , a cap 310 is disposed on the first surface 100A and covers the light coupling region 150 . The cap 310 has a cavity 313 , and a projection of the cavity 313 on the photonic interposer 100 covers the light coupling region 150 .
[0118] The cap 310 covers the optical coupling region 150 and can protect the optical coupling region 150 when a plastic encapsulation layer is subsequently formed, thereby reducing the probability of the plastic encapsulation layer contacting the optical coupling region 150 and the probability of the optical coupling region 150 being damaged, thereby improving the quality of the packaging structure.
[0119] Furthermore, the cap 310 has a cavity 313 (eg Fig. 9 As shown), the probability of the cap 310 contacting the light coupling region 150 is reduced, thereby reducing the probability of the cap 310 causing damage to the light coupling region 150.
[0120] At the same time, the projection of the cavity 313 on the photonic interposer 100 covers the optical coupling region 150 , thereby preventing the cap 310 from blocking the optical coupling region 150 , thereby reducing the complexity of exposing the optical coupling region 150 and facilitating the installation of the optical fiber structure through the cavity 313 .
[0121] In addition, after the cavity 313 is subsequently exposed, the cavity 313 can be used as an installation window for the optical fiber structure, which is beneficial to improving the alignment accuracy between the optical fiber structure and the optical coupling region 150 .
[0122] The material of the cap 310 may include one or more of metal, epoxy molding compound, ceramic, and silicon, so as to improve compatibility with packaging processes.
[0123] In this embodiment, the material of the cap 310 is epoxy molding compound, thereby improving the bonding strength between the cap 310 and the plastic layer. Alternatively, in other embodiments, the material of the cap may also be metal, thereby improving the strength of the cap and facilitating heat dissipation through the metal cap.
[0124] It should be noted that the cap 310 includes an inner wall (not shown) facing the light coupling region 150 and an outer wall facing away from the light coupling region 150 , and the inner wall of the cap 310 forms a cavity 313 .
[0125] In this embodiment, the cap 310 is in the shape of a cuboid, and the cross-sectional shape of the cavity 313 is in the shape of a square, thereby reducing the difficulty of preparing the cap 310 and reducing the difficulty of exposing the optical coupling region 150 and assembling the optical fiber structure.
[0126] In other embodiments, the cap may also be in other types of shapes (eg, a cylinder, a prism, or an irregular shape, etc.), and the cavity may also be in other types of cross-sectional shapes (eg, a circle, or an irregular shape, etc.).
[0127] In this embodiment, the cap 310 includes a top cover 311 and a protection ring 312 located between the top cover 311 and the photonic interposer 100 . The top cover 311 and the protection ring 312 form a cavity 313 .
[0128] The cavity 313 is sealed by the top cover 311 , thereby providing a protective space for the light coupling area 150 .
[0129] In this embodiment, in the step of providing the cap 310 on the first surface 100A and covering the optical coupling region 150, the connection layer 300 (eg Figure 6 and Figure 7 As shown in FIG. 1 , a cap 310 is fixed on the first surface 100A.
[0130] The connection layer 300 is used to fix the cap 310 on the first surface 100A and improve the bonding strength between the cap 310 and the photonic interposer 100 .
[0131] In this embodiment, the connection layer 300 may include an epoxy resin layer or an adhesive layer, thereby reducing the complexity of fixing the cap 310 on the first surface 100A. The adhesive layer is sticky, so that the cap 310 can be fixed on the first surface 100A; or, after the cap 310 contacts with uncured epoxy resin, the cap 310 can also be fixed on the first surface 100A by curing the epoxy resin.
[0132] It should be noted that the material of the adhesive layer includes a silicon-based adhesive layer, a polyimide-based adhesive layer, an epoxy resin-based adhesive layer or a polyurethane-based adhesive layer.
[0133] It should also be noted that when the material of the cap 310 is metal, an adhesive layer of a thermally conductive material may be selected to improve the heat dissipation performance of the packaging structure.
[0134] Specifically, Figure 6 and Figure 7 As shown, a connection layer 300 surrounding the light coupling region 150 is formed on the first surface 100A; Figure 8 and Fig. 9 As shown, after the connection layer 300 is formed, the cap 310 is fixed on the connection layer 300 .
[0135] The optical coupling region 150 is located on the photonic intermediary layer 100, so forming the connecting layer 300 on the photonic intermediary layer 100 can easily improve the alignment accuracy of the connecting layer 300 and the optical coupling region 150; moreover, the area of the photonic intermediary layer 100 is larger, and forming the connecting layer 300 on the photonic intermediary layer 100 can also easily reduce the difficulty of forming the connecting layer 300.
[0136] In other embodiments, after the connection layer is formed on the cap, the connection layer may be fixed on the first surface.
[0137] In this embodiment, after the chip 200 is arranged on the first surface 100A, a cap 310 is arranged on the first surface 100A to cover the optical coupling area 150, thereby providing a larger operating space for the bonding of the chip 200 and avoiding the bonding process of the chip 200 from affecting the bonding strength between the cap 310 and the photonic interposer 100.
[0138] It should be noted that, according to actual needs, the installation order of the chip 200 and the cap 310 can also be exchanged. In one embodiment, the cap can be installed first and then the chip can be bonded, so that the optical coupling area is protected by the cap during the chip bonding process. In other embodiments, after bonding a part of the number of chips, the cap and the remaining number of chips are installed in sequence.
[0139] Combined with reference Figure 10 to Figure 11 , Fig.10 is based on Figure 8 It is a top view. Fig.11 yes Fig.10 In the cross-sectional view at position A1 - A2 , a plastic encapsulation layer 320 is formed on the first surface 100A of the side of the chip 200 and the side of the cap 310 , and the plastic encapsulation layer 320 covers the side walls of the chip 200 and the side walls of the cap 310 .
[0140] The plastic encapsulation layer 320 is used to protect the chip 200 and the photonic interposer 100, and to plastic encapsulate the chip 200 and the photonic interposer 100 into a package. In this embodiment, the material of the plastic encapsulation layer 320 is a plastic encapsulation material, such as epoxy resin.
[0141] By covering the plastic encapsulation layer 320 on the first surface 100A, the probability of warping of the photon interposer 100 is reduced, which is conducive to improving the reliability of the electrical connection between the photon interposer 100 and other circuit structures (e.g., a packaging substrate), and reducing the probability of cracking of the photon interposer 100, thereby improving the quality of the packaging structure. In addition, the cap 310 is disposed above the optical coupling region 150, so that the plastic encapsulation layer 320 is formed outside the cavity 313.
[0142] In this embodiment, in the step of forming the plastic encapsulation layer 320, the plastic encapsulation layer 320 covers the top of the chip 200 and the top of the cap 310, so that after subsequent thinning processing, the top of the plastic encapsulation layer 320, the top of the remaining cap 310, and the top of the chip 200 are all flush.
[0143] In this embodiment, the top of the cavity 313 is lower than the top of the chip 200, that is, the height of the lower surface of the top cover 311 is slightly lower than the top of the chip 200, so that the chip 200 can be partially thinned by thinning the cap 310, which is beneficial to reducing the thickness of the packaging structure and improving the heat dissipation performance of the chip 200.
[0144] Combined with reference Figure 12 to Figure 13 , Fig.12 is based on Fig.10 It is a top view. Fig.13 yes Fig.12 In the cross-sectional view at the position A1 - A2 , after the plastic encapsulation layer 320 is formed, the cap 310 is thinned to expose the cavity 313 .
[0145] The cavity 313 is exposed, and accordingly the optical coupling region 150 is exposed through the cavity 313 , thereby providing a process basis for the subsequent assembly of the optical fiber structure.
[0146] Since the cap 310 has the cavity 313 , the light coupling region 150 can be exposed by thinning, and there is no need to etch the light coupling region 150 , thereby reducing the probability of causing damage to the light coupling region 150 .
[0147] In this embodiment, the cap 310 (such as Fig.11 In the step of thinning, the top cover 311 (as shown in FIG. Fig.11 as shown) and retain the protection ring 312.
[0148] The guard ring 312 is retained so that the guard ring 312 can continue to protect the light coupling region 150 .
[0149] Specifically, after the molding layer 320 is formed, the molding layer 320 and the cap 310 are thinned in sequence to expose the cavity 313 and make the top of the molding layer 320 flush with the top of the chip 200 .
[0150] Making the top of the plastic encapsulation layer 320 flush with the top of the chip 200 not only helps to reduce the thickness of the packaging structure, but also makes the top of the chip 200 exposed by the plastic encapsulation layer 320 , which helps to improve the heat dissipation performance of the chip 200 .
[0151] In this embodiment, the top of the cavity 313 is lower than the top of the chip 200, so during the thinning process, the chip 200 is also thinned. In other embodiments, the top of the cavity may be higher than the top of the chip, so that the chip does not need to be thinned.
[0152] Combined with reference Figure 14 to Figure 15 , Fig.14 is based on Fig.12 It is a top view. Fig.15 yes Fig.14 In the cross-sectional view at the position A1-A2, in this embodiment, after exposing the cavity 313 and before installing the optical fiber structure in the cavity 313, the packaging method further includes: bonding the second surface 100B of the photonic interposer 100 to the packaging substrate 170, and electrically connecting the photonic interposer 100 to the packaging substrate 170.
[0153] The packaging substrate 170 is used to provide a process platform for packaging the photonic interposer 100 and the chip 200 . The packaging substrate 170 has a circuit therein, and the packaging substrate 170 can play a role in supplying power or transmitting electrical signals.
[0154] In this embodiment, the packaging substrate 170 has a second interconnect structure (not shown) to achieve electrical connection between the packaging substrate 170 and the photonic interposer 100. In one embodiment, the second interconnect structure includes a multilayer interconnect line 180 and a through-hole interconnect structure 190 connecting the interconnect lines 180 of adjacent layers. It should be noted that the interconnect lines 180 exposed on the surface of the packaging substrate 170 can be used as solder pads. In other embodiments, the second interconnect structure may also include an interconnect through-hole structure that penetrates the packaging substrate.
[0155] In this embodiment, the second surface 100B of the photon interposer 100 is bonded to the packaging substrate 170 through the second conductive connector 130, and the second conductive connector 130 electrically connects the photon interposer 100 and the packaging substrate 170. Specifically, the second conductive connector 130 electrically connects the first interconnect structure 110 in the photon interposer 100 and the second interconnect structure in the packaging substrate 170.
[0156] It should be noted that, since the photonic interposer 100 is temporarily bonded to the carrier 101 (eg Fig.13 Therefore, after exposing the cavity 313 and before bonding the second surface 100B of the photonic interposer 100 to the packaging substrate 170 , the packaging method further includes: separating the carrier 101 and the photonic interposer 100 .
[0157] Specifically, debonding is performed to remove the carrier 101 and the temporary bonding layer 102 (eg Fig.13 shown).
[0158] refer to Fig.16 , Fig.16 is based on Fig.15 The packaging method further includes: forming a second bottom filling layer 230 between the photonic interposer 100 and the packaging substrate 170, and the second bottom filling layer 230 also covers the side wall of the second conductive connection 130.
[0159] As an example, the material of the second bottom filling layer 230 includes epoxy resin, so as to alleviate stress impact.
[0160] Combined with reference Fig. 20 and Fig.21 , Fig. 20 It is a top view. Fig.21 yes Fig. 20 In the cross-sectional view at the position A1 - A2 , after the cavity 313 is exposed, the packaging method further includes: installing the optical fiber structure 370 in the cavity 313 .
[0161] The optical fiber in the optical fiber structure 370 is coupled with the photonic device in the photonic interposer 100 to achieve optical communication.
[0162] As an example, the optical fiber structure 370 may be fixed to the pad region in the optical coupling region 150 by an adhesive layer (eg, optical glue).
[0163] As an example, the optical fiber structure 370 may be an optical fiber array unit.
[0164] Combined with reference Fig.17 and Fig.18 , Fig.17 It is a top view. Fig.18 yes Fig.17 In the cross-sectional view at the A1-A2 position, after the second surface 100B of the photonic interposer 100 is bonded to the packaging substrate 170 and before the optical fiber structure 370 is installed in the cavity 313, the packaging method further includes: disposing a reinforcement ring 330 surrounding the photonic interposer 100 on the packaging substrate 170.
[0165] The reinforcement ring 330 helps to reduce the probability of warping of the packaging substrate 170 and is also helpful to improve the mechanical strength of the packaging structure. In addition, the reinforcement ring 330 surrounds the photonic interposer 100 and is also helpful to protect the photonic interposer 100 and the chip 200 to a certain extent.
[0166] It should be noted that the reinforcement ring 330 is first provided on the packaging substrate 170 to improve the flatness of the packaging substrate 170 . Accordingly, when the optical fiber structure 370 is subsequently installed in the cavity 313 , it is beneficial to improve the installation reliability of the optical fiber structure 370 on the photonic interposer 100 .
[0167] As an example, the reinforcement ring 330 is located at the edge of the packaging substrate 170 , thereby improving the effect of improving the warpage problem and providing sufficient space for the installation of the photonic interposer 100 .
[0168] As an example, the projection shape of the reinforcement ring 330 on the packaging substrate 170 is a square. In other embodiments, the projection shape of the reinforcement ring may also be other shapes (eg, a circle or an octagon, etc.).
[0169] In this embodiment, the material of the reinforcement ring 330 includes metal. The reinforcement ring 330 made of metal is also conducive to improving the heat dissipation performance of the packaging structure. As an example, the material of the reinforcement ring 330 may include copper, iron, nickel, stainless steel, nickel-iron alloy, etc.
[0170] In this embodiment, the connection layer 300 located between the first surface 100A and the cap 310 is used as the first connection layer, and the second connection layer 340 is used to fix the reinforcement ring 330 on the packaging substrate 170 .
[0171] The second connection layer 340 is used to fix the reinforcement ring 330 on the packaging substrate 170 and improve the bonding strength between the reinforcement ring 330 and the packaging substrate 170 .
[0172] In this embodiment, the second connection layer 340 may be an adhesive layer, and the material of the adhesive layer includes a silicon-based adhesive layer, a polyimide-based adhesive layer, an epoxy resin-based adhesive layer, or a polyurethane-based adhesive layer.
[0173] As an example, the material of the reinforcement ring 330 is metal, and thus the second connection layer 340 can be a thermally conductive adhesive layer, thereby improving the heat dissipation performance of the packaging structure.
[0174] refer to Fig.19 , Fig.19 is based on Fig.18 In the cross-sectional view, after a reinforcement ring 330 surrounding the photonic interposer 100 is arranged on the packaging substrate 170, and before the optical fiber structure 370 is installed in the cavity 313, the packaging method further includes: forming a third conductive connection 350 on the surface of the packaging substrate 170 facing away from the photonic interposer 100, and the third conductive connection 350 is electrically connected to the packaging substrate 170.
[0175] Specifically, the third conductive connection 350 is electrically connected to the second interconnect structure in the package substrate 170 .
[0176] The third conductive connector 350 is used to realize the electrical connection between the package substrate 170 and other circuits. For example, the package substrate 170 is subsequently assembled onto a PCB through the third conductive connector 350 .
[0177] It should be noted that the reinforcement ring 330 is first provided on the packaging substrate 170 to improve the flatness of the packaging substrate 170 , which is correspondingly beneficial to improving the electrical connection reliability between the third conductive connector 350 and the packaging substrate 170 .
[0178] In this embodiment, the third conductive connection member 350 is a bump, such as a solder ball. The third conductive connection member 350 can be made of a material with good conductivity, such as copper, aluminum, gold, nickel, silver, palladium and tin.
[0179] Continue to refer Fig.19 After setting a reinforcement ring 330 surrounding the photonic interposer 100 on the packaging substrate 170 and before installing the optical fiber structure 370 in the cavity 313 , the packaging method further includes: bonding a passive device 360 on the surface of the packaging substrate 170 facing away from the photonic interposer 100 .
[0180] Integrating the passive device 360 in the packaging structure can help improve the performance of the packaging structure.
[0181] Passive devices 360 may include capacitors, inductors, resistors, etc., thereby playing a specific role in the operation of the optoelectronic system.
[0182] It should be noted that the reinforcement ring 330 is first provided on the packaging substrate 170 , so as to improve the flatness of the packaging substrate 170 , which is helpful to improve the bonding reliability of the passive device 360 .
[0183] It should also be noted that the passive device 360 is located on the surface of the packaging substrate 170 facing away from the photonic interposer 100 , which can fully utilize the area of the packaging substrate 170 and is beneficial to reducing the lateral size of the packaging structure.
[0184] In addition, firstly forming the third conductive connector 350 on the packaging substrate 170 and bonding the passive device 360 to the packaging substrate 170, and then installing the optical fiber structure 370 in the cavity 313, on the one hand, is conducive to providing convenience for forming the third conductive connector 350 and bonding the passive device 360, and on the other hand, is also conducive to improving the installation reliability of the optical fiber structure 370 on the photonic interposer 100 and reducing the probability of damage to the optical fiber structure 370.
[0185] Figure 22 to Figure 24 It is a schematic diagram corresponding to each step in another embodiment of the packaging method of the present invention.
[0186] The similarities between this embodiment and the above-mentioned embodiment are not repeated here. The difference between this embodiment and the above-mentioned embodiment is that: Fig. 22 As shown, in the step of setting a cap 910 on the first surface (not marked) of the photonic interposer 400 and covering the optical coupling region (not marked), the cap 910 also includes a protrusion 914 protruding from the top cover 911 and facing the photonic interposer 400, and there is a gap between the protrusion 914 and the optical coupling region.
[0187] In this embodiment, the cap 910 includes a top cover 911, a protective ring 912 located between the top cover 911 and the photonic interposer 400, and a protrusion 914 protruding from the top cover 911. The protrusion 914 increases the solid part of the cap 910, which is beneficial to improve the mechanical strength of the cap 610.
[0188] Moreover, there is a gap between the protrusion 914 and the light coupling region, so as to prevent the protrusion 914 from contacting the light coupling region, thereby reducing the probability of the cap 910 causing damage to the light coupling region.
[0189] In addition, the top cover 911 and the protective ring 912 enclose a cavity 913 , and after the protrusion 914 and the top cover 911 are subsequently separated, the entire space of the cavity 913 can be exposed.
[0190] In this embodiment, the material of the cap 910 is epoxy molding compound, thereby reducing the difficulty of preparing the protrusion 914 .
[0191] In this embodiment, the maximum lateral dimension of the protrusion 914 is smaller than the lateral dimension of the cavity 913 , thereby reducing the difficulty of subsequently removing the protrusion 914 . Here, the lateral direction is parallel to the first surface of the photonic intermediary layer 400 .
[0192] In one embodiment, along the direction from the top cover 911 to the photonic interposer 400, the lateral dimension of the protrusion 914 decreases gradually, thereby further reducing the difficulty of subsequently removing the protrusion 914. For example, the protrusion 914 is in the shape of a prism.
[0193] refer to Fig.23 In the step of thinning the cap 910 , the top cover 911 is removed and the protection ring 912 is retained.
[0194] The top cover 911 is connected to the protrusion 914. When the top cover 911 is removed, the top cover 911 and the protrusion 914 are separated accordingly. At this time, the protrusion 914 is still located in the cavity 913 and always blocks the optical coupling area during the thinning process, thereby preventing pollutants from contaminating the optical coupling area.
[0195] Therefore, reference Fig.24 After the cap 910 is thinned, the step of exposing the cavity 913 further includes: removing the protrusion 914 remaining in the cavity 913 .
[0196] The protrusion 914 remaining in the cavity 913 is removed to expose the light coupling region.
[0197] In this embodiment, after the cap 910 is thinned, the protrusion 914 falls to the bottom of the cavity 913 . Therefore, the method of removing the protrusion 914 remaining in the cavity 913 includes: inverting the photonic intermediary layer 400 .
[0198] After the photon interposer 400 is inverted, the protrusion 914 may fall off from the cavity 913 because one end of the protrusion 914 facing away from the photon interposer 400 is suspended in the air.
[0199] It should be noted that the remaining steps may be the same as those in the aforementioned embodiment. For the specific description of the packaging method of this embodiment, reference may be made to the relevant contents in the aforementioned embodiment, which will not be repeated here.
[0200] It should also be noted that the packaging structure of the aforementioned embodiment can be obtained by adopting the packaging method of any of the aforementioned embodiments, or by adopting other packaging methods. For the specific description of the packaging method of the aforementioned embodiment, please refer to the relevant description of the packaging structure part.
[0201] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.
Claims
1. A packaging structure, characterized in that: include: A photonic interposer integrated with a photonic device, wherein a first surface of the photonic interposer has a light coupling region; A chip, bonded to the first surface and spaced apart from the optical coupling region, the chip being electrically connected to the photonic interposer; a guard ring, located on the first surface and surrounding the light coupling region, the guard ring having a cavity exposing the light coupling region; The plastic encapsulation layer is located on the side of the chip and the first surface outside the cavity, and the plastic encapsulation layer covers the side wall of the chip and the outer wall of the protection ring.
2. The packaging structure according to claim 1, characterized in that: The packaging structure also includes: an optical fiber structure installed in the cavity.
3. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: a connection layer located between the first surface and the protection ring.
4. The packaging structure according to claim 3, characterized in that: The connecting layer includes an epoxy resin layer or an adhesive layer.
5. The packaging structure according to claim 1, characterized in that: The material of the protection ring includes one or more of metal, epoxy molding compound, ceramic and silicon.
6. The packaging structure according to claim 1, characterized in that: The top of the plastic packaging layer, the top of the protection ring, and the top of the chip are all flush with each other.
7. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: a packaging substrate; The second surface of the photon interposer is bonded to the packaging substrate, the photon interposer is electrically connected to the packaging substrate, and the second surface is arranged opposite to the first surface.
8. The packaging structure according to claim 7, characterized in that: The packaging structure further includes a reinforcement ring located on the packaging substrate and surrounding the photon interposer.
9. The packaging structure according to claim 8, characterized in that: The material of the reinforcement ring includes metal.
10. The packaging structure according to claim 1, wherein: The chip includes one or more of an ASIC chip, an HBM chip, a CPU chip, a GPU chip and an FPGA chip.
11. A packaging method, characterized in that: include: Providing a photonic interposer integrated with a photonic device, wherein a first surface of the photonic interposer has a light coupling region; Bonding a chip on the first surface, wherein the chip is spaced apart from the optical coupling region, and the chip is electrically connected to the photonic interposer; A cap is provided on the first surface and covers the optical coupling region, wherein the cap has a cavity, and a projection of the cavity on the photonic interposer covers the optical coupling region; Forming a plastic encapsulation layer on the first surface of the chip side and the cap side, wherein the plastic encapsulation layer covers the side wall of the chip and the side wall of the cap; After the plastic encapsulation layer is formed, the cap is thinned to expose the cavity.
12. The packaging method according to claim 11, characterized in that: In the step of arranging a cap on the first surface and covering the optical coupling region, the cap is fixed on the first surface by using a connecting layer.
13. The packaging method according to claim 12, characterized in that: After forming a connection layer surrounding the optical coupling region on the first surface, the cap is fixed on the connection layer.
14. The packaging method according to claim 11, characterized in that: In the step of providing a cap on the first surface and covering the optical coupling area, the material of the cap includes one or more of metal, epoxy molding compound, ceramic and silicon.
15. The packaging method according to claim 11, characterized in that: In the step of providing a cap on the first surface and covering the optical coupling region, the cap includes a top cover and a protection ring located between the top cover and the photonic interposer, and the top cover and the protection ring enclose the cavity; In the step of thinning the cap, the top cover is removed and the protection ring is retained.
16. The packaging method according to claim 15, characterized in that: In the step of providing a cap on the first surface to cover the optical coupling region, the cap further comprises a protruding portion protruding from the top cover and facing the photon interposer, and a gap is formed between the protruding portion and the optical coupling region; After the cap is thinned, the step of exposing the cavity further includes: removing the protrusion remaining in the cavity.
17. The packaging method according to claim 16, characterized in that: The method of removing the protrusion remaining in the cavity includes: inverting the photonic intermediary layer.
18. The packaging method according to claim 16, characterized in that: The maximum transverse dimension of the protrusion is smaller than the transverse dimension of the cavity.
19. The packaging method according to claim 11, characterized in that: In the step of forming a plastic encapsulation layer on the first surface of the chip side and the cap side, the plastic encapsulation layer covers the top of the chip and the top of the cap; The plastic encapsulation layer and the cap are thinned sequentially to expose the cavity and make the top of the plastic encapsulation layer flush with the top of the chip.
20. The packaging method according to claim 11, characterized in that: After exposing the cavity, the packaging method further comprises: installing an optical fiber structure in the cavity.
21. The packaging method according to claim 20, characterized in that: After exposing the cavity and before installing the optical fiber structure in the cavity, the packaging method further includes: bonding the second surface of the photon interposer to a packaging substrate, the photon interposer being electrically connected to the packaging substrate, the second surface being arranged opposite to the first surface.
22. The packaging method according to claim 21, characterized in that: In the step of providing a photonic interposer integrated with photonic devices, the photonic interposer is temporarily bonded to a carrier, and a first surface of the photonic interposer faces away from the carrier; After exposing the cavity and before bonding the second surface of the photon interposer to the packaging substrate, the packaging method further includes: separating the carrier and the photon interposer.
23. The packaging method according to claim 21, characterized in that: After bonding the second surface of the photon interposer to the packaging substrate and before installing the optical fiber structure in the cavity, the packaging method further comprises: providing a reinforcement ring surrounding the photon interposer on the packaging substrate.
24. The packaging method according to claim 11, characterized in that: In the step of arranging a chip on the first surface, the chip includes one or more of an ASIC chip, an HBM chip, a CPU chip, a GPU chip and an FPGA chip.